./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 30e01a73 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 89806bf5e92e08240ee093afcceea93b900865db28253b34ac5f2402fc0c0eb8 --- Real Ultimate output --- This is Ultimate 0.2.3-dev-30e01a7 [2023-11-23 22:28:15,862 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-23 22:28:15,924 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-23 22:28:15,930 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-23 22:28:15,930 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-23 22:28:15,956 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-23 22:28:15,957 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-23 22:28:15,957 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-23 22:28:15,958 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-23 22:28:15,959 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-23 22:28:15,960 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-23 22:28:15,961 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-23 22:28:15,961 INFO L153 SettingsManager]: * Use SBE=true [2023-11-23 22:28:15,962 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-23 22:28:15,963 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-23 22:28:15,963 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-23 22:28:15,964 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-23 22:28:15,965 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-23 22:28:15,965 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-23 22:28:15,966 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-23 22:28:15,966 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-23 22:28:15,970 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-23 22:28:15,970 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-23 22:28:15,971 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-23 22:28:15,971 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-23 22:28:15,972 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-23 22:28:15,972 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-23 22:28:15,973 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-23 22:28:15,973 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-23 22:28:15,974 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-23 22:28:15,975 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-23 22:28:15,975 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-23 22:28:15,976 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-23 22:28:15,976 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-23 22:28:15,976 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-23 22:28:15,977 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-23 22:28:15,977 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-23 22:28:15,978 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-23 22:28:15,978 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 89806bf5e92e08240ee093afcceea93b900865db28253b34ac5f2402fc0c0eb8 [2023-11-23 22:28:16,293 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-23 22:28:16,324 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-23 22:28:16,327 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-23 22:28:16,329 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-23 22:28:16,330 INFO L274 PluginConnector]: CDTParser initialized [2023-11-23 22:28:16,331 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-1.i [2023-11-23 22:28:19,430 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-23 22:28:19,824 INFO L384 CDTParser]: Found 1 translation units. [2023-11-23 22:28:19,825 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-1.i [2023-11-23 22:28:19,852 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/data/74483d4a1/3cbb82d139d5497fbf21115dbe32e540/FLAG408df65ea [2023-11-23 22:28:19,876 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/data/74483d4a1/3cbb82d139d5497fbf21115dbe32e540 [2023-11-23 22:28:19,885 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-23 22:28:19,888 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-23 22:28:19,889 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-23 22:28:19,889 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-23 22:28:19,895 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-23 22:28:19,896 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:28:19" (1/1) ... [2023-11-23 22:28:19,897 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f7c2bdd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:19, skipping insertion in model container [2023-11-23 22:28:19,898 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:28:19" (1/1) ... [2023-11-23 22:28:19,978 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-23 22:28:20,485 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-23 22:28:20,507 INFO L202 MainTranslator]: Completed pre-run [2023-11-23 22:28:20,601 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-23 22:28:20,643 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-23 22:28:20,651 INFO L206 MainTranslator]: Completed translation [2023-11-23 22:28:20,651 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20 WrapperNode [2023-11-23 22:28:20,651 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-23 22:28:20,653 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-23 22:28:20,653 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-23 22:28:20,653 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-23 22:28:20,661 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:20,694 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:20,786 INFO L138 Inliner]: procedures = 176, calls = 280, calls flagged for inlining = 5, calls inlined = 4, statements flattened = 1335 [2023-11-23 22:28:20,786 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-23 22:28:20,787 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-23 22:28:20,787 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-23 22:28:20,787 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-23 22:28:20,821 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:20,822 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:20,843 INFO L184 PluginConnector]: Executing the observer HeapSplitter from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:20,973 INFO L189 HeapSplitter]: Split 258 memory accesses to 5 slices as follows [2, 5, 0, 34, 217] [2023-11-23 22:28:20,973 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:20,974 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:21,033 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:21,047 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:21,053 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:21,062 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:21,075 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-23 22:28:21,076 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-23 22:28:21,077 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-23 22:28:21,077 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-23 22:28:21,078 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (1/1) ... [2023-11-23 22:28:21,091 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-23 22:28:21,109 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:21,122 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-23 22:28:21,145 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-23 22:28:21,169 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-23 22:28:21,170 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-23 22:28:21,170 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-23 22:28:21,170 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-23 22:28:21,170 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#4 [2023-11-23 22:28:21,171 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-23 22:28:21,171 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-23 22:28:21,171 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-23 22:28:21,171 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-23 22:28:21,172 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#4 [2023-11-23 22:28:21,172 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-23 22:28:21,172 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-23 22:28:21,172 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-23 22:28:21,172 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-23 22:28:21,174 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#4 [2023-11-23 22:28:21,175 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-23 22:28:21,175 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-23 22:28:21,175 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-23 22:28:21,175 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-23 22:28:21,175 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#4 [2023-11-23 22:28:21,176 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-23 22:28:21,176 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-23 22:28:21,176 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-23 22:28:21,176 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-23 22:28:21,177 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-23 22:28:21,178 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-23 22:28:21,178 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#4 [2023-11-23 22:28:21,178 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-23 22:28:21,178 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-23 22:28:21,179 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-23 22:28:21,180 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-23 22:28:21,180 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-23 22:28:21,180 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-23 22:28:21,180 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#4 [2023-11-23 22:28:21,181 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-23 22:28:21,181 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-23 22:28:21,182 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-23 22:28:21,182 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-23 22:28:21,182 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-23 22:28:21,182 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#4 [2023-11-23 22:28:21,182 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-23 22:28:21,183 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-23 22:28:21,483 INFO L241 CfgBuilder]: Building ICFG [2023-11-23 22:28:21,485 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-23 22:28:21,488 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-23 22:28:21,548 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-23 22:28:21,567 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-23 22:28:21,584 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-23 22:28:21,600 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-23 22:28:23,361 INFO L282 CfgBuilder]: Performing block encoding [2023-11-23 22:28:23,379 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-23 22:28:23,380 INFO L309 CfgBuilder]: Removed 63 assume(true) statements. [2023-11-23 22:28:23,382 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:28:23 BoogieIcfgContainer [2023-11-23 22:28:23,382 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-23 22:28:23,383 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-23 22:28:23,383 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-23 22:28:23,387 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-23 22:28:23,388 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-23 22:28:23,388 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 23.11 10:28:19" (1/3) ... [2023-11-23 22:28:23,389 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4e61ae7a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 10:28:23, skipping insertion in model container [2023-11-23 22:28:23,390 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-23 22:28:23,390 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:28:20" (2/3) ... [2023-11-23 22:28:23,390 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4e61ae7a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 10:28:23, skipping insertion in model container [2023-11-23 22:28:23,390 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-23 22:28:23,391 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:28:23" (3/3) ... [2023-11-23 22:28:23,392 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_FNV_test7-1.i [2023-11-23 22:28:23,457 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-23 22:28:23,457 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-23 22:28:23,458 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-23 22:28:23,458 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-23 22:28:23,458 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-23 22:28:23,458 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-23 22:28:23,458 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-23 22:28:23,459 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-23 22:28:23,465 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 355 states, 350 states have (on average 1.6942857142857144) internal successors, (593), 350 states have internal predecessors, (593), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:23,527 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 343 [2023-11-23 22:28:23,528 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:23,528 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:23,535 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:23,535 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-23 22:28:23,536 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-23 22:28:23,539 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 355 states, 350 states have (on average 1.6942857142857144) internal successors, (593), 350 states have internal predecessors, (593), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:23,559 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 343 [2023-11-23 22:28:23,559 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:23,559 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:23,560 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:23,560 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-23 22:28:23,568 INFO L748 eck$LassoCheckResult]: Stem: 218#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 231#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 307#L715-4true [2023-11-23 22:28:23,569 INFO L750 eck$LassoCheckResult]: Loop: 307#L715-4true call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 288#L715-1true assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 40#L717true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 141#L717-2true call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 264#L722-269true assume !true; 85#L715-3true call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 307#L715-4true [2023-11-23 22:28:23,575 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:23,576 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 1 times [2023-11-23 22:28:23,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:23,587 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1493519854] [2023-11-23 22:28:23,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:23,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:23,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:23,741 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:23,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:23,840 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:23,846 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:23,846 INFO L85 PathProgramCache]: Analyzing trace with hash -1893817108, now seen corresponding path program 1 times [2023-11-23 22:28:23,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:23,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [8031922] [2023-11-23 22:28:23,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:23,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:23,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:23,939 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:23,944 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [8031922] [2023-11-23 22:28:23,945 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-23 22:28:23,945 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2116702356] [2023-11-23 22:28:23,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:23,946 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:23,946 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:23,952 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:23,988 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-23 22:28:24,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:24,135 INFO L262 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-23 22:28:24,137 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:24,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:24,157 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:24,157 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2116702356] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:24,158 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:24,158 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-23 22:28:24,159 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1836200739] [2023-11-23 22:28:24,160 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:24,164 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:24,165 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:24,197 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-23 22:28:24,198 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-23 22:28:24,201 INFO L87 Difference]: Start difference. First operand has 355 states, 350 states have (on average 1.6942857142857144) internal successors, (593), 350 states have internal predecessors, (593), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:24,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:24,232 INFO L93 Difference]: Finished difference Result 352 states and 525 transitions. [2023-11-23 22:28:24,234 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 352 states and 525 transitions. [2023-11-23 22:28:24,238 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 337 [2023-11-23 22:28:24,249 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 352 states to 344 states and 517 transitions. [2023-11-23 22:28:24,250 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 344 [2023-11-23 22:28:24,252 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 344 [2023-11-23 22:28:24,253 INFO L73 IsDeterministic]: Start isDeterministic. Operand 344 states and 517 transitions. [2023-11-23 22:28:24,256 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:24,257 INFO L218 hiAutomatonCegarLoop]: Abstraction has 344 states and 517 transitions. [2023-11-23 22:28:24,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states and 517 transitions. [2023-11-23 22:28:24,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 344. [2023-11-23 22:28:24,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 344 states, 340 states have (on average 1.5029411764705882) internal successors, (511), 339 states have internal predecessors, (511), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:24,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 517 transitions. [2023-11-23 22:28:24,308 INFO L240 hiAutomatonCegarLoop]: Abstraction has 344 states and 517 transitions. [2023-11-23 22:28:24,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-23 22:28:24,313 INFO L428 stractBuchiCegarLoop]: Abstraction has 344 states and 517 transitions. [2023-11-23 22:28:24,313 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-23 22:28:24,313 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 344 states and 517 transitions. [2023-11-23 22:28:24,315 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 337 [2023-11-23 22:28:24,316 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:24,316 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:24,318 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:24,318 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:24,319 INFO L748 eck$LassoCheckResult]: Stem: 1027#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 1028#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 889#L715-4 [2023-11-23 22:28:24,321 INFO L750 eck$LassoCheckResult]: Loop: 889#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1066#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 816#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 817#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 964#L722-269 havoc main_~_ha_hashv~0#1; 1054#L722-176 goto; 1000#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 846#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 847#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 777#L722-73 assume main_#t~switch31#1;call main_#t~mem32#1 := read~int#4(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 778#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 890#L722-76 assume main_#t~switch31#1;call main_#t~mem33#1 := read~int#4(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 891#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 931#L722-79 assume !main_#t~switch31#1; 932#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 1004#L722-82 assume main_#t~switch31#1;call main_#t~mem35#1 := read~int#4(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 818#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 819#L722-85 assume main_#t~switch31#1;call main_#t~mem36#1 := read~int#4(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 850#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 841#L722-88 assume main_#t~switch31#1;call main_#t~mem37#1 := read~int#4(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 842#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 1043#L722-91 assume main_#t~switch31#1;call main_#t~mem38#1 := read~int#4(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem38#1; 765#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 766#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 767#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 768#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 982#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 793#L722-100 assume !main_#t~switch31#1; 794#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 924#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 1052#L722-105 havoc main_#t~switch31#1; 1041#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1037#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 914#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1030#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 945#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 946#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 750#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 965#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 776#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 743#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 744#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 833#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 855#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 985#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 802#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 904#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 905#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 977#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 735#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 736#L722-170 goto; 990#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 957#L722-173 goto; 958#L722-175 goto; 1025#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1046#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 1047#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 825#L722-193 goto; 826#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 857#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 858#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 936#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 952#L722-202 goto; 834#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 835#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 988#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 849#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 756#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 757#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 912#L722-260 goto; 991#L722-262 havoc main_~_ha_bkt~0#1; 962#L722-263 goto; 963#L722-265 goto; 880#L722-267 havoc main_~_ha_hashv~0#1; 759#L722-268 goto; 760#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 889#L715-4 [2023-11-23 22:28:24,322 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:24,322 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 2 times [2023-11-23 22:28:24,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:24,323 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [794346104] [2023-11-23 22:28:24,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:24,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:24,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:24,345 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:24,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:24,382 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:24,384 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:24,385 INFO L85 PathProgramCache]: Analyzing trace with hash -1699457835, now seen corresponding path program 1 times [2023-11-23 22:28:24,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:24,385 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1172832120] [2023-11-23 22:28:24,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:24,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:24,459 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:24,459 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1107844978] [2023-11-23 22:28:24,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:24,460 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:24,460 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:24,502 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:24,524 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-23 22:28:24,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:24,807 INFO L262 TraceCheckSpWp]: Trace formula consists of 522 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-23 22:28:24,811 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:24,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:24,851 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:24,852 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:24,852 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1172832120] [2023-11-23 22:28:24,852 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:24,852 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1107844978] [2023-11-23 22:28:24,853 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1107844978] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:24,853 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:24,853 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-23 22:28:24,853 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [606385334] [2023-11-23 22:28:24,854 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:24,854 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:24,854 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:24,855 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-23 22:28:24,855 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-23 22:28:24,855 INFO L87 Difference]: Start difference. First operand 344 states and 517 transitions. cyclomatic complexity: 176 Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:24,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:24,996 INFO L93 Difference]: Finished difference Result 365 states and 538 transitions. [2023-11-23 22:28:24,997 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 365 states and 538 transitions. [2023-11-23 22:28:25,000 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 358 [2023-11-23 22:28:25,005 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 365 states to 365 states and 538 transitions. [2023-11-23 22:28:25,005 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 365 [2023-11-23 22:28:25,006 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 365 [2023-11-23 22:28:25,006 INFO L73 IsDeterministic]: Start isDeterministic. Operand 365 states and 538 transitions. [2023-11-23 22:28:25,008 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:25,008 INFO L218 hiAutomatonCegarLoop]: Abstraction has 365 states and 538 transitions. [2023-11-23 22:28:25,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states and 538 transitions. [2023-11-23 22:28:25,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 364. [2023-11-23 22:28:25,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 364 states, 360 states have (on average 1.475) internal successors, (531), 359 states have internal predecessors, (531), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:25,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 537 transitions. [2023-11-23 22:28:25,026 INFO L240 hiAutomatonCegarLoop]: Abstraction has 364 states and 537 transitions. [2023-11-23 22:28:25,026 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-23 22:28:25,027 INFO L428 stractBuchiCegarLoop]: Abstraction has 364 states and 537 transitions. [2023-11-23 22:28:25,027 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-23 22:28:25,027 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 364 states and 537 transitions. [2023-11-23 22:28:25,030 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 357 [2023-11-23 22:28:25,030 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:25,030 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:25,032 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:25,032 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:25,032 INFO L748 eck$LassoCheckResult]: Stem: 1972#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 1973#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1831#L715-4 [2023-11-23 22:28:25,033 INFO L750 eck$LassoCheckResult]: Loop: 1831#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2012#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 1755#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1756#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 1908#L722-269 havoc main_~_ha_hashv~0#1; 2000#L722-176 goto; 1944#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1787#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1788#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 1715#L722-73 assume main_#t~switch31#1;call main_#t~mem32#1 := read~int#4(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 1716#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 1832#L722-76 assume main_#t~switch31#1;call main_#t~mem33#1 := read~int#4(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 1833#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 1874#L722-79 assume main_#t~switch31#1;call main_#t~mem34#1 := read~int#4(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 1875#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 2016#L722-82 assume main_#t~switch31#1;call main_#t~mem35#1 := read~int#4(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 1759#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 1760#L722-85 assume main_#t~switch31#1;call main_#t~mem36#1 := read~int#4(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 1876#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 1782#L722-88 assume main_#t~switch31#1;call main_#t~mem37#1 := read~int#4(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1783#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 1988#L722-91 assume main_#t~switch31#1;call main_#t~mem38#1 := read~int#4(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem38#1; 1705#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 1706#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1707#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 1708#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 1925#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 1737#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 1738#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 1998#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 1999#L722-105 havoc main_#t~switch31#1; 1986#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1984#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1857#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1976#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1889#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1890#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1692#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1912#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1721#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1686#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1687#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1774#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1801#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1929#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1747#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1851#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1852#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1926#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1681#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 1682#L722-170 goto; 1934#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1901#L722-173 goto; 1902#L722-175 goto; 1970#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1991#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 1992#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 1764#L722-193 goto; 1765#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 1796#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 1797#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 1880#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 1895#L722-202 goto; 1775#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1776#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 1931#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 1790#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 1696#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 1697#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1854#L722-260 goto; 1935#L722-262 havoc main_~_ha_bkt~0#1; 1906#L722-263 goto; 1907#L722-265 goto; 1820#L722-267 havoc main_~_ha_hashv~0#1; 1699#L722-268 goto; 1700#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 1831#L715-4 [2023-11-23 22:28:25,033 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:25,034 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 3 times [2023-11-23 22:28:25,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:25,034 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [764680150] [2023-11-23 22:28:25,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:25,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:25,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:25,051 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:25,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:25,070 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:25,071 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:25,071 INFO L85 PathProgramCache]: Analyzing trace with hash -1266542511, now seen corresponding path program 1 times [2023-11-23 22:28:25,071 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:25,072 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271105553] [2023-11-23 22:28:25,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:25,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:25,165 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:25,167 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1365743027] [2023-11-23 22:28:25,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:25,168 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:25,168 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:25,174 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:25,177 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-23 22:28:25,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:25,496 INFO L262 TraceCheckSpWp]: Trace formula consists of 534 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-23 22:28:25,500 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:25,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:25,529 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:25,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:25,529 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271105553] [2023-11-23 22:28:25,530 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:25,530 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1365743027] [2023-11-23 22:28:25,530 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1365743027] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:25,530 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:25,531 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-23 22:28:25,531 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [648134560] [2023-11-23 22:28:25,531 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:25,532 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:25,532 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:25,533 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-23 22:28:25,533 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-23 22:28:25,533 INFO L87 Difference]: Start difference. First operand 364 states and 537 transitions. cyclomatic complexity: 176 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:25,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:25,637 INFO L93 Difference]: Finished difference Result 351 states and 517 transitions. [2023-11-23 22:28:25,637 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 351 states and 517 transitions. [2023-11-23 22:28:25,641 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 344 [2023-11-23 22:28:25,645 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 351 states to 351 states and 517 transitions. [2023-11-23 22:28:25,645 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 351 [2023-11-23 22:28:25,646 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 351 [2023-11-23 22:28:25,646 INFO L73 IsDeterministic]: Start isDeterministic. Operand 351 states and 517 transitions. [2023-11-23 22:28:25,647 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:25,647 INFO L218 hiAutomatonCegarLoop]: Abstraction has 351 states and 517 transitions. [2023-11-23 22:28:25,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 351 states and 517 transitions. [2023-11-23 22:28:25,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 351 to 350. [2023-11-23 22:28:25,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 350 states, 346 states have (on average 1.4739884393063585) internal successors, (510), 345 states have internal predecessors, (510), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:25,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 516 transitions. [2023-11-23 22:28:25,660 INFO L240 hiAutomatonCegarLoop]: Abstraction has 350 states and 516 transitions. [2023-11-23 22:28:25,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-23 22:28:25,661 INFO L428 stractBuchiCegarLoop]: Abstraction has 350 states and 516 transitions. [2023-11-23 22:28:25,662 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-23 22:28:25,662 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 350 states and 516 transitions. [2023-11-23 22:28:25,664 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 343 [2023-11-23 22:28:25,664 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:25,664 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:25,666 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:25,666 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:25,667 INFO L748 eck$LassoCheckResult]: Stem: 2918#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 2919#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2778#L715-4 [2023-11-23 22:28:25,667 INFO L750 eck$LassoCheckResult]: Loop: 2778#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2959#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 2703#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2704#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 2854#L722-269 havoc main_~_ha_hashv~0#1; 2946#L722-176 goto; 2891#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2735#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2736#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 2664#L722-73 assume !main_#t~switch31#1; 2665#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 2779#L722-76 assume !main_#t~switch31#1; 2780#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 2821#L722-79 assume !main_#t~switch31#1; 2822#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 2895#L722-82 assume !main_#t~switch31#1; 2707#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 2708#L722-85 assume !main_#t~switch31#1; 2739#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 2730#L722-88 assume !main_#t~switch31#1; 2731#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 2934#L722-91 assume !main_#t~switch31#1; 2654#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 2655#L722-94 assume !main_#t~switch31#1; 2656#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 2657#L722-97 assume !main_#t~switch31#1; 2966#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 2967#L722-100 assume !main_#t~switch31#1; 2813#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 2814#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 2945#L722-105 havoc main_#t~switch31#1; 2932#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2930#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2804#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2922#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2835#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2836#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2641#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2858#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2669#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2635#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2636#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2722#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2746#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2876#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2693#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2796#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2797#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2871#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2630#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 2631#L722-170 goto; 2887#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2847#L722-173 goto; 2848#L722-175 goto; 2916#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2937#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 2938#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 2714#L722-193 goto; 2715#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 2748#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 2749#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 2829#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 2842#L722-202 goto; 2723#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2724#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 2879#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 2738#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 2647#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 2648#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2801#L722-260 goto; 2880#L722-262 havoc main_~_ha_bkt~0#1; 2850#L722-263 goto; 2851#L722-265 goto; 2767#L722-267 havoc main_~_ha_hashv~0#1; 2643#L722-268 goto; 2644#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 2778#L715-4 [2023-11-23 22:28:25,668 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:25,668 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 4 times [2023-11-23 22:28:25,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:25,669 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1122301687] [2023-11-23 22:28:25,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:25,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:25,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:25,685 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:25,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:25,707 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:25,709 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:25,709 INFO L85 PathProgramCache]: Analyzing trace with hash -1016499739, now seen corresponding path program 1 times [2023-11-23 22:28:25,709 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:25,710 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469536807] [2023-11-23 22:28:25,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:25,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:25,782 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:25,785 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [915879662] [2023-11-23 22:28:25,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:25,786 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:25,787 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:25,792 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:25,805 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-23 22:28:26,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:26,150 INFO L262 TraceCheckSpWp]: Trace formula consists of 474 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-23 22:28:26,153 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:26,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:26,242 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:26,243 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:26,243 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [469536807] [2023-11-23 22:28:26,243 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:26,243 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [915879662] [2023-11-23 22:28:26,244 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [915879662] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:26,244 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:26,244 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-23 22:28:26,244 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1509305368] [2023-11-23 22:28:26,244 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:26,245 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:26,245 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:26,246 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-23 22:28:26,246 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-23 22:28:26,246 INFO L87 Difference]: Start difference. First operand 350 states and 516 transitions. cyclomatic complexity: 169 Second operand has 5 states, 5 states have (on average 15.2) internal successors, (76), 5 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:26,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:26,391 INFO L93 Difference]: Finished difference Result 460 states and 682 transitions. [2023-11-23 22:28:26,391 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 460 states and 682 transitions. [2023-11-23 22:28:26,396 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 453 [2023-11-23 22:28:26,401 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 460 states to 460 states and 682 transitions. [2023-11-23 22:28:26,401 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 460 [2023-11-23 22:28:26,402 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 460 [2023-11-23 22:28:26,402 INFO L73 IsDeterministic]: Start isDeterministic. Operand 460 states and 682 transitions. [2023-11-23 22:28:26,403 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:26,403 INFO L218 hiAutomatonCegarLoop]: Abstraction has 460 states and 682 transitions. [2023-11-23 22:28:26,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 460 states and 682 transitions. [2023-11-23 22:28:26,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 460 to 373. [2023-11-23 22:28:26,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 373 states, 369 states have (on average 1.4498644986449865) internal successors, (535), 368 states have internal predecessors, (535), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:26,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 373 states to 373 states and 541 transitions. [2023-11-23 22:28:26,414 INFO L240 hiAutomatonCegarLoop]: Abstraction has 373 states and 541 transitions. [2023-11-23 22:28:26,415 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-23 22:28:26,416 INFO L428 stractBuchiCegarLoop]: Abstraction has 373 states and 541 transitions. [2023-11-23 22:28:26,416 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-23 22:28:26,416 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 373 states and 541 transitions. [2023-11-23 22:28:26,418 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 366 [2023-11-23 22:28:26,418 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:26,418 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:26,419 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:26,419 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:26,420 INFO L748 eck$LassoCheckResult]: Stem: 3966#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 3967#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3822#L715-4 [2023-11-23 22:28:26,420 INFO L750 eck$LassoCheckResult]: Loop: 3822#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4013#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 3743#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3744#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 3899#L722-269 havoc main_~_ha_hashv~0#1; 3997#L722-176 goto; 3935#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3936#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3989#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 3990#L722-73 assume !main_#t~switch31#1; 4023#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 4024#L722-76 assume !main_#t~switch31#1; 3944#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 3945#L722-79 assume !main_#t~switch31#1; 3940#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 3941#L722-82 assume !main_#t~switch31#1; 3750#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 3751#L722-85 assume !main_#t~switch31#1; 3782#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 3783#L722-88 assume !main_#t~switch31#1; 3982#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 3983#L722-91 assume !main_#t~switch31#1; 3697#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 3698#L722-94 assume !main_#t~switch31#1; 4034#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 4032#L722-97 assume !main_#t~switch31#1; 4030#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 4028#L722-100 assume !main_#t~switch31#1; 4026#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 3995#L722-103 assume !main_#t~switch31#1; 3996#L722-105 havoc main_#t~switch31#1; 3980#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3978#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3848#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3970#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3880#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3881#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3684#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3901#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3712#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3678#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3679#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3765#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3790#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3920#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3736#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3840#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3841#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3915#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3671#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 3672#L722-170 goto; 3927#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3892#L722-173 goto; 3893#L722-175 goto; 3964#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3986#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 3987#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 3757#L722-193 goto; 3758#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 3792#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 3793#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 3872#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 3887#L722-202 goto; 3766#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3767#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 3923#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 3781#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 3688#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 3689#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3845#L722-260 goto; 3928#L722-262 havoc main_~_ha_bkt~0#1; 3897#L722-263 goto; 3898#L722-265 goto; 3817#L722-267 havoc main_~_ha_hashv~0#1; 3691#L722-268 goto; 3692#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 3822#L715-4 [2023-11-23 22:28:26,420 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:26,421 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 5 times [2023-11-23 22:28:26,421 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:26,421 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441688462] [2023-11-23 22:28:26,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:26,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:26,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:26,443 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:26,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:26,478 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:26,478 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:26,478 INFO L85 PathProgramCache]: Analyzing trace with hash -1369588121, now seen corresponding path program 1 times [2023-11-23 22:28:26,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:26,479 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382533090] [2023-11-23 22:28:26,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:26,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:26,543 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:26,543 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1282455322] [2023-11-23 22:28:26,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:26,545 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:26,545 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:26,550 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:26,562 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-23 22:28:26,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:26,863 INFO L262 TraceCheckSpWp]: Trace formula consists of 468 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-23 22:28:26,876 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:26,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:26,924 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:26,925 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:26,925 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382533090] [2023-11-23 22:28:26,925 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:26,925 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1282455322] [2023-11-23 22:28:26,925 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1282455322] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:26,926 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:26,926 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-23 22:28:26,926 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1139364289] [2023-11-23 22:28:26,927 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:26,928 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:26,929 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:26,929 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-23 22:28:26,929 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-23 22:28:26,930 INFO L87 Difference]: Start difference. First operand 373 states and 541 transitions. cyclomatic complexity: 171 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:27,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:27,002 INFO L93 Difference]: Finished difference Result 305 states and 439 transitions. [2023-11-23 22:28:27,002 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 305 states and 439 transitions. [2023-11-23 22:28:27,005 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 298 [2023-11-23 22:28:27,009 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 305 states to 305 states and 439 transitions. [2023-11-23 22:28:27,009 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 305 [2023-11-23 22:28:27,010 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 305 [2023-11-23 22:28:27,011 INFO L73 IsDeterministic]: Start isDeterministic. Operand 305 states and 439 transitions. [2023-11-23 22:28:27,011 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:27,012 INFO L218 hiAutomatonCegarLoop]: Abstraction has 305 states and 439 transitions. [2023-11-23 22:28:27,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states and 439 transitions. [2023-11-23 22:28:27,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 305. [2023-11-23 22:28:27,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 305 states, 301 states have (on average 1.4385382059800664) internal successors, (433), 300 states have internal predecessors, (433), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:27,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 439 transitions. [2023-11-23 22:28:27,024 INFO L240 hiAutomatonCegarLoop]: Abstraction has 305 states and 439 transitions. [2023-11-23 22:28:27,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-23 22:28:27,033 INFO L428 stractBuchiCegarLoop]: Abstraction has 305 states and 439 transitions. [2023-11-23 22:28:27,033 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-23 22:28:27,034 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 305 states and 439 transitions. [2023-11-23 22:28:27,035 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 298 [2023-11-23 22:28:27,035 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:27,036 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:27,038 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:27,039 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:27,039 INFO L748 eck$LassoCheckResult]: Stem: 4842#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 4843#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4717#L715-4 [2023-11-23 22:28:27,039 INFO L750 eck$LassoCheckResult]: Loop: 4717#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4873#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 4647#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4648#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 4783#L722-269 havoc main_~_ha_hashv~0#1; 4865#L722-176 goto; 4819#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4679#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4680#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 4613#L722-73 assume !main_#t~switch31#1; 4614#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 4718#L722-76 assume !main_#t~switch31#1; 4719#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 4751#L722-79 assume !main_#t~switch31#1; 4752#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 4822#L722-82 assume !main_#t~switch31#1; 4654#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 4655#L722-85 assume !main_#t~switch31#1; 4682#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 4672#L722-88 assume !main_#t~switch31#1; 4673#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 4855#L722-91 assume !main_#t~switch31#1; 4605#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 4606#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 4607#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 4608#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 4798#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 4634#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 4635#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 4746#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 4864#L722-105 havoc main_#t~switch31#1; 4853#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4851#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4740#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4846#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 4764#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4765#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 4592#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4785#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4618#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4586#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4587#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4669#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4689#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4804#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4640#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4732#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4733#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4799#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4579#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 4580#L722-170 goto; 4811#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4776#L722-173 goto; 4777#L722-175 goto; 4840#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4858#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 4859#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 4661#L722-193 goto; 4662#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 4691#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 4692#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 4756#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 4771#L722-202 goto; 4670#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4671#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 4807#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 4681#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 4596#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 4597#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4737#L722-260 goto; 4812#L722-262 havoc main_~_ha_bkt~0#1; 4781#L722-263 goto; 4782#L722-265 goto; 4714#L722-267 havoc main_~_ha_hashv~0#1; 4599#L722-268 goto; 4600#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 4717#L715-4 [2023-11-23 22:28:27,040 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:27,040 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 6 times [2023-11-23 22:28:27,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:27,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [868368395] [2023-11-23 22:28:27,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:27,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:27,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:27,083 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:27,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:27,099 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:27,100 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:27,100 INFO L85 PathProgramCache]: Analyzing trace with hash 583704415, now seen corresponding path program 1 times [2023-11-23 22:28:27,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:27,100 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820400024] [2023-11-23 22:28:27,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:27,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:27,147 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:27,148 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [98604220] [2023-11-23 22:28:27,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:27,148 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:27,149 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:27,152 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:27,162 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-23 22:28:27,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:27,833 INFO L262 TraceCheckSpWp]: Trace formula consists of 492 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-23 22:28:27,835 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:27,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:27,978 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:27,979 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:27,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1820400024] [2023-11-23 22:28:27,979 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:27,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [98604220] [2023-11-23 22:28:27,979 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [98604220] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:27,980 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:27,980 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-23 22:28:27,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067226114] [2023-11-23 22:28:27,980 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:27,981 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:27,981 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:27,981 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2023-11-23 22:28:27,982 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2023-11-23 22:28:27,982 INFO L87 Difference]: Start difference. First operand 305 states and 439 transitions. cyclomatic complexity: 137 Second operand has 8 states, 8 states have (on average 9.5) internal successors, (76), 8 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:28,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:28,283 INFO L93 Difference]: Finished difference Result 315 states and 451 transitions. [2023-11-23 22:28:28,283 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 315 states and 451 transitions. [2023-11-23 22:28:28,286 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 308 [2023-11-23 22:28:28,289 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 315 states to 315 states and 451 transitions. [2023-11-23 22:28:28,290 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 315 [2023-11-23 22:28:28,290 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 315 [2023-11-23 22:28:28,290 INFO L73 IsDeterministic]: Start isDeterministic. Operand 315 states and 451 transitions. [2023-11-23 22:28:28,291 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:28,291 INFO L218 hiAutomatonCegarLoop]: Abstraction has 315 states and 451 transitions. [2023-11-23 22:28:28,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states and 451 transitions. [2023-11-23 22:28:28,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 312. [2023-11-23 22:28:28,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 312 states, 308 states have (on average 1.4318181818181819) internal successors, (441), 307 states have internal predecessors, (441), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:28,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312 states to 312 states and 447 transitions. [2023-11-23 22:28:28,300 INFO L240 hiAutomatonCegarLoop]: Abstraction has 312 states and 447 transitions. [2023-11-23 22:28:28,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-23 22:28:28,301 INFO L428 stractBuchiCegarLoop]: Abstraction has 312 states and 447 transitions. [2023-11-23 22:28:28,301 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-23 22:28:28,301 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 312 states and 447 transitions. [2023-11-23 22:28:28,303 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 305 [2023-11-23 22:28:28,303 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:28,303 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:28,304 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:28,304 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:28,305 INFO L748 eck$LassoCheckResult]: Stem: 5699#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 5700#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5573#L715-4 [2023-11-23 22:28:28,305 INFO L750 eck$LassoCheckResult]: Loop: 5573#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5731#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 5503#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5504#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 5639#L722-269 havoc main_~_ha_hashv~0#1; 5722#L722-176 goto; 5675#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5535#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5536#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 5469#L722-73 assume !main_#t~switch31#1; 5470#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 5574#L722-76 assume !main_#t~switch31#1; 5575#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 5607#L722-79 assume !main_#t~switch31#1; 5608#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 5678#L722-82 assume !main_#t~switch31#1; 5510#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 5511#L722-85 assume !main_#t~switch31#1; 5538#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 5528#L722-88 assume !main_#t~switch31#1; 5529#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 5712#L722-91 assume !main_#t~switch31#1; 5461#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 5462#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 5463#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 5464#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 5654#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 5490#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 5491#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 5602#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 5721#L722-105 havoc main_#t~switch31#1; 5710#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5707#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5708#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5741#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 5740#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5734#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 5735#L722-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1; 5448#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5641#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5474#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5442#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5443#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5525#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5545#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5660#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5496#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5588#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5589#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5655#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5435#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 5436#L722-170 goto; 5667#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5632#L722-173 goto; 5633#L722-175 goto; 5696#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5715#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 5716#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 5517#L722-193 goto; 5518#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 5547#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 5548#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 5612#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 5627#L722-202 goto; 5526#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5527#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 5663#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 5537#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 5452#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 5453#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5593#L722-260 goto; 5671#L722-262 havoc main_~_ha_bkt~0#1; 5637#L722-263 goto; 5638#L722-265 goto; 5570#L722-267 havoc main_~_ha_hashv~0#1; 5455#L722-268 goto; 5456#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 5573#L715-4 [2023-11-23 22:28:28,306 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:28,306 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 7 times [2023-11-23 22:28:28,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:28,306 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257082859] [2023-11-23 22:28:28,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:28,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:28,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:28,321 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:28,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:28,336 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:28,336 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:28,337 INFO L85 PathProgramCache]: Analyzing trace with hash -1862749013, now seen corresponding path program 1 times [2023-11-23 22:28:28,337 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:28,337 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139101231] [2023-11-23 22:28:28,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:28,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:28,389 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:28,390 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1521400957] [2023-11-23 22:28:28,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:28,390 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:28,390 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:28,393 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:28,419 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-23 22:28:28,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:28,851 INFO L262 TraceCheckSpWp]: Trace formula consists of 493 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-23 22:28:28,854 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:29,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:29,103 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:29,104 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:29,104 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2139101231] [2023-11-23 22:28:29,104 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:29,104 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1521400957] [2023-11-23 22:28:29,105 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1521400957] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:29,105 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:29,105 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-23 22:28:29,108 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2017324602] [2023-11-23 22:28:29,109 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:29,109 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:29,109 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:29,110 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-23 22:28:29,117 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-23 22:28:29,118 INFO L87 Difference]: Start difference. First operand 312 states and 447 transitions. cyclomatic complexity: 138 Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:29,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:29,458 INFO L93 Difference]: Finished difference Result 310 states and 443 transitions. [2023-11-23 22:28:29,458 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 310 states and 443 transitions. [2023-11-23 22:28:29,463 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 303 [2023-11-23 22:28:29,467 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 310 states to 310 states and 443 transitions. [2023-11-23 22:28:29,467 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 310 [2023-11-23 22:28:29,468 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 310 [2023-11-23 22:28:29,469 INFO L73 IsDeterministic]: Start isDeterministic. Operand 310 states and 443 transitions. [2023-11-23 22:28:29,470 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:29,470 INFO L218 hiAutomatonCegarLoop]: Abstraction has 310 states and 443 transitions. [2023-11-23 22:28:29,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states and 443 transitions. [2023-11-23 22:28:29,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 309. [2023-11-23 22:28:29,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 309 states, 305 states have (on average 1.4295081967213115) internal successors, (436), 304 states have internal predecessors, (436), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:29,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 309 states to 309 states and 442 transitions. [2023-11-23 22:28:29,479 INFO L240 hiAutomatonCegarLoop]: Abstraction has 309 states and 442 transitions. [2023-11-23 22:28:29,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-23 22:28:29,480 INFO L428 stractBuchiCegarLoop]: Abstraction has 309 states and 442 transitions. [2023-11-23 22:28:29,480 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-23 22:28:29,480 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 309 states and 442 transitions. [2023-11-23 22:28:29,482 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 302 [2023-11-23 22:28:29,482 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:29,482 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:29,483 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:29,483 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:29,483 INFO L748 eck$LassoCheckResult]: Stem: 6557#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 6558#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6432#L715-4 [2023-11-23 22:28:29,484 INFO L750 eck$LassoCheckResult]: Loop: 6432#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6590#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 6365#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6366#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 6498#L722-269 havoc main_~_ha_hashv~0#1; 6582#L722-176 goto; 6534#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6394#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6395#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 6328#L722-73 assume !main_#t~switch31#1; 6329#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 6433#L722-76 assume !main_#t~switch31#1; 6434#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 6466#L722-79 assume !main_#t~switch31#1; 6467#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 6537#L722-82 assume !main_#t~switch31#1; 6369#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 6370#L722-85 assume !main_#t~switch31#1; 6397#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 6389#L722-88 assume !main_#t~switch31#1; 6390#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 6572#L722-91 assume !main_#t~switch31#1; 6320#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 6321#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 6322#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 6323#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 6516#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 6349#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 6350#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 6461#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 6581#L722-105 havoc main_#t~switch31#1; 6570#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6567#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 6568#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6561#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 6562#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 6531#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 6479#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6480#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 6307#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6502#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6333#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6301#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6302#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6384#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6406#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6519#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6352#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6444#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6445#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6511#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6292#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 6293#L722-170 goto; 6524#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6491#L722-173 goto; 6492#L722-175 goto; 6555#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6575#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 6576#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 6374#L722-193 goto; 6375#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 6401#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 6402#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 6471#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 6485#L722-202 goto; 6385#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6386#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 6521#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 6396#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 6311#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 6312#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6452#L722-260 goto; 6528#L722-262 havoc main_~_ha_bkt~0#1; 6496#L722-263 goto; 6497#L722-265 goto; 6423#L722-267 havoc main_~_ha_hashv~0#1; 6314#L722-268 goto; 6315#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 6432#L715-4 [2023-11-23 22:28:29,484 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:29,485 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 8 times [2023-11-23 22:28:29,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:29,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594999523] [2023-11-23 22:28:29,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:29,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:29,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:29,501 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:29,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:29,517 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:29,517 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:29,517 INFO L85 PathProgramCache]: Analyzing trace with hash -1006617064, now seen corresponding path program 1 times [2023-11-23 22:28:29,518 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:29,518 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [222654849] [2023-11-23 22:28:29,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:29,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:29,565 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:29,565 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [624286543] [2023-11-23 22:28:29,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:29,565 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:29,566 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:29,568 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:29,604 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-23 22:28:32,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:32,921 INFO L262 TraceCheckSpWp]: Trace formula consists of 492 conjuncts, 21 conjunts are in the unsatisfiable core [2023-11-23 22:28:32,924 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:33,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:33,156 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:33,156 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:33,156 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [222654849] [2023-11-23 22:28:33,157 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:33,157 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [624286543] [2023-11-23 22:28:33,157 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [624286543] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:33,157 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:33,157 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2023-11-23 22:28:33,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1391338039] [2023-11-23 22:28:33,158 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:33,158 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:33,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:33,159 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-23 22:28:33,159 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2023-11-23 22:28:33,160 INFO L87 Difference]: Start difference. First operand 309 states and 442 transitions. cyclomatic complexity: 136 Second operand has 9 states, 9 states have (on average 8.666666666666666) internal successors, (78), 9 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:33,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:33,805 INFO L93 Difference]: Finished difference Result 319 states and 456 transitions. [2023-11-23 22:28:33,806 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 319 states and 456 transitions. [2023-11-23 22:28:33,809 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 312 [2023-11-23 22:28:33,817 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 319 states to 319 states and 456 transitions. [2023-11-23 22:28:33,817 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 319 [2023-11-23 22:28:33,818 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 319 [2023-11-23 22:28:33,818 INFO L73 IsDeterministic]: Start isDeterministic. Operand 319 states and 456 transitions. [2023-11-23 22:28:33,819 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:33,819 INFO L218 hiAutomatonCegarLoop]: Abstraction has 319 states and 456 transitions. [2023-11-23 22:28:33,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states and 456 transitions. [2023-11-23 22:28:33,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 315. [2023-11-23 22:28:33,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 315 states, 311 states have (on average 1.427652733118971) internal successors, (444), 310 states have internal predecessors, (444), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:33,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 450 transitions. [2023-11-23 22:28:33,829 INFO L240 hiAutomatonCegarLoop]: Abstraction has 315 states and 450 transitions. [2023-11-23 22:28:33,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2023-11-23 22:28:33,833 INFO L428 stractBuchiCegarLoop]: Abstraction has 315 states and 450 transitions. [2023-11-23 22:28:33,833 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-23 22:28:33,833 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 315 states and 450 transitions. [2023-11-23 22:28:33,835 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 308 [2023-11-23 22:28:33,835 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:33,836 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:33,836 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:33,836 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:33,837 INFO L748 eck$LassoCheckResult]: Stem: 7434#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 7435#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7306#L715-4 [2023-11-23 22:28:33,837 INFO L750 eck$LassoCheckResult]: Loop: 7306#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7466#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 7235#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7236#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 7372#L722-269 havoc main_~_ha_hashv~0#1; 7458#L722-176 goto; 7410#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7267#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7268#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 7201#L722-73 assume !main_#t~switch31#1; 7202#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 7307#L722-76 assume !main_#t~switch31#1; 7308#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 7340#L722-79 assume !main_#t~switch31#1; 7341#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 7413#L722-82 assume !main_#t~switch31#1; 7242#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 7243#L722-85 assume !main_#t~switch31#1; 7270#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 7260#L722-88 assume !main_#t~switch31#1; 7261#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 7448#L722-91 assume !main_#t~switch31#1; 7193#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 7194#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 7195#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 7196#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 7388#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 7222#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 7223#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 7335#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 7457#L722-105 havoc main_#t~switch31#1; 7446#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7444#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 7445#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 7328#L722-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet43#1 := 0; 7329#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7472#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 7353#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7354#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 7180#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7421#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7206#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7174#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7175#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7257#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7277#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7394#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7228#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7321#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7322#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7389#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7167#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 7168#L722-170 goto; 7401#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7365#L722-173 goto; 7366#L722-175 goto; 7432#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7451#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 7452#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 7249#L722-193 goto; 7250#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 7279#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 7280#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 7345#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 7360#L722-202 goto; 7258#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7259#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 7397#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 7269#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 7184#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 7185#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7326#L722-260 goto; 7405#L722-262 havoc main_~_ha_bkt~0#1; 7370#L722-263 goto; 7371#L722-265 goto; 7303#L722-267 havoc main_~_ha_hashv~0#1; 7187#L722-268 goto; 7188#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 7306#L715-4 [2023-11-23 22:28:33,838 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:33,838 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 9 times [2023-11-23 22:28:33,838 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:33,838 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75279687] [2023-11-23 22:28:33,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:33,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:33,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:33,857 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:33,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:33,879 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:33,879 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:33,880 INFO L85 PathProgramCache]: Analyzing trace with hash -722632070, now seen corresponding path program 1 times [2023-11-23 22:28:33,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:33,880 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [693033322] [2023-11-23 22:28:33,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:33,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:33,939 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:33,940 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [611886645] [2023-11-23 22:28:33,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:33,940 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:33,941 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:33,949 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:33,951 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-23 22:28:34,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:34,444 INFO L262 TraceCheckSpWp]: Trace formula consists of 494 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-23 22:28:34,447 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:34,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:34,634 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:34,634 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:34,634 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [693033322] [2023-11-23 22:28:34,635 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:34,635 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [611886645] [2023-11-23 22:28:34,635 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [611886645] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:34,635 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:34,635 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-23 22:28:34,636 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2042553394] [2023-11-23 22:28:34,636 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:34,636 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:34,637 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:34,637 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-23 22:28:34,637 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-23 22:28:34,637 INFO L87 Difference]: Start difference. First operand 315 states and 450 transitions. cyclomatic complexity: 138 Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:34,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:34,887 INFO L93 Difference]: Finished difference Result 320 states and 456 transitions. [2023-11-23 22:28:34,888 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 320 states and 456 transitions. [2023-11-23 22:28:34,891 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 313 [2023-11-23 22:28:34,894 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 320 states to 320 states and 456 transitions. [2023-11-23 22:28:34,894 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 320 [2023-11-23 22:28:34,895 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 320 [2023-11-23 22:28:34,895 INFO L73 IsDeterministic]: Start isDeterministic. Operand 320 states and 456 transitions. [2023-11-23 22:28:34,896 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:34,896 INFO L218 hiAutomatonCegarLoop]: Abstraction has 320 states and 456 transitions. [2023-11-23 22:28:34,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 320 states and 456 transitions. [2023-11-23 22:28:34,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 320 to 319. [2023-11-23 22:28:34,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 319 states, 315 states have (on average 1.4253968253968254) internal successors, (449), 314 states have internal predecessors, (449), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:34,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 319 states to 319 states and 455 transitions. [2023-11-23 22:28:34,905 INFO L240 hiAutomatonCegarLoop]: Abstraction has 319 states and 455 transitions. [2023-11-23 22:28:34,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-23 22:28:34,906 INFO L428 stractBuchiCegarLoop]: Abstraction has 319 states and 455 transitions. [2023-11-23 22:28:34,906 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-23 22:28:34,906 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 319 states and 455 transitions. [2023-11-23 22:28:34,908 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 312 [2023-11-23 22:28:34,909 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:34,909 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:34,909 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:34,909 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:34,910 INFO L748 eck$LassoCheckResult]: Stem: 8308#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 8309#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8180#L715-4 [2023-11-23 22:28:34,910 INFO L750 eck$LassoCheckResult]: Loop: 8180#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8340#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 8110#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 8111#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 8247#L722-269 havoc main_~_ha_hashv~0#1; 8332#L722-176 goto; 8284#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 8142#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8143#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 8076#L722-73 assume !main_#t~switch31#1; 8077#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 8181#L722-76 assume !main_#t~switch31#1; 8182#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 8215#L722-79 assume !main_#t~switch31#1; 8216#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 8287#L722-82 assume !main_#t~switch31#1; 8117#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 8118#L722-85 assume !main_#t~switch31#1; 8145#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 8135#L722-88 assume !main_#t~switch31#1; 8136#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 8322#L722-91 assume !main_#t~switch31#1; 8068#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 8069#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 8070#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 8071#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 8262#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 8097#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 8098#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 8210#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 8331#L722-105 havoc main_#t~switch31#1; 8320#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8317#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 8319#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 8202#L722-111 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet43#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 8204#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8353#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 8281#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8349#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 8055#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8346#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 8081#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8049#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8050#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8132#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 8152#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8268#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8103#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8195#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8196#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8263#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8042#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 8043#L722-170 goto; 8275#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8240#L722-173 goto; 8241#L722-175 goto; 8306#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8325#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 8326#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 8124#L722-193 goto; 8125#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 8154#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 8155#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 8220#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 8235#L722-202 goto; 8133#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8134#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 8271#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 8144#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 8059#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 8060#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 8200#L722-260 goto; 8279#L722-262 havoc main_~_ha_bkt~0#1; 8245#L722-263 goto; 8246#L722-265 goto; 8177#L722-267 havoc main_~_ha_hashv~0#1; 8062#L722-268 goto; 8063#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 8180#L715-4 [2023-11-23 22:28:34,911 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:34,911 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 10 times [2023-11-23 22:28:34,911 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:34,911 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [581867466] [2023-11-23 22:28:34,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:34,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:34,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:34,926 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:34,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:34,942 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:34,943 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:34,943 INFO L85 PathProgramCache]: Analyzing trace with hash 1522947384, now seen corresponding path program 1 times [2023-11-23 22:28:34,943 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:34,943 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [102891246] [2023-11-23 22:28:34,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:34,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:35,000 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:35,001 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [222528310] [2023-11-23 22:28:35,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:35,001 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:35,002 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:35,008 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:35,036 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2023-11-23 22:28:35,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:35,510 INFO L262 TraceCheckSpWp]: Trace formula consists of 492 conjuncts, 16 conjunts are in the unsatisfiable core [2023-11-23 22:28:35,512 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:35,813 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:35,813 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:35,814 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:35,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [102891246] [2023-11-23 22:28:35,814 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:35,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [222528310] [2023-11-23 22:28:35,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [222528310] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:35,815 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:35,815 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-23 22:28:35,815 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476235839] [2023-11-23 22:28:35,815 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:35,816 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:35,816 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:35,816 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-23 22:28:35,816 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-23 22:28:35,817 INFO L87 Difference]: Start difference. First operand 319 states and 455 transitions. cyclomatic complexity: 139 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:36,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:36,364 INFO L93 Difference]: Finished difference Result 324 states and 461 transitions. [2023-11-23 22:28:36,364 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 324 states and 461 transitions. [2023-11-23 22:28:36,367 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 317 [2023-11-23 22:28:36,371 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 324 states to 324 states and 461 transitions. [2023-11-23 22:28:36,371 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 324 [2023-11-23 22:28:36,372 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 324 [2023-11-23 22:28:36,372 INFO L73 IsDeterministic]: Start isDeterministic. Operand 324 states and 461 transitions. [2023-11-23 22:28:36,373 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:36,373 INFO L218 hiAutomatonCegarLoop]: Abstraction has 324 states and 461 transitions. [2023-11-23 22:28:36,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states and 461 transitions. [2023-11-23 22:28:36,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 323. [2023-11-23 22:28:36,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 323 states, 319 states have (on average 1.4231974921630095) internal successors, (454), 318 states have internal predecessors, (454), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:36,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 460 transitions. [2023-11-23 22:28:36,383 INFO L240 hiAutomatonCegarLoop]: Abstraction has 323 states and 460 transitions. [2023-11-23 22:28:36,383 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-23 22:28:36,384 INFO L428 stractBuchiCegarLoop]: Abstraction has 323 states and 460 transitions. [2023-11-23 22:28:36,384 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-23 22:28:36,384 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 323 states and 460 transitions. [2023-11-23 22:28:36,386 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 316 [2023-11-23 22:28:36,387 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:36,387 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:36,388 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:36,388 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:36,388 INFO L748 eck$LassoCheckResult]: Stem: 9194#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 9195#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9066#L715-4 [2023-11-23 22:28:36,389 INFO L750 eck$LassoCheckResult]: Loop: 9066#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9227#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 9001#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9002#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 9133#L722-269 havoc main_~_ha_hashv~0#1; 9219#L722-176 goto; 9170#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9028#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9029#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 8964#L722-73 assume !main_#t~switch31#1; 8965#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 9067#L722-76 assume !main_#t~switch31#1; 9068#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 9101#L722-79 assume !main_#t~switch31#1; 9102#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 9173#L722-82 assume !main_#t~switch31#1; 9003#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 9004#L722-85 assume !main_#t~switch31#1; 9031#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 9023#L722-88 assume !main_#t~switch31#1; 9024#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 9209#L722-91 assume !main_#t~switch31#1; 8954#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 8955#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 8956#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 8957#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 9151#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 8983#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 8984#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 9096#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 9218#L722-105 havoc main_#t~switch31#1; 9207#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9204#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 9205#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9241#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 9240#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 9239#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 9238#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9236#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 9237#L722-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1; 8939#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9233#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 8963#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8932#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8933#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9018#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9036#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9154#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8987#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9078#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9079#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9146#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8926#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 8927#L722-170 goto; 9159#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 9126#L722-173 goto; 9127#L722-175 goto; 9192#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9212#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 9213#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 9008#L722-193 goto; 9009#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 9038#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 9039#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 9106#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 9121#L722-202 goto; 9019#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9020#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 9157#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 9030#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 8945#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 8946#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9086#L722-260 goto; 9163#L722-262 havoc main_~_ha_bkt~0#1; 9131#L722-263 goto; 9132#L722-265 goto; 9059#L722-267 havoc main_~_ha_hashv~0#1; 8948#L722-268 goto; 8949#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 9066#L715-4 [2023-11-23 22:28:36,389 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:36,390 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 11 times [2023-11-23 22:28:36,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:36,390 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481262514] [2023-11-23 22:28:36,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:36,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:36,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:36,405 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:36,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:36,425 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:36,426 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:36,426 INFO L85 PathProgramCache]: Analyzing trace with hash 376892690, now seen corresponding path program 1 times [2023-11-23 22:28:36,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:36,427 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304946320] [2023-11-23 22:28:36,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:36,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:36,479 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:36,480 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [878182056] [2023-11-23 22:28:36,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:36,480 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:36,480 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:36,484 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:36,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2023-11-23 22:28:37,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:37,308 INFO L262 TraceCheckSpWp]: Trace formula consists of 493 conjuncts, 17 conjunts are in the unsatisfiable core [2023-11-23 22:28:37,311 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:37,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:37,532 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:37,532 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:37,533 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1304946320] [2023-11-23 22:28:37,533 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:37,533 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [878182056] [2023-11-23 22:28:37,533 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [878182056] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:37,533 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:37,534 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2023-11-23 22:28:37,534 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1798106069] [2023-11-23 22:28:37,534 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:37,535 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:37,535 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:37,535 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-23 22:28:37,536 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2023-11-23 22:28:37,536 INFO L87 Difference]: Start difference. First operand 323 states and 460 transitions. cyclomatic complexity: 140 Second operand has 9 states, 9 states have (on average 8.777777777777779) internal successors, (79), 9 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:38,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:38,037 INFO L93 Difference]: Finished difference Result 331 states and 471 transitions. [2023-11-23 22:28:38,037 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 331 states and 471 transitions. [2023-11-23 22:28:38,041 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 324 [2023-11-23 22:28:38,045 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 331 states to 331 states and 471 transitions. [2023-11-23 22:28:38,045 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 331 [2023-11-23 22:28:38,046 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 331 [2023-11-23 22:28:38,046 INFO L73 IsDeterministic]: Start isDeterministic. Operand 331 states and 471 transitions. [2023-11-23 22:28:38,047 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:38,047 INFO L218 hiAutomatonCegarLoop]: Abstraction has 331 states and 471 transitions. [2023-11-23 22:28:38,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states and 471 transitions. [2023-11-23 22:28:38,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 324. [2023-11-23 22:28:38,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 320 states have (on average 1.425) internal successors, (456), 319 states have internal predecessors, (456), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:38,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 462 transitions. [2023-11-23 22:28:38,056 INFO L240 hiAutomatonCegarLoop]: Abstraction has 324 states and 462 transitions. [2023-11-23 22:28:38,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2023-11-23 22:28:38,057 INFO L428 stractBuchiCegarLoop]: Abstraction has 324 states and 462 transitions. [2023-11-23 22:28:38,057 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2023-11-23 22:28:38,058 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 462 transitions. [2023-11-23 22:28:38,061 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 317 [2023-11-23 22:28:38,061 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:38,062 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:38,064 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:38,064 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:38,064 INFO L748 eck$LassoCheckResult]: Stem: 10094#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 10095#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9968#L715-4 [2023-11-23 22:28:38,065 INFO L750 eck$LassoCheckResult]: Loop: 9968#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10129#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 9901#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9902#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 10035#L722-269 havoc main_~_ha_hashv~0#1; 10119#L722-176 goto; 10071#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9930#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9931#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 9864#L722-73 assume !main_#t~switch31#1; 9865#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 9969#L722-76 assume !main_#t~switch31#1; 9970#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 10003#L722-79 assume !main_#t~switch31#1; 10004#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 10074#L722-82 assume !main_#t~switch31#1; 9905#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 9906#L722-85 assume !main_#t~switch31#1; 9933#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 9925#L722-88 assume !main_#t~switch31#1; 9926#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 10109#L722-91 assume !main_#t~switch31#1; 9856#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 9857#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 9858#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 9859#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 10052#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 9885#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 9886#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 9998#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 10118#L722-105 havoc main_#t~switch31#1; 10107#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10104#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 10105#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10098#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 10099#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 10068#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 10016#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10017#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 9843#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10039#L722-128 assume !(0 == main_~_hj_i~0#1 % 4294967296); 9953#L722-130 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~nondet46#1 := main_~_hj_i~0#1; 9869#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9837#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 9838#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9920#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9940#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10056#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 9893#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9983#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9984#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10053#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 9832#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 9833#L722-170 goto; 10067#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 10028#L722-173 goto; 10029#L722-175 goto; 10092#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 10112#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 10113#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 9914#L722-193 goto; 9915#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 9942#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 9943#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 10008#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 10022#L722-202 goto; 9921#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9922#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 10058#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 9932#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 9845#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 9846#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9988#L722-260 goto; 10063#L722-262 havoc main_~_ha_bkt~0#1; 10031#L722-263 goto; 10032#L722-265 goto; 9959#L722-267 havoc main_~_ha_hashv~0#1; 9848#L722-268 goto; 9849#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 9968#L715-4 [2023-11-23 22:28:38,065 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:38,066 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 12 times [2023-11-23 22:28:38,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:38,067 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [601810145] [2023-11-23 22:28:38,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:38,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:38,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:38,083 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:38,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:38,103 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:38,105 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:38,106 INFO L85 PathProgramCache]: Analyzing trace with hash -521801145, now seen corresponding path program 1 times [2023-11-23 22:28:38,106 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:38,106 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1756229676] [2023-11-23 22:28:38,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:38,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:38,159 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:38,159 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1039483536] [2023-11-23 22:28:38,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:38,160 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:38,160 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:38,162 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:38,189 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2023-11-23 22:28:39,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:39,957 INFO L262 TraceCheckSpWp]: Trace formula consists of 493 conjuncts, 20 conjunts are in the unsatisfiable core [2023-11-23 22:28:39,960 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:40,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:40,190 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:40,190 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:40,190 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1756229676] [2023-11-23 22:28:40,190 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:40,191 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1039483536] [2023-11-23 22:28:40,191 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1039483536] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:40,191 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:40,191 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2023-11-23 22:28:40,191 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [568978823] [2023-11-23 22:28:40,192 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:40,192 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:40,192 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:40,192 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2023-11-23 22:28:40,193 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2023-11-23 22:28:40,193 INFO L87 Difference]: Start difference. First operand 324 states and 462 transitions. cyclomatic complexity: 141 Second operand has 11 states, 11 states have (on average 7.181818181818182) internal successors, (79), 11 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:40,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:40,959 INFO L93 Difference]: Finished difference Result 336 states and 477 transitions. [2023-11-23 22:28:40,959 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 336 states and 477 transitions. [2023-11-23 22:28:40,962 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 329 [2023-11-23 22:28:40,966 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 336 states to 336 states and 477 transitions. [2023-11-23 22:28:40,966 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 336 [2023-11-23 22:28:40,967 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 336 [2023-11-23 22:28:40,967 INFO L73 IsDeterministic]: Start isDeterministic. Operand 336 states and 477 transitions. [2023-11-23 22:28:40,968 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:40,968 INFO L218 hiAutomatonCegarLoop]: Abstraction has 336 states and 477 transitions. [2023-11-23 22:28:40,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states and 477 transitions. [2023-11-23 22:28:40,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 331. [2023-11-23 22:28:40,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 331 states, 327 states have (on average 1.4220183486238531) internal successors, (465), 326 states have internal predecessors, (465), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:40,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 471 transitions. [2023-11-23 22:28:40,979 INFO L240 hiAutomatonCegarLoop]: Abstraction has 331 states and 471 transitions. [2023-11-23 22:28:40,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2023-11-23 22:28:40,980 INFO L428 stractBuchiCegarLoop]: Abstraction has 331 states and 471 transitions. [2023-11-23 22:28:40,980 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2023-11-23 22:28:40,981 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 331 states and 471 transitions. [2023-11-23 22:28:40,983 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 324 [2023-11-23 22:28:40,983 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:40,983 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:40,984 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:40,984 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:40,985 INFO L748 eck$LassoCheckResult]: Stem: 11010#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 11011#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10881#L715-4 [2023-11-23 22:28:40,985 INFO L750 eck$LassoCheckResult]: Loop: 10881#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11044#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 10811#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 10812#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 10949#L722-269 havoc main_~_ha_hashv~0#1; 11035#L722-176 goto; 10986#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 10843#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 10844#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 10775#L722-73 assume !main_#t~switch31#1; 10776#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 10882#L722-76 assume !main_#t~switch31#1; 10883#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 10916#L722-79 assume !main_#t~switch31#1; 10917#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 10989#L722-82 assume !main_#t~switch31#1; 10818#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 10819#L722-85 assume !main_#t~switch31#1; 10846#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 10836#L722-88 assume !main_#t~switch31#1; 10837#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 11025#L722-91 assume !main_#t~switch31#1; 10767#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 10768#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 10769#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 10770#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 10964#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 10796#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 10797#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 10911#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 11034#L722-105 havoc main_#t~switch31#1; 11023#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11020#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 11022#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 10903#L722-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet43#1 := 0; 10904#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11014#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 11015#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 10929#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10930#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 10754#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10997#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 10780#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10971#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 10801#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10833#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 10853#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10970#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 10804#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10896#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 10897#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10965#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 10742#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 10743#L722-170 goto; 10978#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 10942#L722-173 goto; 10943#L722-175 goto; 11008#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 11028#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 11029#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 10825#L722-193 goto; 10826#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 10855#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 10856#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 10921#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 10937#L722-202 goto; 10834#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 10835#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 10974#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 10845#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 10758#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 10759#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 10901#L722-260 goto; 10982#L722-262 havoc main_~_ha_bkt~0#1; 10947#L722-263 goto; 10948#L722-265 goto; 10878#L722-267 havoc main_~_ha_hashv~0#1; 10761#L722-268 goto; 10762#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 10881#L715-4 [2023-11-23 22:28:40,986 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:40,986 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 13 times [2023-11-23 22:28:40,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:40,986 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860223478] [2023-11-23 22:28:40,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:40,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:41,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:41,005 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:41,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:41,025 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:41,025 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:41,026 INFO L85 PathProgramCache]: Analyzing trace with hash 946841851, now seen corresponding path program 1 times [2023-11-23 22:28:41,026 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:41,026 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111369240] [2023-11-23 22:28:41,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:41,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:41,084 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:41,084 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [646566553] [2023-11-23 22:28:41,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:41,084 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:41,085 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:41,087 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:41,106 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2023-11-23 22:28:41,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:41,524 INFO L262 TraceCheckSpWp]: Trace formula consists of 495 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-23 22:28:41,527 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:41,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:41,734 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:41,735 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:41,735 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2111369240] [2023-11-23 22:28:41,735 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:41,735 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [646566553] [2023-11-23 22:28:41,735 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [646566553] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:41,736 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:41,736 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-23 22:28:41,736 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [437784374] [2023-11-23 22:28:41,736 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:41,737 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:41,737 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:41,737 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-23 22:28:41,738 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-23 22:28:41,738 INFO L87 Difference]: Start difference. First operand 331 states and 471 transitions. cyclomatic complexity: 143 Second operand has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 7 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:42,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:42,228 INFO L93 Difference]: Finished difference Result 336 states and 477 transitions. [2023-11-23 22:28:42,228 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 336 states and 477 transitions. [2023-11-23 22:28:42,231 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 329 [2023-11-23 22:28:42,235 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 336 states to 336 states and 477 transitions. [2023-11-23 22:28:42,236 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 336 [2023-11-23 22:28:42,236 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 336 [2023-11-23 22:28:42,237 INFO L73 IsDeterministic]: Start isDeterministic. Operand 336 states and 477 transitions. [2023-11-23 22:28:42,238 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:42,238 INFO L218 hiAutomatonCegarLoop]: Abstraction has 336 states and 477 transitions. [2023-11-23 22:28:42,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states and 477 transitions. [2023-11-23 22:28:42,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 331. [2023-11-23 22:28:42,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 331 states, 327 states have (on average 1.4220183486238531) internal successors, (465), 326 states have internal predecessors, (465), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:42,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 471 transitions. [2023-11-23 22:28:42,248 INFO L240 hiAutomatonCegarLoop]: Abstraction has 331 states and 471 transitions. [2023-11-23 22:28:42,249 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-23 22:28:42,249 INFO L428 stractBuchiCegarLoop]: Abstraction has 331 states and 471 transitions. [2023-11-23 22:28:42,249 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2023-11-23 22:28:42,250 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 331 states and 471 transitions. [2023-11-23 22:28:42,252 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 324 [2023-11-23 22:28:42,252 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:42,252 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:42,253 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:42,253 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:42,254 INFO L748 eck$LassoCheckResult]: Stem: 11922#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 11923#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11794#L715-4 [2023-11-23 22:28:42,254 INFO L750 eck$LassoCheckResult]: Loop: 11794#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11956#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 11723#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 11724#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 11861#L722-269 havoc main_~_ha_hashv~0#1; 11946#L722-176 goto; 11899#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 11755#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 11756#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 11688#L722-73 assume !main_#t~switch31#1; 11689#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 11795#L722-76 assume !main_#t~switch31#1; 11796#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 11829#L722-79 assume !main_#t~switch31#1; 11830#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 11902#L722-82 assume !main_#t~switch31#1; 11730#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 11731#L722-85 assume !main_#t~switch31#1; 11758#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 11748#L722-88 assume !main_#t~switch31#1; 11749#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 11936#L722-91 assume !main_#t~switch31#1; 11680#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 11681#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 11682#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 11683#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 11877#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 11709#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 11710#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 11824#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 11945#L722-105 havoc main_#t~switch31#1; 11934#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11932#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 11933#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 11816#L722-111 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet43#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 11818#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11978#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 11842#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11843#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 11958#L722-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1; 11955#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11966#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 11693#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11963#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 11713#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11745#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 11765#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11883#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 11716#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11809#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 11810#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11878#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 11655#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 11656#L722-170 goto; 11890#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 11854#L722-173 goto; 11855#L722-175 goto; 11920#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 11939#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 11940#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 11737#L722-193 goto; 11738#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 11767#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 11768#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 11834#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 11849#L722-202 goto; 11746#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 11747#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 11886#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 11757#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 11671#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 11672#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 11814#L722-260 goto; 11894#L722-262 havoc main_~_ha_bkt~0#1; 11859#L722-263 goto; 11860#L722-265 goto; 11791#L722-267 havoc main_~_ha_hashv~0#1; 11674#L722-268 goto; 11675#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 11794#L715-4 [2023-11-23 22:28:42,255 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:42,255 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 14 times [2023-11-23 22:28:42,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:42,256 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1756468757] [2023-11-23 22:28:42,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:42,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:42,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:42,270 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:42,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:42,289 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:42,289 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:42,290 INFO L85 PathProgramCache]: Analyzing trace with hash 1483979250, now seen corresponding path program 1 times [2023-11-23 22:28:42,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:42,290 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248116188] [2023-11-23 22:28:42,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:42,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:42,340 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:42,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [626117036] [2023-11-23 22:28:42,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:42,341 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:42,341 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:42,343 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:42,355 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2023-11-23 22:28:42,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:42,839 INFO L262 TraceCheckSpWp]: Trace formula consists of 493 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-23 22:28:42,841 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:43,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:43,026 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:43,027 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:43,027 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248116188] [2023-11-23 22:28:43,027 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:43,027 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [626117036] [2023-11-23 22:28:43,027 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [626117036] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:43,028 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:43,028 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-23 22:28:43,028 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1483522448] [2023-11-23 22:28:43,028 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:43,029 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:43,029 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:43,029 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-23 22:28:43,029 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-23 22:28:43,030 INFO L87 Difference]: Start difference. First operand 331 states and 471 transitions. cyclomatic complexity: 143 Second operand has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 7 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:43,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:43,464 INFO L93 Difference]: Finished difference Result 337 states and 479 transitions. [2023-11-23 22:28:43,464 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 337 states and 479 transitions. [2023-11-23 22:28:43,467 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 330 [2023-11-23 22:28:43,471 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 337 states to 337 states and 479 transitions. [2023-11-23 22:28:43,471 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 337 [2023-11-23 22:28:43,472 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 337 [2023-11-23 22:28:43,472 INFO L73 IsDeterministic]: Start isDeterministic. Operand 337 states and 479 transitions. [2023-11-23 22:28:43,473 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:43,473 INFO L218 hiAutomatonCegarLoop]: Abstraction has 337 states and 479 transitions. [2023-11-23 22:28:43,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337 states and 479 transitions. [2023-11-23 22:28:43,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337 to 333. [2023-11-23 22:28:43,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 333 states, 329 states have (on average 1.419452887537994) internal successors, (467), 328 states have internal predecessors, (467), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:43,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 473 transitions. [2023-11-23 22:28:43,482 INFO L240 hiAutomatonCegarLoop]: Abstraction has 333 states and 473 transitions. [2023-11-23 22:28:43,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-23 22:28:43,483 INFO L428 stractBuchiCegarLoop]: Abstraction has 333 states and 473 transitions. [2023-11-23 22:28:43,483 INFO L335 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2023-11-23 22:28:43,484 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 333 states and 473 transitions. [2023-11-23 22:28:43,487 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 326 [2023-11-23 22:28:43,487 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:43,487 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:43,488 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:43,488 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:43,488 INFO L748 eck$LassoCheckResult]: Stem: 12840#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 12841#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 12711#L715-4 [2023-11-23 22:28:43,489 INFO L750 eck$LassoCheckResult]: Loop: 12711#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 12873#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 12646#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 12647#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 12778#L722-269 havoc main_~_ha_hashv~0#1; 12863#L722-176 goto; 12816#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 12673#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 12674#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 12608#L722-73 assume !main_#t~switch31#1; 12609#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 12712#L722-76 assume !main_#t~switch31#1; 12713#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 12746#L722-79 assume !main_#t~switch31#1; 12747#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 12819#L722-82 assume !main_#t~switch31#1; 12648#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 12649#L722-85 assume !main_#t~switch31#1; 12676#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 12666#L722-88 assume !main_#t~switch31#1; 12667#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 12853#L722-91 assume !main_#t~switch31#1; 12598#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 12599#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 12600#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 12601#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 12791#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 12624#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 12625#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 12741#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 12862#L722-105 havoc main_#t~switch31#1; 12851#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12846#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 12848#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 12732#L722-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet43#1 := 0; 12733#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12842#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 12843#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 12812#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 12813#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12897#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 12872#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12894#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 12607#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12880#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 12631#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12663#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 12683#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12799#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 12634#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12726#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 12727#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12792#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 12571#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 12572#L722-170 goto; 12805#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 12771#L722-173 goto; 12772#L722-175 goto; 12837#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 12856#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 12857#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 12655#L722-193 goto; 12656#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 12685#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 12686#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 12751#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 12766#L722-202 goto; 12664#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 12665#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 12803#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 12675#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 12589#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 12590#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 12731#L722-260 goto; 12809#L722-262 havoc main_~_ha_bkt~0#1; 12776#L722-263 goto; 12777#L722-265 goto; 12704#L722-267 havoc main_~_ha_hashv~0#1; 12592#L722-268 goto; 12593#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 12711#L715-4 [2023-11-23 22:28:43,489 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:43,490 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 15 times [2023-11-23 22:28:43,490 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:43,490 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70368617] [2023-11-23 22:28:43,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:43,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:43,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:43,510 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:43,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:43,530 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:43,531 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:43,531 INFO L85 PathProgramCache]: Analyzing trace with hash 2029438579, now seen corresponding path program 1 times [2023-11-23 22:28:43,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:43,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205956906] [2023-11-23 22:28:43,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:43,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:43,580 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:43,580 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1875647420] [2023-11-23 22:28:43,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:43,581 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:43,581 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:43,588 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:43,628 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2023-11-23 22:28:44,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:44,065 INFO L262 TraceCheckSpWp]: Trace formula consists of 494 conjuncts, 5 conjunts are in the unsatisfiable core [2023-11-23 22:28:44,067 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:44,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:44,084 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:44,084 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:44,084 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1205956906] [2023-11-23 22:28:44,085 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:44,085 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1875647420] [2023-11-23 22:28:44,085 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1875647420] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:44,085 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:44,085 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-23 22:28:44,086 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [851687445] [2023-11-23 22:28:44,086 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:44,086 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:44,086 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:44,087 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-23 22:28:44,087 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-23 22:28:44,087 INFO L87 Difference]: Start difference. First operand 333 states and 473 transitions. cyclomatic complexity: 143 Second operand has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:44,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:44,187 INFO L93 Difference]: Finished difference Result 338 states and 478 transitions. [2023-11-23 22:28:44,187 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 338 states and 478 transitions. [2023-11-23 22:28:44,190 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 331 [2023-11-23 22:28:44,194 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 338 states to 338 states and 478 transitions. [2023-11-23 22:28:44,194 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 338 [2023-11-23 22:28:44,195 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 338 [2023-11-23 22:28:44,195 INFO L73 IsDeterministic]: Start isDeterministic. Operand 338 states and 478 transitions. [2023-11-23 22:28:44,196 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:44,196 INFO L218 hiAutomatonCegarLoop]: Abstraction has 338 states and 478 transitions. [2023-11-23 22:28:44,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 338 states and 478 transitions. [2023-11-23 22:28:44,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 338 to 332. [2023-11-23 22:28:44,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 332 states, 328 states have (on average 1.4176829268292683) internal successors, (465), 327 states have internal predecessors, (465), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:44,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 471 transitions. [2023-11-23 22:28:44,206 INFO L240 hiAutomatonCegarLoop]: Abstraction has 332 states and 471 transitions. [2023-11-23 22:28:44,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-23 22:28:44,207 INFO L428 stractBuchiCegarLoop]: Abstraction has 332 states and 471 transitions. [2023-11-23 22:28:44,208 INFO L335 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2023-11-23 22:28:44,208 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 332 states and 471 transitions. [2023-11-23 22:28:44,210 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 325 [2023-11-23 22:28:44,210 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:44,210 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:44,211 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:44,211 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:44,211 INFO L748 eck$LassoCheckResult]: Stem: 13757#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 13758#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13627#L715-4 [2023-11-23 22:28:44,212 INFO L750 eck$LassoCheckResult]: Loop: 13627#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13790#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 13561#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 13562#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 13694#L722-269 havoc main_~_ha_hashv~0#1; 13781#L722-176 goto; 13732#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 13588#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 13589#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 13523#L722-73 assume !main_#t~switch31#1; 13524#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 13628#L722-76 assume !main_#t~switch31#1; 13629#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 13662#L722-79 assume !main_#t~switch31#1; 13663#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 13735#L722-82 assume !main_#t~switch31#1; 13563#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 13564#L722-85 assume !main_#t~switch31#1; 13591#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 13583#L722-88 assume !main_#t~switch31#1; 13584#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 13771#L722-91 assume !main_#t~switch31#1; 13513#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 13514#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 13515#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 13516#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 13713#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 13542#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 13543#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 13657#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 13780#L722-105 havoc main_#t~switch31#1; 13769#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13766#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 13767#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13810#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 13809#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 13808#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 13807#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13806#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 13804#L722-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1; 13803#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13698#L722-128 assume !(0 == main_~_hj_i~0#1 % 4294967296); 13699#L722-130 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~nondet46#1 := main_~_hj_i~0#1; 13522#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13796#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 13544#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13578#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 13596#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13716#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 13547#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13639#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 13640#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13708#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 13486#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 13487#L722-170 goto; 13721#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 13687#L722-173 goto; 13688#L722-175 goto; 13755#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 13774#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 13775#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 13568#L722-193 goto; 13569#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 13598#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 13599#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 13667#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 13681#L722-202 goto; 13579#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 13580#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 13718#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 13590#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 13504#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 13505#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 13647#L722-260 goto; 13725#L722-262 havoc main_~_ha_bkt~0#1; 13692#L722-263 goto; 13693#L722-265 goto; 13620#L722-267 havoc main_~_ha_hashv~0#1; 13507#L722-268 goto; 13508#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 13627#L715-4 [2023-11-23 22:28:44,212 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:44,213 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 16 times [2023-11-23 22:28:44,213 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:44,213 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845106946] [2023-11-23 22:28:44,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:44,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:44,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:44,231 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:44,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:44,252 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:44,253 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:44,253 INFO L85 PathProgramCache]: Analyzing trace with hash -582671731, now seen corresponding path program 1 times [2023-11-23 22:28:44,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:44,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [924193474] [2023-11-23 22:28:44,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:44,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:44,305 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:44,306 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1048807602] [2023-11-23 22:28:44,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:44,306 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:44,306 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:44,312 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:44,328 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2023-11-23 22:28:45,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:45,432 INFO L262 TraceCheckSpWp]: Trace formula consists of 494 conjuncts, 35 conjunts are in the unsatisfiable core [2023-11-23 22:28:45,435 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:45,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:45,753 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:45,753 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:45,753 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [924193474] [2023-11-23 22:28:45,753 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:45,753 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1048807602] [2023-11-23 22:28:45,753 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1048807602] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:45,753 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:45,754 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2023-11-23 22:28:45,754 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346341720] [2023-11-23 22:28:45,754 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:45,754 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:45,754 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:45,755 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2023-11-23 22:28:45,755 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2023-11-23 22:28:45,756 INFO L87 Difference]: Start difference. First operand 332 states and 471 transitions. cyclomatic complexity: 142 Second operand has 16 states, 16 states have (on average 5.0) internal successors, (80), 16 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:46,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:46,758 INFO L93 Difference]: Finished difference Result 364 states and 517 transitions. [2023-11-23 22:28:46,758 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 364 states and 517 transitions. [2023-11-23 22:28:46,761 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 357 [2023-11-23 22:28:46,765 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 364 states to 364 states and 517 transitions. [2023-11-23 22:28:46,765 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 364 [2023-11-23 22:28:46,766 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 364 [2023-11-23 22:28:46,766 INFO L73 IsDeterministic]: Start isDeterministic. Operand 364 states and 517 transitions. [2023-11-23 22:28:46,767 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:46,767 INFO L218 hiAutomatonCegarLoop]: Abstraction has 364 states and 517 transitions. [2023-11-23 22:28:46,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 364 states and 517 transitions. [2023-11-23 22:28:46,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 364 to 345. [2023-11-23 22:28:46,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 345 states, 341 states have (on average 1.4134897360703813) internal successors, (482), 340 states have internal predecessors, (482), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:46,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 488 transitions. [2023-11-23 22:28:46,779 INFO L240 hiAutomatonCegarLoop]: Abstraction has 345 states and 488 transitions. [2023-11-23 22:28:46,780 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2023-11-23 22:28:46,781 INFO L428 stractBuchiCegarLoop]: Abstraction has 345 states and 488 transitions. [2023-11-23 22:28:46,781 INFO L335 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2023-11-23 22:28:46,781 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 345 states and 488 transitions. [2023-11-23 22:28:46,790 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 338 [2023-11-23 22:28:46,790 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:46,790 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:46,791 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:46,791 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:46,791 INFO L748 eck$LassoCheckResult]: Stem: 14721#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 14722#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 14589#L715-4 [2023-11-23 22:28:46,791 INFO L750 eck$LassoCheckResult]: Loop: 14589#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 14755#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 14521#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 14522#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 14656#L722-269 havoc main_~_ha_hashv~0#1; 14745#L722-176 goto; 14696#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 14551#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 14552#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 14483#L722-73 assume !main_#t~switch31#1; 14484#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 14590#L722-76 assume !main_#t~switch31#1; 14591#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 14623#L722-79 assume !main_#t~switch31#1; 14624#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 14699#L722-82 assume !main_#t~switch31#1; 14525#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 14526#L722-85 assume !main_#t~switch31#1; 14554#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 14546#L722-88 assume !main_#t~switch31#1; 14547#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 14735#L722-91 assume !main_#t~switch31#1; 14475#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 14476#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 14477#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 14478#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 14674#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 14504#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 14505#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 14618#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 14744#L722-105 havoc main_#t~switch31#1; 14733#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 14730#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 14731#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 14782#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 14780#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 14778#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 14777#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 14775#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 14773#L722-123 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 14774#L722-125 assume main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := 0; 14754#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 14785#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 14488#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 14783#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 14540#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 14541#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 14679#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 14680#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 14513#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 14709#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 14675#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 14676#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 14452#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 14453#L722-170 goto; 14691#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 14650#L722-173 goto; 14651#L722-175 goto; 14719#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 14738#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 14739#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 14530#L722-193 goto; 14531#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 14558#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 14559#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 14628#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 14643#L722-202 goto; 14542#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 14543#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 14682#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 14553#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 14464#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 14465#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 14608#L722-260 goto; 14687#L722-262 havoc main_~_ha_bkt~0#1; 14652#L722-263 goto; 14653#L722-265 goto; 14580#L722-267 havoc main_~_ha_hashv~0#1; 14467#L722-268 goto; 14468#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 14589#L715-4 [2023-11-23 22:28:46,792 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:46,792 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 17 times [2023-11-23 22:28:46,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:46,793 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [979150807] [2023-11-23 22:28:46,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:46,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:46,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:46,809 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:46,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:46,827 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:46,827 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:46,827 INFO L85 PathProgramCache]: Analyzing trace with hash -966012493, now seen corresponding path program 1 times [2023-11-23 22:28:46,827 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:46,828 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [690979710] [2023-11-23 22:28:46,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:46,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:46,873 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:46,873 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [49222858] [2023-11-23 22:28:46,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:46,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:46,874 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:46,880 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:46,906 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2023-11-23 22:28:50,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 22:28:50,201 INFO L262 TraceCheckSpWp]: Trace formula consists of 494 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-23 22:28:50,203 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 22:28:50,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 22:28:50,578 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 22:28:50,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 22:28:50,579 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [690979710] [2023-11-23 22:28:50,579 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 22:28:50,579 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [49222858] [2023-11-23 22:28:50,579 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [49222858] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 22:28:50,582 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 22:28:50,582 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2023-11-23 22:28:50,583 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [640811258] [2023-11-23 22:28:50,583 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 22:28:50,583 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 22:28:50,583 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 22:28:50,584 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2023-11-23 22:28:50,584 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=104, Unknown=0, NotChecked=0, Total=132 [2023-11-23 22:28:50,584 INFO L87 Difference]: Start difference. First operand 345 states and 488 transitions. cyclomatic complexity: 146 Second operand has 12 states, 12 states have (on average 6.666666666666667) internal successors, (80), 12 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 22:28:51,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 22:28:51,342 INFO L93 Difference]: Finished difference Result 356 states and 502 transitions. [2023-11-23 22:28:51,342 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 356 states and 502 transitions. [2023-11-23 22:28:51,346 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 349 [2023-11-23 22:28:51,351 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 356 states to 356 states and 502 transitions. [2023-11-23 22:28:51,351 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 356 [2023-11-23 22:28:51,352 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 356 [2023-11-23 22:28:51,352 INFO L73 IsDeterministic]: Start isDeterministic. Operand 356 states and 502 transitions. [2023-11-23 22:28:51,355 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 22:28:51,355 INFO L218 hiAutomatonCegarLoop]: Abstraction has 356 states and 502 transitions. [2023-11-23 22:28:51,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 356 states and 502 transitions. [2023-11-23 22:28:51,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 356 to 349. [2023-11-23 22:28:51,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 349 states, 345 states have (on average 1.4144927536231884) internal successors, (488), 344 states have internal predecessors, (488), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 22:28:51,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349 states to 349 states and 494 transitions. [2023-11-23 22:28:51,365 INFO L240 hiAutomatonCegarLoop]: Abstraction has 349 states and 494 transitions. [2023-11-23 22:28:51,365 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2023-11-23 22:28:51,366 INFO L428 stractBuchiCegarLoop]: Abstraction has 349 states and 494 transitions. [2023-11-23 22:28:51,366 INFO L335 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2023-11-23 22:28:51,366 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 349 states and 494 transitions. [2023-11-23 22:28:51,368 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 342 [2023-11-23 22:28:51,369 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 22:28:51,369 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 22:28:51,370 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 22:28:51,370 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 22:28:51,370 INFO L748 eck$LassoCheckResult]: Stem: 15675#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 15676#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 15543#L715-4 [2023-11-23 22:28:51,371 INFO L750 eck$LassoCheckResult]: Loop: 15543#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 15710#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 15476#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 15477#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 15611#L722-269 havoc main_~_ha_hashv~0#1; 15701#L722-176 goto; 15651#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 15506#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 15507#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 15438#L722-73 assume !main_#t~switch31#1; 15439#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 15544#L722-76 assume !main_#t~switch31#1; 15545#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 15577#L722-79 assume !main_#t~switch31#1; 15578#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 15654#L722-82 assume !main_#t~switch31#1; 15480#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 15481#L722-85 assume !main_#t~switch31#1; 15509#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 15499#L722-88 assume !main_#t~switch31#1; 15500#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 15691#L722-91 assume !main_#t~switch31#1; 15430#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 15431#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 15432#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 15433#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 15627#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 15459#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 15460#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 15572#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 15700#L722-105 havoc main_#t~switch31#1; 15689#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15686#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 15687#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15737#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 15736#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 15735#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 15734#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 15732#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 15730#L722-123 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 15731#L722-125 assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet45#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296; 15709#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15744#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 15443#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15742#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 15594#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 15723#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 15678#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15721#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 15466#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15719#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 15628#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 15629#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 15405#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 15406#L722-170 goto; 15643#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 15604#L722-173 goto; 15605#L722-175 goto; 15673#L722-266 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 15694#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 15695#L722-194 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#4(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#4(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#4(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#4(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 15487#L722-193 goto; 15488#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#4(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#4(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 15517#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#4(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 15518#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 15584#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 15599#L722-202 goto; 15497#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#4(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#4(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 15498#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 15639#L722-207 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 15508#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#4(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 15423#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 15424#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 15562#L722-260 goto; 15647#L722-262 havoc main_~_ha_bkt~0#1; 15609#L722-263 goto; 15610#L722-265 goto; 15534#L722-267 havoc main_~_ha_hashv~0#1; 15419#L722-268 goto; 15420#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 15543#L715-4 [2023-11-23 22:28:51,371 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:51,372 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 18 times [2023-11-23 22:28:51,372 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:51,372 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [363594285] [2023-11-23 22:28:51,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:51,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:51,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:51,387 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 22:28:51,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 22:28:51,418 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 22:28:51,419 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 22:28:51,420 INFO L85 PathProgramCache]: Analyzing trace with hash 1957147505, now seen corresponding path program 1 times [2023-11-23 22:28:51,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 22:28:51,420 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261605345] [2023-11-23 22:28:51,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:51,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 22:28:51,470 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 22:28:51,470 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [309002748] [2023-11-23 22:28:51,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 22:28:51,470 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 22:28:51,471 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 22:28:51,473 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 22:28:51,496 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0d688016-643c-4fd0-ac66-c5f9a3aeedf0/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process