./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test7-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 30e01a73 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test7-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9e43379b3f2624d77eec1084820c7c07499f5ec4432514ab066d4f5cf96eeebc --- Real Ultimate output --- This is Ultimate 0.2.3-dev-30e01a7 [2023-11-23 21:43:41,275 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-23 21:43:41,390 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-23 21:43:41,394 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-23 21:43:41,395 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-23 21:43:41,419 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-23 21:43:41,420 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-23 21:43:41,420 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-23 21:43:41,421 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-23 21:43:41,422 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-23 21:43:41,423 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-23 21:43:41,423 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-23 21:43:41,424 INFO L153 SettingsManager]: * Use SBE=true [2023-11-23 21:43:41,424 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-23 21:43:41,425 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-23 21:43:41,426 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-23 21:43:41,426 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-23 21:43:41,427 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-23 21:43:41,427 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-23 21:43:41,428 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-23 21:43:41,429 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-23 21:43:41,429 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-23 21:43:41,430 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-23 21:43:41,431 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-23 21:43:41,431 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-23 21:43:41,432 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-23 21:43:41,432 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-23 21:43:41,433 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-23 21:43:41,433 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-23 21:43:41,434 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-23 21:43:41,435 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-23 21:43:41,435 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-23 21:43:41,436 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-23 21:43:41,436 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-23 21:43:41,437 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-23 21:43:41,437 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-23 21:43:41,438 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-23 21:43:41,438 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-23 21:43:41,439 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9e43379b3f2624d77eec1084820c7c07499f5ec4432514ab066d4f5cf96eeebc [2023-11-23 21:43:41,676 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-23 21:43:41,706 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-23 21:43:41,708 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-23 21:43:41,710 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-23 21:43:41,711 INFO L274 PluginConnector]: CDTParser initialized [2023-11-23 21:43:41,713 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test7-2.i [2023-11-23 21:43:44,840 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-23 21:43:45,158 INFO L384 CDTParser]: Found 1 translation units. [2023-11-23 21:43:45,158 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test7-2.i [2023-11-23 21:43:45,179 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/data/5a569aaf7/b6bdc27d9ce14350804cd165cd4b7759/FLAGf521dec78 [2023-11-23 21:43:45,200 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/data/5a569aaf7/b6bdc27d9ce14350804cd165cd4b7759 [2023-11-23 21:43:45,209 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-23 21:43:45,211 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-23 21:43:45,214 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-23 21:43:45,215 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-23 21:43:45,220 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-23 21:43:45,221 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:43:45" (1/1) ... [2023-11-23 21:43:45,223 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@10aa7357 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:45, skipping insertion in model container [2023-11-23 21:43:45,223 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:43:45" (1/1) ... [2023-11-23 21:43:45,288 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-23 21:43:46,011 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-23 21:43:46,026 INFO L202 MainTranslator]: Completed pre-run [2023-11-23 21:43:46,208 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-23 21:43:46,251 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-23 21:43:46,259 INFO L206 MainTranslator]: Completed translation [2023-11-23 21:43:46,260 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46 WrapperNode [2023-11-23 21:43:46,260 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-23 21:43:46,261 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-23 21:43:46,262 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-23 21:43:46,262 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-23 21:43:46,270 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,328 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,415 INFO L138 Inliner]: procedures = 176, calls = 331, calls flagged for inlining = 5, calls inlined = 4, statements flattened = 1500 [2023-11-23 21:43:46,416 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-23 21:43:46,416 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-23 21:43:46,417 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-23 21:43:46,417 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-23 21:43:46,435 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,435 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,449 INFO L184 PluginConnector]: Executing the observer HeapSplitter from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,635 INFO L189 HeapSplitter]: Split 306 memory accesses to 5 slices as follows [2, 265, 0, 34, 5] [2023-11-23 21:43:46,648 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,648 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,700 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,717 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,724 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,738 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,768 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-23 21:43:46,768 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-23 21:43:46,769 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-23 21:43:46,769 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-23 21:43:46,770 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (1/1) ... [2023-11-23 21:43:46,775 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-23 21:43:46,792 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 21:43:46,806 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-23 21:43:46,824 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-23 21:43:46,847 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-23 21:43:46,847 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-23 21:43:46,847 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-23 21:43:46,847 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-23 21:43:46,847 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#4 [2023-11-23 21:43:46,848 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-23 21:43:46,848 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-23 21:43:46,848 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-23 21:43:46,848 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-23 21:43:46,848 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#4 [2023-11-23 21:43:46,848 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-23 21:43:46,848 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-23 21:43:46,848 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-23 21:43:46,848 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-23 21:43:46,849 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#4 [2023-11-23 21:43:46,849 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-23 21:43:46,849 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-23 21:43:46,849 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-23 21:43:46,849 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-23 21:43:46,850 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#4 [2023-11-23 21:43:46,850 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-23 21:43:46,850 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-23 21:43:46,850 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-23 21:43:46,850 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-23 21:43:46,850 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-23 21:43:46,851 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-23 21:43:46,851 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#4 [2023-11-23 21:43:46,851 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-23 21:43:46,851 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-23 21:43:46,851 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-23 21:43:46,852 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-23 21:43:46,853 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-23 21:43:46,853 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-23 21:43:46,853 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#4 [2023-11-23 21:43:46,853 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-23 21:43:46,854 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-23 21:43:46,854 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-23 21:43:46,854 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-23 21:43:46,854 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-23 21:43:46,854 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#4 [2023-11-23 21:43:46,855 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-23 21:43:46,855 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-23 21:43:47,118 INFO L241 CfgBuilder]: Building ICFG [2023-11-23 21:43:47,120 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-23 21:43:47,125 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-23 21:43:47,181 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-23 21:43:47,199 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-23 21:43:47,216 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-23 21:43:47,234 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-23 21:43:49,288 INFO L282 CfgBuilder]: Performing block encoding [2023-11-23 21:43:49,320 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-23 21:43:49,320 INFO L309 CfgBuilder]: Removed 72 assume(true) statements. [2023-11-23 21:43:49,322 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:43:49 BoogieIcfgContainer [2023-11-23 21:43:49,322 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-23 21:43:49,323 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-23 21:43:49,323 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-23 21:43:49,334 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-23 21:43:49,334 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-23 21:43:49,335 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 23.11 09:43:45" (1/3) ... [2023-11-23 21:43:49,336 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@33de7732 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 09:43:49, skipping insertion in model container [2023-11-23 21:43:49,336 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-23 21:43:49,337 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:43:46" (2/3) ... [2023-11-23 21:43:49,339 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@33de7732 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 09:43:49, skipping insertion in model container [2023-11-23 21:43:49,339 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-23 21:43:49,339 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:43:49" (3/3) ... [2023-11-23 21:43:49,341 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_SFH_test7-2.i [2023-11-23 21:43:49,416 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-23 21:43:49,417 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-23 21:43:49,417 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-23 21:43:49,417 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-23 21:43:49,417 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-23 21:43:49,417 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-23 21:43:49,417 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-23 21:43:49,417 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-23 21:43:49,424 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 389 states, 384 states have (on average 1.6901041666666667) internal successors, (649), 384 states have internal predecessors, (649), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 21:43:49,474 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 374 [2023-11-23 21:43:49,474 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 21:43:49,474 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 21:43:49,485 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 21:43:49,485 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-23 21:43:49,485 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-23 21:43:49,487 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 389 states, 384 states have (on average 1.6901041666666667) internal successors, (649), 384 states have internal predecessors, (649), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 21:43:49,513 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 374 [2023-11-23 21:43:49,515 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 21:43:49,515 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 21:43:49,515 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 21:43:49,515 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-23 21:43:49,523 INFO L748 eck$LassoCheckResult]: Stem: 113#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 321#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 360#L715-4true [2023-11-23 21:43:49,524 INFO L750 eck$LassoCheckResult]: Loop: 360#L715-4true call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 157#L715-1true assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 27#L717true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 70#L717-2true call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 338#L722-269true assume !true; 236#L715-3true call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 360#L715-4true [2023-11-23 21:43:49,530 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:49,530 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 1 times [2023-11-23 21:43:49,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:49,541 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803306629] [2023-11-23 21:43:49,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:49,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:49,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:49,679 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 21:43:49,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:49,733 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 21:43:49,736 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:49,737 INFO L85 PathProgramCache]: Analyzing trace with hash -1893817108, now seen corresponding path program 1 times [2023-11-23 21:43:49,737 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:49,737 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634948074] [2023-11-23 21:43:49,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:49,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:49,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 21:43:49,824 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 21:43:49,824 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634948074] [2023-11-23 21:43:49,825 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-23 21:43:49,826 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [42416758] [2023-11-23 21:43:49,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:49,827 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 21:43:49,827 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 21:43:49,830 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 21:43:49,852 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-23 21:43:50,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 21:43:50,029 INFO L262 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-23 21:43:50,031 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 21:43:50,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 21:43:50,052 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 21:43:50,054 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [42416758] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 21:43:50,055 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 21:43:50,055 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-23 21:43:50,056 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1050530436] [2023-11-23 21:43:50,057 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 21:43:50,061 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 21:43:50,062 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 21:43:50,101 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-23 21:43:50,102 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-23 21:43:50,104 INFO L87 Difference]: Start difference. First operand has 389 states, 384 states have (on average 1.6901041666666667) internal successors, (649), 384 states have internal predecessors, (649), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 21:43:50,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 21:43:50,143 INFO L93 Difference]: Finished difference Result 386 states and 572 transitions. [2023-11-23 21:43:50,144 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 386 states and 572 transitions. [2023-11-23 21:43:50,150 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 368 [2023-11-23 21:43:50,162 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 386 states to 380 states and 566 transitions. [2023-11-23 21:43:50,163 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 380 [2023-11-23 21:43:50,164 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 380 [2023-11-23 21:43:50,165 INFO L73 IsDeterministic]: Start isDeterministic. Operand 380 states and 566 transitions. [2023-11-23 21:43:50,170 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 21:43:50,170 INFO L218 hiAutomatonCegarLoop]: Abstraction has 380 states and 566 transitions. [2023-11-23 21:43:50,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states and 566 transitions. [2023-11-23 21:43:50,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 380. [2023-11-23 21:43:50,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 376 states have (on average 1.4893617021276595) internal successors, (560), 375 states have internal predecessors, (560), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 21:43:50,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 566 transitions. [2023-11-23 21:43:50,219 INFO L240 hiAutomatonCegarLoop]: Abstraction has 380 states and 566 transitions. [2023-11-23 21:43:50,220 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-23 21:43:50,224 INFO L428 stractBuchiCegarLoop]: Abstraction has 380 states and 566 transitions. [2023-11-23 21:43:50,225 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-23 21:43:50,225 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 380 states and 566 transitions. [2023-11-23 21:43:50,228 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 368 [2023-11-23 21:43:50,229 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 21:43:50,229 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 21:43:50,231 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 21:43:50,231 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 21:43:50,231 INFO L748 eck$LassoCheckResult]: Stem: 1127#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 1128#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 974#L715-4 [2023-11-23 21:43:50,234 INFO L750 eck$LassoCheckResult]: Loop: 974#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1170#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 890#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 891#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 1060#L722-269 havoc main_~_ha_hashv~0#1; 1157#L722-176 goto; 1099#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 929#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 930#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 849#L722-73 assume main_#t~switch31#1;call main_#t~mem32#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 850#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 975#L722-76 assume main_#t~switch31#1;call main_#t~mem33#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 976#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 1027#L722-79 assume !main_#t~switch31#1; 1028#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 1103#L722-82 assume main_#t~switch31#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 892#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 893#L722-85 assume main_#t~switch31#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 933#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 922#L722-88 assume main_#t~switch31#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 923#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 1144#L722-91 assume main_#t~switch31#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem38#1; 835#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 836#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 837#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 838#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 1073#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 865#L722-100 assume !main_#t~switch31#1; 866#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 1014#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 1156#L722-105 havoc main_#t~switch31#1; 1142#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1137#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 999#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1129#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1039#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1040#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 820#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1062#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 848#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 816#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 817#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 912#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 940#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1081#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 878#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 992#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 993#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1074#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 805#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 806#L722-170 goto; 1087#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1053#L722-173 goto; 1054#L722-175 goto; 1125#L722-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1148#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 1149#L722-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#1(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 899#L722-193 goto; 900#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#1(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 942#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#1(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 943#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 1035#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 1047#L722-202 goto; 915#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#1(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 916#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 1085#L722-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 932#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 826#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 827#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 997#L722-260 goto; 1088#L722-262 havoc main_~_ha_bkt~0#1; 1058#L722-263 goto; 1059#L722-265 goto; 963#L722-267 havoc main_~_ha_hashv~0#1; 829#L722-268 goto; 830#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 974#L715-4 [2023-11-23 21:43:50,234 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:50,235 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 2 times [2023-11-23 21:43:50,235 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:50,235 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [403215190] [2023-11-23 21:43:50,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:50,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:50,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:50,256 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 21:43:50,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:50,282 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 21:43:50,289 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:50,289 INFO L85 PathProgramCache]: Analyzing trace with hash -1699457835, now seen corresponding path program 1 times [2023-11-23 21:43:50,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:50,290 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [11094085] [2023-11-23 21:43:50,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:50,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:50,398 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 21:43:50,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [957804469] [2023-11-23 21:43:50,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:50,399 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 21:43:50,399 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 21:43:50,430 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 21:43:50,456 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-23 21:43:50,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 21:43:50,784 INFO L262 TraceCheckSpWp]: Trace formula consists of 522 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-23 21:43:50,788 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 21:43:50,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 21:43:50,838 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 21:43:50,838 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 21:43:50,839 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [11094085] [2023-11-23 21:43:50,839 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 21:43:50,839 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [957804469] [2023-11-23 21:43:50,840 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [957804469] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 21:43:50,840 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 21:43:50,840 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-23 21:43:50,840 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231856292] [2023-11-23 21:43:50,841 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 21:43:50,841 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 21:43:50,842 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 21:43:50,842 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-23 21:43:50,842 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-23 21:43:50,843 INFO L87 Difference]: Start difference. First operand 380 states and 566 transitions. cyclomatic complexity: 190 Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 21:43:50,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 21:43:50,976 INFO L93 Difference]: Finished difference Result 401 states and 587 transitions. [2023-11-23 21:43:50,976 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 401 states and 587 transitions. [2023-11-23 21:43:50,984 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 389 [2023-11-23 21:43:50,991 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 401 states to 401 states and 587 transitions. [2023-11-23 21:43:50,991 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 401 [2023-11-23 21:43:50,993 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 401 [2023-11-23 21:43:50,994 INFO L73 IsDeterministic]: Start isDeterministic. Operand 401 states and 587 transitions. [2023-11-23 21:43:51,001 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 21:43:51,001 INFO L218 hiAutomatonCegarLoop]: Abstraction has 401 states and 587 transitions. [2023-11-23 21:43:51,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 401 states and 587 transitions. [2023-11-23 21:43:51,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 401 to 400. [2023-11-23 21:43:51,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 400 states, 396 states have (on average 1.4646464646464648) internal successors, (580), 395 states have internal predecessors, (580), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 21:43:51,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 400 states to 400 states and 586 transitions. [2023-11-23 21:43:51,054 INFO L240 hiAutomatonCegarLoop]: Abstraction has 400 states and 586 transitions. [2023-11-23 21:43:51,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-23 21:43:51,056 INFO L428 stractBuchiCegarLoop]: Abstraction has 400 states and 586 transitions. [2023-11-23 21:43:51,056 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-23 21:43:51,056 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 400 states and 586 transitions. [2023-11-23 21:43:51,059 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 388 [2023-11-23 21:43:51,060 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 21:43:51,060 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 21:43:51,064 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 21:43:51,065 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 21:43:51,065 INFO L748 eck$LassoCheckResult]: Stem: 2139#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 2140#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1987#L715-4 [2023-11-23 21:43:51,066 INFO L750 eck$LassoCheckResult]: Loop: 1987#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2183#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 1898#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1899#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 2073#L722-269 havoc main_~_ha_hashv~0#1; 2170#L722-176 goto; 2112#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1942#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1943#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 1857#L722-73 assume main_#t~switch31#1;call main_#t~mem32#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 1858#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 1988#L722-76 assume main_#t~switch31#1;call main_#t~mem33#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 1989#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 2040#L722-79 assume main_#t~switch31#1;call main_#t~mem34#1 := read~int#1(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 2041#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 2116#L722-82 assume main_#t~switch31#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 1905#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 1906#L722-85 assume main_#t~switch31#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 1946#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 1935#L722-88 assume main_#t~switch31#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1936#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 2157#L722-91 assume main_#t~switch31#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem38#1; 1847#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 1848#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1849#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 1850#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 2088#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 1881#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 1882#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 2027#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 2169#L722-105 havoc main_#t~switch31#1; 2155#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2153#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2013#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2143#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2052#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2053#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1834#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2075#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1863#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1828#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1829#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1925#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1953#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2094#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1891#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2005#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2006#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2089#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1821#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 1822#L722-170 goto; 2102#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2066#L722-173 goto; 2067#L722-175 goto; 2138#L722-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2161#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 2162#L722-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#1(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 1912#L722-193 goto; 1913#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#1(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 1955#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#1(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 1956#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 2048#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 2060#L722-202 goto; 1928#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#1(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1929#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 2098#L722-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 1945#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 1838#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 1839#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2010#L722-260 goto; 2103#L722-262 havoc main_~_ha_bkt~0#1; 2071#L722-263 goto; 2072#L722-265 goto; 1980#L722-267 havoc main_~_ha_hashv~0#1; 1841#L722-268 goto; 1842#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 1987#L715-4 [2023-11-23 21:43:51,068 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:51,068 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 3 times [2023-11-23 21:43:51,071 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:51,071 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1923919813] [2023-11-23 21:43:51,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:51,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:51,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:51,103 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 21:43:51,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:51,128 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 21:43:51,129 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:51,129 INFO L85 PathProgramCache]: Analyzing trace with hash -1266542511, now seen corresponding path program 1 times [2023-11-23 21:43:51,129 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:51,130 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720851119] [2023-11-23 21:43:51,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:51,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:51,236 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 21:43:51,237 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [654541005] [2023-11-23 21:43:51,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:51,237 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 21:43:51,238 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 21:43:51,240 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 21:43:51,264 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-23 21:43:51,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 21:43:51,616 INFO L262 TraceCheckSpWp]: Trace formula consists of 534 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-23 21:43:51,622 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 21:43:51,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 21:43:51,660 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 21:43:51,660 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 21:43:51,660 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720851119] [2023-11-23 21:43:51,660 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 21:43:51,661 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [654541005] [2023-11-23 21:43:51,661 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [654541005] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 21:43:51,661 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 21:43:51,661 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-23 21:43:51,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1523614398] [2023-11-23 21:43:51,662 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 21:43:51,662 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 21:43:51,663 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 21:43:51,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-23 21:43:51,664 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-23 21:43:51,664 INFO L87 Difference]: Start difference. First operand 400 states and 586 transitions. cyclomatic complexity: 190 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 21:43:51,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 21:43:51,778 INFO L93 Difference]: Finished difference Result 387 states and 566 transitions. [2023-11-23 21:43:51,778 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 387 states and 566 transitions. [2023-11-23 21:43:51,782 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 375 [2023-11-23 21:43:51,787 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 387 states to 387 states and 566 transitions. [2023-11-23 21:43:51,787 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 387 [2023-11-23 21:43:51,788 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 387 [2023-11-23 21:43:51,788 INFO L73 IsDeterministic]: Start isDeterministic. Operand 387 states and 566 transitions. [2023-11-23 21:43:51,789 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 21:43:51,790 INFO L218 hiAutomatonCegarLoop]: Abstraction has 387 states and 566 transitions. [2023-11-23 21:43:51,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 387 states and 566 transitions. [2023-11-23 21:43:51,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 387 to 386. [2023-11-23 21:43:51,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 386 states, 382 states have (on average 1.463350785340314) internal successors, (559), 381 states have internal predecessors, (559), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 21:43:51,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 386 states to 386 states and 565 transitions. [2023-11-23 21:43:51,805 INFO L240 hiAutomatonCegarLoop]: Abstraction has 386 states and 565 transitions. [2023-11-23 21:43:51,805 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-23 21:43:51,806 INFO L428 stractBuchiCegarLoop]: Abstraction has 386 states and 565 transitions. [2023-11-23 21:43:51,806 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-23 21:43:51,806 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 386 states and 565 transitions. [2023-11-23 21:43:51,809 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 374 [2023-11-23 21:43:51,809 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 21:43:51,809 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 21:43:51,810 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 21:43:51,810 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 21:43:51,811 INFO L748 eck$LassoCheckResult]: Stem: 3159#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 3160#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3007#L715-4 [2023-11-23 21:43:51,811 INFO L750 eck$LassoCheckResult]: Loop: 3007#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3204#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 2918#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2919#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 3093#L722-269 havoc main_~_ha_hashv~0#1; 3190#L722-176 goto; 3132#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2962#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2963#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 2878#L722-73 assume !main_#t~switch31#1; 2879#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 3008#L722-76 assume !main_#t~switch31#1; 3009#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 3060#L722-79 assume !main_#t~switch31#1; 3061#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 3136#L722-82 assume !main_#t~switch31#1; 2925#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 2926#L722-85 assume !main_#t~switch31#1; 2966#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 2955#L722-88 assume !main_#t~switch31#1; 2956#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 3177#L722-91 assume !main_#t~switch31#1; 2868#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 2869#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2870#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 2871#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 3108#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 2901#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 2902#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 3047#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 3189#L722-105 havoc main_#t~switch31#1; 3175#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3173#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3033#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3163#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3072#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3073#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2855#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3095#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2883#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2849#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2850#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2945#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2973#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3114#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2911#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3025#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3026#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3109#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2842#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 2843#L722-170 goto; 3122#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3086#L722-173 goto; 3087#L722-175 goto; 3158#L722-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3181#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 3182#L722-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#1(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 2932#L722-193 goto; 2933#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#1(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 2975#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#1(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 2976#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 3068#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 3080#L722-202 goto; 2948#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#1(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2949#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 3118#L722-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 2965#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 2859#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 2860#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3030#L722-260 goto; 3123#L722-262 havoc main_~_ha_bkt~0#1; 3091#L722-263 goto; 3092#L722-265 goto; 3000#L722-267 havoc main_~_ha_hashv~0#1; 2862#L722-268 goto; 2863#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 3007#L715-4 [2023-11-23 21:43:51,812 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:51,812 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 4 times [2023-11-23 21:43:51,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:51,812 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957566835] [2023-11-23 21:43:51,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:51,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:51,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:51,840 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 21:43:51,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:51,860 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 21:43:51,860 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:51,861 INFO L85 PathProgramCache]: Analyzing trace with hash 583704415, now seen corresponding path program 1 times [2023-11-23 21:43:51,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:51,861 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923588757] [2023-11-23 21:43:51,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:51,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:51,919 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 21:43:51,919 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [23659174] [2023-11-23 21:43:51,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:51,920 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 21:43:51,920 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 21:43:51,922 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 21:43:51,944 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-23 21:43:52,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 21:43:52,285 INFO L262 TraceCheckSpWp]: Trace formula consists of 492 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-23 21:43:52,288 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 21:43:52,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 21:43:52,507 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 21:43:52,507 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 21:43:52,507 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923588757] [2023-11-23 21:43:52,507 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 21:43:52,508 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [23659174] [2023-11-23 21:43:52,508 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [23659174] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 21:43:52,508 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 21:43:52,508 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-23 21:43:52,509 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [202582509] [2023-11-23 21:43:52,509 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 21:43:52,509 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 21:43:52,509 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 21:43:52,510 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-23 21:43:52,510 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-23 21:43:52,510 INFO L87 Difference]: Start difference. First operand 386 states and 565 transitions. cyclomatic complexity: 183 Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 21:43:53,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 21:43:53,147 INFO L93 Difference]: Finished difference Result 426 states and 613 transitions. [2023-11-23 21:43:53,148 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 426 states and 613 transitions. [2023-11-23 21:43:53,152 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 414 [2023-11-23 21:43:53,157 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 426 states to 426 states and 613 transitions. [2023-11-23 21:43:53,158 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 426 [2023-11-23 21:43:53,159 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 426 [2023-11-23 21:43:53,159 INFO L73 IsDeterministic]: Start isDeterministic. Operand 426 states and 613 transitions. [2023-11-23 21:43:53,160 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 21:43:53,160 INFO L218 hiAutomatonCegarLoop]: Abstraction has 426 states and 613 transitions. [2023-11-23 21:43:53,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states and 613 transitions. [2023-11-23 21:43:53,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 423. [2023-11-23 21:43:53,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 423 states, 419 states have (on average 1.4391408114558473) internal successors, (603), 418 states have internal predecessors, (603), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 21:43:53,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 609 transitions. [2023-11-23 21:43:53,175 INFO L240 hiAutomatonCegarLoop]: Abstraction has 423 states and 609 transitions. [2023-11-23 21:43:53,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-23 21:43:53,177 INFO L428 stractBuchiCegarLoop]: Abstraction has 423 states and 609 transitions. [2023-11-23 21:43:53,177 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-23 21:43:53,178 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 423 states and 609 transitions. [2023-11-23 21:43:53,180 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 411 [2023-11-23 21:43:53,180 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 21:43:53,180 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 21:43:53,183 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 21:43:53,184 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 21:43:53,184 INFO L748 eck$LassoCheckResult]: Stem: 4206#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 4207#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4053#L715-4 [2023-11-23 21:43:53,187 INFO L750 eck$LassoCheckResult]: Loop: 4053#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4254#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 3964#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3965#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 4139#L722-269 havoc main_~_ha_hashv~0#1; 4239#L722-176 goto; 4178#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4179#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4299#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 4297#L722-73 assume !main_#t~switch31#1; 4296#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 4294#L722-76 assume !main_#t~switch31#1; 4293#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 4292#L722-79 assume !main_#t~switch31#1; 4291#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 4290#L722-82 assume !main_#t~switch31#1; 4289#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 4288#L722-85 assume !main_#t~switch31#1; 4287#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 4286#L722-88 assume !main_#t~switch31#1; 4285#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 4284#L722-91 assume !main_#t~switch31#1; 4283#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 4282#L722-94 assume !main_#t~switch31#1; 4281#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 4280#L722-97 assume !main_#t~switch31#1; 4279#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 4278#L722-100 assume !main_#t~switch31#1; 4277#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 4276#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 4275#L722-105 havoc main_#t~switch31#1; 4274#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4273#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4272#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4210#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 4211#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 4118#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4119#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3901#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4141#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3929#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3895#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3896#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3991#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4019#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4160#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3957#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4071#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4072#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4155#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3888#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 3889#L722-170 goto; 4168#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4132#L722-173 goto; 4133#L722-175 goto; 4205#L722-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4229#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 4230#L722-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#1(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 3978#L722-193 goto; 3979#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#1(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 4021#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#1(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 4022#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 4114#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 4126#L722-202 goto; 3994#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#1(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3995#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 4164#L722-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 4011#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 3905#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 3906#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4076#L722-260 goto; 4172#L722-262 havoc main_~_ha_bkt~0#1; 4137#L722-263 goto; 4138#L722-265 goto; 4046#L722-267 havoc main_~_ha_hashv~0#1; 3908#L722-268 goto; 3909#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 4053#L715-4 [2023-11-23 21:43:53,187 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:53,188 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 5 times [2023-11-23 21:43:53,188 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:53,188 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005229497] [2023-11-23 21:43:53,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:53,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:53,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:53,221 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 21:43:53,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:53,250 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 21:43:53,251 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:53,251 INFO L85 PathProgramCache]: Analyzing trace with hash 426878704, now seen corresponding path program 1 times [2023-11-23 21:43:53,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:53,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598050395] [2023-11-23 21:43:53,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:53,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:53,313 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 21:43:53,314 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1405144240] [2023-11-23 21:43:53,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:53,314 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 21:43:53,314 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 21:43:53,320 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 21:43:53,334 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-23 21:43:53,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 21:43:53,642 INFO L262 TraceCheckSpWp]: Trace formula consists of 475 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-23 21:43:53,645 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 21:43:53,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 21:43:53,697 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 21:43:53,697 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 21:43:53,698 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [598050395] [2023-11-23 21:43:53,698 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 21:43:53,698 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1405144240] [2023-11-23 21:43:53,698 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1405144240] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 21:43:53,698 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 21:43:53,699 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-23 21:43:53,699 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1460148152] [2023-11-23 21:43:53,699 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 21:43:53,699 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 21:43:53,700 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 21:43:53,700 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-23 21:43:53,700 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-23 21:43:53,700 INFO L87 Difference]: Start difference. First operand 423 states and 609 transitions. cyclomatic complexity: 190 Second operand has 5 states, 5 states have (on average 15.4) internal successors, (77), 5 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 21:43:53,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 21:43:53,835 INFO L93 Difference]: Finished difference Result 500 states and 735 transitions. [2023-11-23 21:43:53,835 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 500 states and 735 transitions. [2023-11-23 21:43:53,840 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 488 [2023-11-23 21:43:53,845 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 500 states to 500 states and 735 transitions. [2023-11-23 21:43:53,845 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 500 [2023-11-23 21:43:53,846 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 500 [2023-11-23 21:43:53,846 INFO L73 IsDeterministic]: Start isDeterministic. Operand 500 states and 735 transitions. [2023-11-23 21:43:53,847 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 21:43:53,848 INFO L218 hiAutomatonCegarLoop]: Abstraction has 500 states and 735 transitions. [2023-11-23 21:43:53,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 500 states and 735 transitions. [2023-11-23 21:43:53,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 500 to 423. [2023-11-23 21:43:53,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 423 states, 419 states have (on average 1.431980906921241) internal successors, (600), 418 states have internal predecessors, (600), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 21:43:53,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 606 transitions. [2023-11-23 21:43:53,860 INFO L240 hiAutomatonCegarLoop]: Abstraction has 423 states and 606 transitions. [2023-11-23 21:43:53,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-23 21:43:53,861 INFO L428 stractBuchiCegarLoop]: Abstraction has 423 states and 606 transitions. [2023-11-23 21:43:53,861 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-23 21:43:53,861 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 423 states and 606 transitions. [2023-11-23 21:43:53,864 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 411 [2023-11-23 21:43:53,864 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 21:43:53,864 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 21:43:53,865 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 21:43:53,865 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 21:43:53,865 INFO L748 eck$LassoCheckResult]: Stem: 5373#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 5374#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5213#L715-4 [2023-11-23 21:43:53,865 INFO L750 eck$LassoCheckResult]: Loop: 5213#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5426#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 5123#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5124#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 5302#L722-269 havoc main_~_ha_hashv~0#1; 5409#L722-176 goto; 5342#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5343#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5400#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 5401#L722-73 assume !main_#t~switch31#1; 5436#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 5437#L722-76 assume !main_#t~switch31#1; 5349#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 5350#L722-79 assume !main_#t~switch31#1; 5347#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 5348#L722-82 assume !main_#t~switch31#1; 5130#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 5131#L722-85 assume !main_#t~switch31#1; 5171#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 5172#L722-88 assume !main_#t~switch31#1; 5392#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 5393#L722-91 assume !main_#t~switch31#1; 5073#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 5074#L722-94 assume !main_#t~switch31#1; 5456#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 5454#L722-97 assume !main_#t~switch31#1; 5452#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 5450#L722-100 assume !main_#t~switch31#1; 5448#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 5446#L722-103 assume !main_#t~switch31#1; 5444#L722-105 havoc main_#t~switch31#1; 5443#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5442#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5441#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5377#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 5378#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 5281#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5282#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 5060#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5304#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5088#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5054#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5055#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5150#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5179#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5324#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5116#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5231#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5232#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5319#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5047#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 5048#L722-170 goto; 5332#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5295#L722-173 goto; 5296#L722-175 goto; 5372#L722-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5397#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 5398#L722-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#1(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 5137#L722-193 goto; 5138#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#1(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 5181#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#1(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 5182#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 5277#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 5289#L722-202 goto; 5153#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#1(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5154#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 5328#L722-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 5170#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 5064#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 5065#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5236#L722-260 goto; 5336#L722-262 havoc main_~_ha_bkt~0#1; 5300#L722-263 goto; 5301#L722-265 goto; 5206#L722-267 havoc main_~_ha_hashv~0#1; 5067#L722-268 goto; 5068#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 5213#L715-4 [2023-11-23 21:43:53,866 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:53,866 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 6 times [2023-11-23 21:43:53,866 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:53,866 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016578838] [2023-11-23 21:43:53,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:53,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:53,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:53,880 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 21:43:53,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:53,897 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 21:43:53,897 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:53,898 INFO L85 PathProgramCache]: Analyzing trace with hash -1928926546, now seen corresponding path program 1 times [2023-11-23 21:43:53,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:53,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479169131] [2023-11-23 21:43:53,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:53,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:53,942 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 21:43:53,942 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [672852649] [2023-11-23 21:43:53,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:53,943 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 21:43:53,943 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 21:43:53,952 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 21:43:53,959 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-23 21:43:54,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 21:43:54,305 INFO L262 TraceCheckSpWp]: Trace formula consists of 469 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-23 21:43:54,307 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 21:43:54,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 21:43:54,353 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 21:43:54,353 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 21:43:54,354 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1479169131] [2023-11-23 21:43:54,354 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 21:43:54,354 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [672852649] [2023-11-23 21:43:54,354 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [672852649] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 21:43:54,354 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 21:43:54,355 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-23 21:43:54,355 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1482343697] [2023-11-23 21:43:54,355 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 21:43:54,355 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 21:43:54,356 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 21:43:54,356 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-23 21:43:54,356 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-23 21:43:54,357 INFO L87 Difference]: Start difference. First operand 423 states and 606 transitions. cyclomatic complexity: 187 Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 21:43:54,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 21:43:54,425 INFO L93 Difference]: Finished difference Result 345 states and 492 transitions. [2023-11-23 21:43:54,425 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 345 states and 492 transitions. [2023-11-23 21:43:54,429 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 333 [2023-11-23 21:43:54,432 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 345 states to 345 states and 492 transitions. [2023-11-23 21:43:54,433 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 345 [2023-11-23 21:43:54,433 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 345 [2023-11-23 21:43:54,433 INFO L73 IsDeterministic]: Start isDeterministic. Operand 345 states and 492 transitions. [2023-11-23 21:43:54,434 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 21:43:54,434 INFO L218 hiAutomatonCegarLoop]: Abstraction has 345 states and 492 transitions. [2023-11-23 21:43:54,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states and 492 transitions. [2023-11-23 21:43:54,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 345. [2023-11-23 21:43:54,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 345 states, 341 states have (on average 1.4252199413489737) internal successors, (486), 340 states have internal predecessors, (486), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 21:43:54,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 492 transitions. [2023-11-23 21:43:54,444 INFO L240 hiAutomatonCegarLoop]: Abstraction has 345 states and 492 transitions. [2023-11-23 21:43:54,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-23 21:43:54,445 INFO L428 stractBuchiCegarLoop]: Abstraction has 345 states and 492 transitions. [2023-11-23 21:43:54,445 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-23 21:43:54,446 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 345 states and 492 transitions. [2023-11-23 21:43:54,447 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 333 [2023-11-23 21:43:54,448 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 21:43:54,448 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 21:43:54,449 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 21:43:54,449 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 21:43:54,449 INFO L748 eck$LassoCheckResult]: Stem: 6340#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 6341#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6201#L715-4 [2023-11-23 21:43:54,449 INFO L750 eck$LassoCheckResult]: Loop: 6201#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6377#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 6120#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6121#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 6278#L722-269 havoc main_~_ha_hashv~0#1; 6368#L722-176 goto; 6317#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6161#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6162#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 6082#L722-73 assume !main_#t~switch31#1; 6083#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 6202#L722-76 assume !main_#t~switch31#1; 6203#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 6246#L722-79 assume !main_#t~switch31#1; 6247#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 6320#L722-82 assume !main_#t~switch31#1; 6127#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 6128#L722-85 assume !main_#t~switch31#1; 6164#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 6154#L722-88 assume !main_#t~switch31#1; 6155#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 6356#L722-91 assume !main_#t~switch31#1; 6074#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 6075#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 6076#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 6077#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 6293#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 6105#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 6106#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 6235#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 6367#L722-105 havoc main_#t~switch31#1; 6354#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6352#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 6346#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6344#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 6345#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 6257#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6258#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 6061#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6280#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6087#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6055#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6056#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6147#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6171#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6299#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6113#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6216#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6217#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6294#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6048#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 6049#L722-170 goto; 6307#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6271#L722-173 goto; 6272#L722-175 goto; 6339#L722-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6360#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 6361#L722-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#1(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 6134#L722-193 goto; 6135#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#1(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 6173#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#1(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 6174#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 6253#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 6265#L722-202 goto; 6150#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#1(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6151#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 6303#L722-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 6163#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 6065#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 6066#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6221#L722-260 goto; 6311#L722-262 havoc main_~_ha_bkt~0#1; 6276#L722-263 goto; 6277#L722-265 goto; 6196#L722-267 havoc main_~_ha_hashv~0#1; 6068#L722-268 goto; 6069#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 6201#L715-4 [2023-11-23 21:43:54,450 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:54,450 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 7 times [2023-11-23 21:43:54,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:54,450 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826813922] [2023-11-23 21:43:54,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:54,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:54,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:54,464 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 21:43:54,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:54,480 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 21:43:54,480 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:54,481 INFO L85 PathProgramCache]: Analyzing trace with hash -1506400074, now seen corresponding path program 1 times [2023-11-23 21:43:54,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:54,481 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2009282342] [2023-11-23 21:43:54,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:54,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:54,526 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 21:43:54,526 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [642361339] [2023-11-23 21:43:54,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:54,527 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 21:43:54,527 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 21:43:54,532 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 21:43:54,569 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-23 21:43:54,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 21:43:54,913 INFO L262 TraceCheckSpWp]: Trace formula consists of 493 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-23 21:43:54,916 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 21:43:55,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 21:43:55,119 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 21:43:55,120 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 21:43:55,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2009282342] [2023-11-23 21:43:55,120 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 21:43:55,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [642361339] [2023-11-23 21:43:55,121 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [642361339] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 21:43:55,121 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 21:43:55,121 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-23 21:43:55,124 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409229187] [2023-11-23 21:43:55,124 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 21:43:55,125 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 21:43:55,125 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 21:43:55,125 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-23 21:43:55,131 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-23 21:43:55,132 INFO L87 Difference]: Start difference. First operand 345 states and 492 transitions. cyclomatic complexity: 151 Second operand has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 21:43:55,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 21:43:55,608 INFO L93 Difference]: Finished difference Result 350 states and 498 transitions. [2023-11-23 21:43:55,608 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 350 states and 498 transitions. [2023-11-23 21:43:55,612 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 338 [2023-11-23 21:43:55,617 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 350 states to 350 states and 498 transitions. [2023-11-23 21:43:55,617 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 350 [2023-11-23 21:43:55,617 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 350 [2023-11-23 21:43:55,617 INFO L73 IsDeterministic]: Start isDeterministic. Operand 350 states and 498 transitions. [2023-11-23 21:43:55,618 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 21:43:55,619 INFO L218 hiAutomatonCegarLoop]: Abstraction has 350 states and 498 transitions. [2023-11-23 21:43:55,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 350 states and 498 transitions. [2023-11-23 21:43:55,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 350 to 349. [2023-11-23 21:43:55,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 349 states, 345 states have (on average 1.4231884057971014) internal successors, (491), 344 states have internal predecessors, (491), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 21:43:55,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349 states to 349 states and 497 transitions. [2023-11-23 21:43:55,632 INFO L240 hiAutomatonCegarLoop]: Abstraction has 349 states and 497 transitions. [2023-11-23 21:43:55,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-23 21:43:55,634 INFO L428 stractBuchiCegarLoop]: Abstraction has 349 states and 497 transitions. [2023-11-23 21:43:55,634 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-23 21:43:55,634 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 349 states and 497 transitions. [2023-11-23 21:43:55,637 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 337 [2023-11-23 21:43:55,637 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 21:43:55,637 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 21:43:55,638 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 21:43:55,638 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 21:43:55,639 INFO L748 eck$LassoCheckResult]: Stem: 7276#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 7277#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7136#L715-4 [2023-11-23 21:43:55,639 INFO L750 eck$LassoCheckResult]: Loop: 7136#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7313#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 7060#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7061#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 7213#L722-269 havoc main_~_ha_hashv~0#1; 7304#L722-176 goto; 7253#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7096#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7097#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 7021#L722-73 assume !main_#t~switch31#1; 7022#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 7137#L722-76 assume !main_#t~switch31#1; 7138#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 7181#L722-79 assume !main_#t~switch31#1; 7182#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 7255#L722-82 assume !main_#t~switch31#1; 7062#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 7063#L722-85 assume !main_#t~switch31#1; 7099#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 7089#L722-88 assume !main_#t~switch31#1; 7090#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 7292#L722-91 assume !main_#t~switch31#1; 7009#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 7010#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 7011#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 7012#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 7226#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 7040#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 7041#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 7170#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 7303#L722-105 havoc main_#t~switch31#1; 7290#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7286#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 7287#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7279#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 7280#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 7249#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 7192#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7193#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 6996#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7215#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7020#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6990#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6991#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7082#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7106#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7234#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7048#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7151#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7152#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7227#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6983#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 6984#L722-170 goto; 7242#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7206#L722-173 goto; 7207#L722-175 goto; 7274#L722-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7296#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 7297#L722-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#1(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 7069#L722-193 goto; 7070#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#1(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 7108#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#1(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 7109#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 7188#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 7200#L722-202 goto; 7085#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#1(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7086#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 7238#L722-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 7098#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 7000#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 7001#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7156#L722-260 goto; 7246#L722-262 havoc main_~_ha_bkt~0#1; 7211#L722-263 goto; 7212#L722-265 goto; 7129#L722-267 havoc main_~_ha_hashv~0#1; 7003#L722-268 goto; 7004#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 7136#L715-4 [2023-11-23 21:43:55,640 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:55,641 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 8 times [2023-11-23 21:43:55,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:55,641 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1873267848] [2023-11-23 21:43:55,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:55,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:55,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:55,659 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 21:43:55,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:43:55,677 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 21:43:55,678 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:43:55,678 INFO L85 PathProgramCache]: Analyzing trace with hash -1006617064, now seen corresponding path program 1 times [2023-11-23 21:43:55,679 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:43:55,679 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1775842405] [2023-11-23 21:43:55,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:55,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:43:55,739 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 21:43:55,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [281186596] [2023-11-23 21:43:55,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:43:55,740 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 21:43:55,740 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 21:43:55,748 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 21:43:55,777 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-23 21:44:00,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 21:44:00,582 INFO L262 TraceCheckSpWp]: Trace formula consists of 492 conjuncts, 41 conjunts are in the unsatisfiable core [2023-11-23 21:44:00,586 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 21:44:00,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 21:44:00,828 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 21:44:00,828 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 21:44:00,828 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1775842405] [2023-11-23 21:44:00,828 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 21:44:00,829 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [281186596] [2023-11-23 21:44:00,829 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [281186596] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 21:44:00,829 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 21:44:00,829 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2023-11-23 21:44:00,829 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1637389073] [2023-11-23 21:44:00,829 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 21:44:00,830 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 21:44:00,830 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 21:44:00,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-23 21:44:00,831 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2023-11-23 21:44:00,831 INFO L87 Difference]: Start difference. First operand 349 states and 497 transitions. cyclomatic complexity: 152 Second operand has 9 states, 9 states have (on average 8.666666666666666) internal successors, (78), 9 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 21:44:01,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 21:44:01,426 INFO L93 Difference]: Finished difference Result 359 states and 509 transitions. [2023-11-23 21:44:01,426 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 359 states and 509 transitions. [2023-11-23 21:44:01,430 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 347 [2023-11-23 21:44:01,433 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 359 states to 359 states and 509 transitions. [2023-11-23 21:44:01,434 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 359 [2023-11-23 21:44:01,434 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 359 [2023-11-23 21:44:01,434 INFO L73 IsDeterministic]: Start isDeterministic. Operand 359 states and 509 transitions. [2023-11-23 21:44:01,435 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 21:44:01,435 INFO L218 hiAutomatonCegarLoop]: Abstraction has 359 states and 509 transitions. [2023-11-23 21:44:01,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359 states and 509 transitions. [2023-11-23 21:44:01,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359 to 355. [2023-11-23 21:44:01,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 355 states, 351 states have (on average 1.415954415954416) internal successors, (497), 350 states have internal predecessors, (497), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 21:44:01,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 355 states to 355 states and 503 transitions. [2023-11-23 21:44:01,446 INFO L240 hiAutomatonCegarLoop]: Abstraction has 355 states and 503 transitions. [2023-11-23 21:44:01,446 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2023-11-23 21:44:01,450 INFO L428 stractBuchiCegarLoop]: Abstraction has 355 states and 503 transitions. [2023-11-23 21:44:01,451 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-23 21:44:01,451 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 355 states and 503 transitions. [2023-11-23 21:44:01,453 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 343 [2023-11-23 21:44:01,453 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 21:44:01,453 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 21:44:01,454 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 21:44:01,454 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 21:44:01,454 INFO L748 eck$LassoCheckResult]: Stem: 8229#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 8230#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8089#L715-4 [2023-11-23 21:44:01,455 INFO L750 eck$LassoCheckResult]: Loop: 8089#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8268#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 8013#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 8014#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 8166#L722-269 havoc main_~_ha_hashv~0#1; 8258#L722-176 goto; 8205#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 8049#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8050#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 7972#L722-73 assume !main_#t~switch31#1; 7973#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 8090#L722-76 assume !main_#t~switch31#1; 8091#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 8134#L722-79 assume !main_#t~switch31#1; 8135#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 8208#L722-82 assume !main_#t~switch31#1; 8015#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 8016#L722-85 assume !main_#t~switch31#1; 8052#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 8044#L722-88 assume !main_#t~switch31#1; 8045#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 8246#L722-91 assume !main_#t~switch31#1; 7962#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 7963#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 7964#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 7965#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 8179#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 7990#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 7991#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 8123#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 8257#L722-105 havoc main_#t~switch31#1; 8244#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8238#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 8240#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 8110#L722-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet43#1 := 0; 8111#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8235#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 8145#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8146#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 7947#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8215#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7971#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7940#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7941#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8035#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 8057#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8187#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7999#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8104#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8105#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8180#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7934#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 7935#L722-170 goto; 8193#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8159#L722-173 goto; 8160#L722-175 goto; 8228#L722-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8250#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 8251#L722-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#1(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 8022#L722-193 goto; 8023#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#1(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 8059#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#1(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 8060#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 8141#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 8153#L722-202 goto; 8038#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#1(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8039#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 8191#L722-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 8051#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 7953#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 7954#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 8109#L722-260 goto; 8197#L722-262 havoc main_~_ha_bkt~0#1; 8164#L722-263 goto; 8165#L722-265 goto; 8080#L722-267 havoc main_~_ha_hashv~0#1; 7956#L722-268 goto; 7957#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 8089#L715-4 [2023-11-23 21:44:01,455 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:44:01,455 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 9 times [2023-11-23 21:44:01,456 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:44:01,456 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330761909] [2023-11-23 21:44:01,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:44:01,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:44:01,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:44:01,472 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 21:44:01,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:44:01,491 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 21:44:01,491 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:44:01,491 INFO L85 PathProgramCache]: Analyzing trace with hash -722632070, now seen corresponding path program 1 times [2023-11-23 21:44:01,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:44:01,492 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [487597731] [2023-11-23 21:44:01,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:44:01,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:44:01,546 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 21:44:01,547 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [755399588] [2023-11-23 21:44:01,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:44:01,547 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 21:44:01,547 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 21:44:01,552 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 21:44:01,566 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-23 21:44:01,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 21:44:01,984 INFO L262 TraceCheckSpWp]: Trace formula consists of 494 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-23 21:44:01,986 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 21:44:02,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 21:44:02,162 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 21:44:02,162 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 21:44:02,164 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [487597731] [2023-11-23 21:44:02,164 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 21:44:02,164 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [755399588] [2023-11-23 21:44:02,167 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [755399588] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 21:44:02,168 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 21:44:02,168 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-23 21:44:02,168 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [156839805] [2023-11-23 21:44:02,169 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 21:44:02,169 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 21:44:02,169 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 21:44:02,170 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-23 21:44:02,170 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-23 21:44:02,170 INFO L87 Difference]: Start difference. First operand 355 states and 503 transitions. cyclomatic complexity: 152 Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 21:44:02,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-23 21:44:02,429 INFO L93 Difference]: Finished difference Result 361 states and 510 transitions. [2023-11-23 21:44:02,429 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 361 states and 510 transitions. [2023-11-23 21:44:02,432 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 349 [2023-11-23 21:44:02,436 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 361 states to 361 states and 510 transitions. [2023-11-23 21:44:02,436 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 361 [2023-11-23 21:44:02,437 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 361 [2023-11-23 21:44:02,437 INFO L73 IsDeterministic]: Start isDeterministic. Operand 361 states and 510 transitions. [2023-11-23 21:44:02,438 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-23 21:44:02,438 INFO L218 hiAutomatonCegarLoop]: Abstraction has 361 states and 510 transitions. [2023-11-23 21:44:02,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 361 states and 510 transitions. [2023-11-23 21:44:02,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 361 to 359. [2023-11-23 21:44:02,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 359 states, 355 states have (on average 1.4140845070422534) internal successors, (502), 354 states have internal predecessors, (502), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-23 21:44:02,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 359 states to 359 states and 508 transitions. [2023-11-23 21:44:02,448 INFO L240 hiAutomatonCegarLoop]: Abstraction has 359 states and 508 transitions. [2023-11-23 21:44:02,452 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-23 21:44:02,453 INFO L428 stractBuchiCegarLoop]: Abstraction has 359 states and 508 transitions. [2023-11-23 21:44:02,453 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-23 21:44:02,453 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 359 states and 508 transitions. [2023-11-23 21:44:02,455 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 347 [2023-11-23 21:44:02,455 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-23 21:44:02,456 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-23 21:44:02,456 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-23 21:44:02,456 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-23 21:44:02,457 INFO L748 eck$LassoCheckResult]: Stem: 9187#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 9188#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9045#L715-4 [2023-11-23 21:44:02,457 INFO L750 eck$LassoCheckResult]: Loop: 9045#L715-4 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9225#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 8969#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 8970#L717-2 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 9123#L722-269 havoc main_~_ha_hashv~0#1; 9216#L722-176 goto; 9163#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9005#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9006#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 8928#L722-73 assume !main_#t~switch31#1; 8929#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 9046#L722-76 assume !main_#t~switch31#1; 9047#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 9091#L722-79 assume !main_#t~switch31#1; 9092#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 9166#L722-82 assume !main_#t~switch31#1; 8971#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 8972#L722-85 assume !main_#t~switch31#1; 9008#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 9000#L722-88 assume !main_#t~switch31#1; 9001#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 9204#L722-91 assume !main_#t~switch31#1; 8918#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 8919#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 8920#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 8921#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 9141#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 8949#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 8950#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 9080#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 9215#L722-105 havoc main_#t~switch31#1; 9202#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9199#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 9201#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 9067#L722-111 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet43#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 9069#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9193#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 9160#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9236#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 8903#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9233#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 8927#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8896#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8897#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8991#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9013#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9144#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8955#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9057#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9058#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9136#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8890#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 8891#L722-170 goto; 9150#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 9116#L722-173 goto; 9117#L722-175 goto; 9186#L722-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9208#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 9209#L722-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#1(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 8976#L722-193 goto; 8977#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#1(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 9015#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#1(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 9016#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 9098#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 9109#L722-202 goto; 8994#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#1(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8995#L722-205 assume !(main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 9146#L722-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 9007#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 8909#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 8910#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9065#L722-260 goto; 9154#L722-262 havoc main_~_ha_bkt~0#1; 9121#L722-263 goto; 9122#L722-265 goto; 9036#L722-267 havoc main_~_ha_hashv~0#1; 8912#L722-268 goto; 8913#L715-3 call main_#t~mem3#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#3(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 9045#L715-4 [2023-11-23 21:44:02,458 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:44:02,458 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 10 times [2023-11-23 21:44:02,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:44:02,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555972976] [2023-11-23 21:44:02,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:44:02,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:44:02,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:44:02,472 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-23 21:44:02,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-23 21:44:02,488 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-23 21:44:02,488 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-23 21:44:02,489 INFO L85 PathProgramCache]: Analyzing trace with hash 1522947384, now seen corresponding path program 1 times [2023-11-23 21:44:02,489 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-23 21:44:02,489 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1640270008] [2023-11-23 21:44:02,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:44:02,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-23 21:44:02,537 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-23 21:44:02,537 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1626653748] [2023-11-23 21:44:02,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-23 21:44:02,538 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-23 21:44:02,538 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 [2023-11-23 21:44:02,544 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-23 21:44:02,551 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e92c49b7-9b45-4dc7-8eef-5cdf3d2bd448/bin/uautomizer-verify-zZY32mL2XJ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2023-11-23 21:44:02,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-23 21:44:02,981 INFO L262 TraceCheckSpWp]: Trace formula consists of 492 conjuncts, 16 conjunts are in the unsatisfiable core [2023-11-23 21:44:02,983 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-23 21:44:11,523 WARN L293 SmtUtils]: Spent 8.26s on a formula simplification. DAG size of input: 18 DAG size of output: 1 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-23 21:44:19,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-23 21:44:19,753 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-23 21:44:19,754 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-23 21:44:19,754 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1640270008] [2023-11-23 21:44:19,754 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-23 21:44:19,754 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1626653748] [2023-11-23 21:44:19,754 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1626653748] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-23 21:44:19,754 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-23 21:44:19,755 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-23 21:44:19,755 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1507921103] [2023-11-23 21:44:19,755 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-23 21:44:19,755 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-23 21:44:19,756 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-23 21:44:19,756 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-23 21:44:19,756 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-23 21:44:19,756 INFO L87 Difference]: Start difference. First operand 359 states and 508 transitions. cyclomatic complexity: 153 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-23 21:44:32,691 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-23 21:44:33,994 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.30s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-23 21:44:35,902 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.91s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0]