./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/eca-rers2012/Problem14_label45.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/eca-rers2012/Problem14_label45.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d284e8efd4e45ee6ae258c3b376fc8f91ce52940016142658227b0ca393b3ff2 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 12:05:53,427 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 12:05:53,559 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 12:05:53,569 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 12:05:53,570 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 12:05:53,613 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 12:05:53,614 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 12:05:53,615 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 12:05:53,616 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 12:05:53,621 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 12:05:53,622 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 12:05:53,623 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 12:05:53,623 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 12:05:53,626 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 12:05:53,626 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 12:05:53,627 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 12:05:53,627 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 12:05:53,629 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 12:05:53,630 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 12:05:53,630 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 12:05:53,631 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 12:05:53,632 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 12:05:53,632 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 12:05:53,633 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 12:05:53,633 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 12:05:53,634 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 12:05:53,634 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 12:05:53,635 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 12:05:53,635 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 12:05:53,636 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 12:05:53,637 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 12:05:53,638 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 12:05:53,638 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 12:05:53,638 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 12:05:53,639 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 12:05:53,639 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 12:05:53,639 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 12:05:53,640 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 12:05:53,640 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d284e8efd4e45ee6ae258c3b376fc8f91ce52940016142658227b0ca393b3ff2 [2023-11-26 12:05:53,999 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 12:05:54,033 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 12:05:54,037 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 12:05:54,038 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 12:05:54,039 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 12:05:54,040 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/eca-rers2012/Problem14_label45.c [2023-11-26 12:05:57,100 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 12:05:57,494 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 12:05:57,495 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/sv-benchmarks/c/eca-rers2012/Problem14_label45.c [2023-11-26 12:05:57,511 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/data/400156a02/03fa8939e87141a2aae4865dad04a316/FLAG77b530ec7 [2023-11-26 12:05:57,533 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/data/400156a02/03fa8939e87141a2aae4865dad04a316 [2023-11-26 12:05:57,536 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 12:05:57,537 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 12:05:57,539 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 12:05:57,539 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 12:05:57,545 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 12:05:57,545 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:05:57" (1/1) ... [2023-11-26 12:05:57,547 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@63055787 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:57, skipping insertion in model container [2023-11-26 12:05:57,547 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:05:57" (1/1) ... [2023-11-26 12:05:57,612 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 12:05:58,089 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:05:58,103 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 12:05:58,250 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:05:58,267 INFO L206 MainTranslator]: Completed translation [2023-11-26 12:05:58,268 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58 WrapperNode [2023-11-26 12:05:58,268 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 12:05:58,272 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 12:05:58,272 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 12:05:58,273 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 12:05:58,291 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,318 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,456 INFO L138 Inliner]: procedures = 14, calls = 9, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 858 [2023-11-26 12:05:58,457 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 12:05:58,458 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 12:05:58,459 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 12:05:58,459 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 12:05:58,472 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,474 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,488 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,548 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2023-11-26 12:05:58,550 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,550 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,589 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,600 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,606 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,613 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,625 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 12:05:58,626 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 12:05:58,626 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 12:05:58,626 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 12:05:58,627 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (1/1) ... [2023-11-26 12:05:58,634 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:05:58,648 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:58,664 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:05:58,694 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 12:05:58,716 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 12:05:58,717 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 12:05:58,717 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 12:05:58,717 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 12:05:58,806 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 12:05:58,809 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 12:06:00,424 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 12:06:00,452 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 12:06:00,453 INFO L309 CfgBuilder]: Removed 1 assume(true) statements. [2023-11-26 12:06:00,455 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:06:00 BoogieIcfgContainer [2023-11-26 12:06:00,455 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 12:06:00,456 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 12:06:00,457 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 12:06:00,461 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 12:06:00,462 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:06:00,462 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 12:05:57" (1/3) ... [2023-11-26 12:06:00,463 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@bcdf8d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:06:00, skipping insertion in model container [2023-11-26 12:06:00,463 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:06:00,465 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:58" (2/3) ... [2023-11-26 12:06:00,467 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@bcdf8d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:06:00, skipping insertion in model container [2023-11-26 12:06:00,467 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:06:00,467 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:06:00" (3/3) ... [2023-11-26 12:06:00,470 INFO L332 chiAutomizerObserver]: Analyzing ICFG Problem14_label45.c [2023-11-26 12:06:00,550 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 12:06:00,551 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 12:06:00,551 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 12:06:00,552 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 12:06:00,552 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 12:06:00,552 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 12:06:00,552 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 12:06:00,553 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 12:06:00,560 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 245 states, 244 states have (on average 1.7295081967213115) internal successors, (422), 244 states have internal predecessors, (422), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:00,620 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 240 [2023-11-26 12:06:00,620 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:06:00,620 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:06:00,634 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:06:00,634 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:00,634 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 12:06:00,638 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 245 states, 244 states have (on average 1.7295081967213115) internal successors, (422), 244 states have internal predecessors, (422), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:00,654 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 240 [2023-11-26 12:06:00,657 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:06:00,657 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:06:00,660 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:06:00,662 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:00,681 INFO L748 eck$LassoCheckResult]: Stem: 138#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(20, 2);call #Ultimate.allocInit(12, 3);~inputD~0 := 4;~inputB~0 := 2;~inputC~0 := 3;~inputF~0 := 6;~inputE~0 := 5;~inputA~0 := 1;~a21~0 := 7;~a15~0 := 8;~a12~0 := -49;~a24~0 := 1; 148#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet6#1, main_#t~ret7#1, main_~input~0#1, main_~output~0#1;main_~output~0#1 := -1; 11#L890-2true [2023-11-26 12:06:00,692 INFO L750 eck$LassoCheckResult]: Loop: 11#L890-2true assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 69#L895true assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 180#L31true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 154#L31-2true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 222#L34-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 164#L37-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 167#L40-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 143#L43-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 232#L46-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 93#L49-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 208#L52-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 67#L55-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 5#L58-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 94#L61-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 239#L64-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 78#L67-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 134#L70-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 221#L73-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 226#L76-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 223#L79-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 6#L82-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 37#L85-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 98#L88-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 144#L91-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 68#L94-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 192#L97-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 178#L100-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 30#L103-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 96#L106-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 100#L109-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 171#L112-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 48#L115-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 40#L118-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 89#L121-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 29#L124-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 196#L127-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 240#L130-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 174#L133-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 158#L136-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 116#L139-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 66#L142-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 55#L145-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 213#L148-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 140#L151-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 225#L154-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 9#L157-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 141#L160-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 13#L163-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 186#L166-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 160#L169-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 36#L172-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 234#L175-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 215#L178-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 52#L181-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 103#L184-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 207#L187-1true assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 204#L190-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 84#L193-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 54#L196-1true assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 245#L199-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 85#L202-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 159#L205-1true assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 157#L208-1true assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 218#L211-1true assume (1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0;~a12~0 := 5 * (if -1 * (555500 + ~a12~0) < 0 && 0 != -1 * (555500 + ~a12~0) % 10 then 1 + -1 * (555500 + ~a12~0) / 10 else -1 * (555500 + ~a12~0) / 10);~a15~0 := 5;~a21~0 := 6;calculate_output_#res#1 := -1; 12#calculate_output_returnLabel#1true main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 11#L890-2true [2023-11-26 12:06:00,705 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:00,706 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-26 12:06:00,732 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:00,733 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98904643] [2023-11-26 12:06:00,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:00,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:00,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:00,827 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:00,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:00,857 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:00,860 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:00,861 INFO L85 PathProgramCache]: Analyzing trace with hash 1019768508, now seen corresponding path program 1 times [2023-11-26 12:06:00,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:00,861 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1615685330] [2023-11-26 12:06:00,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:00,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:00,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:00,933 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:00,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:00,997 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:00,999 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:00,999 INFO L85 PathProgramCache]: Analyzing trace with hash 1130754874, now seen corresponding path program 1 times [2023-11-26 12:06:01,000 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:01,000 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2049614829] [2023-11-26 12:06:01,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:01,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:01,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:01,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:06:01,370 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:06:01,371 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2049614829] [2023-11-26 12:06:01,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2049614829] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:06:01,372 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:06:01,372 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 12:06:01,373 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975982845] [2023-11-26 12:06:01,374 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:06:01,962 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:06:01,962 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:06:01,962 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:06:01,963 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:06:01,963 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 12:06:01,963 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:01,963 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:06:01,963 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:06:01,963 INFO L133 ssoRankerPreferences]: Filename of dumped script: Problem14_label45.c_Iteration1_Loop [2023-11-26 12:06:01,963 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:06:01,964 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:06:02,008 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:02,062 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:02,067 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:02,070 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:02,073 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:02,076 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:02,080 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:02,083 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:02,086 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:02,092 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:02,096 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:02,457 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:06:02,458 INFO L404 LassoAnalysis]: Checking for nontermination... [2023-11-26 12:06:02,461 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:02,461 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:02,465 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:02,480 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-26 12:06:02,481 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:02,482 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:03,152 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2023-11-26 12:06:03,153 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:03,153 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:03,154 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:03,157 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-26 12:06:03,162 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2023-11-26 12:06:03,162 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:03,765 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2023-11-26 12:06:03,769 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:03,770 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:06:03,770 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:06:03,770 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:06:03,770 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:06:03,770 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 12:06:03,771 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:03,771 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:06:03,771 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:06:03,771 INFO L133 ssoRankerPreferences]: Filename of dumped script: Problem14_label45.c_Iteration1_Loop [2023-11-26 12:06:03,771 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:06:03,771 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:06:03,778 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:03,839 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:03,843 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:03,846 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:03,849 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:03,851 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:03,855 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:03,858 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:03,860 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:03,864 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:03,870 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:04,205 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:06:04,210 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 12:06:04,211 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:04,211 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:04,213 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:04,222 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:04,235 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:04,236 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:04,236 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:04,237 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2023-11-26 12:06:04,237 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:04,242 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-26 12:06:04,249 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2023-11-26 12:06:04,250 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:04,261 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 12:06:04,270 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2023-11-26 12:06:04,270 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 1 variables to zero. [2023-11-26 12:06:04,272 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:04,272 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:04,306 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:04,309 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-26 12:06:04,309 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 12:06:04,309 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2023-11-26 12:06:04,310 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 12:06:04,311 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(~a12~0) = 1*~a12~0 Supporting invariants [] [2023-11-26 12:06:04,316 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:04,319 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2023-11-26 12:06:04,339 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:04,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:04,372 INFO L262 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 12:06:04,373 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:06:04,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:04,431 INFO L262 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 12:06:04,436 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:06:04,553 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:04,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:06:04,736 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 12:06:04,739 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 245 states, 244 states have (on average 1.7295081967213115) internal successors, (422), 244 states have internal predecessors, (422), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 16.75) internal successors, (67), 4 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:05,847 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 245 states, 244 states have (on average 1.7295081967213115) internal successors, (422), 244 states have internal predecessors, (422), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 4 states, 4 states have (on average 16.75) internal successors, (67), 4 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 976 states and 1563 transitions. Complement of second has 6 states. [2023-11-26 12:06:05,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2023-11-26 12:06:05,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 16.75) internal successors, (67), 4 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:05,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 810 transitions. [2023-11-26 12:06:05,861 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 810 transitions. Stem has 2 letters. Loop has 65 letters. [2023-11-26 12:06:05,864 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:05,864 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 810 transitions. Stem has 67 letters. Loop has 65 letters. [2023-11-26 12:06:05,866 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:05,866 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 810 transitions. Stem has 2 letters. Loop has 130 letters. [2023-11-26 12:06:05,869 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:05,870 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 976 states and 1563 transitions. [2023-11-26 12:06:05,882 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 418 [2023-11-26 12:06:05,894 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 976 states to 602 states and 944 transitions. [2023-11-26 12:06:05,895 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 421 [2023-11-26 12:06:05,896 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 423 [2023-11-26 12:06:05,897 INFO L73 IsDeterministic]: Start isDeterministic. Operand 602 states and 944 transitions. [2023-11-26 12:06:05,900 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:06:05,900 INFO L218 hiAutomatonCegarLoop]: Abstraction has 602 states and 944 transitions. [2023-11-26 12:06:05,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 602 states and 944 transitions. [2023-11-26 12:06:05,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 602 to 600. [2023-11-26 12:06:05,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 600 states, 600 states have (on average 1.57) internal successors, (942), 599 states have internal predecessors, (942), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:05,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 600 states to 600 states and 942 transitions. [2023-11-26 12:06:05,981 INFO L240 hiAutomatonCegarLoop]: Abstraction has 600 states and 942 transitions. [2023-11-26 12:06:05,982 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:06:05,985 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 12:06:05,986 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 12:06:05,987 INFO L87 Difference]: Start difference. First operand 600 states and 942 transitions. Second operand has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 2 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:07,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:06:07,101 INFO L93 Difference]: Finished difference Result 792 states and 996 transitions. [2023-11-26 12:06:07,101 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 792 states and 996 transitions. [2023-11-26 12:06:07,114 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 534 [2023-11-26 12:06:07,119 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 792 states to 537 states and 723 transitions. [2023-11-26 12:06:07,120 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 537 [2023-11-26 12:06:07,121 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 537 [2023-11-26 12:06:07,121 INFO L73 IsDeterministic]: Start isDeterministic. Operand 537 states and 723 transitions. [2023-11-26 12:06:07,124 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:06:07,124 INFO L218 hiAutomatonCegarLoop]: Abstraction has 537 states and 723 transitions. [2023-11-26 12:06:07,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states and 723 transitions. [2023-11-26 12:06:07,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 358. [2023-11-26 12:06:07,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 358 states, 358 states have (on average 1.4189944134078212) internal successors, (508), 357 states have internal predecessors, (508), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:07,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 358 states to 358 states and 508 transitions. [2023-11-26 12:06:07,151 INFO L240 hiAutomatonCegarLoop]: Abstraction has 358 states and 508 transitions. [2023-11-26 12:06:07,152 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 12:06:07,153 INFO L428 stractBuchiCegarLoop]: Abstraction has 358 states and 508 transitions. [2023-11-26 12:06:07,153 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 12:06:07,153 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 358 states and 508 transitions. [2023-11-26 12:06:07,157 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 356 [2023-11-26 12:06:07,159 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:06:07,159 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:06:07,162 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:06:07,162 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:07,163 INFO L748 eck$LassoCheckResult]: Stem: 2897#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(20, 2);call #Ultimate.allocInit(12, 3);~inputD~0 := 4;~inputB~0 := 2;~inputC~0 := 3;~inputF~0 := 6;~inputE~0 := 5;~inputA~0 := 1;~a21~0 := 7;~a15~0 := 8;~a12~0 := -49;~a24~0 := 1; 2898#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet6#1, main_#t~ret7#1, main_~input~0#1, main_~output~0#1;main_~output~0#1 := -1; 2873#L890-2 [2023-11-26 12:06:07,163 INFO L750 eck$LassoCheckResult]: Loop: 2873#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 2874#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 2981#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 2933#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 2934#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 2957#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 2958#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 2907#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 2908#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 3013#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 3007#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 2984#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 2852#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 2853#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 3014#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 3001#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 2890#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 2891#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 3016#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 3017#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 2854#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 2855#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 2941#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 2909#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 2910#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 2985#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 2980#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 2919#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 2920#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 3015#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 2972#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 2962#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 2947#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 2948#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 2913#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 2914#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 2999#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 2977#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 2938#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 2848#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 2849#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 2973#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 2974#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 2903#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 2904#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 2871#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 2872#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 2875#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 2876#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 2946#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 2939#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 2940#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 3011#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 2967#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 2968#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 3006#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 3004#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 3005#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 2970#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 2971#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 3008#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 2942#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 2935#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 2936#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 2996#L221 assume (9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0;~a15~0 := 5;~a21~0 := 6;calculate_output_#res#1 := -1; 2844#calculate_output_returnLabel#1 main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 2873#L890-2 [2023-11-26 12:06:07,163 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:07,163 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2023-11-26 12:06:07,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:07,164 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371153511] [2023-11-26 12:06:07,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:07,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:07,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:07,171 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:07,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:07,177 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:07,178 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:07,178 INFO L85 PathProgramCache]: Analyzing trace with hash 1548038192, now seen corresponding path program 1 times [2023-11-26 12:06:07,178 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:07,179 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [25524725] [2023-11-26 12:06:07,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:07,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:07,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:07,202 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:07,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:07,220 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:07,220 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:07,221 INFO L85 PathProgramCache]: Analyzing trace with hash 693648242, now seen corresponding path program 1 times [2023-11-26 12:06:07,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:07,221 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264681130] [2023-11-26 12:06:07,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:07,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:07,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:07,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:06:07,350 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:06:07,351 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [264681130] [2023-11-26 12:06:07,351 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [264681130] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:06:07,351 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:06:07,351 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 12:06:07,352 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2085940668] [2023-11-26 12:06:07,352 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:06:07,741 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:06:07,742 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:06:07,742 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:06:07,742 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:06:07,742 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 12:06:07,742 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:07,743 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:06:07,743 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:06:07,743 INFO L133 ssoRankerPreferences]: Filename of dumped script: Problem14_label45.c_Iteration2_Loop [2023-11-26 12:06:07,743 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:06:07,743 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:06:07,745 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:07,748 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:07,751 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:07,753 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:07,756 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:07,759 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:07,762 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:07,767 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:07,771 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:07,773 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:07,776 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:07,892 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:06:07,892 INFO L404 LassoAnalysis]: Checking for nontermination... [2023-11-26 12:06:07,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:07,893 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:07,895 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:07,906 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:07,906 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:07,920 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-26 12:06:07,932 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:07,932 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~output~0#1=-1} Honda state: {ULTIMATE.start_main_~output~0#1=-1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:07,942 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:07,942 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:07,942 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:07,945 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:07,954 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-26 12:06:07,955 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:07,955 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:07,978 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:07,978 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_calculate_output_~input#1=0} Honda state: {ULTIMATE.start_calculate_output_~input#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:08,008 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,009 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,009 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,010 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,020 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:08,021 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:08,034 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-26 12:06:08,044 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:08,044 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~ret7#1=0} Honda state: {ULTIMATE.start_main_#t~ret7#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:08,048 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,048 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,049 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,050 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,059 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:08,059 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:08,072 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-26 12:06:08,088 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:08,088 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~a12~0=-43} Honda state: {~a12~0=-43} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:08,100 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,101 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,101 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,102 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,108 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-26 12:06:08,109 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:08,109 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:08,131 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:08,131 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~nondet6#1=0} Honda state: {ULTIMATE.start_main_#t~nondet6#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:08,140 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,141 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,141 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,142 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,154 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:08,154 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:08,156 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-26 12:06:08,176 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:08,177 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~a24~0=1} Honda state: {~a24~0=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:08,185 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,186 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,186 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,187 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,196 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:08,196 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:08,210 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2023-11-26 12:06:08,241 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,241 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,241 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,243 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,251 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2023-11-26 12:06:08,251 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:08,256 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2023-11-26 12:06:08,275 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2023-11-26 12:06:08,288 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,288 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:06:08,289 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:06:08,289 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:06:08,289 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:06:08,289 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 12:06:08,289 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,289 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:06:08,289 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:06:08,289 INFO L133 ssoRankerPreferences]: Filename of dumped script: Problem14_label45.c_Iteration2_Loop [2023-11-26 12:06:08,289 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:06:08,289 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:06:08,291 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:08,294 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:08,299 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:08,302 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:08,305 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:08,307 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:08,311 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:08,316 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:08,318 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:08,321 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:08,325 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:08,443 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:06:08,443 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 12:06:08,443 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,443 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,446 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,452 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2023-11-26 12:06:08,453 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:08,466 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:08,466 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:08,466 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:08,466 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:08,466 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:08,468 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:08,468 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:08,478 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:08,487 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,488 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,488 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,489 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,497 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:08,510 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2023-11-26 12:06:08,511 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:08,511 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:08,511 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:08,511 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:08,511 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:08,512 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:08,512 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:08,521 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:08,527 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,528 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,528 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,529 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,541 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:08,554 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2023-11-26 12:06:08,554 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:08,554 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:08,555 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:08,555 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:08,555 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:08,560 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:08,561 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:08,584 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:08,593 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,593 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,593 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,594 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,606 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:08,619 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:08,619 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:08,619 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:08,619 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:08,619 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:08,620 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:08,620 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:08,623 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2023-11-26 12:06:08,632 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:08,641 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,642 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,642 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,643 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,652 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:08,665 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2023-11-26 12:06:08,665 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:08,666 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:08,666 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:08,666 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:08,666 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:08,667 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:08,667 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:08,680 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:08,689 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,689 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,690 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,691 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,700 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:08,712 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:08,712 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:08,712 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:08,712 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:08,712 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:08,714 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:08,714 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:08,720 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2023-11-26 12:06:08,732 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:08,741 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,741 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,741 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,743 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,752 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:08,765 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2023-11-26 12:06:08,765 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:08,765 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:08,765 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:08,766 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:08,766 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:08,767 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:08,767 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:08,788 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 12:06:08,791 INFO L443 ModelExtractionUtils]: Simplification made 2 calls to the SMT solver. [2023-11-26 12:06:08,791 INFO L444 ModelExtractionUtils]: 1 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2023-11-26 12:06:08,791 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:08,791 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:08,792 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:08,801 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 12:06:08,801 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2023-11-26 12:06:08,801 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 12:06:08,801 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(~a15~0) = 1*~a15~0 Supporting invariants [] [2023-11-26 12:06:08,803 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2023-11-26 12:06:08,810 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,811 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2023-11-26 12:06:08,825 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:08,858 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:08,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:08,868 INFO L262 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 12:06:08,868 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:06:08,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:08,908 INFO L262 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 12:06:08,915 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:06:09,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:06:09,053 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 12:06:09,053 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 358 states and 508 transitions. cyclomatic complexity: 151 Second operand has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:09,791 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 358 states and 508 transitions. cyclomatic complexity: 151. Second operand has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 1076 states and 1409 transitions. Complement of second has 5 states. [2023-11-26 12:06:09,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2023-11-26 12:06:09,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:09,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 291 transitions. [2023-11-26 12:06:09,793 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 291 transitions. Stem has 2 letters. Loop has 66 letters. [2023-11-26 12:06:09,794 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:09,794 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 291 transitions. Stem has 68 letters. Loop has 66 letters. [2023-11-26 12:06:09,795 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:09,795 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 291 transitions. Stem has 2 letters. Loop has 132 letters. [2023-11-26 12:06:09,796 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:09,796 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1076 states and 1409 transitions. [2023-11-26 12:06:09,811 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 712 [2023-11-26 12:06:09,822 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1076 states to 1076 states and 1409 transitions. [2023-11-26 12:06:09,822 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 715 [2023-11-26 12:06:09,823 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 718 [2023-11-26 12:06:09,824 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1076 states and 1409 transitions. [2023-11-26 12:06:09,826 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:06:09,826 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1076 states and 1409 transitions. [2023-11-26 12:06:09,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1076 states and 1409 transitions. [2023-11-26 12:06:09,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1076 to 1073. [2023-11-26 12:06:09,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1073 states, 1073 states have (on average 1.3103448275862069) internal successors, (1406), 1072 states have internal predecessors, (1406), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:09,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1073 states to 1073 states and 1406 transitions. [2023-11-26 12:06:09,884 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1073 states and 1406 transitions. [2023-11-26 12:06:09,884 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:06:09,885 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 12:06:09,885 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 12:06:09,885 INFO L87 Difference]: Start difference. First operand 1073 states and 1406 transitions. Second operand has 3 states, 3 states have (on average 22.666666666666668) internal successors, (68), 2 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:10,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:06:10,832 INFO L93 Difference]: Finished difference Result 1251 states and 1565 transitions. [2023-11-26 12:06:10,832 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1251 states and 1565 transitions. [2023-11-26 12:06:10,845 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 890 [2023-11-26 12:06:10,856 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1251 states to 1251 states and 1565 transitions. [2023-11-26 12:06:10,857 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 893 [2023-11-26 12:06:10,858 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 893 [2023-11-26 12:06:10,858 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1251 states and 1565 transitions. [2023-11-26 12:06:10,859 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:06:10,859 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1251 states and 1565 transitions. [2023-11-26 12:06:10,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1251 states and 1565 transitions. [2023-11-26 12:06:10,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1251 to 1251. [2023-11-26 12:06:10,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1251 states, 1251 states have (on average 1.2509992006394883) internal successors, (1565), 1250 states have internal predecessors, (1565), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:10,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1251 states to 1251 states and 1565 transitions. [2023-11-26 12:06:10,899 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1251 states and 1565 transitions. [2023-11-26 12:06:10,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 12:06:10,901 INFO L428 stractBuchiCegarLoop]: Abstraction has 1251 states and 1565 transitions. [2023-11-26 12:06:10,901 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 12:06:10,901 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1251 states and 1565 transitions. [2023-11-26 12:06:10,911 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 890 [2023-11-26 12:06:10,911 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:06:10,912 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:06:10,913 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2023-11-26 12:06:10,914 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:10,914 INFO L748 eck$LassoCheckResult]: Stem: 6941#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(20, 2);call #Ultimate.allocInit(12, 3);~inputD~0 := 4;~inputB~0 := 2;~inputC~0 := 3;~inputF~0 := 6;~inputE~0 := 5;~inputA~0 := 1;~a21~0 := 7;~a15~0 := 8;~a12~0 := -49;~a24~0 := 1; 6942#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet6#1, main_#t~ret7#1, main_~input~0#1, main_~output~0#1;main_~output~0#1 := -1; 6985#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 7306#L895 [2023-11-26 12:06:10,915 INFO L750 eck$LassoCheckResult]: Loop: 7306#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 8037#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 8036#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 8035#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 8034#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 8033#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 8032#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 8031#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 8030#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 8029#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 8028#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 8027#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 8026#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 8025#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 8024#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 8023#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 8022#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 8021#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 8020#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 8019#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 8018#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 8017#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 8016#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 8015#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 8014#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 8013#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 8012#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 8011#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 8010#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 8009#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 8008#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 8006#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 8004#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 8002#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 8000#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 7998#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 7997#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 7996#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 7995#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 7994#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 7116#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 7117#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 6951#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 6952#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 7269#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 6955#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 6956#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 7757#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 7756#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 7755#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 7754#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 7753#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 7752#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 7751#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 7750#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 7749#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 7748#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 7747#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 7303#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 7231#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 7037#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 7022#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 7023#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 7246#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 7837#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 7104#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 6930#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 6931#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 7978#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 7977#L257 assume !((((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0); 7976#L262 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 7975#L268 assume !(9 == ~a15~0 && (1 == calculate_output_~input#1 && (((~a12~0 <= -43 && 10 == ~a21~0) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0))) && 1 == ~a24~0); 7974#L274 assume !((1 == ~a24~0 && (6 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 80 < ~a12~0) && 9 == ~a15~0); 7973#L279 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a15~0 && 1 == ~a24~0 && (9 == ~a21~0 || 10 == ~a21~0) && 2 == calculate_output_~input#1); 7972#L285 assume !((((5 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0) && 1 == ~a24~0); 7971#L290 assume !((80 < ~a12~0 && 8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 7970#L296 assume !(4 == calculate_output_~input#1 && (((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43))); 7969#L303 assume !(((1 == ~a24~0 && 3 == calculate_output_~input#1 && ~a12~0 <= -43) && 7 == ~a21~0) && 8 == ~a15~0); 7968#L309 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 7967#L315 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 80 < ~a12~0); 7966#L321 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 8 == ~a15~0) && 1 == ~a24~0); 7965#L327 assume !(((9 == ~a15~0 && 1 == calculate_output_~input#1 && 8 == ~a21~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 7964#L333 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 8 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 7963#L339 assume !(1 == ~a24~0 && (8 == ~a15~0 && 1 == calculate_output_~input#1 && 9 == ~a21~0) && 11 < ~a12~0 && 80 >= ~a12~0); 7962#L345 assume !(9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 7961#L351 assume !(80 < ~a12~0 && 9 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0); 7960#L357 assume !((((6 == calculate_output_~input#1 && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0) && 1 == ~a24~0); 7959#L363 assume !(((1 == ~a24~0 && 1 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 7958#L369 assume !(((10 == ~a21~0 && (80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) || ((5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 7957#L376 assume !(((((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 7956#L382 assume !((((1 == calculate_output_~input#1 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0)) && 9 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 7955#L388 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0); 7954#L394 assume !((1 == ~a24~0 && 9 == ~a15~0 && 5 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 7953#L400 assume !(((8 == ~a15~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 7952#L406 assume !(9 == ~a15~0 && ((3 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 7951#L412 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 7950#L418 assume !(9 == ~a15~0 && 1 == ~a24~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 7949#L424 assume !((11 < ~a12~0 && 80 >= ~a12~0) && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 9 == ~a15~0); 7948#L430 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && 80 < ~a12~0) && 9 == ~a21~0); 7947#L436 assume !((1 == ~a24~0 && (2 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && ~a12~0 <= -43) && 8 == ~a15~0); 7946#L442 assume !(1 == ~a24~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0))) && 9 == ~a15~0); 7945#L448 assume !((((6 == calculate_output_~input#1 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0) && ~a12~0 <= -43); 7944#L454 assume !(((~a12~0 <= -43 && 6 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && 1 == ~a24~0) && 8 == ~a15~0); 7943#L459 assume (((7 == ~a21~0 && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0) && 8 == ~a15~0;~a21~0 := 10;calculate_output_#res#1 := 22; 7083#calculate_output_returnLabel#1 main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 7412#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 7306#L895 [2023-11-26 12:06:10,916 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:10,917 INFO L85 PathProgramCache]: Analyzing trace with hash 29864, now seen corresponding path program 1 times [2023-11-26 12:06:10,917 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:10,917 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2009351590] [2023-11-26 12:06:10,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:10,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:10,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:10,925 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:10,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:10,931 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:10,932 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:10,932 INFO L85 PathProgramCache]: Analyzing trace with hash 2107035350, now seen corresponding path program 1 times [2023-11-26 12:06:10,933 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:10,933 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307170218] [2023-11-26 12:06:10,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:10,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:10,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:10,976 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:10,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:11,006 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:11,007 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:11,007 INFO L85 PathProgramCache]: Analyzing trace with hash -903689539, now seen corresponding path program 1 times [2023-11-26 12:06:11,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:11,008 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [273766703] [2023-11-26 12:06:11,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:11,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:11,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:11,044 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:11,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:11,083 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:11,843 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:06:11,843 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:06:11,844 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:06:11,844 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:06:11,844 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 12:06:11,844 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:11,844 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:06:11,844 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:06:11,844 INFO L133 ssoRankerPreferences]: Filename of dumped script: Problem14_label45.c_Iteration3_Loop [2023-11-26 12:06:11,845 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:06:11,845 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:06:11,846 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:11,850 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:11,854 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:11,857 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:11,861 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:11,865 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:11,870 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:11,877 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:11,881 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:11,884 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:11,888 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:11,974 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:06:11,974 INFO L404 LassoAnalysis]: Checking for nontermination... [2023-11-26 12:06:11,974 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:11,974 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:11,976 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:11,981 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2023-11-26 12:06:11,981 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:11,982 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:11,996 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:11,996 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~ret7#1=0} Honda state: {ULTIMATE.start_main_#t~ret7#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:11,999 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:12,000 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,000 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,001 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,004 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2023-11-26 12:06:12,005 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:12,005 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:12,030 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:12,030 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~a24~0=1} Honda state: {~a24~0=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:12,034 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:12,034 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,034 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,035 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,037 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2023-11-26 12:06:12,039 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:12,040 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:12,053 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:12,053 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_calculate_output_#in~input#1=0} Honda state: {ULTIMATE.start_calculate_output_#in~input#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:12,057 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:12,057 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,057 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,058 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,060 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2023-11-26 12:06:12,061 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:12,061 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:12,081 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:12,082 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~a12~0=-43} Honda state: {~a12~0=-43} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:12,084 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Ended with exit code 0 [2023-11-26 12:06:12,085 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,085 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,086 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,089 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2023-11-26 12:06:12,090 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:12,090 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:12,105 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:12,105 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~input~0#1=5} Honda state: {ULTIMATE.start_main_~input~0#1=5} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:12,108 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:12,109 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,109 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,110 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,111 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2023-11-26 12:06:12,113 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:12,113 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:12,128 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:12,128 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~a15~0=8} Honda state: {~a15~0=8} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:12,131 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2023-11-26 12:06:12,131 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,132 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,133 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,142 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:12,142 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:12,142 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2023-11-26 12:06:12,165 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:12,168 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,168 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,170 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,174 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2023-11-26 12:06:12,174 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:12,177 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2023-11-26 12:06:12,212 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2023-11-26 12:06:12,222 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:12,222 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:06:12,222 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:06:12,222 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:06:12,223 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:06:12,223 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 12:06:12,223 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,223 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:06:12,223 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:06:12,223 INFO L133 ssoRankerPreferences]: Filename of dumped script: Problem14_label45.c_Iteration3_Loop [2023-11-26 12:06:12,223 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:06:12,223 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:06:12,224 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:12,228 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:12,231 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:12,234 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:12,236 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:12,240 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:12,243 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:12,247 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:12,254 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:12,262 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:12,265 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:12,368 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:06:12,368 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 12:06:12,368 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,369 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,370 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,375 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2023-11-26 12:06:12,376 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:12,388 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:12,388 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:12,388 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:12,388 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:12,388 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:12,389 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:12,389 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:12,391 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:12,394 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:12,394 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,394 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,395 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,397 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2023-11-26 12:06:12,398 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:12,409 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:12,410 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:12,410 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:12,410 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:12,410 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:12,410 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:12,410 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:12,420 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:12,423 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Ended with exit code 0 [2023-11-26 12:06:12,424 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,424 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,425 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,427 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2023-11-26 12:06:12,428 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:12,439 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:12,439 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:12,440 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:12,440 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:12,440 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:12,441 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:12,441 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:12,443 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:12,446 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Ended with exit code 0 [2023-11-26 12:06:12,446 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,446 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,447 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,451 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:12,454 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2023-11-26 12:06:12,464 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:12,464 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:12,464 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:12,464 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:12,464 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:12,465 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:12,465 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:12,466 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:12,469 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Ended with exit code 0 [2023-11-26 12:06:12,470 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,470 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,471 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,477 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2023-11-26 12:06:12,478 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:12,489 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:12,490 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:12,490 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:12,490 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:12,490 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:12,491 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:12,491 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:12,503 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:12,505 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Ended with exit code 0 [2023-11-26 12:06:12,506 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,506 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,507 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,508 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2023-11-26 12:06:12,511 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:12,523 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:12,523 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:12,523 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:12,523 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:12,523 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:12,524 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:12,524 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:12,526 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:12,529 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Ended with exit code 0 [2023-11-26 12:06:12,529 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,529 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,530 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,533 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2023-11-26 12:06:12,538 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:12,550 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:12,550 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:12,550 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:12,551 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:12,551 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:12,551 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:12,551 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:12,560 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:12,570 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:12,570 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,570 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,572 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,574 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2023-11-26 12:06:12,575 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:12,587 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:12,587 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:12,588 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:12,588 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:12,588 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:12,589 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:12,589 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:12,594 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 12:06:12,596 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2023-11-26 12:06:12,596 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2023-11-26 12:06:12,597 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:12,597 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:12,598 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:12,603 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 12:06:12,603 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2023-11-26 12:06:12,603 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 12:06:12,603 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(~a21~0) = -2*~a21~0 + 17 Supporting invariants [] [2023-11-26 12:06:12,603 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2023-11-26 12:06:12,606 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Ended with exit code 0 [2023-11-26 12:06:12,607 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2023-11-26 12:06:12,626 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:12,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:12,639 INFO L262 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 12:06:12,640 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:06:12,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:12,694 INFO L262 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 12:06:12,700 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:06:12,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:06:12,944 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 12:06:12,944 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 1251 states and 1565 transitions. cyclomatic complexity: 317 Second operand has 4 states, 4 states have (on average 27.25) internal successors, (109), 4 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:13,591 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:13,732 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 1251 states and 1565 transitions. cyclomatic complexity: 317. Second operand has 4 states, 4 states have (on average 27.25) internal successors, (109), 4 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 3042 states and 3550 transitions. Complement of second has 5 states. [2023-11-26 12:06:13,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2023-11-26 12:06:13,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 27.25) internal successors, (109), 4 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:13,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 189 transitions. [2023-11-26 12:06:13,737 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 189 transitions. Stem has 3 letters. Loop has 106 letters. [2023-11-26 12:06:13,738 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:13,738 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 189 transitions. Stem has 109 letters. Loop has 106 letters. [2023-11-26 12:06:13,739 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:13,739 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 189 transitions. Stem has 3 letters. Loop has 212 letters. [2023-11-26 12:06:13,741 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:13,742 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3042 states and 3550 transitions. [2023-11-26 12:06:13,780 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 1424 [2023-11-26 12:06:13,805 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3042 states to 3042 states and 3550 transitions. [2023-11-26 12:06:13,806 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1428 [2023-11-26 12:06:13,808 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1432 [2023-11-26 12:06:13,808 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3042 states and 3550 transitions. [2023-11-26 12:06:13,808 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:06:13,808 INFO L218 hiAutomatonCegarLoop]: Abstraction has 3042 states and 3550 transitions. [2023-11-26 12:06:13,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3042 states and 3550 transitions. [2023-11-26 12:06:13,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3042 to 3038. [2023-11-26 12:06:13,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3038 states, 3038 states have (on average 1.1672152732060566) internal successors, (3546), 3037 states have internal predecessors, (3546), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:13,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3038 states to 3038 states and 3546 transitions. [2023-11-26 12:06:13,878 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3038 states and 3546 transitions. [2023-11-26 12:06:13,878 INFO L428 stractBuchiCegarLoop]: Abstraction has 3038 states and 3546 transitions. [2023-11-26 12:06:13,878 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 12:06:13,878 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3038 states and 3546 transitions. [2023-11-26 12:06:13,896 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 1424 [2023-11-26 12:06:13,896 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:06:13,896 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:06:13,898 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-26 12:06:13,898 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:13,899 INFO L748 eck$LassoCheckResult]: Stem: 11586#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(20, 2);call #Ultimate.allocInit(12, 3);~inputD~0 := 4;~inputB~0 := 2;~inputC~0 := 3;~inputF~0 := 6;~inputE~0 := 5;~inputA~0 := 1;~a21~0 := 7;~a15~0 := 8;~a12~0 := -49;~a24~0 := 1; 11587#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet6#1, main_#t~ret7#1, main_~input~0#1, main_~output~0#1;main_~output~0#1 := -1; 11533#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 11534#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 11820#L31 [2023-11-26 12:06:13,903 INFO L750 eck$LassoCheckResult]: Loop: 11820#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 12937#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 12935#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 12933#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 12931#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 12929#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 12927#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 12925#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 12923#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 12921#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 12919#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 12917#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 12915#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 12913#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 12911#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 12909#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 12907#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 12905#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 12903#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 12901#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 12899#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 12897#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 12895#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 12893#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 12891#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 12889#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 12887#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 12885#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 12883#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 12881#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 12879#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 12877#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 12875#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 12873#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 12871#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 12869#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 12867#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 12865#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 12863#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 12861#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 12859#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 12857#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 12855#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 12853#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 12851#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 12849#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 12847#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 12845#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 12843#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 12841#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 12839#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 12837#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 12835#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 12833#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 12831#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 12829#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 12827#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 12825#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 12823#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 12821#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 12819#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 12817#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 12815#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 12813#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 12811#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 12809#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 12807#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 12805#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 11995#L257 assume !((((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0); 11729#L262 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 11555#L268 assume !(9 == ~a15~0 && (1 == calculate_output_~input#1 && (((~a12~0 <= -43 && 10 == ~a21~0) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0))) && 1 == ~a24~0); 11556#L274 assume !((1 == ~a24~0 && (6 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 80 < ~a12~0) && 9 == ~a15~0); 11704#L279 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a15~0 && 1 == ~a24~0 && (9 == ~a21~0 || 10 == ~a21~0) && 2 == calculate_output_~input#1); 11705#L285 assume !((((5 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0) && 1 == ~a24~0); 11954#L290 assume !((80 < ~a12~0 && 8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 11689#L296 assume !(4 == calculate_output_~input#1 && (((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43))); 11691#L303 assume !(((1 == ~a24~0 && 3 == calculate_output_~input#1 && ~a12~0 <= -43) && 7 == ~a21~0) && 8 == ~a15~0); 11845#L309 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 11645#L315 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 80 < ~a12~0); 11646#L321 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 8 == ~a15~0) && 1 == ~a24~0); 11548#L327 assume !(((9 == ~a15~0 && 1 == calculate_output_~input#1 && 8 == ~a21~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 11549#L333 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 8 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 13574#L339 assume !(1 == ~a24~0 && (8 == ~a15~0 && 1 == calculate_output_~input#1 && 9 == ~a21~0) && 11 < ~a12~0 && 80 >= ~a12~0); 13573#L345 assume !(9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 13572#L351 assume !(80 < ~a12~0 && 9 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0); 13570#L357 assume !((((6 == calculate_output_~input#1 && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0) && 1 == ~a24~0); 13567#L363 assume !(((1 == ~a24~0 && 1 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 13566#L369 assume !(((10 == ~a21~0 && (80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) || ((5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 13565#L376 assume !(((((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 13564#L382 assume !((((1 == calculate_output_~input#1 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0)) && 9 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 13561#L388 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0); 13560#L394 assume !((1 == ~a24~0 && 9 == ~a15~0 && 5 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 13559#L400 assume !(((8 == ~a15~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 13557#L406 assume !(9 == ~a15~0 && ((3 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 13556#L412 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 13555#L418 assume !(9 == ~a15~0 && 1 == ~a24~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 13554#L424 assume !((11 < ~a12~0 && 80 >= ~a12~0) && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 9 == ~a15~0); 13553#L430 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && 80 < ~a12~0) && 9 == ~a21~0); 13552#L436 assume !((1 == ~a24~0 && (2 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && ~a12~0 <= -43) && 8 == ~a15~0); 13551#L442 assume !(1 == ~a24~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0))) && 9 == ~a15~0); 13550#L448 assume !((((6 == calculate_output_~input#1 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0) && ~a12~0 <= -43); 13549#L454 assume !(((~a12~0 <= -43 && 6 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && 1 == ~a24~0) && 8 == ~a15~0); 13548#L459 assume !((((7 == ~a21~0 && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0) && 8 == ~a15~0); 13547#L464 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 4 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 13546#L470 assume !(((((80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) && 10 == ~a21~0) || (((~a12~0 <= -43 && 2 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1); 13545#L477 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && (9 == ~a21~0 || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 9 == ~a15~0) && 1 == ~a24~0); 13544#L482 assume !((8 == ~a15~0 && 80 < ~a12~0 && (8 == ~a21~0 || 9 == ~a21~0) && 6 == calculate_output_~input#1) && 1 == ~a24~0); 13543#L488 assume !((((((~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) || (7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) && 3 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 13542#L494 assume !(1 == ~a24~0 && 1 == calculate_output_~input#1 && ((10 == ~a21~0 && 8 == ~a15~0 && 80 < ~a12~0) || ((~a12~0 <= -43 && 9 == ~a15~0) && 6 == ~a21~0))); 13541#L500 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 1 == calculate_output_~input#1) && 8 == ~a15~0); 13540#L505 assume !((1 == ~a24~0 && ~a12~0 <= -43 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 9 == ~a15~0); 13539#L510 assume !((1 == ~a24~0 && 4 == calculate_output_~input#1 && (((9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || (10 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0)) || (6 == ~a21~0 && 80 < ~a12~0))) && 9 == ~a15~0); 11841#L516 assume !(8 == ~a15~0 && (7 == ~a21~0 && 2 == calculate_output_~input#1 && 1 == ~a24~0) && ~a12~0 <= -43); 11842#L522 assume !(8 == ~a15~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0))) && 1 == ~a24~0); 11641#L528 assume !(9 == ~a15~0 && (~a12~0 <= -43 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 11642#L534 assume !(1 == ~a24~0 && 8 == ~a15~0 && ((10 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 11563#L540 assume !((8 == ~a15~0 && (1 == ~a24~0 && 4 == calculate_output_~input#1) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0); 11564#L546 assume !(((6 == calculate_output_~input#1 && ((((11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) || (80 < ~a12~0 && 6 == ~a21~0))) && 1 == ~a24~0) && 9 == ~a15~0); 11588#L551 assume !((8 == ~a15~0 && ((10 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 6 == calculate_output_~input#1) && 1 == ~a24~0); 11589#L557 assume !(((1 == ~a24~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 2 == calculate_output_~input#1) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 11833#L562 assume !((9 == ~a21~0 && (3 == calculate_output_~input#1 && 1 == ~a24~0) && 80 < ~a12~0) && 9 == ~a15~0); 11544#L565 assume !(((((7 == ~a21~0 || 8 == ~a21~0) && 1 == calculate_output_~input#1) && 9 == ~a15~0) && 80 < ~a12~0) && 1 == ~a24~0); 11545#L571 assume !((((9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0) && 10 == ~a21~0) || (6 == ~a21~0 && (2 == ~a24~0 && ~a12~0 <= -43) && 5 == ~a15~0)) && 6 == calculate_output_~input#1); 13516#L578 assume !(9 == ~a15~0 && 9 == ~a21~0 && 80 < ~a12~0 && 2 == calculate_output_~input#1 && 1 == ~a24~0); 13513#L583 assume !(((8 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 13510#L589 assume !(1 == ~a24~0 && 5 == calculate_output_~input#1 && (((8 == ~a15~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && ~a12~0 <= -43 && 9 == ~a15~0))); 13506#L595 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 6 == ~a21~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || (10 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0)) && 1 == calculate_output_~input#1) && 9 == ~a15~0); 13507#L601 assume !((1 == ~a24~0 && ~a12~0 <= -43 && ((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 1 == calculate_output_~input#1) && 8 == ~a15~0); 13498#L607 assume !(1 == ~a24~0 && (((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) && 6 == calculate_output_~input#1) && 9 == ~a15~0); 13499#L613 assume !(8 == ~a15~0 && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 2 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 13490#L619 assume !((((6 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 8 == ~a15~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 13491#L625 assume !(1 == ~a24~0 && (((7 == ~a21~0 || 8 == ~a21~0) && 6 == calculate_output_~input#1) && 8 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 13482#L631 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 9 == ~a15~0) && 1 == ~a24~0); 13483#L636 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && (1 == calculate_output_~input#1 && 8 == ~a15~0) && 1 == ~a24~0) && 9 == ~a21~0); 13474#L642 assume !(1 == ~a24~0 && 9 == ~a15~0 && 2 == calculate_output_~input#1 && ((80 < ~a12~0 && 6 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0))); 13475#L648 assume !(1 == ~a24~0 && 8 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 13466#L654 assume !(1 == ~a24~0 && 9 == ~a21~0 && (5 == calculate_output_~input#1 && 9 == ~a15~0) && 80 < ~a12~0); 13467#L660 assume !((~a12~0 <= -43 && (1 == calculate_output_~input#1 && 7 == ~a21~0) && 1 == ~a24~0) && 8 == ~a15~0); 13458#L666 assume !((9 == ~a21~0 && ((11 < ~a12~0 && 80 >= ~a12~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 13459#L672 assume !((8 == ~a15~0 && ((8 == ~a21~0 || 9 == ~a21~0) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 80 < ~a12~0); 13450#L678 assume !((80 < ~a12~0 && 1 == ~a24~0 && (8 == ~a21~0 || 9 == ~a21~0) && 4 == calculate_output_~input#1) && 8 == ~a15~0); 13451#L684 assume !(9 == ~a21~0 && 9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0 && 1 == calculate_output_~input#1); 13442#L687 assume !(8 == ~a15~0 && (3 == calculate_output_~input#1 && (((10 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || (6 == ~a21~0 && 80 < ~a12~0)) || (80 < ~a12~0 && 7 == ~a21~0))) && 1 == ~a24~0); 13443#L693 assume !(1 == ~a24~0 && 80 < ~a12~0 && 9 == ~a21~0 && 9 == ~a15~0 && 4 == calculate_output_~input#1); 13434#L698 assume !(8 == ~a15~0 && (6 == calculate_output_~input#1 && ((80 < ~a12~0 && 7 == ~a21~0) || (10 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || (80 < ~a12~0 && 6 == ~a21~0))) && 1 == ~a24~0); 13435#L704 assume !(9 == ~a15~0 && 1 == ~a24~0 && (-43 < ~a12~0 && 11 >= ~a12~0) && 1 == calculate_output_~input#1 && (9 == ~a21~0 || 10 == ~a21~0)); 13426#L710 assume !(((((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || (6 == ~a21~0 && 9 == ~a15~0 && ~a12~0 <= -43)) && 6 == calculate_output_~input#1) && 1 == ~a24~0); 13427#L716 assume !(((8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 1 == calculate_output_~input#1) && 1 == ~a24~0) && 80 < ~a12~0); 13418#L722 assume !((1 == ~a24~0 && ((7 == ~a21~0 && 80 < ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 80 < ~a12~0)) && 2 == calculate_output_~input#1) && 8 == ~a15~0); 13419#L728 assume !(1 == ~a24~0 && (-43 < ~a12~0 && 11 >= ~a12~0) && (((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 8 == ~a15~0); 13410#L734 assume !((8 == ~a15~0 && (7 == ~a21~0 && 4 == calculate_output_~input#1) && 1 == ~a24~0) && ~a12~0 <= -43); 13411#L740 assume !(9 == ~a21~0 && (1 == ~a24~0 && 2 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0); 13632#L745 assume !(8 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0 && 4 == calculate_output_~input#1) && 1 == ~a24~0); 13521#L751 assume !((~a12~0 <= -43 && ((10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0) && 4 == calculate_output_~input#1) && 8 == ~a15~0) && 1 == ~a24~0); 13522#L757 assume !(1 == ~a24~0 && 8 == ~a15~0 && 4 == calculate_output_~input#1 && ((80 < ~a12~0 && 7 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0) || (80 < ~a12~0 && 6 == ~a21~0))); 13631#L762 assume !((11 < ~a12~0 && 80 >= ~a12~0) && 8 == ~a15~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 13630#L768 assume !(((((8 == ~a15~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && ~a12~0 <= -43 && 9 == ~a15~0)) && 4 == calculate_output_~input#1) && 1 == ~a24~0); 13629#L774 assume !(((((80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) && 10 == ~a21~0) || (((~a12~0 <= -43 && 2 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0)) && 1 == calculate_output_~input#1); 13628#L781 assume !((8 == ~a15~0 && ((((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0) || (80 < ~a12~0 && 6 == ~a21~0)) || (80 < ~a12~0 && 7 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0); 13405#L787 assume !(9 == ~a21~0 && ((6 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 13406#L793 assume !(1 == ~a24~0 && 9 == ~a21~0 && (-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && 3 == calculate_output_~input#1); 13401#L799 assume !(9 == ~a15~0 && (3 == calculate_output_~input#1 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || (10 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0))) && 1 == ~a24~0); 13402#L805 assume !(~a12~0 <= -43 && 7 == ~a21~0 && 1 == ~a24~0 && 8 == ~a15~0 && 6 == calculate_output_~input#1); 13397#L811 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && ((3 == calculate_output_~input#1 && 1 == ~a24~0) && 8 == ~a21~0) && 9 == ~a15~0); 13398#L817 assume !((((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (((2 == ~a24~0 && ~a12~0 <= -43) && 5 == ~a15~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1); 13627#L824 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && (7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && 8 == ~a15~0); 13626#L829 assume !(((((10 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 1 == calculate_output_~input#1) && 8 == ~a15~0) && 1 == ~a24~0); 11987#L835 assume !(1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && (((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 6 == calculate_output_~input#1) && 9 == ~a15~0); 11988#L841 assume !(1 == ~a24~0 && (((7 == ~a21~0 && 80 < ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0) || (80 < ~a12~0 && 6 == ~a21~0)) && 1 == calculate_output_~input#1) && 8 == ~a15~0); 11910#L847 assume !((8 == ~a15~0 && ((10 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0); 11513#L852 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && (6 == calculate_output_~input#1 && (9 == ~a21~0 || 10 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0); 11514#L858 assume !(8 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (8 == ~a21~0 || 9 == ~a21~0) && 5 == calculate_output_~input#1); 11809#L864 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && 80 < ~a12~0); 11673#L869 assume !((((5 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0) && 1 == ~a24~0) && 9 == ~a15~0); 11505#L875 assume !(9 == ~a15~0 && ((4 == calculate_output_~input#1 && 1 == ~a24~0) && 8 == ~a21~0) && -43 < ~a12~0 && 11 >= ~a12~0);calculate_output_#res#1 := -2; 11506#calculate_output_returnLabel#1 main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 11538#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 11819#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 11820#L31 [2023-11-26 12:06:13,904 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:13,904 INFO L85 PathProgramCache]: Analyzing trace with hash 925800, now seen corresponding path program 1 times [2023-11-26 12:06:13,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:13,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1562788179] [2023-11-26 12:06:13,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:13,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:13,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:13,918 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:13,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:13,937 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:13,938 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:13,938 INFO L85 PathProgramCache]: Analyzing trace with hash 720074070, now seen corresponding path program 1 times [2023-11-26 12:06:13,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:13,939 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1963535341] [2023-11-26 12:06:13,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:13,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:13,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:13,996 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:14,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:14,038 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:14,039 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:14,039 INFO L85 PathProgramCache]: Analyzing trace with hash -466018819, now seen corresponding path program 1 times [2023-11-26 12:06:14,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:14,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1918789719] [2023-11-26 12:06:14,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:14,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:14,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:15,881 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:06:15,881 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:06:15,881 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1918789719] [2023-11-26 12:06:15,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1918789719] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:06:15,882 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:06:15,882 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-26 12:06:15,882 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375017348] [2023-11-26 12:06:15,882 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:06:22,665 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:06:22,665 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-26 12:06:22,665 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2023-11-26 12:06:22,666 INFO L87 Difference]: Start difference. First operand 3038 states and 3546 transitions. cyclomatic complexity: 521 Second operand has 9 states, 9 states have (on average 20.22222222222222) internal successors, (182), 8 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:24,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:06:24,177 INFO L93 Difference]: Finished difference Result 3690 states and 4201 transitions. [2023-11-26 12:06:24,177 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3690 states and 4201 transitions. [2023-11-26 12:06:24,209 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 1424 [2023-11-26 12:06:24,233 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3690 states to 3407 states and 3918 transitions. [2023-11-26 12:06:24,233 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1428 [2023-11-26 12:06:24,235 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1428 [2023-11-26 12:06:24,235 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3407 states and 3918 transitions. [2023-11-26 12:06:24,236 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:06:24,236 INFO L218 hiAutomatonCegarLoop]: Abstraction has 3407 states and 3918 transitions. [2023-11-26 12:06:24,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3407 states and 3918 transitions. [2023-11-26 12:06:24,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3407 to 3407. [2023-11-26 12:06:24,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3407 states, 3407 states have (on average 1.149985324332257) internal successors, (3918), 3406 states have internal predecessors, (3918), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:24,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3407 states to 3407 states and 3918 transitions. [2023-11-26 12:06:24,311 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3407 states and 3918 transitions. [2023-11-26 12:06:24,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2023-11-26 12:06:24,314 INFO L428 stractBuchiCegarLoop]: Abstraction has 3407 states and 3918 transitions. [2023-11-26 12:06:24,314 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 12:06:24,314 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3407 states and 3918 transitions. [2023-11-26 12:06:24,332 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 1424 [2023-11-26 12:06:24,333 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:06:24,333 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:06:24,336 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:24,336 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:24,337 INFO L748 eck$LassoCheckResult]: Stem: 18333#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(20, 2);call #Ultimate.allocInit(12, 3);~inputD~0 := 4;~inputB~0 := 2;~inputC~0 := 3;~inputF~0 := 6;~inputE~0 := 5;~inputA~0 := 1;~a21~0 := 7;~a15~0 := 8;~a12~0 := -49;~a24~0 := 1; 18334#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet6#1, main_#t~ret7#1, main_~input~0#1, main_~output~0#1;main_~output~0#1 := -1; 18374#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 20088#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 20933#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 20932#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 20931#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 20930#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 20929#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 20928#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 20927#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 20926#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 20925#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 20924#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 20923#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 20922#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 20921#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 20920#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 20919#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 20918#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 20917#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 20916#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 20915#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 20914#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 20913#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 20912#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 20911#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 20910#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 20909#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 20908#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 20907#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 20906#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 20905#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 20904#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 20903#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 20902#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 20901#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 20900#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 20899#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 20898#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 20897#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 20896#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 20895#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 20894#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 20893#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 20892#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 20891#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 20890#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 20889#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 20888#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 20887#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 20886#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 20885#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 20884#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 20883#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 20882#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 20881#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 20880#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 20878#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 20876#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 20874#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 20872#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 20870#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 20868#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 20866#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 20864#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 20862#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 20860#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 20858#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 20855#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 20852#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 20849#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 20846#L257 assume !((((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0); 20843#L262 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 20840#L268 assume !(9 == ~a15~0 && (1 == calculate_output_~input#1 && (((~a12~0 <= -43 && 10 == ~a21~0) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0))) && 1 == ~a24~0); 20837#L274 assume !((1 == ~a24~0 && (6 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 80 < ~a12~0) && 9 == ~a15~0); 20834#L279 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a15~0 && 1 == ~a24~0 && (9 == ~a21~0 || 10 == ~a21~0) && 2 == calculate_output_~input#1); 20831#L285 assume !((((5 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0) && 1 == ~a24~0); 20828#L290 assume !((80 < ~a12~0 && 8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 20825#L296 assume !(4 == calculate_output_~input#1 && (((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43))); 20664#L303 assume ((1 == ~a24~0 && 3 == calculate_output_~input#1 && ~a12~0 <= -43) && 7 == ~a21~0) && 8 == ~a15~0;~a15~0 := 5;~a21~0 := 6;calculate_output_#res#1 := -1; 20413#calculate_output_returnLabel#1 main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 18283#L890-2 [2023-11-26 12:06:24,337 INFO L750 eck$LassoCheckResult]: Loop: 18283#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 18284#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 18512#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 18407#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 18408#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 18458#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 18459#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 18351#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 18352#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 18595#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 18577#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 18519#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 18237#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 18238#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 18597#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 18562#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 18319#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 18320#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 18601#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 18603#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 18241#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 18242#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 18427#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 18355#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 18356#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 18521#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 18510#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 18379#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 18380#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 18599#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 18492#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 18469#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 18437#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 18438#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 18370#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 18371#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 18555#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 18504#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 18421#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 18229#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 18230#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 18494#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 18495#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 18343#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 18344#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 18279#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 18280#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 18288#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 18289#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 18435#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 18417#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 18418#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 18589#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 18480#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 18481#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 18575#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 18569#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 18570#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 18488#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 18489#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 18580#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 18430#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 18411#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 18412#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 18548#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 18549#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 18484#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 18323#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 18324#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 18327#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 18615#L257 assume !((((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0); 18616#L262 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 18303#L268 assume !(9 == ~a15~0 && (1 == calculate_output_~input#1 && (((~a12~0 <= -43 && 10 == ~a21~0) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0))) && 1 == ~a24~0); 18304#L274 assume !((1 == ~a24~0 && (6 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 80 < ~a12~0) && 9 == ~a15~0); 18441#L279 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a15~0 && 1 == ~a24~0 && (9 == ~a21~0 || 10 == ~a21~0) && 2 == calculate_output_~input#1); 18442#L285 assume !((((5 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0) && 1 == ~a24~0); 18617#L290 assume !((80 < ~a12~0 && 8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 18423#L296 assume !(4 == calculate_output_~input#1 && (((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43))); 18424#L303 assume !(((1 == ~a24~0 && 3 == calculate_output_~input#1 && ~a12~0 <= -43) && 7 == ~a21~0) && 8 == ~a15~0); 18612#L309 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 18387#L315 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 80 < ~a12~0); 18388#L321 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 8 == ~a15~0) && 1 == ~a24~0); 18296#L327 assume !(((9 == ~a15~0 && 1 == calculate_output_~input#1 && 8 == ~a21~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 18297#L333 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 8 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 18618#L339 assume !(1 == ~a24~0 && (8 == ~a15~0 && 1 == calculate_output_~input#1 && 9 == ~a21~0) && 11 < ~a12~0 && 80 >= ~a12~0); 18619#L345 assume !(9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 18501#L351 assume !(80 < ~a12~0 && 9 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0); 18502#L357 assume !((((6 == calculate_output_~input#1 && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0) && 1 == ~a24~0); 18621#L363 assume !(((1 == ~a24~0 && 1 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 18622#L369 assume !(((10 == ~a21~0 && (80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) || ((5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 18233#L376 assume !(((((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 18234#L382 assume !((((1 == calculate_output_~input#1 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0)) && 9 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 20432#L388 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0); 20433#L394 assume !((1 == ~a24~0 && 9 == ~a15~0 && 5 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 20390#L400 assume !(((8 == ~a15~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 20377#L406 assume !(9 == ~a15~0 && ((3 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 20376#L412 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 20375#L418 assume !(9 == ~a15~0 && 1 == ~a24~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 20374#L424 assume !((11 < ~a12~0 && 80 >= ~a12~0) && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 9 == ~a15~0); 20373#L430 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && 80 < ~a12~0) && 9 == ~a21~0); 20370#L436 assume !((1 == ~a24~0 && (2 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && ~a12~0 <= -43) && 8 == ~a15~0); 20369#L442 assume !(1 == ~a24~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0))) && 9 == ~a15~0); 20368#L448 assume !((((6 == calculate_output_~input#1 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0) && ~a12~0 <= -43); 20367#L454 assume !(((~a12~0 <= -43 && 6 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && 1 == ~a24~0) && 8 == ~a15~0); 18762#L459 assume (((7 == ~a21~0 && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0) && 8 == ~a15~0;~a21~0 := 10;calculate_output_#res#1 := 22; 18256#calculate_output_returnLabel#1 main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 18283#L890-2 [2023-11-26 12:06:24,338 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:24,338 INFO L85 PathProgramCache]: Analyzing trace with hash -338027953, now seen corresponding path program 1 times [2023-11-26 12:06:24,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:24,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [779807938] [2023-11-26 12:06:24,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:24,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:24,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:24,366 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:24,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:24,392 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:24,393 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:24,393 INFO L85 PathProgramCache]: Analyzing trace with hash 1353250252, now seen corresponding path program 2 times [2023-11-26 12:06:24,393 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:24,395 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24824327] [2023-11-26 12:06:24,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:24,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:24,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:24,422 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:24,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:24,455 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:24,456 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:24,456 INFO L85 PathProgramCache]: Analyzing trace with hash -461054310, now seen corresponding path program 1 times [2023-11-26 12:06:24,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:24,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1113953563] [2023-11-26 12:06:24,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:24,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:24,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:24,839 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 80 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:06:24,840 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:06:24,840 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1113953563] [2023-11-26 12:06:24,840 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1113953563] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:06:24,840 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:06:24,840 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 12:06:24,841 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201904363] [2023-11-26 12:06:24,841 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:06:25,574 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:06:25,574 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:06:25,574 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:06:25,574 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:06:25,574 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 12:06:25,574 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:25,575 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:06:25,575 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:06:25,575 INFO L133 ssoRankerPreferences]: Filename of dumped script: Problem14_label45.c_Iteration5_Loop [2023-11-26 12:06:25,575 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:06:25,575 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:06:25,576 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,580 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,584 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,590 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,593 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,596 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,600 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,603 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,606 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,609 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,611 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,685 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:06:25,685 INFO L404 LassoAnalysis]: Checking for nontermination... [2023-11-26 12:06:25,685 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:25,685 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:25,686 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:25,690 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:25,690 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:25,704 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2023-11-26 12:06:25,713 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:25,713 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~output~0#1=22} Honda state: {ULTIMATE.start_main_~output~0#1=22} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:25,722 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:25,722 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:25,723 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:25,724 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:25,734 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:25,734 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:25,747 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2023-11-26 12:06:25,761 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:25,761 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~a12~0=-43} Honda state: {~a12~0=-43} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:25,770 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:25,770 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:25,770 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:25,771 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:25,776 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:25,776 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:25,790 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2023-11-26 12:06:25,820 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:25,820 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:25,820 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:25,822 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:25,825 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2023-11-26 12:06:25,826 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:25,832 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2023-11-26 12:06:25,860 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2023-11-26 12:06:25,864 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:25,864 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:06:25,864 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:06:25,864 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:06:25,864 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:06:25,864 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 12:06:25,865 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:25,865 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:06:25,865 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:06:25,865 INFO L133 ssoRankerPreferences]: Filename of dumped script: Problem14_label45.c_Iteration5_Loop [2023-11-26 12:06:25,865 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:06:25,865 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:06:25,866 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,870 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,872 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,875 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,882 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,884 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,887 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,890 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,894 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,898 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,900 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:25,977 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:06:25,978 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 12:06:25,978 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:25,978 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:25,979 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:25,984 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:25,997 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2023-11-26 12:06:25,997 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:25,998 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:25,998 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:25,998 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:25,998 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:26,000 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:26,000 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:26,016 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:26,020 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:26,020 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:26,020 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:26,021 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:26,028 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:26,028 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2023-11-26 12:06:26,041 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:26,041 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:26,041 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:26,041 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:26,041 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:26,042 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:26,042 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:26,068 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:26,072 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:26,072 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:26,073 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:26,074 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:26,077 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:26,090 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2023-11-26 12:06:26,090 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:26,090 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:26,091 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:26,091 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:26,091 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:26,091 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:26,091 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:26,108 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:06:26,112 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:26,112 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:26,112 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:26,113 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:26,119 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:06:26,131 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Waiting until timeout for monitored process [2023-11-26 12:06:26,132 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:06:26,132 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:06:26,132 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:06:26,132 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:06:26,132 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:06:26,133 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:06:26,133 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:06:26,152 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 12:06:26,155 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2023-11-26 12:06:26,155 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2023-11-26 12:06:26,155 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:26,156 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:26,157 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:26,161 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 12:06:26,161 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2023-11-26 12:06:26,161 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 12:06:26,161 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(~a21~0) = -2*~a21~0 + 17 Supporting invariants [] [2023-11-26 12:06:26,164 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Waiting until timeout for monitored process [2023-11-26 12:06:26,165 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:26,166 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2023-11-26 12:06:26,179 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:26,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:26,217 INFO L262 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 12:06:26,225 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:06:26,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:26,390 INFO L262 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 12:06:26,393 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:06:26,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:06:26,590 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 12:06:26,591 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 3407 states and 3918 transitions. cyclomatic complexity: 524 Second operand has 4 states, 4 states have (on average 47.0) internal successors, (188), 4 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:26,719 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:27,276 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 3407 states and 3918 transitions. cyclomatic complexity: 524. Second operand has 4 states, 4 states have (on average 47.0) internal successors, (188), 4 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 6989 states and 7739 transitions. Complement of second has 5 states. [2023-11-26 12:06:27,279 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2023-11-26 12:06:27,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 47.0) internal successors, (188), 4 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:27,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 359 transitions. [2023-11-26 12:06:27,283 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 359 transitions. Stem has 82 letters. Loop has 106 letters. [2023-11-26 12:06:27,284 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:27,284 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 359 transitions. Stem has 188 letters. Loop has 106 letters. [2023-11-26 12:06:27,285 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:27,285 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 359 transitions. Stem has 82 letters. Loop has 212 letters. [2023-11-26 12:06:27,287 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:06:27,287 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 6989 states and 7739 transitions. [2023-11-26 12:06:27,342 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 1958 [2023-11-26 12:06:27,390 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 6989 states to 5206 states and 5914 transitions. [2023-11-26 12:06:27,390 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1964 [2023-11-26 12:06:27,393 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1969 [2023-11-26 12:06:27,393 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5206 states and 5914 transitions. [2023-11-26 12:06:27,394 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:06:27,395 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5206 states and 5914 transitions. [2023-11-26 12:06:27,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5206 states and 5914 transitions. [2023-11-26 12:06:27,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5206 to 3410. [2023-11-26 12:06:27,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3410 states, 3410 states have (on average 1.150733137829912) internal successors, (3924), 3409 states have internal predecessors, (3924), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:27,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3410 states to 3410 states and 3924 transitions. [2023-11-26 12:06:27,479 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3410 states and 3924 transitions. [2023-11-26 12:06:27,479 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:06:27,480 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 12:06:27,480 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2023-11-26 12:06:27,480 INFO L87 Difference]: Start difference. First operand 3410 states and 3924 transitions. Second operand has 4 states, 4 states have (on average 47.0) internal successors, (188), 3 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:28,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:06:28,400 INFO L93 Difference]: Finished difference Result 4138 states and 4676 transitions. [2023-11-26 12:06:28,400 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4138 states and 4676 transitions. [2023-11-26 12:06:28,419 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 1780 [2023-11-26 12:06:28,442 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4138 states to 3778 states and 4114 transitions. [2023-11-26 12:06:28,443 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1784 [2023-11-26 12:06:28,444 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1784 [2023-11-26 12:06:28,444 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3778 states and 4114 transitions. [2023-11-26 12:06:28,445 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:06:28,445 INFO L218 hiAutomatonCegarLoop]: Abstraction has 3778 states and 4114 transitions. [2023-11-26 12:06:28,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3778 states and 4114 transitions. [2023-11-26 12:06:28,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3778 to 3778. [2023-11-26 12:06:28,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3778 states, 3778 states have (on average 1.088935944944415) internal successors, (4114), 3777 states have internal predecessors, (4114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:28,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3778 states to 3778 states and 4114 transitions. [2023-11-26 12:06:28,516 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3778 states and 4114 transitions. [2023-11-26 12:06:28,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 12:06:28,520 INFO L428 stractBuchiCegarLoop]: Abstraction has 3778 states and 4114 transitions. [2023-11-26 12:06:28,520 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 12:06:28,520 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3778 states and 4114 transitions. [2023-11-26 12:06:28,533 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 1780 [2023-11-26 12:06:28,533 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:06:28,533 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:06:28,536 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:28,536 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:28,537 INFO L748 eck$LassoCheckResult]: Stem: 36866#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(20, 2);call #Ultimate.allocInit(12, 3);~inputD~0 := 4;~inputB~0 := 2;~inputC~0 := 3;~inputF~0 := 6;~inputE~0 := 5;~inputA~0 := 1;~a21~0 := 7;~a15~0 := 8;~a12~0 := -49;~a24~0 := 1; 36867#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet6#1, main_#t~ret7#1, main_~input~0#1, main_~output~0#1;main_~output~0#1 := -1; 36815#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 36816#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 37052#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 39510#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 39509#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 39508#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 39506#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 39504#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 39502#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 39500#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 39498#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 39496#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 39494#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 39492#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 39491#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 39490#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 39489#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 39488#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 39486#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 39484#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 39482#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 39480#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 39478#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 39476#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 39474#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 39472#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 39470#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 39469#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 39468#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 39467#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 39466#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 39465#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 39464#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 39462#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 39461#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 39460#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 39458#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 39456#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 39454#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 39452#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 39450#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 39448#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 39446#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 39444#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 39443#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 39442#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 39440#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 39438#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 39436#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 39434#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 39432#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 39430#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 39429#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 39428#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 39426#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 39424#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 39394#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 39393#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 39392#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 39391#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 39390#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 39389#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 39387#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 39385#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 39383#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 39381#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 39379#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 39318#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 39315#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 39310#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 39305#L257 assume !((((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0); 39300#L262 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 39295#L268 assume !(9 == ~a15~0 && (1 == calculate_output_~input#1 && (((~a12~0 <= -43 && 10 == ~a21~0) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0))) && 1 == ~a24~0); 39290#L274 assume !((1 == ~a24~0 && (6 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 80 < ~a12~0) && 9 == ~a15~0); 39286#L279 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a15~0 && 1 == ~a24~0 && (9 == ~a21~0 || 10 == ~a21~0) && 2 == calculate_output_~input#1); 39284#L285 assume !((((5 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0) && 1 == ~a24~0); 39281#L290 assume !((80 < ~a12~0 && 8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 39278#L296 assume !(4 == calculate_output_~input#1 && (((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43))); 39275#L303 assume !(((1 == ~a24~0 && 3 == calculate_output_~input#1 && ~a12~0 <= -43) && 7 == ~a21~0) && 8 == ~a15~0); 39271#L309 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 39266#L315 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 80 < ~a12~0); 38862#L321 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 8 == ~a15~0) && 1 == ~a24~0); 38858#L327 assume !(((9 == ~a15~0 && 1 == calculate_output_~input#1 && 8 == ~a21~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 38854#L333 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 8 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 38849#L339 assume !(1 == ~a24~0 && (8 == ~a15~0 && 1 == calculate_output_~input#1 && 9 == ~a21~0) && 11 < ~a12~0 && 80 >= ~a12~0); 38844#L345 assume !(9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 38839#L351 assume !(80 < ~a12~0 && 9 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0); 38834#L357 assume !((((6 == calculate_output_~input#1 && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0) && 1 == ~a24~0); 38829#L363 assume !(((1 == ~a24~0 && 1 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 38824#L369 assume !(((10 == ~a21~0 && (80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) || ((5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 36767#L376 assume !(((((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 36768#L382 assume !((((1 == calculate_output_~input#1 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0)) && 9 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 37137#L388 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0); 38802#L394 assume !((1 == ~a24~0 && 9 == ~a15~0 && 5 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 38796#L400 assume !(((8 == ~a15~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 38790#L406 assume !(9 == ~a15~0 && ((3 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 38784#L412 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 38778#L418 assume !(9 == ~a15~0 && 1 == ~a24~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 37122#L424 assume !((11 < ~a12~0 && 80 >= ~a12~0) && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 9 == ~a15~0); 36809#L430 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && 80 < ~a12~0) && 9 == ~a21~0); 36810#L436 assume !((1 == ~a24~0 && (2 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && ~a12~0 <= -43) && 8 == ~a15~0); 36850#L442 assume !(1 == ~a24~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0))) && 9 == ~a15~0); 36851#L448 assume !((((6 == calculate_output_~input#1 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0) && ~a12~0 <= -43); 36747#L454 assume !(((~a12~0 <= -43 && 6 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && 1 == ~a24~0) && 8 == ~a15~0); 36748#L459 assume (((7 == ~a21~0 && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0) && 8 == ~a15~0;~a21~0 := 10;calculate_output_#res#1 := 22; 38743#calculate_output_returnLabel#1 main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 38737#L890-2 [2023-11-26 12:06:28,537 INFO L750 eck$LassoCheckResult]: Loop: 38737#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 38731#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 38724#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 38717#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 38710#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 38703#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 38696#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 38689#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 38682#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 38675#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 38668#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 38661#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 38654#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 38647#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 38637#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 38632#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 38625#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 38622#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 38619#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 38615#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 38611#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 38607#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 38603#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 38599#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 38595#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 38591#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 38587#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 38583#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 38579#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 38575#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 38571#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 38567#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 38563#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 38559#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 38555#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 38551#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 38547#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 38543#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 38539#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 38535#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 38531#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 38527#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 38523#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 38519#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 38515#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 38511#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 38507#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 38503#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 38499#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 38495#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 38491#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 38487#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 38483#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 38478#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 38475#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 38471#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 38467#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 38463#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 38459#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 38455#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 38451#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 38447#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 38443#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 38439#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 38435#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 38431#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 38427#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 38423#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 38419#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 38415#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 38411#L257 assume !((((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0); 38407#L262 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 38403#L268 assume !(9 == ~a15~0 && (1 == calculate_output_~input#1 && (((~a12~0 <= -43 && 10 == ~a21~0) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0))) && 1 == ~a24~0); 38399#L274 assume !((1 == ~a24~0 && (6 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 80 < ~a12~0) && 9 == ~a15~0); 38395#L279 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a15~0 && 1 == ~a24~0 && (9 == ~a21~0 || 10 == ~a21~0) && 2 == calculate_output_~input#1); 38391#L285 assume !((((5 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0) && 1 == ~a24~0); 38387#L290 assume !((80 < ~a12~0 && 8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 38383#L296 assume !(4 == calculate_output_~input#1 && (((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43))); 38379#L303 assume !(((1 == ~a24~0 && 3 == calculate_output_~input#1 && ~a12~0 <= -43) && 7 == ~a21~0) && 8 == ~a15~0); 38375#L309 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 38371#L315 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 80 < ~a12~0); 38367#L321 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 8 == ~a15~0) && 1 == ~a24~0); 38363#L327 assume !(((9 == ~a15~0 && 1 == calculate_output_~input#1 && 8 == ~a21~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 38359#L333 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 8 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 38355#L339 assume !(1 == ~a24~0 && (8 == ~a15~0 && 1 == calculate_output_~input#1 && 9 == ~a21~0) && 11 < ~a12~0 && 80 >= ~a12~0); 38351#L345 assume !(9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 38347#L351 assume !(80 < ~a12~0 && 9 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0); 38343#L357 assume !((((6 == calculate_output_~input#1 && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0) && 1 == ~a24~0); 38339#L363 assume !(((1 == ~a24~0 && 1 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 38335#L369 assume !(((10 == ~a21~0 && (80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) || ((5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 38331#L376 assume !(((((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 38326#L382 assume !((((1 == calculate_output_~input#1 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0)) && 9 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 38322#L388 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0); 38318#L394 assume !((1 == ~a24~0 && 9 == ~a15~0 && 5 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 38314#L400 assume !(((8 == ~a15~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 38309#L406 assume !(9 == ~a15~0 && ((3 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 38305#L412 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 38301#L418 assume !(9 == ~a15~0 && 1 == ~a24~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 38297#L424 assume !((11 < ~a12~0 && 80 >= ~a12~0) && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 9 == ~a15~0); 38293#L430 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && 80 < ~a12~0) && 9 == ~a21~0); 38289#L436 assume !((1 == ~a24~0 && (2 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && ~a12~0 <= -43) && 8 == ~a15~0); 38285#L442 assume !(1 == ~a24~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0))) && 9 == ~a15~0); 38281#L448 assume !((((6 == calculate_output_~input#1 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0) && ~a12~0 <= -43); 38277#L454 assume !(((~a12~0 <= -43 && 6 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && 1 == ~a24~0) && 8 == ~a15~0); 36753#L459 assume !((((7 == ~a21~0 && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0) && 8 == ~a15~0); 36754#L464 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 4 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 37113#L470 assume !(((((80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) && 10 == ~a21~0) || (((~a12~0 <= -43 && 2 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1); 36862#L477 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && (9 == ~a21~0 || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 9 == ~a15~0) && 1 == ~a24~0); 36863#L482 assume !((8 == ~a15~0 && 80 < ~a12~0 && (8 == ~a21~0 || 9 == ~a21~0) && 6 == calculate_output_~input#1) && 1 == ~a24~0); 37000#L488 assume !((((((~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) || (7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) && 3 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 37024#L494 assume !(1 == ~a24~0 && 1 == calculate_output_~input#1 && ((10 == ~a21~0 && 8 == ~a15~0 && 80 < ~a12~0) || ((~a12~0 <= -43 && 9 == ~a15~0) && 6 == ~a21~0))); 37050#L500 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 1 == calculate_output_~input#1) && 8 == ~a15~0); 36880#L505 assume !((1 == ~a24~0 && ~a12~0 <= -43 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 9 == ~a15~0); 36881#L510 assume !((1 == ~a24~0 && 4 == calculate_output_~input#1 && (((9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || (10 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0)) || (6 == ~a21~0 && 80 < ~a12~0))) && 9 == ~a15~0); 37067#L516 assume !(8 == ~a15~0 && (7 == ~a21~0 && 2 == calculate_output_~input#1 && 1 == ~a24~0) && ~a12~0 <= -43); 37069#L522 assume !(8 == ~a15~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0))) && 1 == ~a24~0); 37106#L528 assume !(9 == ~a15~0 && (~a12~0 <= -43 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 39230#L534 assume !(1 == ~a24~0 && 8 == ~a15~0 && ((10 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 36844#L540 assume !((8 == ~a15~0 && (1 == ~a24~0 && 4 == calculate_output_~input#1) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0); 36845#L546 assume !(((6 == calculate_output_~input#1 && ((((11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) || (80 < ~a12~0 && 6 == ~a21~0))) && 1 == ~a24~0) && 9 == ~a15~0); 36868#L551 assume !((8 == ~a15~0 && ((10 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 6 == calculate_output_~input#1) && 1 == ~a24~0); 36869#L557 assume !(((1 == ~a24~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 2 == calculate_output_~input#1) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 37061#L562 assume !((9 == ~a21~0 && (3 == calculate_output_~input#1 && 1 == ~a24~0) && 80 < ~a12~0) && 9 == ~a15~0); 36826#L565 assume !(((((7 == ~a21~0 || 8 == ~a21~0) && 1 == calculate_output_~input#1) && 9 == ~a15~0) && 80 < ~a12~0) && 1 == ~a24~0); 36827#L571 assume !((((9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0) && 10 == ~a21~0) || (6 == ~a21~0 && (2 == ~a24~0 && ~a12~0 <= -43) && 5 == ~a15~0)) && 6 == calculate_output_~input#1); 36927#L578 assume !(9 == ~a15~0 && 9 == ~a21~0 && 80 < ~a12~0 && 2 == calculate_output_~input#1 && 1 == ~a24~0); 36928#L583 assume !(((8 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 36777#L589 assume !(1 == ~a24~0 && 5 == calculate_output_~input#1 && (((8 == ~a15~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && ~a12~0 <= -43 && 9 == ~a15~0))); 36779#L595 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 6 == ~a21~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || (10 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0)) && 1 == calculate_output_~input#1) && 9 == ~a15~0); 36986#L601 assume !((1 == ~a24~0 && ~a12~0 <= -43 && ((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 1 == calculate_output_~input#1) && 8 == ~a15~0); 36872#L607 assume !(1 == ~a24~0 && (((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) && 6 == calculate_output_~input#1) && 9 == ~a15~0); 36873#L613 assume !(8 == ~a15~0 && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 2 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 36897#L619 assume !((((6 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 8 == ~a15~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 37053#L625 assume !(1 == ~a24~0 && (((7 == ~a21~0 || 8 == ~a21~0) && 6 == calculate_output_~input#1) && 8 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 37030#L631 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 9 == ~a15~0) && 1 == ~a24~0); 37031#L636 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && (1 == calculate_output_~input#1 && 8 == ~a15~0) && 1 == ~a24~0) && 9 == ~a21~0); 36923#L642 assume !(1 == ~a24~0 && 9 == ~a15~0 && 2 == calculate_output_~input#1 && ((80 < ~a12~0 && 6 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0))); 36924#L648 assume !(1 == ~a24~0 && 8 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 37120#L654 assume !(1 == ~a24~0 && 9 == ~a21~0 && (5 == calculate_output_~input#1 && 9 == ~a15~0) && 80 < ~a12~0); 37084#L660 assume !((~a12~0 <= -43 && (1 == calculate_output_~input#1 && 7 == ~a21~0) && 1 == ~a24~0) && 8 == ~a15~0); 36791#L666 assume !((9 == ~a21~0 && ((11 < ~a12~0 && 80 >= ~a12~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 36792#L672 assume !((8 == ~a15~0 && ((8 == ~a21~0 || 9 == ~a21~0) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 80 < ~a12~0); 37109#L678 assume !((80 < ~a12~0 && 1 == ~a24~0 && (8 == ~a21~0 || 9 == ~a21~0) && 4 == calculate_output_~input#1) && 8 == ~a15~0); 36749#L684 assume !(9 == ~a21~0 && 9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0 && 1 == calculate_output_~input#1); 36750#L687 assume !(8 == ~a15~0 && (3 == calculate_output_~input#1 && (((10 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || (6 == ~a21~0 && 80 < ~a12~0)) || (80 < ~a12~0 && 7 == ~a21~0))) && 1 == ~a24~0); 36964#L693 assume !(1 == ~a24~0 && 80 < ~a12~0 && 9 == ~a21~0 && 9 == ~a15~0 && 4 == calculate_output_~input#1); 37088#L698 assume !(8 == ~a15~0 && (6 == calculate_output_~input#1 && ((80 < ~a12~0 && 7 == ~a21~0) || (10 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || (80 < ~a12~0 && 6 == ~a21~0))) && 1 == ~a24~0); 36976#L704 assume !(9 == ~a15~0 && 1 == ~a24~0 && (-43 < ~a12~0 && 11 >= ~a12~0) && 1 == calculate_output_~input#1 && (9 == ~a21~0 || 10 == ~a21~0)); 36977#L710 assume !(((((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || (6 == ~a21~0 && 9 == ~a15~0 && ~a12~0 <= -43)) && 6 == calculate_output_~input#1) && 1 == ~a24~0); 36931#L716 assume !(((8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 1 == calculate_output_~input#1) && 1 == ~a24~0) && 80 < ~a12~0); 36932#L722 assume !((1 == ~a24~0 && ((7 == ~a21~0 && 80 < ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 80 < ~a12~0)) && 2 == calculate_output_~input#1) && 8 == ~a15~0); 37002#L728 assume !(1 == ~a24~0 && (-43 < ~a12~0 && 11 >= ~a12~0) && (((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 8 == ~a15~0); 37006#L734 assume !((8 == ~a15~0 && (7 == ~a21~0 && 4 == calculate_output_~input#1) && 1 == ~a24~0) && ~a12~0 <= -43); 36935#L740 assume !(9 == ~a21~0 && (1 == ~a24~0 && 2 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0); 36936#L745 assume !(8 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0 && 4 == calculate_output_~input#1) && 1 == ~a24~0); 37038#L751 assume !((~a12~0 <= -43 && ((10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0) && 4 == calculate_output_~input#1) && 8 == ~a15~0) && 1 == ~a24~0); 38859#L757 assume !(1 == ~a24~0 && 8 == ~a15~0 && 4 == calculate_output_~input#1 && ((80 < ~a12~0 && 7 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0) || (80 < ~a12~0 && 6 == ~a21~0))); 38855#L762 assume !((11 < ~a12~0 && 80 >= ~a12~0) && 8 == ~a15~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 38850#L768 assume !(((((8 == ~a15~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && ~a12~0 <= -43 && 9 == ~a15~0)) && 4 == calculate_output_~input#1) && 1 == ~a24~0); 38845#L774 assume !(((((80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) && 10 == ~a21~0) || (((~a12~0 <= -43 && 2 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0)) && 1 == calculate_output_~input#1); 38840#L781 assume !((8 == ~a15~0 && ((((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0) || (80 < ~a12~0 && 6 == ~a21~0)) || (80 < ~a12~0 && 7 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0); 38835#L787 assume !(9 == ~a21~0 && ((6 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 38830#L793 assume !(1 == ~a24~0 && 9 == ~a21~0 && (-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && 3 == calculate_output_~input#1); 38825#L799 assume !(9 == ~a15~0 && (3 == calculate_output_~input#1 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || (10 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0))) && 1 == ~a24~0); 38819#L805 assume !(~a12~0 <= -43 && 7 == ~a21~0 && 1 == ~a24~0 && 8 == ~a15~0 && 6 == calculate_output_~input#1); 38814#L811 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && ((3 == calculate_output_~input#1 && 1 == ~a24~0) && 8 == ~a21~0) && 9 == ~a15~0); 38808#L817 assume !((((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (((2 == ~a24~0 && ~a12~0 <= -43) && 5 == ~a15~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1); 38803#L824 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && (7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && 8 == ~a15~0); 38797#L829 assume !(((((10 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 1 == calculate_output_~input#1) && 8 == ~a15~0) && 1 == ~a24~0); 38791#L835 assume !(1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && (((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 6 == calculate_output_~input#1) && 9 == ~a15~0); 38785#L841 assume !(1 == ~a24~0 && (((7 == ~a21~0 && 80 < ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0) || (80 < ~a12~0 && 6 == ~a21~0)) && 1 == calculate_output_~input#1) && 8 == ~a15~0); 38779#L847 assume !((8 == ~a15~0 && ((10 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0); 38773#L852 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && (6 == calculate_output_~input#1 && (9 == ~a21~0 || 10 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0); 38757#L858 assume !(8 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (8 == ~a21~0 || 9 == ~a21~0) && 5 == calculate_output_~input#1); 38756#L864 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && 80 < ~a12~0); 38755#L869 assume !((((5 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0) && 1 == ~a24~0) && 9 == ~a15~0); 38753#L875 assume !(9 == ~a15~0 && ((4 == calculate_output_~input#1 && 1 == ~a24~0) && 8 == ~a21~0) && -43 < ~a12~0 && 11 >= ~a12~0);calculate_output_#res#1 := -2; 38745#calculate_output_returnLabel#1 main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 38737#L890-2 [2023-11-26 12:06:28,537 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:28,537 INFO L85 PathProgramCache]: Analyzing trace with hash 1910511374, now seen corresponding path program 2 times [2023-11-26 12:06:28,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:28,538 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111865063] [2023-11-26 12:06:28,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:28,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:28,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:28,564 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:28,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:28,594 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:28,594 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:28,595 INFO L85 PathProgramCache]: Analyzing trace with hash 1282913110, now seen corresponding path program 2 times [2023-11-26 12:06:28,595 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:28,595 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2041554181] [2023-11-26 12:06:28,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:28,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:28,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:28,643 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:28,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:28,685 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:28,688 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:28,688 INFO L85 PathProgramCache]: Analyzing trace with hash -311771869, now seen corresponding path program 1 times [2023-11-26 12:06:28,689 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:28,689 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [375039092] [2023-11-26 12:06:28,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:28,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:28,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:30,469 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 83 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:06:30,470 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:06:30,470 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [375039092] [2023-11-26 12:06:30,470 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [375039092] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:06:30,470 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1258985667] [2023-11-26 12:06:30,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:30,471 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:06:30,471 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:30,472 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:06:30,492 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2023-11-26 12:06:30,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:30,627 INFO L262 TraceCheckSpWp]: Trace formula consists of 351 conjuncts, 18 conjunts are in the unsatisfiable core [2023-11-26 12:06:30,635 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:06:34,756 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 106 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:06:34,756 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:06:34,756 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1258985667] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:06:34,756 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2023-11-26 12:06:34,757 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [9] total 12 [2023-11-26 12:06:34,757 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1739499336] [2023-11-26 12:06:34,757 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:06:37,434 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:06:37,434 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2023-11-26 12:06:37,434 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=96, Unknown=0, NotChecked=0, Total=156 [2023-11-26 12:06:37,435 INFO L87 Difference]: Start difference. First operand 3778 states and 4114 transitions. cyclomatic complexity: 349 Second operand has 10 states, 10 states have (on average 28.6) internal successors, (286), 9 states have internal predecessors, (286), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:38,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:06:38,684 INFO L93 Difference]: Finished difference Result 4566 states and 4884 transitions. [2023-11-26 12:06:38,685 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4566 states and 4884 transitions. [2023-11-26 12:06:38,702 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 2126 [2023-11-26 12:06:38,728 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4566 states to 3890 states and 4208 transitions. [2023-11-26 12:06:38,728 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2444 [2023-11-26 12:06:38,731 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2548 [2023-11-26 12:06:38,731 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3890 states and 4208 transitions. [2023-11-26 12:06:38,731 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:06:38,731 INFO L218 hiAutomatonCegarLoop]: Abstraction has 3890 states and 4208 transitions. [2023-11-26 12:06:38,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3890 states and 4208 transitions. [2023-11-26 12:06:38,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3890 to 3470. [2023-11-26 12:06:38,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3470 states, 3470 states have (on average 1.09164265129683) internal successors, (3788), 3469 states have internal predecessors, (3788), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:38,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3470 states to 3470 states and 3788 transitions. [2023-11-26 12:06:38,811 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3470 states and 3788 transitions. [2023-11-26 12:06:38,812 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2023-11-26 12:06:38,812 INFO L428 stractBuchiCegarLoop]: Abstraction has 3470 states and 3788 transitions. [2023-11-26 12:06:38,813 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 12:06:38,813 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3470 states and 3788 transitions. [2023-11-26 12:06:38,824 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 2126 [2023-11-26 12:06:38,824 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:06:38,824 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:06:38,827 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:38,827 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1] [2023-11-26 12:06:38,828 INFO L748 eck$LassoCheckResult]: Stem: 46077#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(20, 2);call #Ultimate.allocInit(12, 3);~inputD~0 := 4;~inputB~0 := 2;~inputC~0 := 3;~inputF~0 := 6;~inputE~0 := 5;~inputA~0 := 1;~a21~0 := 7;~a15~0 := 8;~a12~0 := -49;~a24~0 := 1; 46078#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet6#1, main_#t~ret7#1, main_~input~0#1, main_~output~0#1;main_~output~0#1 := -1; 46122#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 47433#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 49430#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 49429#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 49428#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 49427#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 49426#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 49425#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 49424#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 49423#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 49422#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 49421#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 49420#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 49419#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 49418#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 49417#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 49416#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 49415#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 49414#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 49413#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 49412#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 49411#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 49410#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 49409#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 49408#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 49407#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 49406#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 49405#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 49404#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 49403#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 49402#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 49401#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 49400#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 49399#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 49398#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 49397#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 49396#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 49395#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 49394#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 49393#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 49392#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 49391#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 49390#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 49389#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 49388#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 49387#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 49386#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 49385#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 49384#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 49383#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 49382#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 49381#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 49380#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 49379#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 49378#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 49377#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 49376#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 49375#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 49374#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 49373#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 49372#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 49371#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 49370#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 49369#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 49368#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 49367#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 49366#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 49365#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 49364#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 49363#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 49362#L257 assume !((((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0); 49361#L262 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 49360#L268 assume !(9 == ~a15~0 && (1 == calculate_output_~input#1 && (((~a12~0 <= -43 && 10 == ~a21~0) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0))) && 1 == ~a24~0); 49359#L274 assume !((1 == ~a24~0 && (6 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 80 < ~a12~0) && 9 == ~a15~0); 49358#L279 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a15~0 && 1 == ~a24~0 && (9 == ~a21~0 || 10 == ~a21~0) && 2 == calculate_output_~input#1); 49357#L285 assume !((((5 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0) && 1 == ~a24~0); 49356#L290 assume !((80 < ~a12~0 && 8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 49355#L296 assume !(4 == calculate_output_~input#1 && (((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43))); 49354#L303 assume !(((1 == ~a24~0 && 3 == calculate_output_~input#1 && ~a12~0 <= -43) && 7 == ~a21~0) && 8 == ~a15~0); 49353#L309 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 49352#L315 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 80 < ~a12~0); 49351#L321 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 8 == ~a15~0) && 1 == ~a24~0); 49350#L327 assume !(((9 == ~a15~0 && 1 == calculate_output_~input#1 && 8 == ~a21~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 49349#L333 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 8 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 49348#L339 assume !(1 == ~a24~0 && (8 == ~a15~0 && 1 == calculate_output_~input#1 && 9 == ~a21~0) && 11 < ~a12~0 && 80 >= ~a12~0); 49347#L345 assume !(9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 49346#L351 assume !(80 < ~a12~0 && 9 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0); 49345#L357 assume !((((6 == calculate_output_~input#1 && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0) && 1 == ~a24~0); 49344#L363 assume !(((1 == ~a24~0 && 1 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 49343#L369 assume !(((10 == ~a21~0 && (80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) || ((5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 45980#L376 assume !(((((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 45981#L382 assume !((((1 == calculate_output_~input#1 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0)) && 9 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 46046#L388 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0); 46014#L394 assume !((1 == ~a24~0 && 9 == ~a15~0 && 5 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 46015#L400 assume !(((8 == ~a15~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 46118#L406 assume !(9 == ~a15~0 && ((3 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 46119#L412 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 46018#L418 assume !(9 == ~a15~0 && 1 == ~a24~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 46019#L424 assume !((11 < ~a12~0 && 80 >= ~a12~0) && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 9 == ~a15~0); 46022#L430 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && 80 < ~a12~0) && 9 == ~a21~0); 46023#L436 assume !((1 == ~a24~0 && (2 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && ~a12~0 <= -43) && 8 == ~a15~0); 46059#L442 assume !(1 == ~a24~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0))) && 9 == ~a15~0); 46060#L448 assume !((((6 == calculate_output_~input#1 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0) && ~a12~0 <= -43); 45961#L454 assume !(((~a12~0 <= -43 && 6 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && 1 == ~a24~0) && 8 == ~a15~0); 45962#L459 assume (((7 == ~a21~0 && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0) && 8 == ~a15~0;~a21~0 := 10;calculate_output_#res#1 := 22; 45969#calculate_output_returnLabel#1 [2023-11-26 12:06:38,828 INFO L750 eck$LassoCheckResult]: Loop: 45969#calculate_output_returnLabel#1 main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 46030#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 46031#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 46264#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 46155#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 46156#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 46209#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 46210#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 46095#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 46096#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 46375#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 46350#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 46274#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 45984#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 45985#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 46377#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 46328#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 46063#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 46064#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 46381#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 46386#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 45988#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 45989#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 46172#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 46099#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 46100#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 46276#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 46262#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 46127#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 46128#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 46379#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 46243#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 46219#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 46184#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 46185#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 46114#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 46115#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 46318#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 46256#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 46166#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 45976#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 45977#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 46245#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 46246#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 46087#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 46088#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 46026#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 46027#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 46034#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 46035#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 46182#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 46168#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 46169#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 46364#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 46233#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 46234#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 46348#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 46342#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 46343#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 46239#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 46240#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 46355#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 46174#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 46159#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 46160#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 46306#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 46307#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 46237#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 46067#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 46068#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 46071#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 46288#L257 assume !((((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0); 46213#L262 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 46048#L268 assume !(9 == ~a15~0 && (1 == calculate_output_~input#1 && (((~a12~0 <= -43 && 10 == ~a21~0) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0))) && 1 == ~a24~0); 46049#L274 assume !((1 == ~a24~0 && (6 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 80 < ~a12~0) && 9 == ~a15~0); 46188#L279 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a15~0 && 1 == ~a24~0 && (9 == ~a21~0 || 10 == ~a21~0) && 2 == calculate_output_~input#1); 46189#L285 assume !((((5 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0) && 1 == ~a24~0); 46388#L290 assume !((80 < ~a12~0 && 8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 46176#L296 assume !(4 == calculate_output_~input#1 && (((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43))); 46177#L303 assume !(((1 == ~a24~0 && 3 == calculate_output_~input#1 && ~a12~0 <= -43) && 7 == ~a21~0) && 8 == ~a15~0); 46304#L309 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 46135#L315 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 80 < ~a12~0); 46136#L321 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 8 == ~a15~0) && 1 == ~a24~0); 46042#L327 assume !(((9 == ~a15~0 && 1 == calculate_output_~input#1 && 8 == ~a21~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 46043#L333 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 8 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 46228#L339 assume !(1 == ~a24~0 && (8 == ~a15~0 && 1 == calculate_output_~input#1 && 9 == ~a21~0) && 11 < ~a12~0 && 80 >= ~a12~0); 46395#L345 assume !(9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 46254#L351 assume !(80 < ~a12~0 && 9 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0); 46196#L357 assume !((((6 == calculate_output_~input#1 && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0) && 1 == ~a24~0); 46197#L363 assume !(((1 == ~a24~0 && 1 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 46103#L369 assume !(((10 == ~a21~0 && (80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) || ((5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 46104#L376 assume !(((((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 49342#L382 assume !((((1 == calculate_output_~input#1 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0)) && 9 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 49341#L388 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0); 49340#L394 assume !((1 == ~a24~0 && 9 == ~a15~0 && 5 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 49339#L400 assume !(((8 == ~a15~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 49338#L406 assume !(9 == ~a15~0 && ((3 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 49337#L412 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 49336#L418 assume !(9 == ~a15~0 && 1 == ~a24~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 49335#L424 assume !((11 < ~a12~0 && 80 >= ~a12~0) && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 9 == ~a15~0); 49334#L430 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && 80 < ~a12~0) && 9 == ~a21~0); 49333#L436 assume !((1 == ~a24~0 && (2 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && ~a12~0 <= -43) && 8 == ~a15~0); 49332#L442 assume !(1 == ~a24~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0))) && 9 == ~a15~0); 49331#L448 assume !((((6 == calculate_output_~input#1 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0) && ~a12~0 <= -43); 49327#L454 assume ((~a12~0 <= -43 && 6 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && 1 == ~a24~0) && 8 == ~a15~0;~a12~0 := (if (if -1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26) < 0 && 0 != (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) % 5 then 1 + (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5 else (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5) < 0 && 0 != (if -1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26) < 0 && 0 != (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) % 5 then 1 + (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5 else (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5) % 5 then 1 + (if -1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26) < 0 && 0 != (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) % 5 then 1 + (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5 else (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5) / 5 else (if -1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26) < 0 && 0 != (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) % 5 then 1 + (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5 else (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5) / 5);~a21~0 := 7;calculate_output_#res#1 := 25; 45993#calculate_output_returnLabel#1 main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 49324#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 49304#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 49305#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 49300#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 49301#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 49296#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 49297#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 49290#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 49291#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 49216#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 49217#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 49208#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 49209#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 49200#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 49201#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 49192#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 49193#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 49184#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 49185#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 49176#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 49177#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 49168#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 49169#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 49160#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 49161#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 49152#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 49153#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 49144#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 49145#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 49136#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 49137#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 49128#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 49129#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 49120#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 49121#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 49112#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 49113#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 49104#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 49105#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 49096#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 49097#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 49088#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 49089#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 49080#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 49081#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 49072#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 49073#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 49064#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 49065#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 49056#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 49057#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 49048#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 49049#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 49040#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 49041#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 49032#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 49033#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 49024#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 49025#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 49016#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 49017#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 49008#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 49009#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 49000#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 49001#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 48992#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 48993#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 48984#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 48985#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 48976#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 48977#L257 assume !((((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0); 48968#L262 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 48969#L268 assume !(9 == ~a15~0 && (1 == calculate_output_~input#1 && (((~a12~0 <= -43 && 10 == ~a21~0) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0))) && 1 == ~a24~0); 48960#L274 assume !((1 == ~a24~0 && (6 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 80 < ~a12~0) && 9 == ~a15~0); 48961#L279 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a15~0 && 1 == ~a24~0 && (9 == ~a21~0 || 10 == ~a21~0) && 2 == calculate_output_~input#1); 48952#L285 assume !((((5 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0) && 1 == ~a24~0); 48953#L290 assume !((80 < ~a12~0 && 8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 48944#L296 assume !(4 == calculate_output_~input#1 && (((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43))); 48945#L303 assume !(((1 == ~a24~0 && 3 == calculate_output_~input#1 && ~a12~0 <= -43) && 7 == ~a21~0) && 8 == ~a15~0); 48936#L309 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 48937#L315 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 80 < ~a12~0); 48928#L321 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 8 == ~a15~0) && 1 == ~a24~0); 48929#L327 assume !(((9 == ~a15~0 && 1 == calculate_output_~input#1 && 8 == ~a21~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 48910#L333 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 8 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 48911#L339 assume !(1 == ~a24~0 && (8 == ~a15~0 && 1 == calculate_output_~input#1 && 9 == ~a21~0) && 11 < ~a12~0 && 80 >= ~a12~0); 48904#L345 assume !(9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 48905#L351 assume !(80 < ~a12~0 && 9 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0); 48898#L357 assume !((((6 == calculate_output_~input#1 && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0) && 1 == ~a24~0); 48899#L363 assume !(((1 == ~a24~0 && 1 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 48894#L369 assume !(((10 == ~a21~0 && (80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) || ((5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 48895#L376 assume !(((((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 48888#L382 assume !((((1 == calculate_output_~input#1 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0)) && 9 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 48889#L388 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0); 48880#L394 assume !((1 == ~a24~0 && 9 == ~a15~0 && 5 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 48881#L400 assume !(((8 == ~a15~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 48872#L406 assume !(9 == ~a15~0 && ((3 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 48873#L412 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 48864#L418 assume !(9 == ~a15~0 && 1 == ~a24~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 48865#L424 assume !((11 < ~a12~0 && 80 >= ~a12~0) && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 9 == ~a15~0); 48856#L430 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && 80 < ~a12~0) && 9 == ~a21~0); 48857#L436 assume !((1 == ~a24~0 && (2 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && ~a12~0 <= -43) && 8 == ~a15~0); 48840#L442 assume !(1 == ~a24~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0))) && 9 == ~a15~0); 48841#L448 assume !((((6 == calculate_output_~input#1 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0) && ~a12~0 <= -43); 48829#L454 assume !(((~a12~0 <= -43 && 6 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && 1 == ~a24~0) && 8 == ~a15~0); 48830#L459 assume (((7 == ~a21~0 && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0) && 8 == ~a15~0;~a21~0 := 10;calculate_output_#res#1 := 22; 45969#calculate_output_returnLabel#1 [2023-11-26 12:06:38,829 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:38,829 INFO L85 PathProgramCache]: Analyzing trace with hash -354012632, now seen corresponding path program 1 times [2023-11-26 12:06:38,829 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:38,830 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816904879] [2023-11-26 12:06:38,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:38,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:38,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:38,853 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:38,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:38,875 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:38,876 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:38,876 INFO L85 PathProgramCache]: Analyzing trace with hash 737709063, now seen corresponding path program 1 times [2023-11-26 12:06:38,876 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:38,876 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [393392123] [2023-11-26 12:06:38,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:38,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:38,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:39,299 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 105 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:06:39,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:06:39,299 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [393392123] [2023-11-26 12:06:39,299 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [393392123] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:06:39,300 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:06:39,300 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 12:06:39,300 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1288361343] [2023-11-26 12:06:39,300 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:06:39,301 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:06:39,301 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:06:39,301 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 12:06:39,302 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 12:06:39,302 INFO L87 Difference]: Start difference. First operand 3470 states and 3788 transitions. cyclomatic complexity: 324 Second operand has 3 states, 2 states have (on average 105.5) internal successors, (211), 3 states have internal predecessors, (211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:39,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:06:39,999 INFO L93 Difference]: Finished difference Result 4360 states and 4806 transitions. [2023-11-26 12:06:39,999 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4360 states and 4806 transitions. [2023-11-26 12:06:40,021 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 2733 [2023-11-26 12:06:40,053 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4360 states to 4360 states and 4806 transitions. [2023-11-26 12:06:40,053 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2945 [2023-11-26 12:06:40,059 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2945 [2023-11-26 12:06:40,059 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4360 states and 4806 transitions. [2023-11-26 12:06:40,059 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:06:40,059 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4360 states and 4806 transitions. [2023-11-26 12:06:40,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4360 states and 4806 transitions. [2023-11-26 12:06:40,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4360 to 4360. [2023-11-26 12:06:40,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4360 states, 4360 states have (on average 1.1022935779816514) internal successors, (4806), 4359 states have internal predecessors, (4806), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:06:40,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4360 states to 4360 states and 4806 transitions. [2023-11-26 12:06:40,144 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4360 states and 4806 transitions. [2023-11-26 12:06:40,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 12:06:40,145 INFO L428 stractBuchiCegarLoop]: Abstraction has 4360 states and 4806 transitions. [2023-11-26 12:06:40,145 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 12:06:40,145 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4360 states and 4806 transitions. [2023-11-26 12:06:40,166 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 2733 [2023-11-26 12:06:40,166 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:06:40,166 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:06:40,174 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:40,175 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:06:40,175 INFO L748 eck$LassoCheckResult]: Stem: 53912#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(20, 2);call #Ultimate.allocInit(12, 3);~inputD~0 := 4;~inputB~0 := 2;~inputC~0 := 3;~inputF~0 := 6;~inputE~0 := 5;~inputA~0 := 1;~a21~0 := 7;~a15~0 := 8;~a12~0 := -49;~a24~0 := 1; 53913#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet6#1, main_#t~ret7#1, main_~input~0#1, main_~output~0#1;main_~output~0#1 := -1; 53954#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 55383#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 57879#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 57878#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 57877#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 57876#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 57875#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 57874#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 57873#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 57872#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 57871#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 57870#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 57869#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 57868#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 57867#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 57866#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 57865#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 57864#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 57863#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 57862#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 57861#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 57860#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 57859#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 57858#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 57857#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 57856#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 57855#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 57854#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 57853#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 57852#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 57851#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 57850#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 57849#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 57848#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 57847#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 57846#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 57845#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 57844#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 57843#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 57842#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 57841#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 57840#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 57839#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 57838#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 57837#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 57836#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 57835#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 57834#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 57833#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 57832#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 57831#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 57830#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 57829#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 57828#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 57827#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 57826#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 57825#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 57824#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 57823#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 57822#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 57821#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 57820#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 57819#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 57818#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 57817#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 57816#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 57815#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 57814#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 57813#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 57812#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 57811#L257 assume !((((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0); 57810#L262 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 57809#L268 assume !(9 == ~a15~0 && (1 == calculate_output_~input#1 && (((~a12~0 <= -43 && 10 == ~a21~0) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0))) && 1 == ~a24~0); 57808#L274 assume !((1 == ~a24~0 && (6 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 80 < ~a12~0) && 9 == ~a15~0); 57807#L279 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a15~0 && 1 == ~a24~0 && (9 == ~a21~0 || 10 == ~a21~0) && 2 == calculate_output_~input#1); 57806#L285 assume !((((5 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0) && 1 == ~a24~0); 57805#L290 assume !((80 < ~a12~0 && 8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 57804#L296 assume !(4 == calculate_output_~input#1 && (((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43))); 57803#L303 assume !(((1 == ~a24~0 && 3 == calculate_output_~input#1 && ~a12~0 <= -43) && 7 == ~a21~0) && 8 == ~a15~0); 57802#L309 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 57801#L315 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 80 < ~a12~0); 57800#L321 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 8 == ~a15~0) && 1 == ~a24~0); 57799#L327 assume !(((9 == ~a15~0 && 1 == calculate_output_~input#1 && 8 == ~a21~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 57798#L333 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 8 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 57797#L339 assume !(1 == ~a24~0 && (8 == ~a15~0 && 1 == calculate_output_~input#1 && 9 == ~a21~0) && 11 < ~a12~0 && 80 >= ~a12~0); 57796#L345 assume !(9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 57795#L351 assume !(80 < ~a12~0 && 9 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0); 57794#L357 assume !((((6 == calculate_output_~input#1 && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0) && 1 == ~a24~0); 57793#L363 assume !(((1 == ~a24~0 && 1 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 57792#L369 assume !(((10 == ~a21~0 && (80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) || ((5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 57791#L376 assume !(((((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 57790#L382 assume !((((1 == calculate_output_~input#1 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0)) && 9 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 57789#L388 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0); 57788#L394 assume !((1 == ~a24~0 && 9 == ~a15~0 && 5 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 57787#L400 assume !(((8 == ~a15~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 57786#L406 assume !(9 == ~a15~0 && ((3 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 57785#L412 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 57784#L418 assume !(9 == ~a15~0 && 1 == ~a24~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 57783#L424 assume !((11 < ~a12~0 && 80 >= ~a12~0) && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 9 == ~a15~0); 57782#L430 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && 80 < ~a12~0) && 9 == ~a21~0); 57781#L436 assume !((1 == ~a24~0 && (2 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && ~a12~0 <= -43) && 8 == ~a15~0); 57780#L442 assume !(1 == ~a24~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0))) && 9 == ~a15~0); 57779#L448 assume !((((6 == calculate_output_~input#1 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0) && ~a12~0 <= -43); 57778#L454 assume !(((~a12~0 <= -43 && 6 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && 1 == ~a24~0) && 8 == ~a15~0); 53805#L459 assume (((7 == ~a21~0 && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0) && 8 == ~a15~0;~a21~0 := 10;calculate_output_#res#1 := 22; 53806#calculate_output_returnLabel#1 main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 58091#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 58089#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 58087#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 58085#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 58081#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 58080#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 58078#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 58076#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 58074#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 58072#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 58070#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 58068#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 53820#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 53821#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 54210#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 54257#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 58052#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 58050#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 58048#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 58046#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 58044#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 58042#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 58040#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 58038#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 58036#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 58034#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 58032#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 58030#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 58029#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 58028#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 58027#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 58026#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 58025#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 58024#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 58023#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 58022#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 58021#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 58020#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 58019#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 58018#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 58017#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 58016#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 58015#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 58014#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 58013#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 58012#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 58011#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 58010#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 58009#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 58008#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 58007#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 58006#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 58005#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 58004#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 58003#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 58002#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 58001#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 57967#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 57966#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 57965#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 57964#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 57963#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 53991#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 53992#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 54148#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 54149#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 54069#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 53902#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 53903#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 53906#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 54131#L257 assume !((((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0); 54045#L262 assume !((((((-43 < ~a12~0 && 11 >= ~a12~0) && 10 == ~a21~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0) && 8 == ~a15~0); 53882#L268 assume !(9 == ~a15~0 && (1 == calculate_output_~input#1 && (((~a12~0 <= -43 && 10 == ~a21~0) || (6 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0)) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0))) && 1 == ~a24~0); 53883#L274 assume !((1 == ~a24~0 && (6 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 80 < ~a12~0) && 9 == ~a15~0); 54022#L279 assume !((-43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a15~0 && 1 == ~a24~0 && (9 == ~a21~0 || 10 == ~a21~0) && 2 == calculate_output_~input#1); 54023#L285 assume !((((5 == calculate_output_~input#1 && 8 == ~a15~0) && -43 < ~a12~0 && 11 >= ~a12~0) && 9 == ~a21~0) && 1 == ~a24~0); 54226#L290 assume !((80 < ~a12~0 && 8 == ~a15~0 && (8 == ~a21~0 || 9 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 54010#L296 assume !(4 == calculate_output_~input#1 && (((9 == ~a15~0 && 1 == ~a24~0 && 80 < ~a12~0) && 10 == ~a21~0) || (6 == ~a21~0 && 5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43))); 54011#L303 assume !(((1 == ~a24~0 && 3 == calculate_output_~input#1 && ~a12~0 <= -43) && 7 == ~a21~0) && 8 == ~a15~0); 54143#L309 assume !(1 == ~a24~0 && (((80 < ~a12~0 && 8 == ~a15~0) && 10 == ~a21~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 53967#L315 assume !((1 == ~a24~0 && 9 == ~a15~0 && (7 == ~a21~0 || 8 == ~a21~0) && 3 == calculate_output_~input#1) && 80 < ~a12~0); 53968#L321 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 8 == ~a15~0) && 1 == ~a24~0); 53876#L327 assume !(((9 == ~a15~0 && 1 == calculate_output_~input#1 && 8 == ~a21~0) && 1 == ~a24~0) && -43 < ~a12~0 && 11 >= ~a12~0); 53877#L333 assume !((((((8 == ~a21~0 || 9 == ~a21~0) || 10 == ~a21~0) && 3 == calculate_output_~input#1) && 8 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 54061#L339 assume !(1 == ~a24~0 && (8 == ~a15~0 && 1 == calculate_output_~input#1 && 9 == ~a21~0) && 11 < ~a12~0 && 80 >= ~a12~0); 54242#L345 assume !(9 == ~a15~0 && 80 < ~a12~0 && 1 == ~a24~0 && (7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1); 54088#L351 assume !(80 < ~a12~0 && 9 == ~a15~0 && (2 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0); 54030#L357 assume !((((6 == calculate_output_~input#1 && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0) && 1 == ~a24~0); 54031#L363 assume !(((1 == ~a24~0 && 1 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 9 == ~a15~0) && 11 < ~a12~0 && 80 >= ~a12~0); 53940#L369 assume !(((10 == ~a21~0 && (80 < ~a12~0 && 1 == ~a24~0) && 9 == ~a15~0) || ((5 == ~a15~0 && 2 == ~a24~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 3 == calculate_output_~input#1); 53816#L376 assume !(((((7 == ~a21~0 && -43 < ~a12~0 && 11 >= ~a12~0) || (10 == ~a21~0 && ~a12~0 <= -43) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0)) && 5 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 53817#L382 assume !((((1 == calculate_output_~input#1 && ((7 == ~a21~0 || 8 == ~a21~0) || 9 == ~a21~0)) && 9 == ~a15~0) && ~a12~0 <= -43) && 1 == ~a24~0); 53880#L388 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && -43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a21~0); 53847#L394 assume !((1 == ~a24~0 && 9 == ~a15~0 && 5 == calculate_output_~input#1 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0)) && 11 < ~a12~0 && 80 >= ~a12~0); 53848#L400 assume !(((8 == ~a15~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0); 53950#L406 assume !(9 == ~a15~0 && ((3 == calculate_output_~input#1 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0)) && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0); 53951#L412 assume !(((-43 < ~a12~0 && 11 >= ~a12~0) && 8 == ~a15~0 && (8 == ~a21~0 || 6 == ~a21~0 || 7 == ~a21~0) && 3 == calculate_output_~input#1) && 1 == ~a24~0); 53851#L418 assume !(9 == ~a15~0 && 1 == ~a24~0 && ((9 == ~a21~0 || 10 == ~a21~0) && 5 == calculate_output_~input#1) && -43 < ~a12~0 && 11 >= ~a12~0); 53852#L424 assume !((11 < ~a12~0 && 80 >= ~a12~0) && (1 == ~a24~0 && ((6 == ~a21~0 || 7 == ~a21~0) || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 9 == ~a15~0); 53855#L430 assume !(9 == ~a15~0 && 1 == ~a24~0 && (6 == calculate_output_~input#1 && 80 < ~a12~0) && 9 == ~a21~0); 53856#L436 assume !((1 == ~a24~0 && (2 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && ~a12~0 <= -43) && 8 == ~a15~0); 53894#L442 assume !(1 == ~a24~0 && (4 == calculate_output_~input#1 && (((-43 < ~a12~0 && 11 >= ~a12~0) && 7 == ~a21~0) || (~a12~0 <= -43 && 10 == ~a21~0) || ((-43 < ~a12~0 && 11 >= ~a12~0) && 6 == ~a21~0))) && 9 == ~a15~0); 53895#L448 assume !((((6 == calculate_output_~input#1 && (9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0)) && 1 == ~a24~0) && 9 == ~a15~0) && ~a12~0 <= -43); 53797#L454 assume ((~a12~0 <= -43 && 6 == calculate_output_~input#1 && (10 == ~a21~0 || 8 == ~a21~0 || 9 == ~a21~0)) && 1 == ~a24~0) && 8 == ~a15~0;~a12~0 := (if (if -1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26) < 0 && 0 != (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) % 5 then 1 + (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5 else (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5) < 0 && 0 != (if -1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26) < 0 && 0 != (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) % 5 then 1 + (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5 else (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5) % 5 then 1 + (if -1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26) < 0 && 0 != (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) % 5 then 1 + (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5 else (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5) / 5 else (if -1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26) < 0 && 0 != (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) % 5 then 1 + (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5 else (-1 + (if ~a12~0 < 0 && 0 != ~a12~0 % 26 then ~a12~0 % 26 - 26 else ~a12~0 % 26)) / 5) / 5);~a21~0 := 7;calculate_output_#res#1 := 25; 53798#calculate_output_returnLabel#1 [2023-11-26 12:06:40,176 INFO L750 eck$LassoCheckResult]: Loop: 53798#calculate_output_returnLabel#1 main_#t~ret7#1 := calculate_output_#res#1;havoc calculate_output_~input#1;havoc calculate_output_#in~input#1;assume { :end_inline_calculate_output } true;main_~output~0#1 := main_#t~ret7#1;havoc main_#t~ret7#1;havoc main_~input~0#1; 53863#L890-2 assume !false;havoc main_~input~0#1;havoc main_#t~nondet6#1;main_~input~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 53864#L895 assume !(((((1 != main_~input~0#1 && 2 != main_~input~0#1) && 3 != main_~input~0#1) && 4 != main_~input~0#1) && 5 != main_~input~0#1) && 6 != main_~input~0#1);assume { :begin_inline_calculate_output } true;calculate_output_#in~input#1 := main_~input~0#1;havoc calculate_output_#res#1;havoc calculate_output_~input#1;calculate_output_~input#1 := calculate_output_#in~input#1; 54099#L31 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 53987#L31-2 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 53988#L34-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 54041#L37-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 54042#L40-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 53932#L43-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 53933#L46-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 54207#L49-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 54181#L52-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 54113#L55-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 54114#L58-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 58065#L61-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 58063#L64-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 54163#L67-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 53898#L70-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 53899#L73-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 54215#L76-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 58053#L79-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 58051#L82-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 58049#L85-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 58047#L88-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 58045#L91-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 58043#L94-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 58041#L97-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 58039#L100-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 58037#L103-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 58035#L106-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 58033#L109-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 58031#L112-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 58000#L115-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 57998#L118-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 57996#L121-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 57994#L124-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 57992#L127-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 8 == ~a21~0); 57990#L130-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 8 == ~a15~0) && 6 == ~a21~0); 57988#L133-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 57987#L136-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 7 == ~a15~0) && 9 == ~a21~0); 57986#L139-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 57985#L142-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 57984#L145-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 57983#L148-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 57982#L151-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 57981#L154-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 57980#L157-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 10 == ~a21~0); 57979#L160-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 57978#L163-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 10 == ~a21~0); 57977#L166-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 6 == ~a21~0); 57976#L169-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 57975#L172-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 57974#L175-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 9 == ~a21~0); 57973#L178-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 9 == ~a21~0); 57972#L181-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 7 == ~a15~0) && 7 == ~a21~0); 57971#L184-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 10 == ~a21~0); 57970#L187-1 assume !((((11 < ~a12~0 && 80 >= ~a12~0) && 1 == ~a24~0) && 7 == ~a15~0) && 6 == ~a21~0); 57968#L190-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 57969#L193-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 8 == ~a21~0); 57999#L196-1 assume !(((~a12~0 <= -43 && 1 == ~a24~0) && 6 == ~a15~0) && 6 == ~a21~0); 57997#L199-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 57995#L202-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 7 == ~a21~0); 57993#L205-1 assume !(((80 < ~a12~0 && 1 == ~a24~0) && 5 == ~a15~0) && 7 == ~a21~0); 57991#L208-1 assume !((((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0) && 6 == ~a15~0) && 8 == ~a21~0); 57989#L211-1 assume !((1 == ~a24~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 5 == calculate_output_~input#1 && 8 == ~a15~0) && 9 == ~a21~0); 57919#L221 assume !((9 == ~a15~0 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 5 == calculate_output_~input#1) && ~a12~0 <= -43) && 1 == ~a24~0); 57918#L227 assume !(9 == ~a15~0 && ((-43 < ~a12~0 && 11 >= ~a12~0) && 1 == ~a24~0 && 2 == calculate_output_~input#1) && 8 == ~a21~0); 57917#L233 assume !(1 == ~a24~0 && 8 == ~a15~0 && (11 < ~a12~0 && 80 >= ~a12~0) && 1 == calculate_output_~input#1 && (7 == ~a21~0 || 8 == ~a21~0)); 57916#L239 assume !((((10 == ~a21~0 && 80 < ~a12~0 && 8 == ~a15~0) || ((9 == ~a15~0 && ~a12~0 <= -43) && 6 == ~a21~0)) && 2 == calculate_output_~input#1) && 1 == ~a24~0); 57915#L245 assume !(1 == ~a24~0 && 9 == ~a15~0 && ((6 == ~a21~0 && 80 < ~a12~0) || (9 == ~a21~0 && 11 < ~a12~0 && 80 >= ~a12~0) || ((11 < ~a12~0 && 80 >= ~a12~0) && 10 == ~a21~0)) && 5 == calculate_output_~input#1); 57914#L251 assume !((~a12~0 <= -43 && ((9 == ~a21~0 || 7 == ~a21~0 || 8 == ~a21~0) && 4 == calculate_output_~input#1) && 1 == ~a24~0) && 9 == ~a15~0); 57913#L257 assume (((2 == calculate_output_~input#1 && 1 == ~a24~0) && 11 < ~a12~0 && 80 >= ~a12~0) && 9 == ~a21~0) && 8 == ~a15~0;~a12~0 := (if 32000 + (~a12~0 - -334333) < 0 && 0 != (32000 + (~a12~0 - -334333)) % 5 then 1 + (32000 + (~a12~0 - -334333)) / 5 else (32000 + (~a12~0 - -334333)) / 5);~a21~0 := 8;calculate_output_#res#1 := 22; 53798#calculate_output_returnLabel#1 [2023-11-26 12:06:40,176 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:40,176 INFO L85 PathProgramCache]: Analyzing trace with hash 29180203, now seen corresponding path program 1 times [2023-11-26 12:06:40,177 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:40,177 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853415251] [2023-11-26 12:06:40,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:40,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:40,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:40,243 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:40,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:40,311 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:40,312 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:40,312 INFO L85 PathProgramCache]: Analyzing trace with hash 2113352545, now seen corresponding path program 1 times [2023-11-26 12:06:40,312 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:40,312 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324559417] [2023-11-26 12:06:40,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:40,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:40,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:40,330 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:06:40,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:06:40,342 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:06:40,342 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:06:40,343 INFO L85 PathProgramCache]: Analyzing trace with hash -1202759029, now seen corresponding path program 1 times [2023-11-26 12:06:40,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:06:40,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577156946] [2023-11-26 12:06:40,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:06:40,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:06:40,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:06:40,547 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 143 proven. 0 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2023-11-26 12:06:40,547 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:06:40,547 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1577156946] [2023-11-26 12:06:40,547 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1577156946] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:06:40,548 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:06:40,548 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 12:06:40,548 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799920852] [2023-11-26 12:06:40,548 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:06:40,991 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:06:40,991 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:06:40,991 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:06:40,991 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:06:40,991 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 12:06:40,992 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:40,992 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:06:40,992 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:06:40,992 INFO L133 ssoRankerPreferences]: Filename of dumped script: Problem14_label45.c_Iteration8_Loop [2023-11-26 12:06:40,992 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:06:40,992 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:06:40,993 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:40,995 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:40,998 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:41,006 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:41,010 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:41,015 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:41,018 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:41,021 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:41,023 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:41,026 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:06:41,147 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:06:41,147 INFO L404 LassoAnalysis]: Checking for nontermination... [2023-11-26 12:06:41,147 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:41,147 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:41,148 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:41,157 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:41,157 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:41,172 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Waiting until timeout for monitored process [2023-11-26 12:06:41,179 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:41,179 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~ret7#1=0} Honda state: {ULTIMATE.start_main_#t~ret7#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:41,182 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:41,183 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:41,183 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:41,184 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:41,250 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Waiting until timeout for monitored process [2023-11-26 12:06:41,251 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:41,251 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:41,277 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 12:06:41,277 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_calculate_output_#in~input#1=2} Honda state: {ULTIMATE.start_calculate_output_#in~input#1=2} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 12:06:41,281 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Forceful destruction successful, exit code 0 [2023-11-26 12:06:41,282 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:06:41,282 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:06:41,284 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:06:41,289 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:06:41,290 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:06:41,304 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17440382-3a29-42a7-86a3-d972aa6d635c/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Waiting until timeout for monitored process