./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loop-acceleration/array_4.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loop-acceleration/array_4.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e8c27e61ac5d5a22c0e00a5dbac1b872460567877a501387ed9d5bda89096498 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:45:03,076 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:45:03,147 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:45:03,153 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:45:03,154 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:45:03,181 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:45:03,182 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:45:03,182 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:45:03,183 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:45:03,184 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:45:03,185 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:45:03,185 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:45:03,186 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:45:03,187 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:45:03,187 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:45:03,188 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:45:03,188 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:45:03,189 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:45:03,189 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:45:03,190 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:45:03,190 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:45:03,191 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:45:03,192 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:45:03,192 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:45:03,193 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:45:03,193 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:45:03,193 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:45:03,208 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:45:03,208 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:45:03,209 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:45:03,209 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:45:03,210 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:45:03,211 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:45:03,211 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:45:03,211 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:45:03,212 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:45:03,212 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:45:03,213 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:45:03,213 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e8c27e61ac5d5a22c0e00a5dbac1b872460567877a501387ed9d5bda89096498 [2023-11-26 11:45:03,534 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:45:03,569 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:45:03,573 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:45:03,574 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:45:03,575 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:45:03,577 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/loop-acceleration/array_4.i [2023-11-26 11:45:06,765 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:45:06,992 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:45:06,994 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/sv-benchmarks/c/loop-acceleration/array_4.i [2023-11-26 11:45:07,003 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/data/29cbe7f1b/20d888eb769b4760bc1a1b671038d9a8/FLAG2fcbb9d18 [2023-11-26 11:45:07,023 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/data/29cbe7f1b/20d888eb769b4760bc1a1b671038d9a8 [2023-11-26 11:45:07,026 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:45:07,028 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:45:07,029 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:45:07,030 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:45:07,036 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:45:07,037 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,038 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@15911e62 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07, skipping insertion in model container [2023-11-26 11:45:07,038 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,061 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:45:07,222 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:45:07,235 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:45:07,254 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:45:07,270 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:45:07,270 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07 WrapperNode [2023-11-26 11:45:07,270 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:45:07,272 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:45:07,272 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:45:07,272 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:45:07,280 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,288 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,308 INFO L138 Inliner]: procedures = 16, calls = 13, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 45 [2023-11-26 11:45:07,308 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:45:07,309 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:45:07,309 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:45:07,309 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:45:07,321 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,321 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,323 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,339 INFO L175 MemorySlicer]: Split 5 memory accesses to 2 slices as follows [2, 3]. 60 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 2 writes are split as follows [0, 2]. [2023-11-26 11:45:07,339 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,340 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,346 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,349 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,351 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,352 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,355 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:45:07,356 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:45:07,356 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:45:07,356 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:45:07,357 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (1/1) ... [2023-11-26 11:45:07,368 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:07,380 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:07,393 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:07,408 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:45:07,439 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:45:07,439 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:45:07,440 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 11:45:07,440 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 11:45:07,440 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 11:45:07,440 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 11:45:07,441 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:45:07,441 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:45:07,441 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 11:45:07,442 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 11:45:07,442 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 11:45:07,536 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:45:07,538 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:45:07,700 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:45:07,711 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:45:07,711 INFO L309 CfgBuilder]: Removed 2 assume(true) statements. [2023-11-26 11:45:07,713 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:45:07 BoogieIcfgContainer [2023-11-26 11:45:07,714 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:45:07,715 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:45:07,715 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:45:07,720 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:45:07,721 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:45:07,721 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:45:07" (1/3) ... [2023-11-26 11:45:07,722 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5d9234ac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:45:07, skipping insertion in model container [2023-11-26 11:45:07,722 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:45:07,723 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:07" (2/3) ... [2023-11-26 11:45:07,723 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5d9234ac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:45:07, skipping insertion in model container [2023-11-26 11:45:07,724 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:45:07,724 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:45:07" (3/3) ... [2023-11-26 11:45:07,726 INFO L332 chiAutomizerObserver]: Analyzing ICFG array_4.i [2023-11-26 11:45:07,818 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:45:07,820 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:45:07,821 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:45:07,821 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:45:07,821 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:45:07,824 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:45:07,824 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:45:07,825 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:45:07,832 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:07,852 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2023-11-26 11:45:07,853 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:07,853 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:07,858 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:45:07,859 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:45:07,859 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:45:07,859 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:07,863 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2023-11-26 11:45:07,863 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:07,863 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:07,864 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:45:07,864 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:45:07,873 INFO L748 eck$LassoCheckResult]: Stem: 13#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 6#L25-3true [2023-11-26 11:45:07,874 INFO L750 eck$LassoCheckResult]: Loop: 6#L25-3true assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 9#L25-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 6#L25-3true [2023-11-26 11:45:07,880 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:07,881 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-26 11:45:07,892 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:07,893 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985111812] [2023-11-26 11:45:07,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:07,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:08,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:08,041 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:08,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:08,085 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:08,090 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:08,090 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-26 11:45:08,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:08,090 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839807809] [2023-11-26 11:45:08,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:08,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:08,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:08,105 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:08,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:08,116 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:08,118 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:08,119 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-26 11:45:08,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:08,120 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1326177105] [2023-11-26 11:45:08,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:08,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:08,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:08,155 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:08,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:08,174 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:08,747 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 11:45:08,748 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 11:45:08,748 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 11:45:08,748 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 11:45:08,748 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 11:45:08,749 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:08,749 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 11:45:08,749 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 11:45:08,749 INFO L133 ssoRankerPreferences]: Filename of dumped script: array_4.i_Iteration1_Lasso [2023-11-26 11:45:08,749 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 11:45:08,750 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 11:45:08,767 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:08,776 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:08,795 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:08,798 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:08,801 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:08,804 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:08,807 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:09,261 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 11:45:09,266 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 11:45:09,269 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:09,269 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:09,276 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:09,290 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-26 11:45:09,291 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:45:09,305 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:45:09,305 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:45:09,306 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:45:09,306 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:45:09,306 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:45:09,309 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:45:09,309 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:45:09,319 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:45:09,329 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2023-11-26 11:45:09,329 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:09,329 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:09,331 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:09,342 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:45:09,355 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-26 11:45:09,356 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:45:09,357 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:45:09,357 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:45:09,358 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:45:09,363 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:45:09,365 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:45:09,384 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:45:09,393 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2023-11-26 11:45:09,394 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:09,394 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:09,396 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:09,401 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-26 11:45:09,402 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:45:09,415 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:45:09,416 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:45:09,416 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:45:09,416 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:45:09,421 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:45:09,421 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:45:09,433 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:45:09,444 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2023-11-26 11:45:09,445 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:09,445 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:09,446 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:09,452 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-26 11:45:09,453 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:45:09,467 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:45:09,467 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:45:09,467 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:45:09,467 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:45:09,468 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:45:09,469 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:45:09,469 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:45:09,478 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:45:09,487 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-26 11:45:09,488 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:09,488 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:09,489 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:09,502 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:45:09,515 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-26 11:45:09,516 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:45:09,516 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:45:09,516 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:45:09,516 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:45:09,517 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:45:09,518 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:45:09,518 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:45:09,532 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:45:09,541 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2023-11-26 11:45:09,541 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:09,542 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:09,543 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:09,552 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:45:09,565 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-26 11:45:09,566 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:45:09,566 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:45:09,566 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:45:09,567 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:45:09,567 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:45:09,568 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:45:09,569 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:45:09,578 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:45:09,587 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2023-11-26 11:45:09,588 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:09,588 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:09,590 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:09,598 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:45:09,611 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-26 11:45:09,612 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:45:09,612 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:45:09,612 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:45:09,613 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:45:09,613 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:45:09,614 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:45:09,614 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:45:09,623 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:45:09,632 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2023-11-26 11:45:09,633 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:09,633 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:09,635 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:09,643 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:45:09,652 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-26 11:45:09,656 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:45:09,657 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:45:09,657 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:45:09,657 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:45:09,661 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:45:09,661 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:45:09,673 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:45:09,677 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2023-11-26 11:45:09,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:09,678 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:09,681 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:09,690 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:45:09,704 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:45:09,704 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:45:09,704 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:45:09,704 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:45:09,705 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-26 11:45:09,720 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:45:09,720 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:45:09,740 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 11:45:09,763 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2023-11-26 11:45:09,763 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2023-11-26 11:45:09,765 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:09,765 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:09,815 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:09,817 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-26 11:45:09,819 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 11:45:09,852 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-26 11:45:09,852 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 11:45:09,853 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 2045*v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1 Supporting invariants [] [2023-11-26 11:45:09,862 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2023-11-26 11:45:09,885 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2023-11-26 11:45:09,895 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#A~0!base] could not be translated [2023-11-26 11:45:09,937 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:09,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:09,962 INFO L262 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 11:45:09,964 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:45:09,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:09,985 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 11:45:09,987 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:45:10,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:10,088 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 11:45:10,090 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 17 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:10,144 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 17 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 33 states and 45 transitions. Complement of second has 8 states. [2023-11-26 11:45:10,146 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 11:45:10,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:10,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 22 transitions. [2023-11-26 11:45:10,153 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 22 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-26 11:45:10,153 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:45:10,154 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 22 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-26 11:45:10,154 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:45:10,154 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 22 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-26 11:45:10,154 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:45:10,155 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 45 transitions. [2023-11-26 11:45:10,158 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:10,161 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 9 states and 11 transitions. [2023-11-26 11:45:10,162 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2023-11-26 11:45:10,163 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2023-11-26 11:45:10,163 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 11 transitions. [2023-11-26 11:45:10,164 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:45:10,164 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions. [2023-11-26 11:45:10,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 11 transitions. [2023-11-26 11:45:10,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2023-11-26 11:45:10,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:10,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 11 transitions. [2023-11-26 11:45:10,190 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions. [2023-11-26 11:45:10,190 INFO L428 stractBuchiCegarLoop]: Abstraction has 9 states and 11 transitions. [2023-11-26 11:45:10,190 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:45:10,191 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 11 transitions. [2023-11-26 11:45:10,191 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:10,191 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:10,191 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:10,192 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-26 11:45:10,192 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:45:10,192 INFO L748 eck$LassoCheckResult]: Stem: 112#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 113#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 109#L25-3 assume !(main_~i~0#1 < 1023); 110#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 111#L30-4 [2023-11-26 11:45:10,192 INFO L750 eck$LassoCheckResult]: Loop: 111#L30-4 call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 105#L30-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 106#L30-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 111#L30-4 [2023-11-26 11:45:10,193 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:10,193 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2023-11-26 11:45:10,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:10,193 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [425289263] [2023-11-26 11:45:10,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:10,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:10,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:10,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:10,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:10,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [425289263] [2023-11-26 11:45:10,261 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [425289263] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:45:10,262 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:45:10,262 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:45:10,262 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1511286844] [2023-11-26 11:45:10,263 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:45:10,265 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:45:10,265 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:10,266 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 1 times [2023-11-26 11:45:10,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:10,266 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274704826] [2023-11-26 11:45:10,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:10,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:10,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:10,272 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:10,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:10,278 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:10,316 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2023-11-26 11:45:10,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:45:10,339 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 11:45:10,340 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 11:45:10,341 INFO L87 Difference]: Start difference. First operand 9 states and 11 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:10,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:45:10,359 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2023-11-26 11:45:10,359 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 14 transitions. [2023-11-26 11:45:10,360 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:10,361 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 13 states and 14 transitions. [2023-11-26 11:45:10,361 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2023-11-26 11:45:10,361 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2023-11-26 11:45:10,361 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 14 transitions. [2023-11-26 11:45:10,361 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:45:10,361 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13 states and 14 transitions. [2023-11-26 11:45:10,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 14 transitions. [2023-11-26 11:45:10,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 9. [2023-11-26 11:45:10,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:10,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2023-11-26 11:45:10,363 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2023-11-26 11:45:10,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 11:45:10,364 INFO L428 stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2023-11-26 11:45:10,365 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:45:10,365 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2023-11-26 11:45:10,365 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:10,365 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:10,365 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:10,366 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2023-11-26 11:45:10,366 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:45:10,366 INFO L748 eck$LassoCheckResult]: Stem: 140#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 141#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 137#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 135#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 136#L25-3 assume !(main_~i~0#1 < 1023); 138#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 139#L30-4 [2023-11-26 11:45:10,366 INFO L750 eck$LassoCheckResult]: Loop: 139#L30-4 call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 133#L30-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 134#L30-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 139#L30-4 [2023-11-26 11:45:10,367 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:10,367 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2023-11-26 11:45:10,367 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:10,367 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1874925144] [2023-11-26 11:45:10,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:10,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:10,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:10,425 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:10,425 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:10,425 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1874925144] [2023-11-26 11:45:10,425 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1874925144] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:45:10,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1455607451] [2023-11-26 11:45:10,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:10,426 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:45:10,426 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:10,427 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:45:10,459 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2023-11-26 11:45:10,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:10,496 INFO L262 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:45:10,497 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:45:10,510 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:10,510 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:45:10,532 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:10,532 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1455607451] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:45:10,532 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:45:10,532 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-26 11:45:10,533 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146185751] [2023-11-26 11:45:10,533 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:45:10,533 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:45:10,534 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:10,534 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 2 times [2023-11-26 11:45:10,534 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:10,535 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996574019] [2023-11-26 11:45:10,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:10,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:10,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:10,540 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:10,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:10,545 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:10,585 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:45:10,586 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:45:10,586 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:45:10,587 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:10,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:45:10,640 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2023-11-26 11:45:10,641 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2023-11-26 11:45:10,642 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:10,643 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2023-11-26 11:45:10,643 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2023-11-26 11:45:10,643 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2023-11-26 11:45:10,644 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2023-11-26 11:45:10,644 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:45:10,644 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2023-11-26 11:45:10,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2023-11-26 11:45:10,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 15. [2023-11-26 11:45:10,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:10,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2023-11-26 11:45:10,647 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2023-11-26 11:45:10,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:45:10,649 INFO L428 stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2023-11-26 11:45:10,649 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:45:10,649 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2023-11-26 11:45:10,650 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:10,650 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:10,650 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:10,651 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2023-11-26 11:45:10,651 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:45:10,651 INFO L748 eck$LassoCheckResult]: Stem: 217#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 218#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 213#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 211#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 212#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 214#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 223#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 222#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 221#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 220#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 219#L25-3 assume !(main_~i~0#1 < 1023); 215#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 216#L30-4 [2023-11-26 11:45:10,652 INFO L750 eck$LassoCheckResult]: Loop: 216#L30-4 call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 209#L30-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 210#L30-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 216#L30-4 [2023-11-26 11:45:10,652 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:10,652 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2023-11-26 11:45:10,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:10,653 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682901768] [2023-11-26 11:45:10,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:10,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:10,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:10,831 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:10,832 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:10,832 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682901768] [2023-11-26 11:45:10,832 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [682901768] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:45:10,832 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [707180066] [2023-11-26 11:45:10,833 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 11:45:10,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:45:10,834 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:10,837 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:45:10,864 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2023-11-26 11:45:10,921 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 11:45:10,922 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:45:10,927 INFO L262 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 11:45:10,930 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:45:10,979 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:10,979 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:45:11,064 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:11,064 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [707180066] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:45:11,064 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:45:11,064 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-26 11:45:11,065 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [84505853] [2023-11-26 11:45:11,065 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:45:11,065 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:45:11,066 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:11,066 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 3 times [2023-11-26 11:45:11,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:11,066 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564063607] [2023-11-26 11:45:11,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:11,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:11,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:11,072 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:11,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:11,076 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:11,118 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:45:11,118 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-26 11:45:11,119 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2023-11-26 11:45:11,119 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:11,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:45:11,243 INFO L93 Difference]: Finished difference Result 57 states and 58 transitions. [2023-11-26 11:45:11,243 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 58 transitions. [2023-11-26 11:45:11,248 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:11,253 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 57 states and 58 transitions. [2023-11-26 11:45:11,253 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 37 [2023-11-26 11:45:11,254 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 37 [2023-11-26 11:45:11,254 INFO L73 IsDeterministic]: Start isDeterministic. Operand 57 states and 58 transitions. [2023-11-26 11:45:11,255 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:45:11,255 INFO L218 hiAutomatonCegarLoop]: Abstraction has 57 states and 58 transitions. [2023-11-26 11:45:11,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states and 58 transitions. [2023-11-26 11:45:11,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 27. [2023-11-26 11:45:11,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:11,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2023-11-26 11:45:11,262 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2023-11-26 11:45:11,262 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-26 11:45:11,264 INFO L428 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2023-11-26 11:45:11,265 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 11:45:11,266 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2023-11-26 11:45:11,268 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:11,269 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:11,269 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:11,270 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2023-11-26 11:45:11,270 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:45:11,271 INFO L748 eck$LassoCheckResult]: Stem: 371#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 372#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 367#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 365#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 366#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 368#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 389#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 388#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 387#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 386#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 385#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 384#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 383#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 382#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 381#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 380#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 379#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 378#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 377#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 376#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 375#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 374#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 373#L25-3 assume !(main_~i~0#1 < 1023); 369#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 370#L30-4 [2023-11-26 11:45:11,271 INFO L750 eck$LassoCheckResult]: Loop: 370#L30-4 call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 363#L30-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 364#L30-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 370#L30-4 [2023-11-26 11:45:11,271 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:11,271 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2023-11-26 11:45:11,272 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:11,272 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275827435] [2023-11-26 11:45:11,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:11,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:11,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:11,601 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:11,602 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:11,602 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1275827435] [2023-11-26 11:45:11,602 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1275827435] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:45:11,602 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [429015277] [2023-11-26 11:45:11,602 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 11:45:11,603 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:45:11,603 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:11,608 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:45:11,611 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2023-11-26 11:45:11,780 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2023-11-26 11:45:11,781 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:45:11,783 INFO L262 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-26 11:45:11,785 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:45:11,846 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:11,846 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:45:12,123 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:12,123 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [429015277] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:45:12,124 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:45:12,124 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2023-11-26 11:45:12,124 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [549177368] [2023-11-26 11:45:12,124 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:45:12,125 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:45:12,125 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:12,125 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 4 times [2023-11-26 11:45:12,126 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:12,126 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561909541] [2023-11-26 11:45:12,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:12,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:12,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:12,133 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:12,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:12,138 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:12,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:45:12,182 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-26 11:45:12,183 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2023-11-26 11:45:12,183 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:12,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:45:12,445 INFO L93 Difference]: Finished difference Result 117 states and 118 transitions. [2023-11-26 11:45:12,445 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117 states and 118 transitions. [2023-11-26 11:45:12,453 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:12,456 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117 states to 117 states and 118 transitions. [2023-11-26 11:45:12,457 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 73 [2023-11-26 11:45:12,457 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 73 [2023-11-26 11:45:12,457 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 118 transitions. [2023-11-26 11:45:12,459 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:45:12,459 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 118 transitions. [2023-11-26 11:45:12,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 118 transitions. [2023-11-26 11:45:12,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 51. [2023-11-26 11:45:12,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:12,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2023-11-26 11:45:12,471 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2023-11-26 11:45:12,471 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2023-11-26 11:45:12,473 INFO L428 stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2023-11-26 11:45:12,474 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 11:45:12,475 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2023-11-26 11:45:12,479 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:12,479 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:12,479 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:12,482 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2023-11-26 11:45:12,482 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:45:12,482 INFO L748 eck$LassoCheckResult]: Stem: 681#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 682#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 677#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 675#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 676#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 678#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 723#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 722#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 721#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 720#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 719#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 718#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 717#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 716#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 715#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 714#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 713#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 712#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 711#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 710#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 709#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 708#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 707#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 706#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 705#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 704#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 703#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 702#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 701#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 700#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 699#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 698#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 697#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 696#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 695#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 694#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 693#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 692#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 691#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 690#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 689#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 688#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 687#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 686#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 685#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 684#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 683#L25-3 assume !(main_~i~0#1 < 1023); 679#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 680#L30-4 [2023-11-26 11:45:12,482 INFO L750 eck$LassoCheckResult]: Loop: 680#L30-4 call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 673#L30-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 674#L30-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 680#L30-4 [2023-11-26 11:45:12,484 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:12,484 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2023-11-26 11:45:12,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:12,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1494269599] [2023-11-26 11:45:12,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:12,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:12,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:13,206 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:13,207 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:13,207 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1494269599] [2023-11-26 11:45:13,207 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1494269599] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:45:13,208 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [734965805] [2023-11-26 11:45:13,208 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-26 11:45:13,208 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:45:13,208 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:13,211 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:45:13,236 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2023-11-26 11:45:13,356 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-26 11:45:13,356 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:45:13,358 INFO L262 TraceCheckSpWp]: Trace formula consists of 284 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-26 11:45:13,362 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:45:13,493 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:13,493 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:45:14,432 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:14,433 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [734965805] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:45:14,433 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:45:14,433 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2023-11-26 11:45:14,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1242028066] [2023-11-26 11:45:14,433 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:45:14,434 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:45:14,434 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:14,435 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 5 times [2023-11-26 11:45:14,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:14,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881082033] [2023-11-26 11:45:14,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:14,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:14,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:14,441 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:14,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:14,444 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:14,492 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:45:14,493 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2023-11-26 11:45:14,495 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2023-11-26 11:45:14,495 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:15,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:45:15,114 INFO L93 Difference]: Finished difference Result 237 states and 238 transitions. [2023-11-26 11:45:15,114 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 237 states and 238 transitions. [2023-11-26 11:45:15,116 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:15,119 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 237 states to 237 states and 238 transitions. [2023-11-26 11:45:15,119 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 145 [2023-11-26 11:45:15,119 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 145 [2023-11-26 11:45:15,119 INFO L73 IsDeterministic]: Start isDeterministic. Operand 237 states and 238 transitions. [2023-11-26 11:45:15,121 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:45:15,121 INFO L218 hiAutomatonCegarLoop]: Abstraction has 237 states and 238 transitions. [2023-11-26 11:45:15,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states and 238 transitions. [2023-11-26 11:45:15,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 99. [2023-11-26 11:45:15,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:15,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2023-11-26 11:45:15,129 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2023-11-26 11:45:15,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-26 11:45:15,130 INFO L428 stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2023-11-26 11:45:15,130 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 11:45:15,130 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2023-11-26 11:45:15,131 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:15,131 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:15,131 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:15,134 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2023-11-26 11:45:15,134 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:45:15,135 INFO L748 eck$LassoCheckResult]: Stem: 1303#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 1304#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 1299#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1297#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1298#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1300#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1393#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1392#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1391#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1390#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1389#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1388#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1387#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1386#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1385#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1384#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1383#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1382#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1381#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1380#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1379#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1378#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1377#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1376#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1375#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1374#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1373#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1372#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1371#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1370#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1369#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1368#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1367#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1366#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1365#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1364#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1363#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1362#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1361#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1360#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1359#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1358#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1357#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1356#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1355#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1354#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1353#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1352#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1351#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1350#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1349#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1348#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1347#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1346#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1345#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1344#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1343#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1342#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1341#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1340#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1339#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1338#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1337#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1336#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1335#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1334#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1333#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1332#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1331#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1330#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1329#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1328#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1327#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1326#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1325#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1324#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1323#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1322#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1321#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1320#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1319#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1318#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1317#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1316#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1315#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1314#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1313#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1312#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1311#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1310#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1309#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1308#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1307#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1306#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1305#L25-3 assume !(main_~i~0#1 < 1023); 1301#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 1302#L30-4 [2023-11-26 11:45:15,135 INFO L750 eck$LassoCheckResult]: Loop: 1302#L30-4 call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 1295#L30-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 1296#L30-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1302#L30-4 [2023-11-26 11:45:15,136 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:15,136 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2023-11-26 11:45:15,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:15,136 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [566109613] [2023-11-26 11:45:15,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:15,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:15,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:17,770 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:17,770 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:17,770 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [566109613] [2023-11-26 11:45:17,771 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [566109613] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:45:17,771 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [800835582] [2023-11-26 11:45:17,771 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-26 11:45:17,771 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:45:17,771 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:17,779 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:45:17,804 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2023-11-26 11:45:41,039 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2023-11-26 11:45:41,039 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:45:41,064 INFO L262 TraceCheckSpWp]: Trace formula consists of 548 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-26 11:45:41,071 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:45:41,286 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:41,287 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:45:44,701 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:44,702 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [800835582] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:45:44,702 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:45:44,702 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2023-11-26 11:45:44,702 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1188550729] [2023-11-26 11:45:44,703 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:45:44,704 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:45:44,704 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:44,705 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 6 times [2023-11-26 11:45:44,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:44,705 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088622901] [2023-11-26 11:45:44,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:44,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:44,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:44,710 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:44,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:44,714 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:44,753 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:45:44,755 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2023-11-26 11:45:44,759 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2023-11-26 11:45:44,759 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 1.9896907216494846) internal successors, (193), 97 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:47,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:45:47,148 INFO L93 Difference]: Finished difference Result 477 states and 478 transitions. [2023-11-26 11:45:47,148 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 477 states and 478 transitions. [2023-11-26 11:45:47,153 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:47,157 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 477 states to 477 states and 478 transitions. [2023-11-26 11:45:47,157 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 289 [2023-11-26 11:45:47,158 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 289 [2023-11-26 11:45:47,158 INFO L73 IsDeterministic]: Start isDeterministic. Operand 477 states and 478 transitions. [2023-11-26 11:45:47,159 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:45:47,160 INFO L218 hiAutomatonCegarLoop]: Abstraction has 477 states and 478 transitions. [2023-11-26 11:45:47,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 477 states and 478 transitions. [2023-11-26 11:45:47,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 477 to 195. [2023-11-26 11:45:47,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:47,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions. [2023-11-26 11:45:47,173 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2023-11-26 11:45:47,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2023-11-26 11:45:47,175 INFO L428 stractBuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2023-11-26 11:45:47,175 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 11:45:47,175 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions. [2023-11-26 11:45:47,176 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-26 11:45:47,177 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:47,177 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:47,184 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2023-11-26 11:45:47,185 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:45:47,185 INFO L748 eck$LassoCheckResult]: Stem: 2549#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 2550#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 2545#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2543#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2544#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2546#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2735#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2734#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2733#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2732#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2731#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2730#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2729#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2728#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2727#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2726#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2725#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2724#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2723#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2722#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2721#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2720#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2719#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2718#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2717#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2716#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2715#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2714#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2713#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2712#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2711#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2710#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2709#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2708#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2707#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2706#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2705#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2704#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2703#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2702#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2701#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2700#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2699#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2698#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2697#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2696#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2695#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2694#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2693#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2692#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2691#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2690#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2689#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2688#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2687#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2686#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2685#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2684#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2683#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2682#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2681#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2680#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2679#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2678#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2677#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2676#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2675#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2674#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2673#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2672#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2671#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2670#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2669#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2668#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2667#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2666#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2665#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2664#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2663#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2662#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2661#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2660#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2659#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2658#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2657#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2656#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2655#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2654#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2653#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2652#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2651#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2650#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2649#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2648#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2647#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2646#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2645#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2644#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2643#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2642#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2641#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2640#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2639#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2638#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2637#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2636#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2635#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2634#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2633#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2632#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2631#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2630#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2629#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2628#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2627#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2626#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2625#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2624#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2623#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2622#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2621#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2620#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2619#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2618#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2617#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2616#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2615#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2614#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2613#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2612#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2611#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2610#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2609#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2608#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2607#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2606#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2605#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2604#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2603#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2602#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2601#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2600#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2599#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2598#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2597#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2596#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2595#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2594#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2593#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2592#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2591#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2590#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2589#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2588#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2587#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2586#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2585#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2584#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2583#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2582#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2581#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2580#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2579#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2578#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2577#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2576#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2575#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2574#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2573#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2572#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2571#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2570#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2569#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2568#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2567#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2566#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2565#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2564#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2563#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2562#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2561#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2560#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2559#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2558#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2557#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2556#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2555#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2554#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2553#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2552#L25-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2551#L25-3 assume !(main_~i~0#1 < 1023); 2547#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 2548#L30-4 [2023-11-26 11:45:47,186 INFO L750 eck$LassoCheckResult]: Loop: 2548#L30-4 call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 2541#L30-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 2542#L30-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2548#L30-4 [2023-11-26 11:45:47,186 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:47,187 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2023-11-26 11:45:47,187 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:47,187 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [323980533] [2023-11-26 11:45:47,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:47,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:47,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:55,417 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:55,418 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:55,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [323980533] [2023-11-26 11:45:55,418 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [323980533] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:45:55,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [825422888] [2023-11-26 11:45:55,419 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-26 11:45:55,419 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:45:55,419 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:55,428 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:45:55,430 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fa01b2d5-96a6-4658-bdbc-ce2cc7557473/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process