./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 09dc663f7f76eee13b6af61297831e3fbddcb16c16389bf8d94f2d27048733d0 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 12:04:39,658 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 12:04:39,753 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 12:04:39,759 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 12:04:39,760 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 12:04:39,789 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 12:04:39,790 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 12:04:39,791 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 12:04:39,791 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 12:04:39,792 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 12:04:39,793 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 12:04:39,794 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 12:04:39,794 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 12:04:39,795 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 12:04:39,796 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 12:04:39,796 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 12:04:39,797 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 12:04:39,798 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 12:04:39,798 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 12:04:39,799 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 12:04:39,799 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 12:04:39,800 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 12:04:39,800 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 12:04:39,801 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 12:04:39,801 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 12:04:39,802 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 12:04:39,803 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 12:04:39,803 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 12:04:39,803 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 12:04:39,804 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 12:04:39,804 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 12:04:39,805 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 12:04:39,805 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 12:04:39,806 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 12:04:39,806 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 12:04:39,807 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 12:04:39,807 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 12:04:39,808 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 12:04:39,808 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 09dc663f7f76eee13b6af61297831e3fbddcb16c16389bf8d94f2d27048733d0 [2023-11-26 12:04:40,063 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 12:04:40,108 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 12:04:40,112 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 12:04:40,113 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 12:04:40,115 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 12:04:40,116 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i [2023-11-26 12:04:43,337 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 12:04:43,584 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 12:04:43,585 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/sv-benchmarks/c/array-industry-pattern/array_mul_init.i [2023-11-26 12:04:43,596 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/data/9cf915531/3186c725a895484ab68f71d151abe958/FLAG808ea0ad2 [2023-11-26 12:04:43,622 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/data/9cf915531/3186c725a895484ab68f71d151abe958 [2023-11-26 12:04:43,632 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 12:04:43,636 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 12:04:43,637 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 12:04:43,638 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 12:04:43,644 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 12:04:43,645 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:43,646 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4ae73f01 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43, skipping insertion in model container [2023-11-26 12:04:43,646 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:43,674 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 12:04:43,871 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:04:43,882 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 12:04:43,902 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:04:43,918 INFO L206 MainTranslator]: Completed translation [2023-11-26 12:04:43,919 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43 WrapperNode [2023-11-26 12:04:43,919 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 12:04:43,920 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 12:04:43,920 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 12:04:43,920 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 12:04:43,928 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:43,935 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:43,960 INFO L138 Inliner]: procedures = 16, calls = 21, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 74 [2023-11-26 12:04:43,961 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 12:04:43,962 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 12:04:43,962 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 12:04:43,962 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 12:04:43,974 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:43,974 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:43,977 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:43,993 INFO L175 MemorySlicer]: Split 11 memory accesses to 3 slices as follows [2, 4, 5]. 45 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 4 writes are split as follows [0, 2, 2]. [2023-11-26 12:04:43,993 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:43,993 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:44,000 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:44,003 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:44,005 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:44,006 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:44,009 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 12:04:44,010 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 12:04:44,010 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 12:04:44,010 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 12:04:44,011 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (1/1) ... [2023-11-26 12:04:44,021 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:44,043 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:44,059 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:44,082 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 12:04:44,105 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 12:04:44,106 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 12:04:44,106 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 12:04:44,107 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 12:04:44,107 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 12:04:44,108 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 12:04:44,109 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 12:04:44,109 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 12:04:44,109 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 12:04:44,110 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 12:04:44,110 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 12:04:44,110 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 12:04:44,110 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 12:04:44,110 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 12:04:44,254 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 12:04:44,258 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 12:04:44,518 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 12:04:44,529 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 12:04:44,529 INFO L309 CfgBuilder]: Removed 3 assume(true) statements. [2023-11-26 12:04:44,531 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:04:44 BoogieIcfgContainer [2023-11-26 12:04:44,531 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 12:04:44,533 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 12:04:44,533 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 12:04:44,538 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 12:04:44,539 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:04:44,539 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 12:04:43" (1/3) ... [2023-11-26 12:04:44,540 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2f43478f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:04:44, skipping insertion in model container [2023-11-26 12:04:44,540 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:04:44,541 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:43" (2/3) ... [2023-11-26 12:04:44,541 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2f43478f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:04:44, skipping insertion in model container [2023-11-26 12:04:44,541 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:04:44,542 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:04:44" (3/3) ... [2023-11-26 12:04:44,543 INFO L332 chiAutomizerObserver]: Analyzing ICFG array_mul_init.i [2023-11-26 12:04:44,612 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 12:04:44,612 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 12:04:44,612 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 12:04:44,612 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 12:04:44,612 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 12:04:44,612 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 12:04:44,613 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 12:04:44,613 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 12:04:44,617 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:44,635 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 14 [2023-11-26 12:04:44,635 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:44,635 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:44,640 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:04:44,640 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 12:04:44,641 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 12:04:44,641 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:44,643 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 14 [2023-11-26 12:04:44,643 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:44,644 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:44,644 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:04:44,644 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 12:04:44,652 INFO L748 eck$LassoCheckResult]: Stem: 17#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 4#L21-3true [2023-11-26 12:04:44,653 INFO L750 eck$LassoCheckResult]: Loop: 4#L21-3true assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 18#L21-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4#L21-3true [2023-11-26 12:04:44,659 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:44,659 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-26 12:04:44,670 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:44,671 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [282962738] [2023-11-26 12:04:44,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:44,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:44,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:44,776 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:44,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:44,810 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:44,813 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:44,814 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-26 12:04:44,814 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:44,814 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1908953093] [2023-11-26 12:04:44,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:44,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:44,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:44,831 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:44,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:44,845 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:44,847 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:44,847 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-26 12:04:44,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:44,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1338424349] [2023-11-26 12:04:44,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:44,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:44,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:44,888 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:44,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:44,915 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:45,555 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:04:45,556 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:04:45,556 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:04:45,557 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:04:45,557 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 12:04:45,557 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:45,558 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:04:45,558 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:04:45,559 INFO L133 ssoRankerPreferences]: Filename of dumped script: array_mul_init.i_Iteration1_Lasso [2023-11-26 12:04:45,560 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:04:45,560 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:04:45,584 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,613 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,616 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,620 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,623 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,627 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,630 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,634 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,637 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,911 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,915 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,918 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,921 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,924 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:45,926 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:46,238 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:04:46,243 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 12:04:46,245 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,245 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,252 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,287 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,303 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-26 12:04:46,305 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,306 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,306 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,306 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,313 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:04:46,313 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:04:46,345 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,355 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,356 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,356 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,358 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,366 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,380 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-26 12:04:46,381 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,381 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,382 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,382 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,386 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:04:46,386 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:04:46,424 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,429 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,429 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,429 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,431 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,435 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-26 12:04:46,435 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,449 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,450 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:04:46,450 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,450 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,450 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,451 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:04:46,452 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:04:46,476 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,486 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,486 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,487 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,489 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,497 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-26 12:04:46,499 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,513 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,513 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:04:46,514 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,514 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,514 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,515 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:04:46,515 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:04:46,532 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,536 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,537 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,537 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,539 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,545 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,546 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-26 12:04:46,557 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,558 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:04:46,558 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,558 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,558 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,559 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:04:46,559 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:04:46,568 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,573 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,573 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,574 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,575 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,589 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,596 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-26 12:04:46,601 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,601 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:04:46,601 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,601 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,601 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,602 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:04:46,602 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:04:46,608 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,612 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2023-11-26 12:04:46,613 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,613 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,617 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,632 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-26 12:04:46,633 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,646 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,646 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:04:46,647 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,647 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,647 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,648 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:04:46,648 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:04:46,657 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,666 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,666 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,666 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,668 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,681 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,694 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,694 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:04:46,694 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,694 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,695 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,695 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:04:46,695 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:04:46,696 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-26 12:04:46,712 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,721 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,722 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,722 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,725 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,730 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-26 12:04:46,731 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,743 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,743 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:04:46,744 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,744 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,744 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,744 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:04:46,745 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:04:46,746 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,749 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,750 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,750 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,751 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,752 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-26 12:04:46,759 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,770 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,770 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,770 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,770 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,774 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:04:46,774 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:04:46,796 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,803 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,804 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,804 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,806 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,817 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2023-11-26 12:04:46,818 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,831 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,831 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,831 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,831 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,835 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:04:46,836 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:04:46,849 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,856 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,857 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,857 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,858 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,867 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,880 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2023-11-26 12:04:46,881 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,881 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,881 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,881 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,885 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:04:46,885 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:04:46,904 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,913 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,914 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,914 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,915 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,926 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,940 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2023-11-26 12:04:46,941 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,941 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,941 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,941 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:46,949 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:04:46,950 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:04:46,962 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:46,972 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:46,972 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:46,973 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:46,977 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:46,985 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2023-11-26 12:04:46,985 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:46,998 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:46,998 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:46,999 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:46,999 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:47,002 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:04:47,002 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:04:47,028 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:47,037 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:47,037 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:47,037 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:47,039 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:47,050 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:47,062 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2023-11-26 12:04:47,063 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:47,063 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:04:47,063 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:47,063 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:47,063 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:47,064 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:04:47,064 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:04:47,080 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:47,088 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:47,089 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:47,089 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:47,090 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:47,097 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2023-11-26 12:04:47,098 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:47,110 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:47,111 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:47,111 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:47,111 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:47,114 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:04:47,114 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:04:47,134 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:47,142 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:47,143 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:47,143 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:47,144 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:47,151 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2023-11-26 12:04:47,151 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:47,164 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:47,164 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:47,164 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:47,164 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:47,168 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:04:47,168 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:04:47,184 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:47,193 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:47,193 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:47,193 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:47,194 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:47,206 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2023-11-26 12:04:47,207 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:47,220 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:47,220 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:04:47,220 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:47,220 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:47,220 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:47,221 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:04:47,221 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:04:47,231 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:04:47,235 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:47,235 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:47,236 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:47,237 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:47,246 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:04:47,260 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:04:47,260 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:04:47,260 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:04:47,260 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:04:47,262 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2023-11-26 12:04:47,275 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:04:47,275 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:04:47,292 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 12:04:47,323 INFO L443 ModelExtractionUtils]: Simplification made 7 calls to the SMT solver. [2023-11-26 12:04:47,323 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 16 variables to zero. [2023-11-26 12:04:47,325 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:47,326 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:47,373 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:47,407 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 12:04:47,419 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2023-11-26 12:04:47,436 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-26 12:04:47,436 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 12:04:47,437 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#b~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 199999*v_rep(select #length ULTIMATE.start_main_~#b~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2023-11-26 12:04:47,464 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Ended with exit code 0 [2023-11-26 12:04:47,520 INFO L156 tatePredicateManager]: 8 out of 8 supporting invariants were superfluous and have been removed [2023-11-26 12:04:47,540 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#b~0!base] could not be translated [2023-11-26 12:04:47,576 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:47,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:47,601 INFO L262 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 12:04:47,602 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:04:47,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:47,622 INFO L262 TraceCheckSpWp]: Trace formula consists of 21 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 12:04:47,622 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:04:47,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:04:47,724 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 12:04:47,726 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:47,789 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 43 states and 63 transitions. Complement of second has 8 states. [2023-11-26 12:04:47,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 12:04:47,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:47,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 31 transitions. [2023-11-26 12:04:47,799 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 31 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-26 12:04:47,800 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:04:47,800 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 31 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-26 12:04:47,800 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:04:47,800 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 31 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-26 12:04:47,800 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:04:47,801 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 63 transitions. [2023-11-26 12:04:47,805 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-26 12:04:47,810 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 19 states and 27 transitions. [2023-11-26 12:04:47,811 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2023-11-26 12:04:47,811 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2023-11-26 12:04:47,812 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 27 transitions. [2023-11-26 12:04:47,813 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:04:47,815 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 27 transitions. [2023-11-26 12:04:47,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 27 transitions. [2023-11-26 12:04:47,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2023-11-26 12:04:47,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:47,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 27 transitions. [2023-11-26 12:04:47,847 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 27 transitions. [2023-11-26 12:04:47,847 INFO L428 stractBuchiCegarLoop]: Abstraction has 19 states and 27 transitions. [2023-11-26 12:04:47,848 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 12:04:47,848 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 27 transitions. [2023-11-26 12:04:47,851 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-26 12:04:47,852 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:47,853 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:47,853 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-26 12:04:47,854 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:04:47,854 INFO L748 eck$LassoCheckResult]: Stem: 154#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 145#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 138#L21-3 assume !(main_~i~0#1 < 100000); 139#L21-4 main_~i~0#1 := 0; 152#L26-3 [2023-11-26 12:04:47,854 INFO L750 eck$LassoCheckResult]: Loop: 152#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 153#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 151#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 152#L26-3 [2023-11-26 12:04:47,859 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:47,859 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2023-11-26 12:04:47,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:47,861 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585994019] [2023-11-26 12:04:47,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:47,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:47,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:47,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:04:47,945 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:04:47,946 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1585994019] [2023-11-26 12:04:47,946 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1585994019] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:04:47,946 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:04:47,947 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 12:04:47,947 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1463474219] [2023-11-26 12:04:47,948 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:04:47,950 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:04:47,950 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:47,950 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 1 times [2023-11-26 12:04:47,951 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:47,951 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1403207692] [2023-11-26 12:04:47,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:47,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:47,958 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:04:47,958 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1827279251] [2023-11-26 12:04:47,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:47,958 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:04:47,959 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:47,960 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:04:47,977 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2023-11-26 12:04:48,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:48,010 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:48,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:48,019 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:48,141 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:04:48,143 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 12:04:48,143 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 12:04:48,144 INFO L87 Difference]: Start difference. First operand 19 states and 27 transitions. cyclomatic complexity: 11 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:48,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:04:48,188 INFO L93 Difference]: Finished difference Result 30 states and 36 transitions. [2023-11-26 12:04:48,188 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 36 transitions. [2023-11-26 12:04:48,189 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:04:48,190 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 26 states and 32 transitions. [2023-11-26 12:04:48,191 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2023-11-26 12:04:48,191 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2023-11-26 12:04:48,191 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 32 transitions. [2023-11-26 12:04:48,191 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:04:48,192 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 32 transitions. [2023-11-26 12:04:48,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 32 transitions. [2023-11-26 12:04:48,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 17. [2023-11-26 12:04:48,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:48,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2023-11-26 12:04:48,194 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2023-11-26 12:04:48,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 12:04:48,196 INFO L428 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2023-11-26 12:04:48,196 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 12:04:48,196 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2023-11-26 12:04:48,197 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:04:48,197 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:48,197 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:48,198 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:04:48,198 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:04:48,198 INFO L748 eck$LassoCheckResult]: Stem: 206#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 199#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 191#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 192#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 193#L21-3 assume !(main_~i~0#1 < 100000); 194#L21-4 main_~i~0#1 := 0; 207#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 205#L28 [2023-11-26 12:04:48,198 INFO L750 eck$LassoCheckResult]: Loop: 205#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 202#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 203#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 205#L28 [2023-11-26 12:04:48,199 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:48,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1809669547, now seen corresponding path program 1 times [2023-11-26 12:04:48,199 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:48,199 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [752424329] [2023-11-26 12:04:48,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:48,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:48,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:48,265 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:04:48,265 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:04:48,265 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [752424329] [2023-11-26 12:04:48,265 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [752424329] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:04:48,265 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2109062093] [2023-11-26 12:04:48,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:48,266 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:04:48,266 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:48,269 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:04:48,278 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2023-11-26 12:04:48,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:48,342 INFO L262 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 12:04:48,344 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:04:48,377 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:04:48,378 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 12:04:48,384 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2023-11-26 12:04:48,406 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:04:48,407 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2109062093] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 12:04:48,407 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 12:04:48,407 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-26 12:04:48,407 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1403109847] [2023-11-26 12:04:48,408 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 12:04:48,408 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:04:48,408 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:48,409 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 2 times [2023-11-26 12:04:48,409 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:48,409 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2040310792] [2023-11-26 12:04:48,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:48,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:48,414 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:04:48,415 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1163627414] [2023-11-26 12:04:48,415 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 12:04:48,415 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:04:48,416 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:48,417 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:04:48,437 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2023-11-26 12:04:48,475 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2023-11-26 12:04:48,475 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-26 12:04:48,476 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:48,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:48,491 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:48,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:04:48,634 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 12:04:48,634 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-26 12:04:48,634 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:48,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:04:48,767 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2023-11-26 12:04:48,767 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2023-11-26 12:04:48,769 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:04:48,770 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2023-11-26 12:04:48,770 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2023-11-26 12:04:48,770 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2023-11-26 12:04:48,771 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2023-11-26 12:04:48,771 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:04:48,771 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2023-11-26 12:04:48,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2023-11-26 12:04:48,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 32. [2023-11-26 12:04:48,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.21875) internal successors, (39), 31 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:48,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 39 transitions. [2023-11-26 12:04:48,775 INFO L240 hiAutomatonCegarLoop]: Abstraction has 32 states and 39 transitions. [2023-11-26 12:04:48,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 12:04:48,781 INFO L428 stractBuchiCegarLoop]: Abstraction has 32 states and 39 transitions. [2023-11-26 12:04:48,781 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 12:04:48,781 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 39 transitions. [2023-11-26 12:04:48,783 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:04:48,784 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:48,784 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:48,785 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 3, 1, 1, 1, 1] [2023-11-26 12:04:48,785 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:04:48,786 INFO L748 eck$LassoCheckResult]: Stem: 320#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 313#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 305#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 306#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 307#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 308#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 332#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 330#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 328#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 326#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 325#L21-3 assume !(main_~i~0#1 < 100000); 321#L21-4 main_~i~0#1 := 0; 322#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 319#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 316#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 317#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 336#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 335#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 334#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 333#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 331#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 329#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 324#L28 [2023-11-26 12:04:48,786 INFO L750 eck$LassoCheckResult]: Loop: 324#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 327#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 323#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 324#L28 [2023-11-26 12:04:48,786 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:48,786 INFO L85 PathProgramCache]: Analyzing trace with hash -1950889807, now seen corresponding path program 1 times [2023-11-26 12:04:48,787 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:48,787 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1031093082] [2023-11-26 12:04:48,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:48,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:48,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:49,042 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2023-11-26 12:04:49,043 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:04:49,044 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1031093082] [2023-11-26 12:04:49,045 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1031093082] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:04:49,045 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1980047744] [2023-11-26 12:04:49,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:49,045 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:04:49,045 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:49,050 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:04:49,064 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2023-11-26 12:04:49,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:49,131 INFO L262 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 12:04:49,135 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:04:49,177 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2023-11-26 12:04:49,178 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 12:04:49,251 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2023-11-26 12:04:49,251 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1980047744] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 12:04:49,251 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 12:04:49,252 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-26 12:04:49,252 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2145307322] [2023-11-26 12:04:49,252 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 12:04:49,253 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:04:49,253 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:49,253 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 3 times [2023-11-26 12:04:49,253 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:49,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266174017] [2023-11-26 12:04:49,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:49,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:49,260 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:04:49,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2113949933] [2023-11-26 12:04:49,260 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 12:04:49,260 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:04:49,261 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:49,264 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:04:49,279 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2023-11-26 12:04:49,317 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2023-11-26 12:04:49,317 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-26 12:04:49,318 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:49,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:49,327 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:49,458 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:04:49,458 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-26 12:04:49,458 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2023-11-26 12:04:49,459 INFO L87 Difference]: Start difference. First operand 32 states and 39 transitions. cyclomatic complexity: 10 Second operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 13 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:49,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:04:49,741 INFO L93 Difference]: Finished difference Result 117 states and 139 transitions. [2023-11-26 12:04:49,741 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117 states and 139 transitions. [2023-11-26 12:04:49,748 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:04:49,750 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117 states to 117 states and 139 transitions. [2023-11-26 12:04:49,750 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 97 [2023-11-26 12:04:49,751 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2023-11-26 12:04:49,751 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 139 transitions. [2023-11-26 12:04:49,752 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:04:49,752 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 139 transitions. [2023-11-26 12:04:49,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 139 transitions. [2023-11-26 12:04:49,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 62. [2023-11-26 12:04:49,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.2096774193548387) internal successors, (75), 61 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:49,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 75 transitions. [2023-11-26 12:04:49,759 INFO L240 hiAutomatonCegarLoop]: Abstraction has 62 states and 75 transitions. [2023-11-26 12:04:49,759 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-26 12:04:49,760 INFO L428 stractBuchiCegarLoop]: Abstraction has 62 states and 75 transitions. [2023-11-26 12:04:49,760 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 12:04:49,761 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 75 transitions. [2023-11-26 12:04:49,762 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:04:49,762 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:49,762 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:49,764 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 9, 9, 1, 1, 1, 1] [2023-11-26 12:04:49,764 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:04:49,765 INFO L748 eck$LassoCheckResult]: Stem: 611#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 604#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 598#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 599#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 600#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 601#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 612#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 647#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 645#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 643#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 641#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 639#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 637#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 635#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 633#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 631#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 629#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 627#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 625#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 623#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 621#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 619#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 618#L21-3 assume !(main_~i~0#1 < 100000); 613#L21-4 main_~i~0#1 := 0; 614#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 610#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 607#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 608#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 615#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 657#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 656#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 655#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 654#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 653#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 652#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 651#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 650#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 649#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 648#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 646#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 644#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 642#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 640#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 638#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 636#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 634#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 632#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 630#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 628#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 626#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 624#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 622#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 617#L28 [2023-11-26 12:04:49,765 INFO L750 eck$LassoCheckResult]: Loop: 617#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 620#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 616#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 617#L28 [2023-11-26 12:04:49,765 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:49,766 INFO L85 PathProgramCache]: Analyzing trace with hash 403223997, now seen corresponding path program 2 times [2023-11-26 12:04:49,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:49,766 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886483018] [2023-11-26 12:04:49,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:49,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:49,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:50,212 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2023-11-26 12:04:50,213 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:04:50,213 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1886483018] [2023-11-26 12:04:50,214 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1886483018] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:04:50,214 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [536042311] [2023-11-26 12:04:50,214 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 12:04:50,215 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:04:50,215 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:50,220 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:04:50,238 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2023-11-26 12:04:50,351 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 12:04:50,351 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 12:04:50,354 INFO L262 TraceCheckSpWp]: Trace formula consists of 280 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-26 12:04:50,359 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:04:50,434 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2023-11-26 12:04:50,434 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 12:04:50,713 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2023-11-26 12:04:50,714 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [536042311] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 12:04:50,714 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 12:04:50,714 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2023-11-26 12:04:50,714 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127761631] [2023-11-26 12:04:50,714 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 12:04:50,716 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:04:50,716 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:50,716 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 4 times [2023-11-26 12:04:50,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:50,716 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006593900] [2023-11-26 12:04:50,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:50,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:50,722 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:04:50,723 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [673811199] [2023-11-26 12:04:50,723 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-26 12:04:50,723 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:04:50,723 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:50,727 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:04:50,756 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2023-11-26 12:04:50,784 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-26 12:04:50,785 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-26 12:04:50,785 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:50,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:50,793 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:50,921 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:04:50,922 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-26 12:04:50,922 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2023-11-26 12:04:50,923 INFO L87 Difference]: Start difference. First operand 62 states and 75 transitions. cyclomatic complexity: 16 Second operand has 25 states, 25 states have (on average 2.08) internal successors, (52), 25 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:51,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:04:51,511 INFO L93 Difference]: Finished difference Result 249 states and 295 transitions. [2023-11-26 12:04:51,511 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 249 states and 295 transitions. [2023-11-26 12:04:51,522 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:04:51,529 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 249 states to 249 states and 295 transitions. [2023-11-26 12:04:51,529 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 205 [2023-11-26 12:04:51,531 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 205 [2023-11-26 12:04:51,531 INFO L73 IsDeterministic]: Start isDeterministic. Operand 249 states and 295 transitions. [2023-11-26 12:04:51,537 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:04:51,538 INFO L218 hiAutomatonCegarLoop]: Abstraction has 249 states and 295 transitions. [2023-11-26 12:04:51,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states and 295 transitions. [2023-11-26 12:04:51,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 122. [2023-11-26 12:04:51,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 122 states, 122 states have (on average 1.2049180327868851) internal successors, (147), 121 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:51,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 147 transitions. [2023-11-26 12:04:51,563 INFO L240 hiAutomatonCegarLoop]: Abstraction has 122 states and 147 transitions. [2023-11-26 12:04:51,564 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2023-11-26 12:04:51,564 INFO L428 stractBuchiCegarLoop]: Abstraction has 122 states and 147 transitions. [2023-11-26 12:04:51,566 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 12:04:51,566 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 122 states and 147 transitions. [2023-11-26 12:04:51,567 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:04:51,567 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:51,567 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:51,572 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 22, 21, 21, 1, 1, 1, 1] [2023-11-26 12:04:51,572 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:04:51,573 INFO L748 eck$LassoCheckResult]: Stem: 1257#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 1249#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 1241#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1242#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1243#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1244#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1342#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1340#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1338#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1336#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1334#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1332#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1330#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1328#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1326#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1324#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1322#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1320#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1318#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1316#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1314#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1312#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1310#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1308#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1306#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1304#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1302#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1300#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1298#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1296#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1294#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1292#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1290#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1288#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1286#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1284#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1282#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1280#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1278#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1276#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1274#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1272#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1270#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1268#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1266#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1264#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1263#L21-3 assume !(main_~i~0#1 < 100000); 1258#L21-4 main_~i~0#1 := 0; 1259#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1260#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1252#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1253#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1255#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1256#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1362#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1361#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1360#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1359#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1358#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1357#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1356#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1355#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1354#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1353#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1352#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1351#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1350#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1349#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1348#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1347#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1346#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1345#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1344#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1343#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1341#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1339#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1337#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1335#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1333#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1331#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1329#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1327#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1325#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1323#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1321#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1319#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1317#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1315#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1313#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1311#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1309#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1307#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1305#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1303#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1301#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1299#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1297#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1295#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1293#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1291#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1289#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1287#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1285#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1283#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1281#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1279#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1277#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1275#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1273#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1271#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1269#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1267#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1262#L28 [2023-11-26 12:04:51,577 INFO L750 eck$LassoCheckResult]: Loop: 1262#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1265#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1261#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 1262#L28 [2023-11-26 12:04:51,578 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:51,578 INFO L85 PathProgramCache]: Analyzing trace with hash 615339989, now seen corresponding path program 3 times [2023-11-26 12:04:51,578 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:51,578 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327693046] [2023-11-26 12:04:51,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:51,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:51,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:52,862 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2023-11-26 12:04:52,862 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:04:52,862 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [327693046] [2023-11-26 12:04:52,862 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [327693046] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:04:52,862 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1501328775] [2023-11-26 12:04:52,862 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 12:04:52,863 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:04:52,863 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:52,867 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:04:52,892 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2023-11-26 12:05:01,341 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 23 check-sat command(s) [2023-11-26 12:05:01,341 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 12:05:01,349 INFO L262 TraceCheckSpWp]: Trace formula consists of 568 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-26 12:05:01,357 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:01,519 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2023-11-26 12:05:01,519 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 12:05:02,645 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2023-11-26 12:05:02,645 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1501328775] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 12:05:02,645 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 12:05:02,645 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2023-11-26 12:05:02,645 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136263371] [2023-11-26 12:05:02,646 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 12:05:02,647 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:05:02,647 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:02,647 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 5 times [2023-11-26 12:05:02,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:02,647 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312993877] [2023-11-26 12:05:02,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:02,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:02,656 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:02,657 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1380321329] [2023-11-26 12:05:02,657 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-26 12:05:02,657 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:02,657 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:02,664 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:02,684 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2023-11-26 12:05:02,745 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2023-11-26 12:05:02,745 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-26 12:05:02,746 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:02,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:02,755 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:02,885 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:02,886 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2023-11-26 12:05:02,887 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2023-11-26 12:05:02,888 INFO L87 Difference]: Start difference. First operand 122 states and 147 transitions. cyclomatic complexity: 28 Second operand has 49 states, 49 states have (on average 2.0408163265306123) internal successors, (100), 49 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:04,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:04,459 INFO L93 Difference]: Finished difference Result 513 states and 607 transitions. [2023-11-26 12:05:04,459 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 513 states and 607 transitions. [2023-11-26 12:05:04,465 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:05:04,471 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 513 states to 513 states and 607 transitions. [2023-11-26 12:05:04,471 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 421 [2023-11-26 12:05:04,471 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 421 [2023-11-26 12:05:04,472 INFO L73 IsDeterministic]: Start isDeterministic. Operand 513 states and 607 transitions. [2023-11-26 12:05:04,473 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:04,474 INFO L218 hiAutomatonCegarLoop]: Abstraction has 513 states and 607 transitions. [2023-11-26 12:05:04,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 513 states and 607 transitions. [2023-11-26 12:05:04,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 242. [2023-11-26 12:05:04,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 242 states, 242 states have (on average 1.2024793388429753) internal successors, (291), 241 states have internal predecessors, (291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:04,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 291 transitions. [2023-11-26 12:05:04,494 INFO L240 hiAutomatonCegarLoop]: Abstraction has 242 states and 291 transitions. [2023-11-26 12:05:04,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-26 12:05:04,496 INFO L428 stractBuchiCegarLoop]: Abstraction has 242 states and 291 transitions. [2023-11-26 12:05:04,496 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 12:05:04,496 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 242 states and 291 transitions. [2023-11-26 12:05:04,498 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:05:04,498 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:04,499 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:04,506 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 46, 45, 45, 1, 1, 1, 1] [2023-11-26 12:05:04,510 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:05:04,511 INFO L748 eck$LassoCheckResult]: Stem: 2610#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 2602#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 2594#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2595#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2596#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2597#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2791#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2789#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2787#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2785#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2783#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2781#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2779#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2777#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2775#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2773#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2771#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2769#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2767#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2765#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2763#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2761#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2759#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2757#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2755#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2753#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2751#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2749#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2747#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2745#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2743#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2741#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2739#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2737#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2735#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2733#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2731#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2729#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2727#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2725#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2723#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2721#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2719#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2717#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2715#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2713#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2711#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2709#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2707#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2705#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2703#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2701#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2699#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2697#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2695#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2693#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2691#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2689#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2687#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2685#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2683#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2681#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2679#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2677#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2675#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2673#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2671#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2669#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2667#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2665#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2663#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2661#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2659#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2657#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2655#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2653#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2651#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2649#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2647#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2645#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2643#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2641#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2639#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2637#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2635#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2633#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2631#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2629#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2627#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2625#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2623#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2621#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2619#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2617#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2616#L21-3 assume !(main_~i~0#1 < 100000); 2611#L21-4 main_~i~0#1 := 0; 2612#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2613#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2605#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2606#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2608#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2609#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2835#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2834#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2833#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2832#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2831#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2830#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2829#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2828#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2827#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2826#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2825#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2824#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2823#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2822#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2821#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2820#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2819#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2818#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2817#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2816#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2815#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2814#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2813#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2812#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2811#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2810#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2809#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2808#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2807#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2806#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2805#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2804#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2803#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2802#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2801#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2800#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2799#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2798#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2797#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2796#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2795#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2794#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2793#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2792#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2790#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2788#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2786#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2784#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2782#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2780#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2778#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2776#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2774#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2772#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2770#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2768#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2766#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2764#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2762#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2760#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2758#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2756#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2754#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2752#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2750#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2748#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2746#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2744#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2742#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2740#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2738#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2736#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2734#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2732#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2730#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2728#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2726#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2724#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2722#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2720#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2718#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2716#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2714#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2712#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2710#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2708#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2706#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2704#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2702#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2700#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2698#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2696#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2694#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2692#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2690#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2688#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2686#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2684#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2682#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2680#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2678#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2676#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2674#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2672#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2670#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2668#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2666#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2664#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2662#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2660#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2658#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2656#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2654#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2652#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2650#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2648#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2646#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2644#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2642#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2640#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2638#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2636#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2634#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2632#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2630#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2628#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2626#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2624#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2622#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2620#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2615#L28 [2023-11-26 12:05:04,511 INFO L750 eck$LassoCheckResult]: Loop: 2615#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2618#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2614#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 2615#L28 [2023-11-26 12:05:04,512 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:04,512 INFO L85 PathProgramCache]: Analyzing trace with hash 982432773, now seen corresponding path program 4 times [2023-11-26 12:05:04,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:04,512 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2028629160] [2023-11-26 12:05:04,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:04,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:04,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:08,360 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2023-11-26 12:05:08,360 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:08,360 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2028629160] [2023-11-26 12:05:08,360 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2028629160] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:05:08,361 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1728363930] [2023-11-26 12:05:08,361 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-26 12:05:08,361 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:08,361 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:08,376 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:08,396 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2023-11-26 12:05:08,698 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-26 12:05:08,698 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 12:05:08,705 INFO L262 TraceCheckSpWp]: Trace formula consists of 1144 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-26 12:05:08,715 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:08,905 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2023-11-26 12:05:08,905 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 12:05:12,442 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2023-11-26 12:05:12,442 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1728363930] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 12:05:12,442 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 12:05:12,442 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2023-11-26 12:05:12,443 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1353681035] [2023-11-26 12:05:12,443 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 12:05:12,444 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:05:12,444 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:12,444 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 6 times [2023-11-26 12:05:12,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:12,444 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171241031] [2023-11-26 12:05:12,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:12,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:12,455 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:12,455 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1678712768] [2023-11-26 12:05:12,455 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-26 12:05:12,456 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:12,456 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:12,461 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:12,463 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2023-11-26 12:05:12,559 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2023-11-26 12:05:12,559 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-26 12:05:12,559 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:12,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:12,568 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:12,706 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:12,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2023-11-26 12:05:12,714 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2023-11-26 12:05:12,714 INFO L87 Difference]: Start difference. First operand 242 states and 291 transitions. cyclomatic complexity: 52 Second operand has 97 states, 97 states have (on average 2.020618556701031) internal successors, (196), 97 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:18,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:18,876 INFO L93 Difference]: Finished difference Result 1041 states and 1231 transitions. [2023-11-26 12:05:18,876 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1041 states and 1231 transitions. [2023-11-26 12:05:18,887 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:05:18,897 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1041 states to 1041 states and 1231 transitions. [2023-11-26 12:05:18,897 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 853 [2023-11-26 12:05:18,898 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 853 [2023-11-26 12:05:18,898 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1041 states and 1231 transitions. [2023-11-26 12:05:18,900 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:18,900 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1041 states and 1231 transitions. [2023-11-26 12:05:18,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1041 states and 1231 transitions. [2023-11-26 12:05:18,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1041 to 482. [2023-11-26 12:05:18,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 482 states, 482 states have (on average 1.2012448132780082) internal successors, (579), 481 states have internal predecessors, (579), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:18,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 482 states to 482 states and 579 transitions. [2023-11-26 12:05:18,929 INFO L240 hiAutomatonCegarLoop]: Abstraction has 482 states and 579 transitions. [2023-11-26 12:05:18,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2023-11-26 12:05:18,930 INFO L428 stractBuchiCegarLoop]: Abstraction has 482 states and 579 transitions. [2023-11-26 12:05:18,931 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 12:05:18,931 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 482 states and 579 transitions. [2023-11-26 12:05:18,937 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 12:05:18,937 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:18,937 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:18,951 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 94, 93, 93, 1, 1, 1, 1] [2023-11-26 12:05:18,951 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:05:18,952 INFO L748 eck$LassoCheckResult]: Stem: 5379#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 5371#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 5363#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5364#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5365#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5366#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5752#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5750#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5748#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5746#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5744#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5742#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5740#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5738#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5736#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5734#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5732#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5730#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5728#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5726#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5724#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5722#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5720#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5718#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5716#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5714#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5712#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5710#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5708#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5706#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5704#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5702#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5700#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5698#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5696#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5694#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5692#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5690#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5688#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5686#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5684#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5682#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5680#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5678#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5676#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5674#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5672#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5670#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5668#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5666#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5664#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5662#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5660#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5658#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5656#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5654#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5652#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5650#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5648#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5646#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5644#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5642#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5640#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5638#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5636#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5634#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5632#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5630#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5628#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5626#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5624#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5622#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5620#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5618#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5616#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5614#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5612#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5610#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5608#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5606#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5604#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5602#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5600#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5598#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5596#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5594#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5592#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5590#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5588#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5586#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5584#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5582#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5580#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5578#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5576#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5574#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5572#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5570#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5568#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5566#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5564#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5562#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5560#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5558#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5556#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5554#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5552#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5550#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5548#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5546#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5544#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5542#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5540#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5538#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5536#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5534#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5532#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5530#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5528#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5526#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5524#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5522#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5520#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5518#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5516#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5514#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5512#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5510#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5508#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5506#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5504#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5502#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5500#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5498#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5496#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5494#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5492#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5490#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5488#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5486#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5484#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5482#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5480#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5478#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5476#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5474#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5472#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5470#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5468#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5466#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5464#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5462#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5460#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5458#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5456#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5454#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5452#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5450#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5448#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5446#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5444#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5442#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5440#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5438#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5436#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5434#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5432#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5430#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5428#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5426#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5424#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5422#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5420#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5418#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5416#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5414#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5412#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5410#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5408#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5406#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5404#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5402#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5400#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5398#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5396#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5394#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5392#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5390#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5388#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5386#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5385#L21-3 assume !(main_~i~0#1 < 100000); 5380#L21-4 main_~i~0#1 := 0; 5381#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5382#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5374#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5375#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5377#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5378#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5844#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5843#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5842#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5841#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5840#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5839#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5838#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5837#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5836#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5835#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5834#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5833#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5832#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5831#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5830#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5829#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5828#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5827#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5826#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5825#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5824#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5823#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5822#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5821#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5820#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5819#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5818#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5817#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5816#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5815#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5814#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5813#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5812#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5811#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5810#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5809#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5808#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5807#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5806#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5805#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5804#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5803#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5802#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5801#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5800#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5799#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5798#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5797#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5796#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5795#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5794#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5793#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5792#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5791#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5790#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5789#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5788#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5787#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5786#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5785#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5784#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5783#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5782#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5781#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5780#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5779#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5778#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5777#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5776#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5775#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5774#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5773#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5772#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5771#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5770#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5769#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5768#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5767#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5766#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5765#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5764#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5763#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5762#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5761#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5760#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5759#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5758#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5757#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5756#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5755#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5754#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5753#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5751#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5749#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5747#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5745#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5743#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5741#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5739#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5737#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5735#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5733#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5731#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5729#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5727#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5725#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5723#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5721#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5719#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5717#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5715#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5713#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5711#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5709#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5707#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5705#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5703#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5701#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5699#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5697#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5695#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5693#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5691#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5689#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5687#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5685#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5683#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5681#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5679#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5677#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5675#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5673#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5671#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5669#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5667#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5665#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5663#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5661#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5659#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5657#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5655#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5653#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5651#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5649#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5647#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5645#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5643#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5641#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5639#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5637#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5635#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5633#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5631#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5629#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5627#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5625#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5623#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5621#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5619#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5617#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5615#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5613#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5611#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5609#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5607#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5605#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5603#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5601#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5599#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5597#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5595#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5593#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5591#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5589#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5587#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5585#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5583#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5581#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5579#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5577#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5575#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5573#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5571#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5569#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5567#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5565#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5563#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5561#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5559#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5557#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5555#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5553#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5551#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5549#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5547#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5545#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5543#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5541#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5539#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5537#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5535#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5533#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5531#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5529#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5527#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5525#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5523#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5521#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5519#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5517#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5515#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5513#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5511#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5509#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5507#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5505#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5503#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5501#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5499#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5497#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5495#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5493#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5491#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5489#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5487#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5485#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5483#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5481#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5479#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5477#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5475#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5473#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5471#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5469#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5467#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5465#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5463#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5461#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5459#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5457#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5455#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5453#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5451#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5449#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5447#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5445#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5443#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5441#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5439#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5437#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5435#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5433#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5431#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5429#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5427#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5425#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5423#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5421#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5419#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5417#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5415#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5413#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5411#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5409#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5407#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5405#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5403#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5401#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5399#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5397#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5395#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5393#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5391#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5389#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5384#L28 [2023-11-26 12:05:18,953 INFO L750 eck$LassoCheckResult]: Loop: 5384#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;havoc main_#t~nondet4#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5387#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5383#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1; 5384#L28 [2023-11-26 12:05:18,953 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:18,954 INFO L85 PathProgramCache]: Analyzing trace with hash 1696203877, now seen corresponding path program 5 times [2023-11-26 12:05:18,954 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:18,954 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [467161299] [2023-11-26 12:05:18,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:18,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:19,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:30,841 INFO L134 CoverageAnalysis]: Checked inductivity of 21763 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 12927 trivial. 0 not checked. [2023-11-26 12:05:30,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:30,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [467161299] [2023-11-26 12:05:30,842 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [467161299] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:05:30,842 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [35069099] [2023-11-26 12:05:30,842 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-26 12:05:30,842 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:30,842 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:30,844 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:30,847 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ea3dc16-92dc-4488-babf-3c40122700c3/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process