./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/reducercommutativity/rangesum.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/reducercommutativity/rangesum.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4dc91bf2fc8981aab63c1ee768384f1c8f580edfe4618d65089a78f799b6ddb8 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 10:44:49,111 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 10:44:49,226 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 10:44:49,238 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 10:44:49,239 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 10:44:49,278 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 10:44:49,279 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 10:44:49,280 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 10:44:49,281 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 10:44:49,287 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 10:44:49,288 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 10:44:49,289 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 10:44:49,289 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 10:44:49,292 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 10:44:49,292 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 10:44:49,293 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 10:44:49,293 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 10:44:49,294 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 10:44:49,294 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 10:44:49,295 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 10:44:49,296 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 10:44:49,296 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 10:44:49,297 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 10:44:49,297 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 10:44:49,298 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 10:44:49,298 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 10:44:49,299 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 10:44:49,299 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 10:44:49,300 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 10:44:49,300 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 10:44:49,302 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 10:44:49,302 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 10:44:49,302 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 10:44:49,303 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 10:44:49,303 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 10:44:49,303 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 10:44:49,304 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 10:44:49,305 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 10:44:49,305 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4dc91bf2fc8981aab63c1ee768384f1c8f580edfe4618d65089a78f799b6ddb8 [2023-11-26 10:44:49,597 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 10:44:49,625 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 10:44:49,630 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 10:44:49,631 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 10:44:49,632 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 10:44:49,634 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/reducercommutativity/rangesum.i [2023-11-26 10:44:52,746 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 10:44:53,060 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 10:44:53,060 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/sv-benchmarks/c/reducercommutativity/rangesum.i [2023-11-26 10:44:53,070 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/data/3ff4b9744/a08cd923cead440a9f7bf53a3b9b62c7/FLAGc47737d5e [2023-11-26 10:44:53,085 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/data/3ff4b9744/a08cd923cead440a9f7bf53a3b9b62c7 [2023-11-26 10:44:53,088 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 10:44:53,089 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 10:44:53,091 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 10:44:53,091 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 10:44:53,099 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 10:44:53,100 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,101 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@693b6a8f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53, skipping insertion in model container [2023-11-26 10:44:53,101 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,129 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 10:44:53,309 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 10:44:53,321 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 10:44:53,345 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 10:44:53,360 INFO L206 MainTranslator]: Completed translation [2023-11-26 10:44:53,361 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53 WrapperNode [2023-11-26 10:44:53,361 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 10:44:53,362 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 10:44:53,362 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 10:44:53,362 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 10:44:53,370 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,379 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,408 INFO L138 Inliner]: procedures = 17, calls = 23, calls flagged for inlining = 7, calls inlined = 7, statements flattened = 143 [2023-11-26 10:44:53,408 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 10:44:53,410 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 10:44:53,410 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 10:44:53,411 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 10:44:53,421 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,422 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,425 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,443 INFO L175 MemorySlicer]: Split 14 memory accesses to 2 slices as follows [2, 12]. 86 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 5 writes are split as follows [0, 5]. [2023-11-26 10:44:53,443 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,443 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,456 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,460 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,462 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,464 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,467 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 10:44:53,468 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 10:44:53,468 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 10:44:53,468 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 10:44:53,481 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (1/1) ... [2023-11-26 10:44:53,488 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:53,500 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:53,511 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:53,533 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 10:44:53,549 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 10:44:53,549 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 10:44:53,550 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 10:44:53,550 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 10:44:53,550 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 10:44:53,550 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 10:44:53,550 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 10:44:53,550 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 10:44:53,550 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 10:44:53,551 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 10:44:53,551 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 10:44:53,628 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 10:44:53,631 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 10:44:53,906 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 10:44:53,941 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 10:44:53,942 INFO L309 CfgBuilder]: Removed 5 assume(true) statements. [2023-11-26 10:44:53,944 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:44:53 BoogieIcfgContainer [2023-11-26 10:44:53,944 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 10:44:53,945 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 10:44:53,945 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 10:44:53,949 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 10:44:53,950 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:44:53,951 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 10:44:53" (1/3) ... [2023-11-26 10:44:53,952 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4357220e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:44:53, skipping insertion in model container [2023-11-26 10:44:53,952 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:44:53,952 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:44:53" (2/3) ... [2023-11-26 10:44:53,953 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4357220e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:44:53, skipping insertion in model container [2023-11-26 10:44:53,953 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:44:53,953 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:44:53" (3/3) ... [2023-11-26 10:44:53,955 INFO L332 chiAutomizerObserver]: Analyzing ICFG rangesum.i [2023-11-26 10:44:54,018 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 10:44:54,018 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 10:44:54,018 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 10:44:54,018 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 10:44:54,018 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 10:44:54,018 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 10:44:54,019 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 10:44:54,019 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 10:44:54,025 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 32 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:54,048 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2023-11-26 10:44:54,048 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:44:54,048 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:44:54,052 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2023-11-26 10:44:54,053 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 10:44:54,053 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 10:44:54,053 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 32 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:54,056 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2023-11-26 10:44:54,057 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:44:54,057 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:44:54,057 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2023-11-26 10:44:54,057 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 10:44:54,064 INFO L748 eck$LassoCheckResult]: Stem: 30#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 12#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 9#L44true assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 15#L18-3true [2023-11-26 10:44:54,064 INFO L750 eck$LassoCheckResult]: Loop: 15#L18-3true assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14#L18-2true init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 15#L18-3true [2023-11-26 10:44:54,071 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:54,071 INFO L85 PathProgramCache]: Analyzing trace with hash 29858, now seen corresponding path program 1 times [2023-11-26 10:44:54,082 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:54,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577726413] [2023-11-26 10:44:54,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:54,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:54,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:54,202 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:44:54,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:54,256 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:44:54,261 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:54,261 INFO L85 PathProgramCache]: Analyzing trace with hash 1379, now seen corresponding path program 1 times [2023-11-26 10:44:54,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:54,262 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213935858] [2023-11-26 10:44:54,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:54,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:54,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:54,292 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:44:54,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:54,312 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:44:54,316 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:54,317 INFO L85 PathProgramCache]: Analyzing trace with hash 28693956, now seen corresponding path program 1 times [2023-11-26 10:44:54,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:54,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295962251] [2023-11-26 10:44:54,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:54,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:54,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:54,376 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:44:54,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:54,399 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:44:54,937 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 10:44:54,938 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 10:44:54,938 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 10:44:54,939 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 10:44:54,939 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 10:44:54,939 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:54,939 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 10:44:54,940 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 10:44:54,940 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum.i_Iteration1_Lasso [2023-11-26 10:44:54,941 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 10:44:54,941 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 10:44:54,965 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:54,981 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:54,988 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:54,991 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:54,994 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:54,998 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,001 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,370 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,373 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,377 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,380 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,383 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,387 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,392 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,404 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,407 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,409 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,412 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,414 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,417 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,419 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:55,833 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 10:44:55,838 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 10:44:55,840 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:55,841 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:55,845 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:55,855 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:55,868 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-26 10:44:55,870 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:55,870 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:44:55,871 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:55,871 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:55,871 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:55,873 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:44:55,873 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:44:55,883 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:44:55,892 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:55,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:55,893 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:55,894 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:55,903 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:55,915 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:55,916 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:44:55,916 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:55,916 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:55,916 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:55,916 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-26 10:44:55,917 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:44:55,917 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:44:55,926 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:44:55,931 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:55,931 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:55,932 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:55,933 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:55,943 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:55,955 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:55,955 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:44:55,955 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:55,956 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:55,956 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:55,957 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:44:55,957 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:44:55,958 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-26 10:44:55,973 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:44:55,981 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:55,981 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:55,982 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:55,983 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:55,986 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-26 10:44:55,987 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:56,004 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:56,005 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:44:56,005 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:56,005 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:56,005 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:56,006 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:44:56,006 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:44:56,021 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:44:56,030 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:56,031 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:56,032 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:56,033 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:56,042 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:56,055 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:56,055 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:44:56,055 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:56,055 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:56,055 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:56,057 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:44:56,057 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:44:56,059 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-26 10:44:56,069 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:44:56,078 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:56,078 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:56,078 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:56,080 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:56,091 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:56,103 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:56,103 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:44:56,103 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:56,103 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:56,104 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:56,105 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:44:56,105 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:44:56,106 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-26 10:44:56,121 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:44:56,129 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:56,129 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:56,130 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:56,131 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:56,138 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:56,139 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-26 10:44:56,151 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:56,151 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:56,151 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:56,151 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:56,157 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:44:56,158 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:44:56,170 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:44:56,177 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:56,178 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:56,178 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:56,179 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:56,186 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:56,198 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:56,199 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:56,199 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:56,199 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:56,201 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-26 10:44:56,204 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:44:56,205 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:44:56,218 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:44:56,231 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:56,233 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:56,233 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:56,234 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:56,245 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-26 10:44:56,245 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:56,258 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:56,258 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:44:56,258 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:56,258 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:56,258 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:56,259 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:44:56,259 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:44:56,269 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:44:56,277 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:56,277 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:56,278 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:56,280 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:56,293 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:56,306 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:56,306 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:56,306 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:56,306 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:56,309 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:44:56,310 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:44:56,310 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-26 10:44:56,321 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:44:56,333 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:56,334 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:56,334 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:56,335 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:56,339 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2023-11-26 10:44:56,339 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:56,352 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:56,352 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:56,353 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:56,353 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:56,362 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:44:56,363 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:44:56,381 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 10:44:56,455 INFO L443 ModelExtractionUtils]: Simplification made 14 calls to the SMT solver. [2023-11-26 10:44:56,455 INFO L444 ModelExtractionUtils]: 4 out of 19 variables were initially zero. Simplification set additionally 11 variables to zero. [2023-11-26 10:44:56,457 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:56,457 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:56,500 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:56,503 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 10:44:56,506 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2023-11-26 10:44:56,538 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2023-11-26 10:44:56,538 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 10:44:56,539 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_init_nondet_~x#1.base)_1, ULTIMATE.start_init_nondet_~i~0#1) = 1*v_rep(select #length ULTIMATE.start_init_nondet_~x#1.base)_1 - 4*ULTIMATE.start_init_nondet_~i~0#1 Supporting invariants [1*ULTIMATE.start_init_nondet_~x#1.offset >= 0] [2023-11-26 10:44:56,548 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:56,580 INFO L156 tatePredicateManager]: 8 out of 9 supporting invariants were superfluous and have been removed [2023-11-26 10:44:56,589 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~x!base] could not be translated [2023-11-26 10:44:56,618 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:56,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:44:56,666 INFO L262 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 5 conjunts are in the unsatisfiable core [2023-11-26 10:44:56,667 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:44:56,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:44:56,687 INFO L262 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 5 conjunts are in the unsatisfiable core [2023-11-26 10:44:56,688 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:44:56,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:44:56,751 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 10:44:56,771 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 32 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:56,781 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2023-11-26 10:44:56,876 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 32 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 66 states and 102 transitions. Complement of second has 8 states. [2023-11-26 10:44:56,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 10:44:56,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:56,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 53 transitions. [2023-11-26 10:44:56,891 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 53 transitions. Stem has 3 letters. Loop has 2 letters. [2023-11-26 10:44:56,892 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:44:56,892 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 53 transitions. Stem has 5 letters. Loop has 2 letters. [2023-11-26 10:44:56,892 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:44:56,893 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 53 transitions. Stem has 3 letters. Loop has 4 letters. [2023-11-26 10:44:56,893 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:44:56,894 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 102 transitions. [2023-11-26 10:44:56,909 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 10:44:56,914 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 23 states and 36 transitions. [2023-11-26 10:44:56,915 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2023-11-26 10:44:56,916 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2023-11-26 10:44:56,916 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 36 transitions. [2023-11-26 10:44:56,917 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:44:56,917 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 36 transitions. [2023-11-26 10:44:56,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 36 transitions. [2023-11-26 10:44:56,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2023-11-26 10:44:56,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.565217391304348) internal successors, (36), 22 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:56,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 36 transitions. [2023-11-26 10:44:56,947 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 36 transitions. [2023-11-26 10:44:56,948 INFO L428 stractBuchiCegarLoop]: Abstraction has 23 states and 36 transitions. [2023-11-26 10:44:56,948 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 10:44:56,948 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 36 transitions. [2023-11-26 10:44:56,950 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 10:44:56,950 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:44:56,950 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:44:56,950 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2023-11-26 10:44:56,951 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:44:56,951 INFO L748 eck$LassoCheckResult]: Stem: 203#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 198#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 192#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 193#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 181#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 182#L29-3 [2023-11-26 10:44:56,952 INFO L750 eck$LassoCheckResult]: Loop: 182#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 185#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 186#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 182#L29-3 [2023-11-26 10:44:56,956 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:56,956 INFO L85 PathProgramCache]: Analyzing trace with hash 28693898, now seen corresponding path program 1 times [2023-11-26 10:44:56,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:56,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820469283] [2023-11-26 10:44:56,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:56,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:56,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:44:57,122 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:44:57,123 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:44:57,123 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1820469283] [2023-11-26 10:44:57,124 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1820469283] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:44:57,124 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:44:57,124 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 10:44:57,125 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [773599764] [2023-11-26 10:44:57,125 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:44:57,128 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:44:57,128 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:57,128 INFO L85 PathProgramCache]: Analyzing trace with hash 56764, now seen corresponding path program 1 times [2023-11-26 10:44:57,129 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:57,129 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1877449375] [2023-11-26 10:44:57,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:57,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:57,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:57,137 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:44:57,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:57,154 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:44:57,212 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 10:44:57,212 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 10:44:57,213 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 10:44:57,213 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 10:44:57,213 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 10:44:57,213 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:57,213 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 10:44:57,213 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 10:44:57,213 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum.i_Iteration2_Loop [2023-11-26 10:44:57,214 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 10:44:57,214 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 10:44:57,215 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:57,224 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:57,284 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 10:44:57,285 INFO L404 LassoAnalysis]: Checking for nontermination... [2023-11-26 10:44:57,287 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:57,287 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:57,288 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:57,299 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 10:44:57,299 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 10:44:57,312 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2023-11-26 10:44:57,338 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 10:44:57,339 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_rangesum_#t~post3#1=0} Honda state: {ULTIMATE.start_rangesum_#t~post3#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 10:44:57,347 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:57,347 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:57,348 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:57,349 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:57,358 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 10:44:57,359 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 10:44:57,371 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2023-11-26 10:44:57,389 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:57,390 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:57,390 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:57,391 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:57,403 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2023-11-26 10:44:57,403 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 10:44:57,415 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2023-11-26 10:44:57,648 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2023-11-26 10:44:57,656 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:57,657 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 10:44:57,657 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 10:44:57,657 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 10:44:57,657 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 10:44:57,657 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 10:44:57,657 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:57,658 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 10:44:57,658 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 10:44:57,658 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum.i_Iteration2_Loop [2023-11-26 10:44:57,658 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 10:44:57,658 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 10:44:57,659 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:57,662 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:44:57,718 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 10:44:57,718 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 10:44:57,719 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:57,719 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:57,720 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:57,726 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:57,738 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:57,739 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:44:57,739 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:57,739 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:57,739 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:57,744 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:44:57,744 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:44:57,746 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2023-11-26 10:44:57,757 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:44:57,761 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:57,761 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:57,761 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:57,762 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:57,770 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:44:57,775 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2023-11-26 10:44:57,783 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:44:57,783 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:44:57,783 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:44:57,783 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:44:57,783 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:44:57,786 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:44:57,786 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:44:57,796 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 10:44:57,801 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2023-11-26 10:44:57,801 INFO L444 ModelExtractionUtils]: 0 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2023-11-26 10:44:57,801 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:44:57,801 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:57,802 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:44:57,811 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 10:44:57,811 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2023-11-26 10:44:57,811 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 10:44:57,812 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_rangesum_~i~1#1, ~N~0) = -4*ULTIMATE.start_rangesum_~i~1#1 + 3*~N~0 Supporting invariants [] [2023-11-26 10:44:57,815 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2023-11-26 10:44:57,816 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:57,818 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2023-11-26 10:44:57,835 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:57,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:44:57,856 INFO L262 TraceCheckSpWp]: Trace formula consists of 58 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 10:44:57,858 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:44:57,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:44:57,872 WARN L260 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 5 conjunts are in the unsatisfiable core [2023-11-26 10:44:57,873 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:44:57,969 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:44:57,969 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2023-11-26 10:44:57,970 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 23 states and 36 transitions. cyclomatic complexity: 18 Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:58,019 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 23 states and 36 transitions. cyclomatic complexity: 18. Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 47 states and 79 transitions. Complement of second has 10 states. [2023-11-26 10:44:58,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 6 states 1 stem states 3 non-accepting loop states 1 accepting loop states [2023-11-26 10:44:58,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:58,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 40 transitions. [2023-11-26 10:44:58,021 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 40 transitions. Stem has 5 letters. Loop has 3 letters. [2023-11-26 10:44:58,021 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:44:58,022 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 40 transitions. Stem has 8 letters. Loop has 3 letters. [2023-11-26 10:44:58,022 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:44:58,022 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 40 transitions. Stem has 5 letters. Loop has 6 letters. [2023-11-26 10:44:58,022 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:44:58,022 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 47 states and 79 transitions. [2023-11-26 10:44:58,024 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 10:44:58,026 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 47 states to 31 states and 48 transitions. [2023-11-26 10:44:58,026 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2023-11-26 10:44:58,027 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2023-11-26 10:44:58,027 INFO L73 IsDeterministic]: Start isDeterministic. Operand 31 states and 48 transitions. [2023-11-26 10:44:58,027 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:44:58,027 INFO L218 hiAutomatonCegarLoop]: Abstraction has 31 states and 48 transitions. [2023-11-26 10:44:58,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states and 48 transitions. [2023-11-26 10:44:58,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 29. [2023-11-26 10:44:58,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.5517241379310345) internal successors, (45), 28 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:58,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 45 transitions. [2023-11-26 10:44:58,031 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 45 transitions. [2023-11-26 10:44:58,032 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:44:58,034 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 10:44:58,034 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 10:44:58,035 INFO L87 Difference]: Start difference. First operand 29 states and 45 transitions. Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:58,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:44:58,075 INFO L93 Difference]: Finished difference Result 30 states and 43 transitions. [2023-11-26 10:44:58,076 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 43 transitions. [2023-11-26 10:44:58,077 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 10:44:58,077 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 30 states and 43 transitions. [2023-11-26 10:44:58,078 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2023-11-26 10:44:58,078 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2023-11-26 10:44:58,078 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 43 transitions. [2023-11-26 10:44:58,078 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:44:58,078 INFO L218 hiAutomatonCegarLoop]: Abstraction has 30 states and 43 transitions. [2023-11-26 10:44:58,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 43 transitions. [2023-11-26 10:44:58,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2023-11-26 10:44:58,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.4482758620689655) internal successors, (42), 28 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:58,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 42 transitions. [2023-11-26 10:44:58,082 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 42 transitions. [2023-11-26 10:44:58,082 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 10:44:58,083 INFO L428 stractBuchiCegarLoop]: Abstraction has 29 states and 42 transitions. [2023-11-26 10:44:58,083 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 10:44:58,083 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 42 transitions. [2023-11-26 10:44:58,084 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 10:44:58,084 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:44:58,084 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:44:58,085 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:44:58,085 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:44:58,085 INFO L748 eck$LassoCheckResult]: Stem: 388#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 381#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 375#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 376#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 386#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 387#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 361#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 362#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 365#L30 [2023-11-26 10:44:58,086 INFO L750 eck$LassoCheckResult]: Loop: 365#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 366#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 384#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 365#L30 [2023-11-26 10:44:58,086 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:58,086 INFO L85 PathProgramCache]: Analyzing trace with hash 123162479, now seen corresponding path program 1 times [2023-11-26 10:44:58,086 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:58,087 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [820937723] [2023-11-26 10:44:58,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:58,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:58,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:44:58,164 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:44:58,165 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:44:58,166 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [820937723] [2023-11-26 10:44:58,166 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [820937723] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:44:58,166 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [569248316] [2023-11-26 10:44:58,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:58,167 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:44:58,167 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:58,170 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:44:58,201 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2023-11-26 10:44:58,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:44:58,242 INFO L262 TraceCheckSpWp]: Trace formula consists of 70 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 10:44:58,244 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:44:58,289 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:44:58,289 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:44:58,316 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:44:58,317 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [569248316] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:44:58,317 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 10:44:58,317 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-26 10:44:58,317 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396238331] [2023-11-26 10:44:58,317 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 10:44:58,318 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:44:58,319 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:58,320 INFO L85 PathProgramCache]: Analyzing trace with hash 59702, now seen corresponding path program 1 times [2023-11-26 10:44:58,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:58,321 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [122058163] [2023-11-26 10:44:58,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:58,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:58,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:58,330 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:44:58,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:58,337 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:44:58,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:44:58,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 10:44:58,447 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2023-11-26 10:44:58,447 INFO L87 Difference]: Start difference. First operand 29 states and 42 transitions. cyclomatic complexity: 19 Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:58,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:44:58,528 INFO L93 Difference]: Finished difference Result 32 states and 45 transitions. [2023-11-26 10:44:58,528 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 45 transitions. [2023-11-26 10:44:58,529 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 10:44:58,530 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 32 states and 45 transitions. [2023-11-26 10:44:58,530 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2023-11-26 10:44:58,530 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2023-11-26 10:44:58,530 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 45 transitions. [2023-11-26 10:44:58,530 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:44:58,531 INFO L218 hiAutomatonCegarLoop]: Abstraction has 32 states and 45 transitions. [2023-11-26 10:44:58,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 45 transitions. [2023-11-26 10:44:58,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 31. [2023-11-26 10:44:58,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.4193548387096775) internal successors, (44), 30 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:58,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 44 transitions. [2023-11-26 10:44:58,538 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 44 transitions. [2023-11-26 10:44:58,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 10:44:58,539 INFO L428 stractBuchiCegarLoop]: Abstraction has 31 states and 44 transitions. [2023-11-26 10:44:58,540 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 10:44:58,540 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 44 transitions. [2023-11-26 10:44:58,540 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 10:44:58,541 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:44:58,541 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:44:58,541 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1] [2023-11-26 10:44:58,541 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:44:58,542 INFO L748 eck$LassoCheckResult]: Stem: 502#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 494#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 490#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 491#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 499#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 500#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 501#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 503#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 474#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 475#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 478#L30 [2023-11-26 10:44:58,542 INFO L750 eck$LassoCheckResult]: Loop: 478#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 479#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 497#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 478#L30 [2023-11-26 10:44:58,542 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:58,542 INFO L85 PathProgramCache]: Analyzing trace with hash -1898228851, now seen corresponding path program 2 times [2023-11-26 10:44:58,543 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:58,543 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1010350525] [2023-11-26 10:44:58,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:58,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:58,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:58,589 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2023-11-26 10:44:58,594 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:44:58,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:58,613 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:44:58,613 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:58,614 INFO L85 PathProgramCache]: Analyzing trace with hash 59702, now seen corresponding path program 2 times [2023-11-26 10:44:58,614 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:58,614 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1082390247] [2023-11-26 10:44:58,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:58,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:58,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:58,622 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:44:58,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:58,629 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:44:58,630 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:58,630 INFO L85 PathProgramCache]: Analyzing trace with hash 1698716202, now seen corresponding path program 1 times [2023-11-26 10:44:58,630 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:58,631 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658033061] [2023-11-26 10:44:58,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:58,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:58,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:44:58,756 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2023-11-26 10:44:58,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:44:58,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [658033061] [2023-11-26 10:44:58,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [658033061] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:44:58,763 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:44:58,763 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 10:44:58,763 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1790951813] [2023-11-26 10:44:58,763 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:44:58,874 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:44:58,875 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 10:44:58,875 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2023-11-26 10:44:58,875 INFO L87 Difference]: Start difference. First operand 31 states and 44 transitions. cyclomatic complexity: 19 Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:58,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:44:58,962 INFO L93 Difference]: Finished difference Result 40 states and 51 transitions. [2023-11-26 10:44:58,963 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 51 transitions. [2023-11-26 10:44:58,965 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 10:44:58,967 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 39 states and 50 transitions. [2023-11-26 10:44:58,967 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2023-11-26 10:44:58,968 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2023-11-26 10:44:58,968 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 50 transitions. [2023-11-26 10:44:58,968 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:44:58,968 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39 states and 50 transitions. [2023-11-26 10:44:58,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 50 transitions. [2023-11-26 10:44:58,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 36. [2023-11-26 10:44:58,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.3055555555555556) internal successors, (47), 35 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:58,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 47 transitions. [2023-11-26 10:44:58,977 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 47 transitions. [2023-11-26 10:44:58,978 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 10:44:58,980 INFO L428 stractBuchiCegarLoop]: Abstraction has 36 states and 47 transitions. [2023-11-26 10:44:58,981 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 10:44:58,981 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 47 transitions. [2023-11-26 10:44:58,985 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 10:44:58,986 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:44:58,986 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:44:58,987 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:44:58,987 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:44:58,988 INFO L748 eck$LassoCheckResult]: Stem: 582#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 574#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 567#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 568#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 578#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 579#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 580#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 586#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 554#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 555#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 560#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 561#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 585#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 558#L30 [2023-11-26 10:44:58,988 INFO L750 eck$LassoCheckResult]: Loop: 558#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 559#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 584#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 558#L30 [2023-11-26 10:44:58,989 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:58,989 INFO L85 PathProgramCache]: Analyzing trace with hash 1698718124, now seen corresponding path program 1 times [2023-11-26 10:44:58,989 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:58,989 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064491752] [2023-11-26 10:44:58,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:58,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:59,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:59,036 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:44:59,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:59,064 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:44:59,065 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:59,066 INFO L85 PathProgramCache]: Analyzing trace with hash 59702, now seen corresponding path program 3 times [2023-11-26 10:44:59,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:59,066 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1835822118] [2023-11-26 10:44:59,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:59,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:59,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:59,078 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:44:59,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:59,089 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:44:59,090 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:59,090 INFO L85 PathProgramCache]: Analyzing trace with hash -1087986773, now seen corresponding path program 1 times [2023-11-26 10:44:59,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:59,090 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626130316] [2023-11-26 10:44:59,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:59,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:59,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:44:59,284 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:44:59,284 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:44:59,285 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626130316] [2023-11-26 10:44:59,285 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1626130316] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:44:59,285 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1119096960] [2023-11-26 10:44:59,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:59,285 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:44:59,285 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:44:59,286 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:44:59,313 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2023-11-26 10:44:59,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:44:59,365 INFO L262 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 8 conjunts are in the unsatisfiable core [2023-11-26 10:44:59,366 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:44:59,457 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:44:59,457 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:44:59,527 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:44:59,528 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1119096960] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:44:59,531 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 10:44:59,531 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2023-11-26 10:44:59,531 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2041882241] [2023-11-26 10:44:59,532 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 10:44:59,644 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:44:59,645 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2023-11-26 10:44:59,648 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2023-11-26 10:44:59,649 INFO L87 Difference]: Start difference. First operand 36 states and 47 transitions. cyclomatic complexity: 17 Second operand has 14 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 14 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:59,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:44:59,930 INFO L93 Difference]: Finished difference Result 79 states and 100 transitions. [2023-11-26 10:44:59,930 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 79 states and 100 transitions. [2023-11-26 10:44:59,931 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2023-11-26 10:44:59,932 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 79 states to 68 states and 88 transitions. [2023-11-26 10:44:59,932 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 49 [2023-11-26 10:44:59,932 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 55 [2023-11-26 10:44:59,932 INFO L73 IsDeterministic]: Start isDeterministic. Operand 68 states and 88 transitions. [2023-11-26 10:44:59,932 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:44:59,932 INFO L218 hiAutomatonCegarLoop]: Abstraction has 68 states and 88 transitions. [2023-11-26 10:44:59,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states and 88 transitions. [2023-11-26 10:44:59,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 60. [2023-11-26 10:44:59,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 60 states have (on average 1.3) internal successors, (78), 59 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:44:59,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 78 transitions. [2023-11-26 10:44:59,936 INFO L240 hiAutomatonCegarLoop]: Abstraction has 60 states and 78 transitions. [2023-11-26 10:44:59,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-26 10:44:59,938 INFO L428 stractBuchiCegarLoop]: Abstraction has 60 states and 78 transitions. [2023-11-26 10:44:59,938 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 10:44:59,938 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 60 states and 78 transitions. [2023-11-26 10:44:59,939 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2023-11-26 10:44:59,939 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:44:59,939 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:44:59,939 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:44:59,939 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:44:59,940 INFO L748 eck$LassoCheckResult]: Stem: 815#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 804#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 795#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 796#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 811#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 812#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 813#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 835#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 828#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 827#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 825#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 823#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 790#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 791#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 817#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 832#L30 [2023-11-26 10:44:59,940 INFO L750 eck$LassoCheckResult]: Loop: 832#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 834#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 833#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 832#L30 [2023-11-26 10:44:59,940 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:59,940 INFO L85 PathProgramCache]: Analyzing trace with hash -154124210, now seen corresponding path program 2 times [2023-11-26 10:44:59,940 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:59,940 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1878121475] [2023-11-26 10:44:59,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:59,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:44:59,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:59,968 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:44:59,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:44:59,996 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:44:59,997 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:44:59,998 INFO L85 PathProgramCache]: Analyzing trace with hash 59702, now seen corresponding path program 4 times [2023-11-26 10:44:59,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:44:59,998 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [467819494] [2023-11-26 10:44:59,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:44:59,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:00,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:00,004 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:00,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:00,010 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:00,012 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:00,012 INFO L85 PathProgramCache]: Analyzing trace with hash -194270775, now seen corresponding path program 2 times [2023-11-26 10:45:00,013 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:00,013 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425172616] [2023-11-26 10:45:00,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:00,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:00,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:00,217 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:45:00,218 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:00,218 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1425172616] [2023-11-26 10:45:00,218 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1425172616] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:45:00,218 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1516726368] [2023-11-26 10:45:00,218 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 10:45:00,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:00,219 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:00,225 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:00,270 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2023-11-26 10:45:00,346 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 10:45:00,346 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:00,347 INFO L262 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 10:45:00,349 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:00,430 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2023-11-26 10:45:00,430 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:00,631 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2023-11-26 10:45:00,631 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1516726368] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:00,631 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 10:45:00,631 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 5, 5] total 13 [2023-11-26 10:45:00,632 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857158430] [2023-11-26 10:45:00,632 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:00,719 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:00,720 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-26 10:45:00,720 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2023-11-26 10:45:00,721 INFO L87 Difference]: Start difference. First operand 60 states and 78 transitions. cyclomatic complexity: 25 Second operand has 13 states, 13 states have (on average 2.4615384615384617) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:01,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:01,017 INFO L93 Difference]: Finished difference Result 75 states and 89 transitions. [2023-11-26 10:45:01,017 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 75 states and 89 transitions. [2023-11-26 10:45:01,018 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 15 [2023-11-26 10:45:01,018 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 75 states to 73 states and 87 transitions. [2023-11-26 10:45:01,019 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 57 [2023-11-26 10:45:01,019 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 57 [2023-11-26 10:45:01,019 INFO L73 IsDeterministic]: Start isDeterministic. Operand 73 states and 87 transitions. [2023-11-26 10:45:01,019 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:01,020 INFO L218 hiAutomatonCegarLoop]: Abstraction has 73 states and 87 transitions. [2023-11-26 10:45:01,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states and 87 transitions. [2023-11-26 10:45:01,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 68. [2023-11-26 10:45:01,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 68 states have (on average 1.2058823529411764) internal successors, (82), 67 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:01,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 82 transitions. [2023-11-26 10:45:01,024 INFO L240 hiAutomatonCegarLoop]: Abstraction has 68 states and 82 transitions. [2023-11-26 10:45:01,026 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2023-11-26 10:45:01,028 INFO L428 stractBuchiCegarLoop]: Abstraction has 68 states and 82 transitions. [2023-11-26 10:45:01,028 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 10:45:01,028 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 68 states and 82 transitions. [2023-11-26 10:45:01,029 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2023-11-26 10:45:01,029 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:01,029 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:01,030 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 2, 1, 1, 1, 1, 1] [2023-11-26 10:45:01,030 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:01,030 INFO L748 eck$LassoCheckResult]: Stem: 1081#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 1071#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 1065#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 1066#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1078#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1111#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1110#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1109#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1076#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1077#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 1049#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 1050#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1057#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 1058#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1074#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1075#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 1105#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1101#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1100#L30 [2023-11-26 10:45:01,030 INFO L750 eck$LassoCheckResult]: Loop: 1100#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 1104#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1099#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1100#L30 [2023-11-26 10:45:01,030 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:01,030 INFO L85 PathProgramCache]: Analyzing trace with hash -194268853, now seen corresponding path program 3 times [2023-11-26 10:45:01,031 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:01,031 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1867295980] [2023-11-26 10:45:01,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:01,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:01,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:01,056 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:01,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:01,069 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:01,070 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:01,070 INFO L85 PathProgramCache]: Analyzing trace with hash 59702, now seen corresponding path program 5 times [2023-11-26 10:45:01,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:01,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [660890192] [2023-11-26 10:45:01,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:01,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:01,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:01,075 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:01,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:01,079 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:01,080 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:01,080 INFO L85 PathProgramCache]: Analyzing trace with hash -2142422100, now seen corresponding path program 3 times [2023-11-26 10:45:01,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:01,080 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821952320] [2023-11-26 10:45:01,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:01,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:01,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:01,254 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2023-11-26 10:45:01,254 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:01,254 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821952320] [2023-11-26 10:45:01,255 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1821952320] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:45:01,255 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1210410798] [2023-11-26 10:45:01,255 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 10:45:01,255 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:01,255 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:01,261 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:01,285 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2023-11-26 10:45:01,357 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2023-11-26 10:45:01,357 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:01,358 INFO L262 TraceCheckSpWp]: Trace formula consists of 112 conjuncts, 10 conjunts are in the unsatisfiable core [2023-11-26 10:45:01,360 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:01,486 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 12 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:45:01,486 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:01,586 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 12 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:45:01,586 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1210410798] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:01,586 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 10:45:01,587 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 10] total 16 [2023-11-26 10:45:01,587 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1729427799] [2023-11-26 10:45:01,587 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:01,715 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:01,715 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2023-11-26 10:45:01,716 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2023-11-26 10:45:01,716 INFO L87 Difference]: Start difference. First operand 68 states and 82 transitions. cyclomatic complexity: 21 Second operand has 17 states, 16 states have (on average 2.625) internal successors, (42), 17 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:02,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:02,028 INFO L93 Difference]: Finished difference Result 116 states and 137 transitions. [2023-11-26 10:45:02,028 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 116 states and 137 transitions. [2023-11-26 10:45:02,029 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 15 [2023-11-26 10:45:02,030 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 116 states to 102 states and 123 transitions. [2023-11-26 10:45:02,031 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 78 [2023-11-26 10:45:02,031 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2023-11-26 10:45:02,031 INFO L73 IsDeterministic]: Start isDeterministic. Operand 102 states and 123 transitions. [2023-11-26 10:45:02,031 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:02,031 INFO L218 hiAutomatonCegarLoop]: Abstraction has 102 states and 123 transitions. [2023-11-26 10:45:02,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states and 123 transitions. [2023-11-26 10:45:02,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 91. [2023-11-26 10:45:02,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 91 states have (on average 1.1978021978021978) internal successors, (109), 90 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:02,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 109 transitions. [2023-11-26 10:45:02,037 INFO L240 hiAutomatonCegarLoop]: Abstraction has 91 states and 109 transitions. [2023-11-26 10:45:02,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2023-11-26 10:45:02,039 INFO L428 stractBuchiCegarLoop]: Abstraction has 91 states and 109 transitions. [2023-11-26 10:45:02,039 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 10:45:02,039 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 109 transitions. [2023-11-26 10:45:02,040 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2023-11-26 10:45:02,040 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:02,040 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:02,041 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1] [2023-11-26 10:45:02,041 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:02,041 INFO L748 eck$LassoCheckResult]: Stem: 1411#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 1401#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 1397#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 1398#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1407#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1408#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1409#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1446#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1445#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1444#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1439#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1438#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 1437#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 1436#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1387#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 1388#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1440#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1435#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 1434#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1432#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1431#L30 [2023-11-26 10:45:02,041 INFO L750 eck$LassoCheckResult]: Loop: 1431#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 1433#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1430#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1431#L30 [2023-11-26 10:45:02,042 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:02,042 INFO L85 PathProgramCache]: Analyzing trace with hash -326653975, now seen corresponding path program 4 times [2023-11-26 10:45:02,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:02,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034135296] [2023-11-26 10:45:02,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:02,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:02,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:02,063 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:02,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:02,081 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:02,081 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:02,082 INFO L85 PathProgramCache]: Analyzing trace with hash 59702, now seen corresponding path program 6 times [2023-11-26 10:45:02,082 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:02,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506784457] [2023-11-26 10:45:02,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:02,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:02,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:02,086 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:02,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:02,090 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:02,091 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:02,091 INFO L85 PathProgramCache]: Analyzing trace with hash 1047353422, now seen corresponding path program 4 times [2023-11-26 10:45:02,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:02,091 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [738247259] [2023-11-26 10:45:02,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:02,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:02,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:02,246 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2023-11-26 10:45:02,246 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:02,246 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [738247259] [2023-11-26 10:45:02,246 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [738247259] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:45:02,247 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2015583990] [2023-11-26 10:45:02,247 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-26 10:45:02,247 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:02,247 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:02,253 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:02,273 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2023-11-26 10:45:02,328 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-26 10:45:02,329 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:02,330 INFO L262 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 9 conjunts are in the unsatisfiable core [2023-11-26 10:45:02,331 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:02,433 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2023-11-26 10:45:02,433 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:02,541 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2023-11-26 10:45:02,541 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2015583990] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:02,541 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 10:45:02,541 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6, 6] total 17 [2023-11-26 10:45:02,542 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367270410] [2023-11-26 10:45:02,542 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:02,636 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:02,637 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2023-11-26 10:45:02,637 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2023-11-26 10:45:02,637 INFO L87 Difference]: Start difference. First operand 91 states and 109 transitions. cyclomatic complexity: 25 Second operand has 18 states, 17 states have (on average 2.5294117647058822) internal successors, (43), 18 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:03,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:03,219 INFO L93 Difference]: Finished difference Result 190 states and 233 transitions. [2023-11-26 10:45:03,219 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 190 states and 233 transitions. [2023-11-26 10:45:03,221 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 15 [2023-11-26 10:45:03,222 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 190 states to 168 states and 209 transitions. [2023-11-26 10:45:03,222 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 132 [2023-11-26 10:45:03,223 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 144 [2023-11-26 10:45:03,223 INFO L73 IsDeterministic]: Start isDeterministic. Operand 168 states and 209 transitions. [2023-11-26 10:45:03,223 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:03,224 INFO L218 hiAutomatonCegarLoop]: Abstraction has 168 states and 209 transitions. [2023-11-26 10:45:03,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states and 209 transitions. [2023-11-26 10:45:03,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 130. [2023-11-26 10:45:03,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 130 states, 130 states have (on average 1.2461538461538462) internal successors, (162), 129 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:03,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 162 transitions. [2023-11-26 10:45:03,244 INFO L240 hiAutomatonCegarLoop]: Abstraction has 130 states and 162 transitions. [2023-11-26 10:45:03,245 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2023-11-26 10:45:03,246 INFO L428 stractBuchiCegarLoop]: Abstraction has 130 states and 162 transitions. [2023-11-26 10:45:03,246 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-26 10:45:03,246 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 130 states and 162 transitions. [2023-11-26 10:45:03,267 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2023-11-26 10:45:03,267 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:03,267 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:03,268 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 1, 1, 1, 1, 1] [2023-11-26 10:45:03,268 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:03,269 INFO L748 eck$LassoCheckResult]: Stem: 1873#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 1860#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 1855#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 1856#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1870#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1871#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1868#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1869#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1918#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1917#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1916#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1914#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1909#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1908#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 1906#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 1905#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1904#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 1903#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1867#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1847#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 1848#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1877#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1901#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 1900#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1897#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1896#L30 [2023-11-26 10:45:03,269 INFO L750 eck$LassoCheckResult]: Loop: 1896#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 1899#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1895#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 1896#L30 [2023-11-26 10:45:03,269 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:03,269 INFO L85 PathProgramCache]: Analyzing trace with hash -185017358, now seen corresponding path program 5 times [2023-11-26 10:45:03,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:03,269 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2102014993] [2023-11-26 10:45:03,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:03,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:03,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:03,287 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:03,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:03,306 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:03,307 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:03,307 INFO L85 PathProgramCache]: Analyzing trace with hash 59702, now seen corresponding path program 7 times [2023-11-26 10:45:03,307 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:03,307 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1694193872] [2023-11-26 10:45:03,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:03,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:03,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:03,312 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:03,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:03,316 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:03,316 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:03,316 INFO L85 PathProgramCache]: Analyzing trace with hash -1409041499, now seen corresponding path program 5 times [2023-11-26 10:45:03,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:03,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767612212] [2023-11-26 10:45:03,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:03,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:03,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:03,361 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:03,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:03,382 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:05,117 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 10:45:05,117 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 10:45:05,117 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 10:45:05,117 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 10:45:05,117 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 10:45:05,117 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:05,117 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 10:45:05,117 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 10:45:05,117 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum.i_Iteration9_Lasso [2023-11-26 10:45:05,117 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 10:45:05,118 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 10:45:05,120 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,124 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,510 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,512 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,515 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,517 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,519 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,529 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,532 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,534 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,537 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,539 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,541 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,543 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,546 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,549 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,551 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,554 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,563 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,565 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,567 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,569 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,571 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,574 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,576 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,578 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,580 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,583 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,585 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:05,592 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:06,019 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 10:45:06,019 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 10:45:06,019 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:06,019 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:06,033 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:06,039 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:06,049 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2023-11-26 10:45:06,051 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:06,051 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:45:06,051 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:06,051 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:06,051 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:06,052 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:45:06,052 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:45:06,053 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:06,055 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:06,056 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:06,056 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:06,057 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:06,059 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2023-11-26 10:45:06,060 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:06,070 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:06,070 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:06,070 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:06,070 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:06,074 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:45:06,074 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:45:06,095 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:06,099 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:06,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:06,099 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:06,101 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:06,110 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:06,122 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:06,122 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:06,122 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:06,122 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:06,124 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:45:06,124 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:45:06,125 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2023-11-26 10:45:06,141 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:06,145 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:06,145 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:06,145 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:06,146 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:06,154 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:06,166 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:06,166 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:06,166 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:06,166 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:06,168 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:45:06,169 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:45:06,169 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2023-11-26 10:45:06,185 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:06,196 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:06,196 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:06,196 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:06,198 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:06,200 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2023-11-26 10:45:06,201 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:06,210 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:06,210 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:06,211 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:06,211 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:06,214 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:45:06,214 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:45:06,221 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:06,223 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:06,224 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:06,224 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:06,225 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:06,228 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2023-11-26 10:45:06,229 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:06,238 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:06,239 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:06,239 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:06,239 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:06,245 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:45:06,245 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:45:06,260 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 10:45:06,348 INFO L443 ModelExtractionUtils]: Simplification made 13 calls to the SMT solver. [2023-11-26 10:45:06,349 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 13 variables to zero. [2023-11-26 10:45:06,349 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:06,349 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:06,356 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:06,358 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 10:45:06,369 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2023-11-26 10:45:06,385 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2023-11-26 10:45:06,385 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 10:45:06,386 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_rangesum_~i~1#1) = -2*ULTIMATE.start_rangesum_~i~1#1 + 4294967283 Supporting invariants [-1*v_rep(select #length ULTIMATE.start_rangesum_~x#1.base)_1 + 1*ULTIMATE.start_rangesum_~x#1.offset + 4294967292 >= 0] [2023-11-26 10:45:06,390 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:06,427 INFO L156 tatePredicateManager]: 9 out of 10 supporting invariants were superfluous and have been removed [2023-11-26 10:45:06,454 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:06,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:06,493 INFO L262 TraceCheckSpWp]: Trace formula consists of 126 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 10:45:06,495 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:06,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2023-11-26 10:45:06,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:06,716 INFO L262 TraceCheckSpWp]: Trace formula consists of 15 conjuncts, 5 conjunts are in the unsatisfiable core [2023-11-26 10:45:06,716 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:06,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:45:06,784 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.3 stem predicates 3 loop predicates [2023-11-26 10:45:06,784 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 130 states and 162 transitions. cyclomatic complexity: 39 Second operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 6 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:06,889 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 130 states and 162 transitions. cyclomatic complexity: 39. Second operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 6 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 185 states and 237 transitions. Complement of second has 9 states. [2023-11-26 10:45:06,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 6 states 3 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 10:45:06,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 6 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:06,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 19 transitions. [2023-11-26 10:45:06,894 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 19 transitions. Stem has 25 letters. Loop has 3 letters. [2023-11-26 10:45:06,895 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:45:06,895 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 19 transitions. Stem has 28 letters. Loop has 3 letters. [2023-11-26 10:45:06,895 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:45:06,895 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 19 transitions. Stem has 25 letters. Loop has 6 letters. [2023-11-26 10:45:06,895 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:45:06,895 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 185 states and 237 transitions. [2023-11-26 10:45:06,899 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 10 [2023-11-26 10:45:06,900 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 185 states to 159 states and 196 transitions. [2023-11-26 10:45:06,901 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 100 [2023-11-26 10:45:06,901 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 125 [2023-11-26 10:45:06,901 INFO L73 IsDeterministic]: Start isDeterministic. Operand 159 states and 196 transitions. [2023-11-26 10:45:06,902 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:06,902 INFO L218 hiAutomatonCegarLoop]: Abstraction has 159 states and 196 transitions. [2023-11-26 10:45:06,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states and 196 transitions. [2023-11-26 10:45:06,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 150. [2023-11-26 10:45:06,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 150 states, 150 states have (on average 1.2266666666666666) internal successors, (184), 149 states have internal predecessors, (184), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:06,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 184 transitions. [2023-11-26 10:45:06,914 INFO L240 hiAutomatonCegarLoop]: Abstraction has 150 states and 184 transitions. [2023-11-26 10:45:06,916 INFO L428 stractBuchiCegarLoop]: Abstraction has 150 states and 184 transitions. [2023-11-26 10:45:06,916 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-26 10:45:06,916 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 150 states and 184 transitions. [2023-11-26 10:45:06,917 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 10 [2023-11-26 10:45:06,917 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:06,918 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:06,918 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:06,919 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 10:45:06,920 INFO L748 eck$LassoCheckResult]: Stem: 2353#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 2338#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 2329#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 2330#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2349#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2350#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2347#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2348#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 2408#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2448#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 2447#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 2446#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2445#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 2444#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 2443#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2442#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 2441#L29-4 assume !(0 != rangesum_~cnt~0#1);rangesum_#res#1 := 0; 2339#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2340#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 2316#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 2317#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2423#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 2424#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 2364#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2359#L29-8 assume !(rangesum_~i~1#1 < ~N~0); 2351#L29-9 assume !(0 != rangesum_~cnt~0#1);rangesum_#res#1 := 0; 2352#rangesum_returnLabel#2 main_#t~ret9#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret2~0#1 := main_#t~ret9#1;havoc main_#t~ret9#1;call main_#t~mem10#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem10#1;havoc main_#t~mem10#1;main_~i~2#1 := 0; 2335#L57-3 [2023-11-26 10:45:06,920 INFO L750 eck$LassoCheckResult]: Loop: 2335#L57-3 assume !!(main_~i~2#1 < ~N~0 - 1);call main_#t~mem12#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset + 4 * (1 + main_~i~2#1), 4);call write~int#1(main_#t~mem12#1, main_~#x~0#1.base, main_~#x~0#1.offset + 4 * main_~i~2#1, 4);havoc main_#t~mem12#1; 2336#L57-2 main_#t~post11#1 := main_~i~2#1;main_~i~2#1 := 1 + main_#t~post11#1;havoc main_#t~post11#1; 2335#L57-3 [2023-11-26 10:45:06,920 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:06,920 INFO L85 PathProgramCache]: Analyzing trace with hash -1751120697, now seen corresponding path program 1 times [2023-11-26 10:45:06,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:06,921 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2135032257] [2023-11-26 10:45:06,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:06,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:06,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:06,942 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:06,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:06,957 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:06,957 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:06,958 INFO L85 PathProgramCache]: Analyzing trace with hash 3427, now seen corresponding path program 1 times [2023-11-26 10:45:06,958 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:06,958 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665264717] [2023-11-26 10:45:06,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:06,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:06,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:06,963 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:06,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:06,967 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:06,967 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:06,967 INFO L85 PathProgramCache]: Analyzing trace with hash 800192681, now seen corresponding path program 1 times [2023-11-26 10:45:06,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:06,968 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1880116829] [2023-11-26 10:45:06,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:06,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:06,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:06,988 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:07,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:07,006 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:07,126 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:08,341 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 10:45:08,342 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 10:45:08,342 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 10:45:08,342 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 10:45:08,342 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 10:45:08,342 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:08,342 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 10:45:08,342 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 10:45:08,342 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum.i_Iteration10_Lasso [2023-11-26 10:45:08,342 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 10:45:08,342 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 10:45:08,345 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,347 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,350 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,352 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,354 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,356 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,359 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,619 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,621 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,628 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,631 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,633 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,636 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,638 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,640 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,643 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,646 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,656 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,658 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,660 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,662 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,665 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,667 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,669 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,671 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,674 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,676 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,679 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,681 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,683 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,686 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:08,692 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:09,086 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 10:45:09,086 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 10:45:09,087 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:09,087 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:09,090 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:09,094 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:09,097 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2023-11-26 10:45:09,104 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:09,105 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:45:09,105 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:09,105 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:09,105 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:09,105 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:45:09,105 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:45:09,107 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:09,113 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:09,113 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:09,113 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:09,114 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:09,116 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2023-11-26 10:45:09,117 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:09,127 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:09,127 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:45:09,127 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:09,127 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:09,127 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:09,129 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:45:09,129 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:45:09,149 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:09,151 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:09,151 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:09,152 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:09,153 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:09,155 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2023-11-26 10:45:09,156 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:09,165 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:09,165 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:45:09,166 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:09,166 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:09,166 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:09,166 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:45:09,166 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:45:09,167 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:09,174 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:09,174 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:09,174 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:09,175 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:09,177 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2023-11-26 10:45:09,178 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:09,187 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:09,187 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:45:09,187 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:09,187 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:09,188 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:09,188 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:45:09,188 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:45:09,198 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:09,200 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:09,200 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:09,200 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:09,201 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:09,203 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2023-11-26 10:45:09,204 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:09,213 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:09,213 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:45:09,214 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:09,214 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:09,214 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:09,214 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:45:09,214 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:45:09,215 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:09,217 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:09,218 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:09,218 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:09,219 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:09,221 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:09,225 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2023-11-26 10:45:09,231 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:09,231 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:09,231 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:09,231 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:09,233 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:45:09,233 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:45:09,250 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:09,252 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Ended with exit code 0 [2023-11-26 10:45:09,253 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:09,253 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:09,253 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:09,254 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2023-11-26 10:45:09,256 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:09,265 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:09,265 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:09,266 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:09,266 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:09,267 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:45:09,267 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:45:09,271 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:09,274 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:09,274 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:09,274 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:09,275 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:09,276 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2023-11-26 10:45:09,279 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:09,288 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:09,289 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:09,289 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:09,289 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:09,291 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:45:09,291 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:45:09,313 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:09,315 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:09,316 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:09,316 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:09,316 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:09,319 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2023-11-26 10:45:09,320 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:09,330 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:09,330 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:09,330 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:09,330 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:09,335 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:45:09,335 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:45:09,347 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 10:45:09,385 INFO L443 ModelExtractionUtils]: Simplification made 6 calls to the SMT solver. [2023-11-26 10:45:09,385 INFO L444 ModelExtractionUtils]: 4 out of 16 variables were initially zero. Simplification set additionally 8 variables to zero. [2023-11-26 10:45:09,385 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:09,385 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:09,390 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:09,398 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 10:45:09,409 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2023-11-26 10:45:09,429 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-26 10:45:09,429 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 10:45:09,429 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#x~0#1.base)_3, ULTIMATE.start_main_~i~2#1, ULTIMATE.start_main_~#x~0#1.offset) = 1*v_rep(select #length ULTIMATE.start_main_~#x~0#1.base)_3 - 4*ULTIMATE.start_main_~i~2#1 - 1*ULTIMATE.start_main_~#x~0#1.offset Supporting invariants [] [2023-11-26 10:45:09,438 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:09,448 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2023-11-26 10:45:09,450 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#x~0!base] could not be translated [2023-11-26 10:45:09,462 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:09,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:09,496 INFO L262 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 10:45:09,498 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:09,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:09,539 INFO L262 TraceCheckSpWp]: Trace formula consists of 15 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 10:45:09,540 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:09,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:45:09,559 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 10:45:09,560 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 150 states and 184 transitions. cyclomatic complexity: 42 Second operand has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:09,593 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 150 states and 184 transitions. cyclomatic complexity: 42. Second operand has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 155 states and 193 transitions. Complement of second has 7 states. [2023-11-26 10:45:09,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 10:45:09,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:09,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 26 transitions. [2023-11-26 10:45:09,594 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 26 transitions. Stem has 27 letters. Loop has 2 letters. [2023-11-26 10:45:09,594 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:45:09,595 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 26 transitions. Stem has 29 letters. Loop has 2 letters. [2023-11-26 10:45:09,595 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:45:09,595 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 26 transitions. Stem has 27 letters. Loop has 4 letters. [2023-11-26 10:45:09,595 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:45:09,596 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 155 states and 193 transitions. [2023-11-26 10:45:09,597 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 10:45:09,598 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 155 states to 70 states and 84 transitions. [2023-11-26 10:45:09,598 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 34 [2023-11-26 10:45:09,598 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 35 [2023-11-26 10:45:09,598 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 84 transitions. [2023-11-26 10:45:09,599 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:09,599 INFO L218 hiAutomatonCegarLoop]: Abstraction has 70 states and 84 transitions. [2023-11-26 10:45:09,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 84 transitions. [2023-11-26 10:45:09,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2023-11-26 10:45:09,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 70 states have (on average 1.2) internal successors, (84), 69 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:09,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 84 transitions. [2023-11-26 10:45:09,602 INFO L240 hiAutomatonCegarLoop]: Abstraction has 70 states and 84 transitions. [2023-11-26 10:45:09,602 INFO L428 stractBuchiCegarLoop]: Abstraction has 70 states and 84 transitions. [2023-11-26 10:45:09,602 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-26 10:45:09,602 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 70 states and 84 transitions. [2023-11-26 10:45:09,603 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 10:45:09,603 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:09,603 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:09,604 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:09,604 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:09,604 INFO L748 eck$LassoCheckResult]: Stem: 2775#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 2766#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 2758#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 2759#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2771#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2772#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2773#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2796#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2795#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2794#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2791#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2790#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2780#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2779#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 2745#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2746#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 2769#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 2807#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2806#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 2805#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 2804#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2803#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 2802#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 2798#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2799#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 2756#L29-4 assume !(0 != rangesum_~cnt~0#1);rangesum_#res#1 := 0; 2757#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2767#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 2768#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 2776#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2777#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 2747#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 2748#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2789#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 2787#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 2785#L29-7 [2023-11-26 10:45:09,605 INFO L750 eck$LassoCheckResult]: Loop: 2785#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2781#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 2782#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 2785#L29-7 [2023-11-26 10:45:09,605 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:09,605 INFO L85 PathProgramCache]: Analyzing trace with hash 851452407, now seen corresponding path program 1 times [2023-11-26 10:45:09,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:09,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901873761] [2023-11-26 10:45:09,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:09,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:09,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:09,843 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2023-11-26 10:45:09,843 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:09,844 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901873761] [2023-11-26 10:45:09,844 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [901873761] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:45:09,844 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [852955389] [2023-11-26 10:45:09,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:09,844 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:09,844 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:09,845 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:09,854 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2023-11-26 10:45:09,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:09,947 INFO L262 TraceCheckSpWp]: Trace formula consists of 170 conjuncts, 11 conjunts are in the unsatisfiable core [2023-11-26 10:45:09,951 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:10,126 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2023-11-26 10:45:10,127 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:10,268 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2023-11-26 10:45:10,268 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [852955389] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:10,268 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 10:45:10,269 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12, 12] total 23 [2023-11-26 10:45:10,269 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [948698010] [2023-11-26 10:45:10,269 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:10,269 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:45:10,270 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:10,270 INFO L85 PathProgramCache]: Analyzing trace with hash 88157, now seen corresponding path program 1 times [2023-11-26 10:45:10,270 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:10,270 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1812452617] [2023-11-26 10:45:10,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:10,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:10,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:10,287 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:10,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:10,297 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:10,379 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:10,380 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2023-11-26 10:45:10,380 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=403, Unknown=0, NotChecked=0, Total=506 [2023-11-26 10:45:10,380 INFO L87 Difference]: Start difference. First operand 70 states and 84 transitions. cyclomatic complexity: 21 Second operand has 23 states, 23 states have (on average 2.608695652173913) internal successors, (60), 23 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:10,706 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:11,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:11,037 INFO L93 Difference]: Finished difference Result 108 states and 129 transitions. [2023-11-26 10:45:11,037 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 108 states and 129 transitions. [2023-11-26 10:45:11,038 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2023-11-26 10:45:11,039 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 108 states to 94 states and 112 transitions. [2023-11-26 10:45:11,039 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2023-11-26 10:45:11,039 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2023-11-26 10:45:11,039 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 112 transitions. [2023-11-26 10:45:11,039 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:11,039 INFO L218 hiAutomatonCegarLoop]: Abstraction has 94 states and 112 transitions. [2023-11-26 10:45:11,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 112 transitions. [2023-11-26 10:45:11,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 69. [2023-11-26 10:45:11,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 69 states have (on average 1.173913043478261) internal successors, (81), 68 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:11,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 81 transitions. [2023-11-26 10:45:11,042 INFO L240 hiAutomatonCegarLoop]: Abstraction has 69 states and 81 transitions. [2023-11-26 10:45:11,042 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2023-11-26 10:45:11,044 INFO L428 stractBuchiCegarLoop]: Abstraction has 69 states and 81 transitions. [2023-11-26 10:45:11,044 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2023-11-26 10:45:11,044 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 69 states and 81 transitions. [2023-11-26 10:45:11,044 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2023-11-26 10:45:11,045 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:11,045 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:11,049 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:11,049 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:11,051 INFO L748 eck$LassoCheckResult]: Stem: 3215#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 3206#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 3201#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 3202#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3211#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3212#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3213#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3236#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3235#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3234#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3233#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3232#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3221#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3220#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 3185#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3186#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 3209#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3246#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3210#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 3191#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3192#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3247#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 3245#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3241#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3239#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 3189#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3190#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3230#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 3225#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3227#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3224#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 3195#L29-4 assume !(0 != rangesum_~cnt~0#1);rangesum_#res#1 := 0; 3196#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3207#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 3244#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3216#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3208#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 3187#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3188#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3243#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 3242#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3228#L29-7 [2023-11-26 10:45:11,051 INFO L750 eck$LassoCheckResult]: Loop: 3228#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3238#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 3237#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3228#L29-7 [2023-11-26 10:45:11,052 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:11,052 INFO L85 PathProgramCache]: Analyzing trace with hash 584366359, now seen corresponding path program 1 times [2023-11-26 10:45:11,052 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:11,052 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293870571] [2023-11-26 10:45:11,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:11,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:11,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:11,166 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 2 proven. 18 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2023-11-26 10:45:11,166 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:11,166 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [293870571] [2023-11-26 10:45:11,166 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [293870571] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:45:11,167 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [998382441] [2023-11-26 10:45:11,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:11,167 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:11,167 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:11,170 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:11,201 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2023-11-26 10:45:11,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:11,277 INFO L262 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 10:45:11,279 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:11,310 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2023-11-26 10:45:11,311 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:45:11,311 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [998382441] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:45:11,311 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2023-11-26 10:45:11,311 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 6 [2023-11-26 10:45:11,311 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1212695069] [2023-11-26 10:45:11,312 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:45:11,312 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:45:11,313 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:11,313 INFO L85 PathProgramCache]: Analyzing trace with hash 88159, now seen corresponding path program 1 times [2023-11-26 10:45:11,313 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:11,313 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [666463440] [2023-11-26 10:45:11,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:11,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:11,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:11,316 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:11,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:11,319 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:11,359 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 10:45:11,359 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 10:45:11,359 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 10:45:11,359 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 10:45:11,359 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 10:45:11,359 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:11,359 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 10:45:11,360 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 10:45:11,360 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum.i_Iteration12_Loop [2023-11-26 10:45:11,360 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 10:45:11,360 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 10:45:11,360 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:11,363 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:11,417 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 10:45:11,417 INFO L404 LassoAnalysis]: Checking for nontermination... [2023-11-26 10:45:11,417 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:11,417 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:11,421 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:11,423 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 10:45:11,423 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 10:45:11,429 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2023-11-26 10:45:11,450 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 10:45:11,450 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_rangesum_#t~post3#1=0} Honda state: {ULTIMATE.start_rangesum_#t~post3#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 10:45:11,455 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:11,456 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:11,456 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:11,457 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:11,460 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 10:45:11,460 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 10:45:11,473 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2023-11-26 10:45:11,497 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:11,497 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:11,498 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:11,499 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:11,503 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2023-11-26 10:45:11,503 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 10:45:11,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Waiting until timeout for monitored process [2023-11-26 10:45:11,867 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2023-11-26 10:45:11,871 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:11,872 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 10:45:11,872 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 10:45:11,872 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 10:45:11,872 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 10:45:11,872 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 10:45:11,872 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:11,872 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 10:45:11,872 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 10:45:11,872 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum.i_Iteration12_Loop [2023-11-26 10:45:11,872 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 10:45:11,872 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 10:45:11,873 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:11,876 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:45:11,927 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 10:45:11,927 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 10:45:11,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:11,927 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:11,928 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:11,930 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Waiting until timeout for monitored process [2023-11-26 10:45:11,931 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:11,940 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:11,940 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:45:11,941 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:11,941 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:11,941 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:11,941 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:45:11,941 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:45:11,942 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:45:11,945 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:11,945 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:11,945 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:11,946 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:11,948 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Waiting until timeout for monitored process [2023-11-26 10:45:11,948 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:45:11,958 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:45:11,958 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:45:11,958 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:45:11,958 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:45:11,958 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:45:11,959 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:45:11,959 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:45:11,962 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 10:45:11,964 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2023-11-26 10:45:11,965 INFO L444 ModelExtractionUtils]: 1 out of 4 variables were initially zero. Simplification set additionally 0 variables to zero. [2023-11-26 10:45:11,965 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:45:11,965 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:11,967 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:45:11,968 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Waiting until timeout for monitored process [2023-11-26 10:45:11,969 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 10:45:11,969 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2023-11-26 10:45:11,969 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 10:45:11,969 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(~N~0, ULTIMATE.start_rangesum_~i~1#1) = 1*~N~0 - 2*ULTIMATE.start_rangesum_~i~1#1 Supporting invariants [] [2023-11-26 10:45:11,971 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:11,972 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2023-11-26 10:45:11,987 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:12,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:12,045 INFO L262 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 10:45:12,057 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:12,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:45:12,123 WARN L260 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 5 conjunts are in the unsatisfiable core [2023-11-26 10:45:12,123 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:12,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:45:12,149 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2023-11-26 10:45:12,149 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 69 states and 81 transitions. cyclomatic complexity: 18 Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:12,196 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 69 states and 81 transitions. cyclomatic complexity: 18. Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 82 states and 96 transitions. Complement of second has 7 states. [2023-11-26 10:45:12,196 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 10:45:12,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:12,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 25 transitions. [2023-11-26 10:45:12,198 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 25 transitions. Stem has 41 letters. Loop has 3 letters. [2023-11-26 10:45:12,198 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:45:12,198 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 25 transitions. Stem has 44 letters. Loop has 3 letters. [2023-11-26 10:45:12,200 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:45:12,200 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 25 transitions. Stem has 41 letters. Loop has 6 letters. [2023-11-26 10:45:12,201 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:45:12,201 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 82 states and 96 transitions. [2023-11-26 10:45:12,202 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 10:45:12,203 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 82 states to 76 states and 89 transitions. [2023-11-26 10:45:12,203 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 33 [2023-11-26 10:45:12,203 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 34 [2023-11-26 10:45:12,204 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 89 transitions. [2023-11-26 10:45:12,204 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:12,204 INFO L218 hiAutomatonCegarLoop]: Abstraction has 76 states and 89 transitions. [2023-11-26 10:45:12,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 89 transitions. [2023-11-26 10:45:12,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 72. [2023-11-26 10:45:12,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72 states, 72 states have (on average 1.1666666666666667) internal successors, (84), 71 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:12,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 84 transitions. [2023-11-26 10:45:12,209 INFO L240 hiAutomatonCegarLoop]: Abstraction has 72 states and 84 transitions. [2023-11-26 10:45:12,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:12,210 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 10:45:12,210 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2023-11-26 10:45:12,210 INFO L87 Difference]: Start difference. First operand 72 states and 84 transitions. Second operand has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:12,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:12,242 INFO L93 Difference]: Finished difference Result 105 states and 125 transitions. [2023-11-26 10:45:12,242 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 125 transitions. [2023-11-26 10:45:12,243 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:12,244 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 105 states and 125 transitions. [2023-11-26 10:45:12,244 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 49 [2023-11-26 10:45:12,244 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 49 [2023-11-26 10:45:12,244 INFO L73 IsDeterministic]: Start isDeterministic. Operand 105 states and 125 transitions. [2023-11-26 10:45:12,245 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:12,245 INFO L218 hiAutomatonCegarLoop]: Abstraction has 105 states and 125 transitions. [2023-11-26 10:45:12,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states and 125 transitions. [2023-11-26 10:45:12,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 72. [2023-11-26 10:45:12,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 71 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:12,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 82 transitions. [2023-11-26 10:45:12,247 INFO L240 hiAutomatonCegarLoop]: Abstraction has 72 states and 82 transitions. [2023-11-26 10:45:12,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 10:45:12,248 INFO L428 stractBuchiCegarLoop]: Abstraction has 72 states and 82 transitions. [2023-11-26 10:45:12,248 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2023-11-26 10:45:12,248 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 72 states and 82 transitions. [2023-11-26 10:45:12,249 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 10:45:12,249 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:12,249 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:12,250 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:12,250 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:12,250 INFO L748 eck$LassoCheckResult]: Stem: 3828#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 3814#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 3807#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 3808#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3825#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3826#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3823#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3824#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3840#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3839#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3838#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3837#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3836#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3835#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 3791#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3792#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 3820#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3856#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3855#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 3799#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3800#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3857#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 3853#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3852#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3850#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 3797#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3798#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3848#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 3845#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3846#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3844#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 3803#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 3804#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3815#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 3793#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3794#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3829#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 3795#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3796#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3818#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 3819#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 3851#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3816#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 3817#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3849#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3847#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 3842#L30-2 [2023-11-26 10:45:12,251 INFO L750 eck$LassoCheckResult]: Loop: 3842#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3843#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3841#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 3842#L30-2 [2023-11-26 10:45:12,251 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:12,251 INFO L85 PathProgramCache]: Analyzing trace with hash -1458082658, now seen corresponding path program 1 times [2023-11-26 10:45:12,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:12,252 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [835937995] [2023-11-26 10:45:12,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:12,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:12,268 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:12,269 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [383020647] [2023-11-26 10:45:12,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:12,269 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:12,269 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:12,270 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:12,293 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2023-11-26 10:45:12,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:12,396 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:12,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:12,447 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:12,448 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:12,448 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 2 times [2023-11-26 10:45:12,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:12,448 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1443894749] [2023-11-26 10:45:12,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:12,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:12,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:12,452 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:12,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:12,456 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:12,457 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:12,457 INFO L85 PathProgramCache]: Analyzing trace with hash 1558822002, now seen corresponding path program 2 times [2023-11-26 10:45:12,457 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:12,457 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1741303281] [2023-11-26 10:45:12,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:12,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:12,480 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:12,480 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1412168027] [2023-11-26 10:45:12,481 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 10:45:12,481 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:12,481 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:12,485 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:12,509 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2023-11-26 10:45:12,602 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 10:45:12,602 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:12,603 INFO L262 TraceCheckSpWp]: Trace formula consists of 220 conjuncts, 14 conjunts are in the unsatisfiable core [2023-11-26 10:45:12,605 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:12,863 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Forceful destruction successful, exit code 0 [2023-11-26 10:45:12,873 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 35 proven. 25 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2023-11-26 10:45:12,873 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:13,085 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 35 proven. 25 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2023-11-26 10:45:13,086 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:13,086 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1741303281] [2023-11-26 10:45:13,086 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:13,086 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1412168027] [2023-11-26 10:45:13,086 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1412168027] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:13,087 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:13,087 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 20 [2023-11-26 10:45:13,087 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [42853262] [2023-11-26 10:45:13,087 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:13,188 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:13,189 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2023-11-26 10:45:13,189 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=309, Unknown=0, NotChecked=0, Total=420 [2023-11-26 10:45:13,190 INFO L87 Difference]: Start difference. First operand 72 states and 82 transitions. cyclomatic complexity: 17 Second operand has 21 states, 20 states have (on average 2.75) internal successors, (55), 21 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:13,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:13,547 INFO L93 Difference]: Finished difference Result 145 states and 157 transitions. [2023-11-26 10:45:13,547 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 145 states and 157 transitions. [2023-11-26 10:45:13,549 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 10:45:13,550 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 145 states to 75 states and 85 transitions. [2023-11-26 10:45:13,550 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 34 [2023-11-26 10:45:13,550 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 34 [2023-11-26 10:45:13,550 INFO L73 IsDeterministic]: Start isDeterministic. Operand 75 states and 85 transitions. [2023-11-26 10:45:13,551 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:13,551 INFO L218 hiAutomatonCegarLoop]: Abstraction has 75 states and 85 transitions. [2023-11-26 10:45:13,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states and 85 transitions. [2023-11-26 10:45:13,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 74. [2023-11-26 10:45:13,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 74 states have (on average 1.135135135135135) internal successors, (84), 73 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:13,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 84 transitions. [2023-11-26 10:45:13,554 INFO L240 hiAutomatonCegarLoop]: Abstraction has 74 states and 84 transitions. [2023-11-26 10:45:13,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2023-11-26 10:45:13,555 INFO L428 stractBuchiCegarLoop]: Abstraction has 74 states and 84 transitions. [2023-11-26 10:45:13,555 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2023-11-26 10:45:13,556 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 74 states and 84 transitions. [2023-11-26 10:45:13,556 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 10:45:13,557 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:13,557 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:13,558 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:13,558 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:13,558 INFO L748 eck$LassoCheckResult]: Stem: 4357#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 4347#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 4341#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 4342#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4353#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4354#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4355#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4385#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4384#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4383#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4382#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4381#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4380#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4379#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4361#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4360#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 4324#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 4325#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 4351#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4389#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4352#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 4332#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4333#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4359#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 4365#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4364#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4362#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 4330#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4331#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4374#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 4370#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4371#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4369#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 4336#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 4337#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 4348#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4326#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4327#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4358#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4328#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4329#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4349#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4350#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4377#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4376#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4375#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4373#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4372#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4367#L30-2 [2023-11-26 10:45:13,558 INFO L750 eck$LassoCheckResult]: Loop: 4367#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4368#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4366#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4367#L30-2 [2023-11-26 10:45:13,559 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:13,559 INFO L85 PathProgramCache]: Analyzing trace with hash -6985156, now seen corresponding path program 3 times [2023-11-26 10:45:13,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:13,559 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [537050531] [2023-11-26 10:45:13,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:13,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:13,578 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:13,579 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2084833015] [2023-11-26 10:45:13,579 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 10:45:13,579 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:13,579 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:13,580 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:13,605 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2023-11-26 10:45:13,744 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2023-11-26 10:45:13,744 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:13,746 INFO L262 TraceCheckSpWp]: Trace formula consists of 219 conjuncts, 17 conjunts are in the unsatisfiable core [2023-11-26 10:45:13,748 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:14,106 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 53 proven. 33 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2023-11-26 10:45:14,106 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:14,583 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 32 proven. 54 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2023-11-26 10:45:14,583 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:14,583 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [537050531] [2023-11-26 10:45:14,583 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:14,583 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2084833015] [2023-11-26 10:45:14,584 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2084833015] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:14,584 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:14,584 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17] total 26 [2023-11-26 10:45:14,584 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [294371729] [2023-11-26 10:45:14,584 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:14,585 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:45:14,585 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:14,585 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 3 times [2023-11-26 10:45:14,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:14,585 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1779343351] [2023-11-26 10:45:14,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:14,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:14,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:14,590 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:14,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:14,594 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:14,675 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:14,676 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2023-11-26 10:45:14,676 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=168, Invalid=482, Unknown=0, NotChecked=0, Total=650 [2023-11-26 10:45:14,676 INFO L87 Difference]: Start difference. First operand 74 states and 84 transitions. cyclomatic complexity: 17 Second operand has 26 states, 26 states have (on average 2.5384615384615383) internal successors, (66), 26 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:15,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:15,194 INFO L93 Difference]: Finished difference Result 178 states and 207 transitions. [2023-11-26 10:45:15,194 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 178 states and 207 transitions. [2023-11-26 10:45:15,196 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 27 [2023-11-26 10:45:15,197 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 178 states to 173 states and 202 transitions. [2023-11-26 10:45:15,198 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 87 [2023-11-26 10:45:15,198 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 87 [2023-11-26 10:45:15,198 INFO L73 IsDeterministic]: Start isDeterministic. Operand 173 states and 202 transitions. [2023-11-26 10:45:15,198 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:15,199 INFO L218 hiAutomatonCegarLoop]: Abstraction has 173 states and 202 transitions. [2023-11-26 10:45:15,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states and 202 transitions. [2023-11-26 10:45:15,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 83. [2023-11-26 10:45:15,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.1204819277108433) internal successors, (93), 82 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:15,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 93 transitions. [2023-11-26 10:45:15,202 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 93 transitions. [2023-11-26 10:45:15,204 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2023-11-26 10:45:15,205 INFO L428 stractBuchiCegarLoop]: Abstraction has 83 states and 93 transitions. [2023-11-26 10:45:15,205 INFO L335 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2023-11-26 10:45:15,205 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 93 transitions. [2023-11-26 10:45:15,206 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 10:45:15,206 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:15,206 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:15,207 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 6, 6, 5, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:15,207 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:15,207 INFO L748 eck$LassoCheckResult]: Stem: 4937#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 4925#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 4917#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 4918#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4933#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4934#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4935#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4954#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4953#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4952#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4951#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4950#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4949#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4947#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4944#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4943#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 4901#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 4902#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 4930#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4970#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4966#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 4967#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4968#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4969#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 4909#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4910#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4974#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 4948#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4946#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4945#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 4907#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4908#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4959#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 4957#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4958#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4956#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 4915#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 4916#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 4926#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4962#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4939#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4940#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4971#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4972#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4973#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4905#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4906#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4975#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4965#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 4964#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4963#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4960#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4961#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4927#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4903#L30-2 [2023-11-26 10:45:15,207 INFO L750 eck$LassoCheckResult]: Loop: 4903#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4904#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4955#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 4903#L30-2 [2023-11-26 10:45:15,208 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:15,208 INFO L85 PathProgramCache]: Analyzing trace with hash 4068611, now seen corresponding path program 4 times [2023-11-26 10:45:15,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:15,208 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1879454223] [2023-11-26 10:45:15,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:15,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:15,224 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:15,224 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2001378394] [2023-11-26 10:45:15,225 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-26 10:45:15,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:15,225 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:15,230 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:15,238 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2023-11-26 10:45:15,400 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-26 10:45:15,400 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-26 10:45:15,401 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:15,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:15,465 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:15,466 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:15,466 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 4 times [2023-11-26 10:45:15,466 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:15,466 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [99233337] [2023-11-26 10:45:15,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:15,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:15,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:15,470 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:15,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:15,484 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:15,485 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:15,485 INFO L85 PathProgramCache]: Analyzing trace with hash 948960749, now seen corresponding path program 5 times [2023-11-26 10:45:15,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:15,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945856224] [2023-11-26 10:45:15,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:15,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:15,502 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:15,502 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1412635097] [2023-11-26 10:45:15,502 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-26 10:45:15,502 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:15,503 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:15,508 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:15,521 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2023-11-26 10:45:15,650 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2023-11-26 10:45:15,650 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:15,652 INFO L262 TraceCheckSpWp]: Trace formula consists of 239 conjuncts, 9 conjunts are in the unsatisfiable core [2023-11-26 10:45:15,654 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:16,058 INFO L134 CoverageAnalysis]: Checked inductivity of 138 backedges. 54 proven. 7 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2023-11-26 10:45:16,058 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:16,346 INFO L134 CoverageAnalysis]: Checked inductivity of 138 backedges. 31 proven. 30 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2023-11-26 10:45:16,347 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:16,348 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945856224] [2023-11-26 10:45:16,348 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:16,348 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1412635097] [2023-11-26 10:45:16,349 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1412635097] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:16,352 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:16,352 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2023-11-26 10:45:16,352 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [291070693] [2023-11-26 10:45:16,352 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:16,434 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:16,434 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2023-11-26 10:45:16,434 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=188, Unknown=0, NotChecked=0, Total=272 [2023-11-26 10:45:16,435 INFO L87 Difference]: Start difference. First operand 83 states and 93 transitions. cyclomatic complexity: 17 Second operand has 17 states, 16 states have (on average 2.8125) internal successors, (45), 17 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:16,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:16,971 INFO L93 Difference]: Finished difference Result 175 states and 199 transitions. [2023-11-26 10:45:16,971 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 175 states and 199 transitions. [2023-11-26 10:45:16,972 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 19 [2023-11-26 10:45:16,974 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 175 states to 165 states and 189 transitions. [2023-11-26 10:45:16,974 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2023-11-26 10:45:16,974 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2023-11-26 10:45:16,974 INFO L73 IsDeterministic]: Start isDeterministic. Operand 165 states and 189 transitions. [2023-11-26 10:45:16,974 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:16,975 INFO L218 hiAutomatonCegarLoop]: Abstraction has 165 states and 189 transitions. [2023-11-26 10:45:16,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states and 189 transitions. [2023-11-26 10:45:16,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 119. [2023-11-26 10:45:16,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 119 states, 119 states have (on average 1.1260504201680672) internal successors, (134), 118 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:16,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 134 transitions. [2023-11-26 10:45:16,978 INFO L240 hiAutomatonCegarLoop]: Abstraction has 119 states and 134 transitions. [2023-11-26 10:45:16,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2023-11-26 10:45:16,980 INFO L428 stractBuchiCegarLoop]: Abstraction has 119 states and 134 transitions. [2023-11-26 10:45:16,980 INFO L335 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2023-11-26 10:45:16,980 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 134 transitions. [2023-11-26 10:45:16,981 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 9 [2023-11-26 10:45:16,981 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:16,981 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:16,982 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 7, 6, 6, 6, 4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:16,982 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:16,982 INFO L748 eck$LassoCheckResult]: Stem: 5571#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 5557#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 5548#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 5549#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 5567#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 5568#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 5569#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 5587#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 5586#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 5585#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 5584#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 5583#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 5582#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 5580#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 5577#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 5576#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 5531#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 5532#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 5564#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 5600#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5596#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 5597#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 5598#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5599#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 5539#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 5540#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5632#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 5581#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 5579#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5578#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 5537#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 5538#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5601#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 5602#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 5627#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5588#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 5590#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 5591#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5592#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 5543#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 5544#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 5560#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 5561#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 5572#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5573#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 5628#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 5629#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5630#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 5535#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 5536#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5631#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 5612#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 5613#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5607#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 5608#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 5619#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5614#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 5615#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 5594#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5595#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 5603#L30-2 [2023-11-26 10:45:16,983 INFO L750 eck$LassoCheckResult]: Loop: 5603#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 5604#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 5649#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 5603#L30-2 [2023-11-26 10:45:16,983 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:16,983 INFO L85 PathProgramCache]: Analyzing trace with hash 380293024, now seen corresponding path program 6 times [2023-11-26 10:45:16,983 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:16,983 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1996575018] [2023-11-26 10:45:16,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:16,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:17,001 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:17,001 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1616736267] [2023-11-26 10:45:17,001 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-26 10:45:17,002 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:17,002 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:17,005 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:17,025 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2023-11-26 10:45:17,184 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2023-11-26 10:45:17,184 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:17,186 INFO L262 TraceCheckSpWp]: Trace formula consists of 251 conjuncts, 17 conjunts are in the unsatisfiable core [2023-11-26 10:45:17,188 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:17,563 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 40 proven. 76 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2023-11-26 10:45:17,563 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:17,879 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 57 proven. 59 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2023-11-26 10:45:17,879 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:17,879 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1996575018] [2023-11-26 10:45:17,879 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:17,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1616736267] [2023-11-26 10:45:17,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1616736267] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:17,885 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:17,886 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16] total 24 [2023-11-26 10:45:17,886 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [79273924] [2023-11-26 10:45:17,886 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:17,887 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:45:17,888 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:17,888 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 5 times [2023-11-26 10:45:17,889 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:17,889 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356286195] [2023-11-26 10:45:17,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:17,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:17,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:17,897 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:17,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:17,902 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:17,981 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:17,982 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-26 10:45:17,982 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=163, Invalid=437, Unknown=0, NotChecked=0, Total=600 [2023-11-26 10:45:17,983 INFO L87 Difference]: Start difference. First operand 119 states and 134 transitions. cyclomatic complexity: 25 Second operand has 25 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 25 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:18,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:18,665 INFO L93 Difference]: Finished difference Result 268 states and 294 transitions. [2023-11-26 10:45:18,665 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 268 states and 294 transitions. [2023-11-26 10:45:18,667 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 15 [2023-11-26 10:45:18,668 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 268 states to 125 states and 139 transitions. [2023-11-26 10:45:18,668 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2023-11-26 10:45:18,668 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2023-11-26 10:45:18,668 INFO L73 IsDeterministic]: Start isDeterministic. Operand 125 states and 139 transitions. [2023-11-26 10:45:18,668 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:18,668 INFO L218 hiAutomatonCegarLoop]: Abstraction has 125 states and 139 transitions. [2023-11-26 10:45:18,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states and 139 transitions. [2023-11-26 10:45:18,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 118. [2023-11-26 10:45:18,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 118 states have (on average 1.11864406779661) internal successors, (132), 117 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:18,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 132 transitions. [2023-11-26 10:45:18,671 INFO L240 hiAutomatonCegarLoop]: Abstraction has 118 states and 132 transitions. [2023-11-26 10:45:18,672 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2023-11-26 10:45:18,672 INFO L428 stractBuchiCegarLoop]: Abstraction has 118 states and 132 transitions. [2023-11-26 10:45:18,673 INFO L335 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2023-11-26 10:45:18,673 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 118 states and 132 transitions. [2023-11-26 10:45:18,673 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:18,674 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:18,674 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:18,675 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 7, 7, 7, 6, 4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:18,675 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:18,675 INFO L748 eck$LassoCheckResult]: Stem: 6352#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 6342#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 6333#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 6334#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 6348#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 6349#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 6350#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 6370#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 6369#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 6368#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 6367#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 6366#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 6365#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 6364#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 6363#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 6362#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 6358#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 6357#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 6316#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 6317#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 6326#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 6327#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6356#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 6380#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 6379#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6378#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 6377#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 6376#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6375#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 6360#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 6361#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6359#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 6324#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 6325#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6346#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 6347#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 6412#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6411#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 6372#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 6373#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6371#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 6329#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 6330#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 6343#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 6318#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 6319#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6353#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 6408#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 6354#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6355#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 6320#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 6321#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6344#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 6345#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 6395#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6393#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 6391#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 6389#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6385#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 6383#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 6381#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6382#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 6384#L30-2 [2023-11-26 10:45:18,675 INFO L750 eck$LassoCheckResult]: Loop: 6384#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 6433#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 6432#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 6384#L30-2 [2023-11-26 10:45:18,676 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:18,676 INFO L85 PathProgramCache]: Analyzing trace with hash 466985150, now seen corresponding path program 7 times [2023-11-26 10:45:18,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:18,676 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [82589169] [2023-11-26 10:45:18,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:18,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:18,719 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:18,720 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2043981132] [2023-11-26 10:45:18,720 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-26 10:45:18,720 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:18,720 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:18,725 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:18,741 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2023-11-26 10:45:18,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:18,878 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:18,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:18,957 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:18,957 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:18,958 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 6 times [2023-11-26 10:45:18,958 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:18,958 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [663074126] [2023-11-26 10:45:18,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:18,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:18,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:18,962 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:18,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:18,966 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:18,966 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:18,966 INFO L85 PathProgramCache]: Analyzing trace with hash 555586642, now seen corresponding path program 8 times [2023-11-26 10:45:18,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:18,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1823048141] [2023-11-26 10:45:18,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:18,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:18,983 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:18,983 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1447614476] [2023-11-26 10:45:18,983 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 10:45:18,983 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:18,984 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:18,989 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:19,009 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2023-11-26 10:45:19,132 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 10:45:19,133 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:19,135 INFO L262 TraceCheckSpWp]: Trace formula consists of 274 conjuncts, 18 conjunts are in the unsatisfiable core [2023-11-26 10:45:19,137 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:19,414 INFO L134 CoverageAnalysis]: Checked inductivity of 189 backedges. 70 proven. 49 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2023-11-26 10:45:19,415 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:19,666 INFO L134 CoverageAnalysis]: Checked inductivity of 189 backedges. 70 proven. 49 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2023-11-26 10:45:19,666 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:19,666 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1823048141] [2023-11-26 10:45:19,666 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:19,666 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1447614476] [2023-11-26 10:45:19,666 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1447614476] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:19,667 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:19,667 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 26 [2023-11-26 10:45:19,667 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [508271359] [2023-11-26 10:45:19,667 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:19,755 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:19,756 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2023-11-26 10:45:19,756 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=179, Invalid=523, Unknown=0, NotChecked=0, Total=702 [2023-11-26 10:45:19,756 INFO L87 Difference]: Start difference. First operand 118 states and 132 transitions. cyclomatic complexity: 25 Second operand has 27 states, 26 states have (on average 2.730769230769231) internal successors, (71), 27 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:20,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:20,190 INFO L93 Difference]: Finished difference Result 242 states and 261 transitions. [2023-11-26 10:45:20,190 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 242 states and 261 transitions. [2023-11-26 10:45:20,192 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:20,193 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 242 states to 121 states and 135 transitions. [2023-11-26 10:45:20,193 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 62 [2023-11-26 10:45:20,193 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 62 [2023-11-26 10:45:20,193 INFO L73 IsDeterministic]: Start isDeterministic. Operand 121 states and 135 transitions. [2023-11-26 10:45:20,194 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:20,194 INFO L218 hiAutomatonCegarLoop]: Abstraction has 121 states and 135 transitions. [2023-11-26 10:45:20,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states and 135 transitions. [2023-11-26 10:45:20,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 120. [2023-11-26 10:45:20,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 120 states, 120 states have (on average 1.1166666666666667) internal successors, (134), 119 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:20,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 134 transitions. [2023-11-26 10:45:20,197 INFO L240 hiAutomatonCegarLoop]: Abstraction has 120 states and 134 transitions. [2023-11-26 10:45:20,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2023-11-26 10:45:20,198 INFO L428 stractBuchiCegarLoop]: Abstraction has 120 states and 134 transitions. [2023-11-26 10:45:20,198 INFO L335 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2023-11-26 10:45:20,198 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 120 states and 134 transitions. [2023-11-26 10:45:20,199 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:20,199 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:20,200 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:20,200 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 8, 7, 7, 7, 6, 4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:20,200 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:20,201 INFO L748 eck$LassoCheckResult]: Stem: 7130#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 7118#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 7113#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 7114#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7126#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7127#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7128#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7157#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7156#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7155#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7154#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7153#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7152#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7151#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7150#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7149#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7148#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7147#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7134#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7133#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 7096#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 7097#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7124#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7145#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7144#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7143#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7142#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7141#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7140#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7139#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7138#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7136#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7137#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7135#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7102#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7103#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7125#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7104#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7105#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7158#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7160#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7161#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7162#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 7108#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 7109#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 7121#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7098#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7099#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7122#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7123#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7131#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7132#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7186#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7184#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7180#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7182#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7179#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7176#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7174#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7172#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7166#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7165#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7163#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7164#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7167#L30-2 [2023-11-26 10:45:20,201 INFO L750 eck$LassoCheckResult]: Loop: 7167#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7215#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7214#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7167#L30-2 [2023-11-26 10:45:20,201 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:20,201 INFO L85 PathProgramCache]: Analyzing trace with hash -2121227684, now seen corresponding path program 9 times [2023-11-26 10:45:20,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:20,202 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365083272] [2023-11-26 10:45:20,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:20,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:20,219 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:20,220 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [599913633] [2023-11-26 10:45:20,220 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 10:45:20,220 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:20,220 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:20,227 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:20,230 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2023-11-26 10:45:20,425 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2023-11-26 10:45:20,425 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:20,427 INFO L262 TraceCheckSpWp]: Trace formula consists of 273 conjuncts, 21 conjunts are in the unsatisfiable core [2023-11-26 10:45:20,429 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:20,841 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 112 proven. 56 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2023-11-26 10:45:20,841 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:21,543 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 72 proven. 96 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2023-11-26 10:45:21,543 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:21,544 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [365083272] [2023-11-26 10:45:21,544 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:21,544 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [599913633] [2023-11-26 10:45:21,544 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [599913633] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:21,544 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:21,544 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21] total 32 [2023-11-26 10:45:21,544 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1995612113] [2023-11-26 10:45:21,544 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:21,545 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:45:21,545 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:21,545 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 7 times [2023-11-26 10:45:21,545 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:21,545 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267714392] [2023-11-26 10:45:21,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:21,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:21,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:21,550 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:21,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:21,554 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:21,628 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:21,629 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2023-11-26 10:45:21,630 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=246, Invalid=746, Unknown=0, NotChecked=0, Total=992 [2023-11-26 10:45:21,630 INFO L87 Difference]: Start difference. First operand 120 states and 134 transitions. cyclomatic complexity: 25 Second operand has 32 states, 32 states have (on average 2.59375) internal successors, (83), 32 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:22,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:22,190 INFO L93 Difference]: Finished difference Result 193 states and 214 transitions. [2023-11-26 10:45:22,190 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 193 states and 214 transitions. [2023-11-26 10:45:22,191 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 24 [2023-11-26 10:45:22,193 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 193 states to 188 states and 209 transitions. [2023-11-26 10:45:22,193 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 111 [2023-11-26 10:45:22,193 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 111 [2023-11-26 10:45:22,193 INFO L73 IsDeterministic]: Start isDeterministic. Operand 188 states and 209 transitions. [2023-11-26 10:45:22,193 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:22,193 INFO L218 hiAutomatonCegarLoop]: Abstraction has 188 states and 209 transitions. [2023-11-26 10:45:22,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states and 209 transitions. [2023-11-26 10:45:22,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 102. [2023-11-26 10:45:22,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 102 states have (on average 1.088235294117647) internal successors, (111), 101 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:22,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 111 transitions. [2023-11-26 10:45:22,197 INFO L240 hiAutomatonCegarLoop]: Abstraction has 102 states and 111 transitions. [2023-11-26 10:45:22,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2023-11-26 10:45:22,198 INFO L428 stractBuchiCegarLoop]: Abstraction has 102 states and 111 transitions. [2023-11-26 10:45:22,198 INFO L335 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2023-11-26 10:45:22,198 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 102 states and 111 transitions. [2023-11-26 10:45:22,198 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:22,199 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:22,199 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:22,199 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 8, 8, 8, 8, 7, 5, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:22,200 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:22,200 INFO L748 eck$LassoCheckResult]: Stem: 7874#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 7863#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 7857#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 7858#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7870#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7871#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7872#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7895#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7894#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7893#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7892#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7891#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7890#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7889#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7888#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7887#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7886#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7885#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 7881#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 7880#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 7840#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 7841#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7867#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7908#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7907#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7906#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7905#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7904#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7903#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7902#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7901#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7900#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7899#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7898#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7883#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7884#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7882#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7846#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7847#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7912#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7848#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7849#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7868#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 7869#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7910#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7909#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 7852#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 7853#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 7864#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7919#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7875#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7876#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7924#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7877#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7866#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7844#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7845#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7923#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7922#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7921#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7918#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7920#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 7917#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7865#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7842#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7843#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7916#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7915#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7914#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7913#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7897#L30-2 [2023-11-26 10:45:22,200 INFO L750 eck$LassoCheckResult]: Loop: 7897#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 7911#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 7896#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 7897#L30-2 [2023-11-26 10:45:22,200 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:22,201 INFO L85 PathProgramCache]: Analyzing trace with hash -683080161, now seen corresponding path program 10 times [2023-11-26 10:45:22,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:22,201 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920346463] [2023-11-26 10:45:22,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:22,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:22,220 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:22,221 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1192329717] [2023-11-26 10:45:22,221 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-26 10:45:22,221 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:22,221 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:22,229 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:22,234 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Waiting until timeout for monitored process [2023-11-26 10:45:22,449 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-26 10:45:22,449 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-26 10:45:22,449 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:22,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:22,539 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:22,539 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:22,539 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 8 times [2023-11-26 10:45:22,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:22,539 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1424981450] [2023-11-26 10:45:22,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:22,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:22,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:22,543 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:22,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:22,547 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:22,548 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:22,548 INFO L85 PathProgramCache]: Analyzing trace with hash -85973167, now seen corresponding path program 11 times [2023-11-26 10:45:22,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:22,548 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1442829301] [2023-11-26 10:45:22,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:22,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:22,566 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:22,567 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1025573072] [2023-11-26 10:45:22,567 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-26 10:45:22,567 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:22,567 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:22,573 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:22,581 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Waiting until timeout for monitored process [2023-11-26 10:45:22,757 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2023-11-26 10:45:22,758 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:22,760 INFO L262 TraceCheckSpWp]: Trace formula consists of 293 conjuncts, 20 conjunts are in the unsatisfiable core [2023-11-26 10:45:22,762 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:23,110 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 92 proven. 64 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2023-11-26 10:45:23,111 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:23,468 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 92 proven. 64 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2023-11-26 10:45:23,469 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:23,469 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1442829301] [2023-11-26 10:45:23,469 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:23,469 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1025573072] [2023-11-26 10:45:23,469 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1025573072] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:23,469 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:23,470 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 29 [2023-11-26 10:45:23,470 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [107532088] [2023-11-26 10:45:23,470 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:23,543 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:23,544 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2023-11-26 10:45:23,544 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=651, Unknown=0, NotChecked=0, Total=870 [2023-11-26 10:45:23,545 INFO L87 Difference]: Start difference. First operand 102 states and 111 transitions. cyclomatic complexity: 18 Second operand has 30 states, 29 states have (on average 2.7241379310344827) internal successors, (79), 30 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:23,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:23,958 INFO L93 Difference]: Finished difference Result 192 states and 203 transitions. [2023-11-26 10:45:23,959 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 192 states and 203 transitions. [2023-11-26 10:45:23,960 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:23,961 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 192 states to 105 states and 114 transitions. [2023-11-26 10:45:23,961 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 49 [2023-11-26 10:45:23,961 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 49 [2023-11-26 10:45:23,962 INFO L73 IsDeterministic]: Start isDeterministic. Operand 105 states and 114 transitions. [2023-11-26 10:45:23,962 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:23,962 INFO L218 hiAutomatonCegarLoop]: Abstraction has 105 states and 114 transitions. [2023-11-26 10:45:23,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states and 114 transitions. [2023-11-26 10:45:23,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 104. [2023-11-26 10:45:23,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 104 states have (on average 1.0865384615384615) internal successors, (113), 103 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:23,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 113 transitions. [2023-11-26 10:45:23,964 INFO L240 hiAutomatonCegarLoop]: Abstraction has 104 states and 113 transitions. [2023-11-26 10:45:23,966 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2023-11-26 10:45:23,966 INFO L428 stractBuchiCegarLoop]: Abstraction has 104 states and 113 transitions. [2023-11-26 10:45:23,967 INFO L335 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2023-11-26 10:45:23,967 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 104 states and 113 transitions. [2023-11-26 10:45:23,968 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:23,968 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:23,968 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:23,969 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [9, 9, 8, 8, 8, 7, 5, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:23,969 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:23,969 INFO L748 eck$LassoCheckResult]: Stem: 8636#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 8626#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 8620#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 8621#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 8632#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 8633#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 8634#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 8688#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 8687#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 8686#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 8685#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 8684#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 8683#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 8682#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 8681#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 8680#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 8679#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 8678#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 8677#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 8676#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 8642#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 8641#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 8603#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 8604#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 8630#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 8660#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8658#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 8657#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 8655#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8652#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 8651#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 8650#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8649#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 8648#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 8647#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8646#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 8644#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 8645#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8643#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 8609#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 8610#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8631#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 8611#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 8612#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8670#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 8665#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 8667#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8664#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 8615#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 8616#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 8627#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 8666#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 8637#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8638#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 8675#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 8639#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8629#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 8607#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 8608#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8674#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 8673#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 8672#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8669#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 8671#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 8668#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8628#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 8605#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 8606#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8663#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 8662#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 8661#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8659#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 8654#L30-2 [2023-11-26 10:45:23,969 INFO L750 eck$LassoCheckResult]: Loop: 8654#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 8656#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 8653#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 8654#L30-2 [2023-11-26 10:45:23,970 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:23,970 INFO L85 PathProgramCache]: Analyzing trace with hash 414157245, now seen corresponding path program 12 times [2023-11-26 10:45:23,970 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:23,970 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1161706052] [2023-11-26 10:45:23,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:23,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:24,009 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:24,009 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1711427924] [2023-11-26 10:45:24,009 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-26 10:45:24,009 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:24,010 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:24,013 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:24,037 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Waiting until timeout for monitored process [2023-11-26 10:45:24,279 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2023-11-26 10:45:24,279 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:24,281 INFO L262 TraceCheckSpWp]: Trace formula consists of 292 conjuncts, 20 conjunts are in the unsatisfiable core [2023-11-26 10:45:24,283 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:24,583 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 64 proven. 109 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2023-11-26 10:45:24,584 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:24,845 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 64 proven. 109 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2023-11-26 10:45:24,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:24,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1161706052] [2023-11-26 10:45:24,845 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:24,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1711427924] [2023-11-26 10:45:24,845 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1711427924] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:24,846 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:24,846 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 30 [2023-11-26 10:45:24,846 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [232065976] [2023-11-26 10:45:24,846 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:24,846 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:45:24,846 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:24,847 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 9 times [2023-11-26 10:45:24,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:24,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704667222] [2023-11-26 10:45:24,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:24,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:24,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:24,851 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:24,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:24,855 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:24,935 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:24,935 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2023-11-26 10:45:24,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=651, Unknown=0, NotChecked=0, Total=870 [2023-11-26 10:45:24,936 INFO L87 Difference]: Start difference. First operand 104 states and 113 transitions. cyclomatic complexity: 18 Second operand has 30 states, 30 states have (on average 2.6666666666666665) internal successors, (80), 30 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:25,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:25,599 INFO L93 Difference]: Finished difference Result 245 states and 275 transitions. [2023-11-26 10:45:25,600 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 245 states and 275 transitions. [2023-11-26 10:45:25,602 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:25,603 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 245 states to 245 states and 275 transitions. [2023-11-26 10:45:25,603 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 136 [2023-11-26 10:45:25,604 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 136 [2023-11-26 10:45:25,604 INFO L73 IsDeterministic]: Start isDeterministic. Operand 245 states and 275 transitions. [2023-11-26 10:45:25,604 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:25,604 INFO L218 hiAutomatonCegarLoop]: Abstraction has 245 states and 275 transitions. [2023-11-26 10:45:25,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states and 275 transitions. [2023-11-26 10:45:25,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 110. [2023-11-26 10:45:25,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 110 states have (on average 1.0818181818181818) internal successors, (119), 109 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:25,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 119 transitions. [2023-11-26 10:45:25,611 INFO L240 hiAutomatonCegarLoop]: Abstraction has 110 states and 119 transitions. [2023-11-26 10:45:25,612 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2023-11-26 10:45:25,613 INFO L428 stractBuchiCegarLoop]: Abstraction has 110 states and 119 transitions. [2023-11-26 10:45:25,613 INFO L335 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2023-11-26 10:45:25,613 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 110 states and 119 transitions. [2023-11-26 10:45:25,614 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:25,614 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:25,614 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:25,615 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [9, 9, 9, 9, 9, 8, 5, 5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:25,615 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:25,615 INFO L748 eck$LassoCheckResult]: Stem: 9476#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 9466#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 9461#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 9462#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 9472#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 9473#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 9474#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 9503#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 9502#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 9500#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 9497#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 9496#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 9494#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 9491#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 9490#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 9489#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 9488#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 9487#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 9486#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 9485#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 9484#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 9483#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 9443#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 9444#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 9470#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 9482#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9471#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 9451#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 9452#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9528#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 9527#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 9526#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9525#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 9524#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 9523#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9522#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 9519#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 9521#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9518#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 9449#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 9450#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9516#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 9514#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 9512#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9510#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 9508#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 9506#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9504#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 9499#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 9501#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9498#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 9455#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 9456#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 9467#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 9520#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 9477#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9478#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 9531#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 9532#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9533#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 9529#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 9530#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9535#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 9534#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 9479#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9469#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 9447#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 9448#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9468#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 9445#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 9446#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9517#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 9515#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 9513#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9511#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 9509#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 9507#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9505#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 9493#L30-2 [2023-11-26 10:45:25,616 INFO L750 eck$LassoCheckResult]: Loop: 9493#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 9495#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 9492#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 9493#L30-2 [2023-11-26 10:45:25,616 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:25,616 INFO L85 PathProgramCache]: Analyzing trace with hash -2088866474, now seen corresponding path program 13 times [2023-11-26 10:45:25,616 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:25,617 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917758284] [2023-11-26 10:45:25,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:25,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:25,637 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:25,637 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1688377516] [2023-11-26 10:45:25,637 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-26 10:45:25,637 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:25,638 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:25,652 INFO L229 MonitoredProcess]: Starting monitored process 62 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:25,675 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Waiting until timeout for monitored process [2023-11-26 10:45:25,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:25,850 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:25,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:25,955 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:25,955 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:25,955 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 10 times [2023-11-26 10:45:25,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:25,956 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [451633028] [2023-11-26 10:45:25,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:25,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:25,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:25,999 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:26,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:26,004 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:26,004 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:26,005 INFO L85 PathProgramCache]: Analyzing trace with hash 360079546, now seen corresponding path program 14 times [2023-11-26 10:45:26,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:26,006 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1874181052] [2023-11-26 10:45:26,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:26,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:26,029 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:26,029 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [89852032] [2023-11-26 10:45:26,029 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 10:45:26,029 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:26,030 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:26,033 INFO L229 MonitoredProcess]: Starting monitored process 63 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:26,048 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Waiting until timeout for monitored process [2023-11-26 10:45:26,211 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 10:45:26,211 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:26,214 INFO L262 TraceCheckSpWp]: Trace formula consists of 328 conjuncts, 22 conjunts are in the unsatisfiable core [2023-11-26 10:45:26,216 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:26,582 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 117 proven. 81 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2023-11-26 10:45:26,582 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:26,921 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 117 proven. 81 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2023-11-26 10:45:26,921 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:26,921 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1874181052] [2023-11-26 10:45:26,921 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:26,921 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [89852032] [2023-11-26 10:45:26,921 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [89852032] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:26,922 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:26,922 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 32 [2023-11-26 10:45:26,922 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653289533] [2023-11-26 10:45:26,922 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:27,009 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:27,012 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2023-11-26 10:45:27,012 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=793, Unknown=0, NotChecked=0, Total=1056 [2023-11-26 10:45:27,013 INFO L87 Difference]: Start difference. First operand 110 states and 119 transitions. cyclomatic complexity: 18 Second operand has 33 states, 32 states have (on average 2.71875) internal successors, (87), 33 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:27,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:27,477 INFO L93 Difference]: Finished difference Result 209 states and 220 transitions. [2023-11-26 10:45:27,477 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 209 states and 220 transitions. [2023-11-26 10:45:27,479 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:27,480 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 209 states to 113 states and 122 transitions. [2023-11-26 10:45:27,480 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2023-11-26 10:45:27,480 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2023-11-26 10:45:27,480 INFO L73 IsDeterministic]: Start isDeterministic. Operand 113 states and 122 transitions. [2023-11-26 10:45:27,480 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:27,480 INFO L218 hiAutomatonCegarLoop]: Abstraction has 113 states and 122 transitions. [2023-11-26 10:45:27,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states and 122 transitions. [2023-11-26 10:45:27,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 112. [2023-11-26 10:45:27,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 112 states have (on average 1.0803571428571428) internal successors, (121), 111 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:27,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 121 transitions. [2023-11-26 10:45:27,483 INFO L240 hiAutomatonCegarLoop]: Abstraction has 112 states and 121 transitions. [2023-11-26 10:45:27,485 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2023-11-26 10:45:27,486 INFO L428 stractBuchiCegarLoop]: Abstraction has 112 states and 121 transitions. [2023-11-26 10:45:27,486 INFO L335 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2023-11-26 10:45:27,486 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 112 states and 121 transitions. [2023-11-26 10:45:27,487 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:27,487 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:27,487 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:27,488 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 9, 9, 9, 8, 5, 5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:27,488 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:27,489 INFO L748 eck$LassoCheckResult]: Stem: 10316#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 10305#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 10297#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 10298#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10312#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 10313#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10314#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 10375#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10374#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 10373#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10372#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 10371#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10370#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 10369#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10367#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 10365#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10363#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 10361#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10359#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 10358#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10356#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 10353#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 10320#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 10319#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 10282#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 10283#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 10290#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 10291#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10310#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 10311#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 10341#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10339#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 10337#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 10335#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10333#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 10331#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 10329#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10327#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 10322#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 10325#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10321#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 10288#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 10289#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10340#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 10338#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 10336#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10334#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 10332#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 10330#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10328#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 10324#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 10326#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10323#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 10295#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 10296#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 10306#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 10284#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 10285#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10309#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 10286#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 10287#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10318#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 10368#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 10366#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10364#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 10362#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 10360#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10355#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 10357#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 10354#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10307#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 10308#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 10352#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10351#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 10350#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 10349#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10348#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 10347#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 10346#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10345#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 10343#L30-2 [2023-11-26 10:45:27,489 INFO L750 eck$LassoCheckResult]: Loop: 10343#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 10344#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 10342#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 10343#L30-2 [2023-11-26 10:45:27,489 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:27,489 INFO L85 PathProgramCache]: Analyzing trace with hash -2047970572, now seen corresponding path program 15 times [2023-11-26 10:45:27,490 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:27,490 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591569828] [2023-11-26 10:45:27,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:27,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:27,511 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:27,511 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2132388969] [2023-11-26 10:45:27,511 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 10:45:27,511 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:27,512 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:27,516 INFO L229 MonitoredProcess]: Starting monitored process 64 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:27,535 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Waiting until timeout for monitored process [2023-11-26 10:45:27,829 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2023-11-26 10:45:27,829 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:27,832 INFO L262 TraceCheckSpWp]: Trace formula consists of 327 conjuncts, 42 conjunts are in the unsatisfiable core [2023-11-26 10:45:27,834 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:28,363 INFO L134 CoverageAnalysis]: Checked inductivity of 309 backedges. 191 proven. 85 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2023-11-26 10:45:28,363 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:29,222 INFO L134 CoverageAnalysis]: Checked inductivity of 309 backedges. 126 proven. 150 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2023-11-26 10:45:29,222 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:29,222 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591569828] [2023-11-26 10:45:29,222 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:29,222 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2132388969] [2023-11-26 10:45:29,222 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2132388969] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:29,222 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:29,223 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25] total 38 [2023-11-26 10:45:29,223 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [356154987] [2023-11-26 10:45:29,223 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:29,223 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:45:29,223 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:29,224 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 11 times [2023-11-26 10:45:29,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:29,224 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870287094] [2023-11-26 10:45:29,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:29,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:29,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:29,229 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:29,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:29,233 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:29,325 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:29,325 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2023-11-26 10:45:29,326 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=339, Invalid=1067, Unknown=0, NotChecked=0, Total=1406 [2023-11-26 10:45:29,326 INFO L87 Difference]: Start difference. First operand 112 states and 121 transitions. cyclomatic complexity: 18 Second operand has 38 states, 38 states have (on average 2.6052631578947367) internal successors, (99), 38 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:30,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:30,098 INFO L93 Difference]: Finished difference Result 227 states and 250 transitions. [2023-11-26 10:45:30,098 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 227 states and 250 transitions. [2023-11-26 10:45:30,099 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 24 [2023-11-26 10:45:30,101 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 227 states to 222 states and 245 transitions. [2023-11-26 10:45:30,101 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 129 [2023-11-26 10:45:30,101 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 129 [2023-11-26 10:45:30,102 INFO L73 IsDeterministic]: Start isDeterministic. Operand 222 states and 245 transitions. [2023-11-26 10:45:30,102 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:30,102 INFO L218 hiAutomatonCegarLoop]: Abstraction has 222 states and 245 transitions. [2023-11-26 10:45:30,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states and 245 transitions. [2023-11-26 10:45:30,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 121. [2023-11-26 10:45:30,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 121 states, 121 states have (on average 1.0743801652892562) internal successors, (130), 120 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:30,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 130 transitions. [2023-11-26 10:45:30,106 INFO L240 hiAutomatonCegarLoop]: Abstraction has 121 states and 130 transitions. [2023-11-26 10:45:30,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2023-11-26 10:45:30,115 INFO L428 stractBuchiCegarLoop]: Abstraction has 121 states and 130 transitions. [2023-11-26 10:45:30,115 INFO L335 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2023-11-26 10:45:30,115 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 121 states and 130 transitions. [2023-11-26 10:45:30,116 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:30,116 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:30,117 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:30,117 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 10, 10, 9, 6, 6, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:30,118 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:30,118 INFO L748 eck$LassoCheckResult]: Stem: 11191#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 11181#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 11173#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 11174#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 11187#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 11188#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 11189#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 11216#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 11215#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 11214#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 11213#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 11212#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 11211#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 11210#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 11209#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 11208#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 11207#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 11206#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 11205#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 11204#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 11203#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 11202#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 11198#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 11197#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 11158#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 11159#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 11184#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11232#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11231#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 11230#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11229#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11228#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 11227#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11226#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11225#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 11224#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11223#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11222#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 11221#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11220#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11219#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 11200#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11201#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11199#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 11164#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 11165#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11196#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 11166#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 11167#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11185#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 11186#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 11238#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11237#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 11234#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 11235#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11233#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 11170#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 11171#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 11182#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 11160#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11161#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11192#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 11258#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11193#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11183#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 11162#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11163#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11257#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 11256#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11255#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11254#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 11253#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11252#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11249#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 11251#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 11247#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11248#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 11250#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 11246#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11245#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 11244#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 11243#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11242#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 11241#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 11240#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11239#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 11218#L30-2 [2023-11-26 10:45:30,118 INFO L750 eck$LassoCheckResult]: Loop: 11218#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 11236#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 11217#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 11218#L30-2 [2023-11-26 10:45:30,119 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:30,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1190377541, now seen corresponding path program 16 times [2023-11-26 10:45:30,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:30,119 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [339874359] [2023-11-26 10:45:30,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:30,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:30,141 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:30,141 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1548495145] [2023-11-26 10:45:30,141 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-26 10:45:30,142 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:30,142 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:30,152 INFO L229 MonitoredProcess]: Starting monitored process 65 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:30,158 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Waiting until timeout for monitored process [2023-11-26 10:45:30,428 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-26 10:45:30,429 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2023-11-26 10:45:30,429 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:30,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:30,666 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:30,666 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:30,666 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 12 times [2023-11-26 10:45:30,666 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:30,666 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1825651537] [2023-11-26 10:45:30,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:30,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:30,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:30,670 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:30,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:30,677 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:30,678 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:30,678 INFO L85 PathProgramCache]: Analyzing trace with hash 1007693877, now seen corresponding path program 17 times [2023-11-26 10:45:30,678 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:30,679 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2073334042] [2023-11-26 10:45:30,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:30,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:30,703 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:30,704 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [781783326] [2023-11-26 10:45:30,704 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-26 10:45:30,704 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:30,704 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:30,709 INFO L229 MonitoredProcess]: Starting monitored process 66 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:30,736 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Waiting until timeout for monitored process [2023-11-26 10:45:30,952 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2023-11-26 10:45:30,952 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:30,955 INFO L262 TraceCheckSpWp]: Trace formula consists of 347 conjuncts, 25 conjunts are in the unsatisfiable core [2023-11-26 10:45:30,994 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:31,649 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 128 proven. 179 refuted. 0 times theorem prover too weak. 83 trivial. 0 not checked. [2023-11-26 10:45:31,649 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:32,169 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 134 proven. 173 refuted. 0 times theorem prover too weak. 83 trivial. 0 not checked. [2023-11-26 10:45:32,169 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:32,169 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2073334042] [2023-11-26 10:45:32,169 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:32,169 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [781783326] [2023-11-26 10:45:32,169 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [781783326] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:32,169 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:32,169 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 24] total 36 [2023-11-26 10:45:32,170 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [978239109] [2023-11-26 10:45:32,170 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:32,247 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:32,248 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2023-11-26 10:45:32,248 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=346, Invalid=986, Unknown=0, NotChecked=0, Total=1332 [2023-11-26 10:45:32,249 INFO L87 Difference]: Start difference. First operand 121 states and 130 transitions. cyclomatic complexity: 18 Second operand has 37 states, 36 states have (on average 2.8333333333333335) internal successors, (102), 37 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:33,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:33,052 INFO L93 Difference]: Finished difference Result 229 states and 240 transitions. [2023-11-26 10:45:33,052 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 229 states and 240 transitions. [2023-11-26 10:45:33,053 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:33,054 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 229 states to 124 states and 133 transitions. [2023-11-26 10:45:33,055 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 55 [2023-11-26 10:45:33,055 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 55 [2023-11-26 10:45:33,055 INFO L73 IsDeterministic]: Start isDeterministic. Operand 124 states and 133 transitions. [2023-11-26 10:45:33,055 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:33,055 INFO L218 hiAutomatonCegarLoop]: Abstraction has 124 states and 133 transitions. [2023-11-26 10:45:33,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states and 133 transitions. [2023-11-26 10:45:33,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 123. [2023-11-26 10:45:33,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 123 states have (on average 1.0731707317073171) internal successors, (132), 122 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:33,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 132 transitions. [2023-11-26 10:45:33,059 INFO L240 hiAutomatonCegarLoop]: Abstraction has 123 states and 132 transitions. [2023-11-26 10:45:33,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2023-11-26 10:45:33,060 INFO L428 stractBuchiCegarLoop]: Abstraction has 123 states and 132 transitions. [2023-11-26 10:45:33,060 INFO L335 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2023-11-26 10:45:33,060 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 123 states and 132 transitions. [2023-11-26 10:45:33,061 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:33,062 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:33,062 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:33,063 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 11, 10, 10, 10, 9, 6, 6, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:33,063 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:33,063 INFO L748 eck$LassoCheckResult]: Stem: 12125#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 12115#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 12107#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 12108#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 12121#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 12122#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 12123#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 12193#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 12192#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 12191#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 12190#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 12189#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 12188#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 12187#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 12186#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 12185#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 12184#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 12183#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 12182#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 12181#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 12180#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 12179#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 12178#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 12176#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 12130#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 12129#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 12092#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 12093#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 12119#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12160#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12159#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 12157#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12155#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12153#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 12151#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12149#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12147#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 12145#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12144#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12142#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 12139#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12138#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12137#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 12135#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12136#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12134#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 12100#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 12101#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12120#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 12102#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 12103#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12165#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 12163#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 12162#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12161#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 12132#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 12133#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12131#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 12105#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 12106#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 12116#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 12164#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12127#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12118#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 12096#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12097#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12128#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 12177#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12175#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12174#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 12173#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12172#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12171#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 12170#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12169#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12167#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 12168#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 12166#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12117#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 12094#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 12095#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12158#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 12156#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 12154#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12152#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 12150#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 12148#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12146#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 12141#L30-2 [2023-11-26 10:45:33,064 INFO L750 eck$LassoCheckResult]: Loop: 12141#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 12143#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 12140#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 12141#L30-2 [2023-11-26 10:45:33,064 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:33,064 INFO L85 PathProgramCache]: Analyzing trace with hash 602132313, now seen corresponding path program 18 times [2023-11-26 10:45:33,064 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:33,064 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [159532330] [2023-11-26 10:45:33,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:33,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:33,091 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:33,091 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [551858375] [2023-11-26 10:45:33,091 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-26 10:45:33,092 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:33,092 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:33,097 INFO L229 MonitoredProcess]: Starting monitored process 67 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:33,117 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (67)] Waiting until timeout for monitored process [2023-11-26 10:45:33,628 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2023-11-26 10:45:33,628 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:33,632 INFO L262 TraceCheckSpWp]: Trace formula consists of 346 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-26 10:45:33,634 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:34,043 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 100 proven. 166 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2023-11-26 10:45:34,044 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:34,382 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 100 proven. 166 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2023-11-26 10:45:34,383 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:34,383 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [159532330] [2023-11-26 10:45:34,383 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:34,383 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [551858375] [2023-11-26 10:45:34,383 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [551858375] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:34,383 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:34,383 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 36 [2023-11-26 10:45:34,383 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [633765246] [2023-11-26 10:45:34,383 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:34,384 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:45:34,384 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:34,384 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 13 times [2023-11-26 10:45:34,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:34,384 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [841442171] [2023-11-26 10:45:34,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:34,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:34,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:34,389 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:34,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:34,394 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:34,504 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:34,505 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2023-11-26 10:45:34,505 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=311, Invalid=949, Unknown=0, NotChecked=0, Total=1260 [2023-11-26 10:45:34,506 INFO L87 Difference]: Start difference. First operand 123 states and 132 transitions. cyclomatic complexity: 18 Second operand has 36 states, 36 states have (on average 2.6666666666666665) internal successors, (96), 36 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:35,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:35,393 INFO L93 Difference]: Finished difference Result 321 states and 359 transitions. [2023-11-26 10:45:35,393 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 321 states and 359 transitions. [2023-11-26 10:45:35,396 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:35,398 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 321 states to 321 states and 359 transitions. [2023-11-26 10:45:35,398 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 180 [2023-11-26 10:45:35,398 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 180 [2023-11-26 10:45:35,398 INFO L73 IsDeterministic]: Start isDeterministic. Operand 321 states and 359 transitions. [2023-11-26 10:45:35,399 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:35,399 INFO L218 hiAutomatonCegarLoop]: Abstraction has 321 states and 359 transitions. [2023-11-26 10:45:35,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states and 359 transitions. [2023-11-26 10:45:35,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 129. [2023-11-26 10:45:35,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 129 states have (on average 1.069767441860465) internal successors, (138), 128 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:35,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2023-11-26 10:45:35,403 INFO L240 hiAutomatonCegarLoop]: Abstraction has 129 states and 138 transitions. [2023-11-26 10:45:35,406 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2023-11-26 10:45:35,406 INFO L428 stractBuchiCegarLoop]: Abstraction has 129 states and 138 transitions. [2023-11-26 10:45:35,406 INFO L335 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2023-11-26 10:45:35,406 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 129 states and 138 transitions. [2023-11-26 10:45:35,407 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:35,407 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:35,408 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:35,409 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 11, 11, 11, 11, 10, 6, 6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:35,409 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:35,409 INFO L748 eck$LassoCheckResult]: Stem: 13174#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 13164#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 13159#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 13160#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 13170#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 13171#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 13172#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 13205#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 13204#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 13203#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 13202#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 13201#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 13200#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 13198#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 13195#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 13194#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 13192#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 13189#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 13188#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 13187#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 13186#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 13185#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 13184#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 13183#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 13182#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 13181#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 13141#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 13142#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 13168#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13180#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13169#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 13149#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13150#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13239#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 13238#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13237#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13236#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 13235#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13234#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13233#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 13232#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13231#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13230#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 13227#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13229#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13226#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 13147#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 13148#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13225#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 13223#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 13221#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13219#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 13217#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 13215#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13213#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 13211#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 13209#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13207#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 13197#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 13199#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13196#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 13153#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 13154#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 13165#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13228#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13175#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13176#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13242#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13243#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13244#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13240#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13241#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13249#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13248#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13247#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13246#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13245#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13177#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13167#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13145#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 13146#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13166#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13143#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 13144#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13224#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13222#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 13220#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13218#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13216#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 13214#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13212#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13210#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 13208#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13206#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13191#L30-2 [2023-11-26 10:45:35,409 INFO L750 eck$LassoCheckResult]: Loop: 13191#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 13193#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 13190#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 13191#L30-2 [2023-11-26 10:45:35,410 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:35,410 INFO L85 PathProgramCache]: Analyzing trace with hash -530614410, now seen corresponding path program 19 times [2023-11-26 10:45:35,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:35,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846645715] [2023-11-26 10:45:35,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:35,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:35,446 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:35,453 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1482359156] [2023-11-26 10:45:35,453 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-26 10:45:35,454 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:35,454 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:35,461 INFO L229 MonitoredProcess]: Starting monitored process 68 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:35,465 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (68)] Waiting until timeout for monitored process [2023-11-26 10:45:35,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:35,825 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:35,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:35,963 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:35,963 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:35,963 INFO L85 PathProgramCache]: Analyzing trace with hash 84527, now seen corresponding path program 14 times [2023-11-26 10:45:35,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:35,964 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1363043623] [2023-11-26 10:45:35,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:35,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:35,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:35,968 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:45:35,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:45:35,973 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:45:35,973 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:35,974 INFO L85 PathProgramCache]: Analyzing trace with hash -2054184294, now seen corresponding path program 20 times [2023-11-26 10:45:35,974 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:35,974 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623422712] [2023-11-26 10:45:35,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:35,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:36,020 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:36,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1301927919] [2023-11-26 10:45:36,021 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 10:45:36,021 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:36,021 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:36,023 INFO L229 MonitoredProcess]: Starting monitored process 69 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:36,024 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (69)] Waiting until timeout for monitored process [2023-11-26 10:45:36,216 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 10:45:36,216 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:36,218 INFO L262 TraceCheckSpWp]: Trace formula consists of 382 conjuncts, 26 conjunts are in the unsatisfiable core [2023-11-26 10:45:36,220 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:36,665 INFO L134 CoverageAnalysis]: Checked inductivity of 473 backedges. 176 proven. 121 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2023-11-26 10:45:36,665 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:45:37,173 INFO L134 CoverageAnalysis]: Checked inductivity of 473 backedges. 176 proven. 121 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2023-11-26 10:45:37,173 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:45:37,173 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1623422712] [2023-11-26 10:45:37,173 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:45:37,173 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1301927919] [2023-11-26 10:45:37,174 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1301927919] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:45:37,174 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 10:45:37,174 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 38 [2023-11-26 10:45:37,174 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367909369] [2023-11-26 10:45:37,174 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 10:45:37,273 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:45:37,274 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2023-11-26 10:45:37,275 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=363, Invalid=1119, Unknown=0, NotChecked=0, Total=1482 [2023-11-26 10:45:37,275 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. cyclomatic complexity: 18 Second operand has 39 states, 38 states have (on average 2.710526315789474) internal successors, (103), 39 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:37,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:45:37,951 INFO L93 Difference]: Finished difference Result 246 states and 257 transitions. [2023-11-26 10:45:37,951 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 246 states and 257 transitions. [2023-11-26 10:45:37,953 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:37,954 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 246 states to 132 states and 141 transitions. [2023-11-26 10:45:37,954 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 58 [2023-11-26 10:45:37,954 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 58 [2023-11-26 10:45:37,954 INFO L73 IsDeterministic]: Start isDeterministic. Operand 132 states and 141 transitions. [2023-11-26 10:45:37,954 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:45:37,954 INFO L218 hiAutomatonCegarLoop]: Abstraction has 132 states and 141 transitions. [2023-11-26 10:45:37,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states and 141 transitions. [2023-11-26 10:45:37,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 131. [2023-11-26 10:45:37,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 131 states, 131 states have (on average 1.0687022900763359) internal successors, (140), 130 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:45:37,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 140 transitions. [2023-11-26 10:45:37,957 INFO L240 hiAutomatonCegarLoop]: Abstraction has 131 states and 140 transitions. [2023-11-26 10:45:37,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2023-11-26 10:45:37,958 INFO L428 stractBuchiCegarLoop]: Abstraction has 131 states and 140 transitions. [2023-11-26 10:45:37,958 INFO L335 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2023-11-26 10:45:37,958 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 131 states and 140 transitions. [2023-11-26 10:45:37,993 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 12 [2023-11-26 10:45:37,993 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:45:37,993 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:45:37,994 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [12, 12, 11, 11, 11, 10, 6, 6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:45:37,994 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:45:37,995 INFO L748 eck$LassoCheckResult]: Stem: 14172#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);~N~0 := 0; 14161#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet5#1, main_#t~ret6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~ret9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~post11#1, main_~i~2#1, main_#t~ret13#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;havoc main_#t~nondet5#1;~N~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1; 14153#L44 assume ~N~0 > 1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(4 * ~N~0 % 4294967296);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 14154#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14168#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14169#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14170#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14247#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14246#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14245#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14244#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14243#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14242#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14241#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14240#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14238#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14236#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14234#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14232#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14230#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14228#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14226#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14224#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14223#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14221#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14218#L18-3 assume !!(init_nondet_~i~0#1 < ~N~0);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 14176#L18-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 14175#L18-3 assume !(init_nondet_~i~0#1 < ~N~0); 14138#L16 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 14139#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 14146#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14147#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14166#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 14167#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14203#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14201#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 14199#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14197#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14195#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 14193#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14191#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14189#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 14187#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14185#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14183#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 14178#L30 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14181#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14177#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 14144#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 14145#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14202#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 14200#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 14198#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14196#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 14194#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 14192#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14190#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 14188#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 14186#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14184#L29-3 assume !!(rangesum_~i~1#1 < ~N~0); 14180#L30 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 14182#L29-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14179#L29-3 assume !(rangesum_~i~1#1 < ~N~0); 14151#L29-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 14152#rangesum_returnLabel#1 main_#t~ret6#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret6#1;havoc main_#t~ret6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem7#1;havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem8#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem8#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 14162#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14140#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14141#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14165#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14142#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14143#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14174#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14239#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14237#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14235#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14233#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14231#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14229#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14227#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14225#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14220#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14222#L30-2 assume !(rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2)); 14219#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14163#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14164#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 14217#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14216#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14215#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 14214#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14213#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14212#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 14211#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14210#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14209#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 14208#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14207#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14205#L30-2 [2023-11-26 10:45:37,995 INFO L750 eck$LassoCheckResult]: Loop: 14205#L30-2 assume rangesum_~i~1#1 > (if ~N~0 < 0 && 0 != ~N~0 % 2 then 1 + ~N~0 / 2 else ~N~0 / 2);call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 14206#L29-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 14204#L29-8 assume !!(rangesum_~i~1#1 < ~N~0); 14205#L30-2 [2023-11-26 10:45:37,995 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:45:37,996 INFO L85 PathProgramCache]: Analyzing trace with hash 486310164, now seen corresponding path program 21 times [2023-11-26 10:45:37,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:45:37,996 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447531739] [2023-11-26 10:45:37,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:45:37,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:45:38,023 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:45:38,023 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [22336814] [2023-11-26 10:45:38,023 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 10:45:38,024 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:45:38,024 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:45:38,029 INFO L229 MonitoredProcess]: Starting monitored process 70 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:45:38,038 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_31431c02-9f18-485d-95da-26293dfd6b50/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (70)] Waiting until timeout for monitored process [2023-11-26 10:45:38,383 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2023-11-26 10:45:38,383 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:45:38,387 INFO L262 TraceCheckSpWp]: Trace formula consists of 381 conjuncts, 29 conjunts are in the unsatisfiable core [2023-11-26 10:45:38,389 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:45:38,984 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 290 proven. 120 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2023-11-26 10:45:38,985 INFO L327 TraceCheckSpWp]: Computing backward predicates...