./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_nondet_test3-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_nondet_test3-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash be29e8161f6a6b8e8b181f151bf5388e6a9e3237ae426f572d4ceda403cee9b8 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 12:04:59,771 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 12:04:59,874 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 12:04:59,879 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 12:04:59,879 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 12:04:59,926 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 12:04:59,927 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 12:04:59,927 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 12:04:59,928 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 12:04:59,934 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 12:04:59,934 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 12:04:59,935 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 12:04:59,935 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 12:04:59,937 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 12:04:59,938 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 12:04:59,938 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 12:04:59,939 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 12:04:59,940 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 12:04:59,940 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 12:04:59,940 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 12:04:59,941 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 12:04:59,941 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 12:04:59,942 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 12:04:59,942 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 12:04:59,943 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 12:04:59,943 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 12:04:59,943 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 12:04:59,944 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 12:04:59,944 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 12:04:59,945 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 12:04:59,945 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 12:04:59,945 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 12:04:59,946 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 12:04:59,946 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 12:04:59,971 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 12:04:59,971 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 12:04:59,971 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 12:04:59,972 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 12:04:59,972 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> be29e8161f6a6b8e8b181f151bf5388e6a9e3237ae426f572d4ceda403cee9b8 [2023-11-26 12:05:00,300 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 12:05:00,341 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 12:05:00,344 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 12:05:00,345 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 12:05:00,346 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 12:05:00,348 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_nondet_test3-2.i [2023-11-26 12:05:03,514 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 12:05:03,967 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 12:05:03,969 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_nondet_test3-2.i [2023-11-26 12:05:03,999 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/data/deb916efc/b9ca4bc4e7074338aff00c83046edabb/FLAG65960c7b0 [2023-11-26 12:05:04,019 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/data/deb916efc/b9ca4bc4e7074338aff00c83046edabb [2023-11-26 12:05:04,029 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 12:05:04,033 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 12:05:04,038 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 12:05:04,038 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 12:05:04,044 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 12:05:04,045 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:05:04" (1/1) ... [2023-11-26 12:05:04,047 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2ffedacf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:04, skipping insertion in model container [2023-11-26 12:05:04,047 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:05:04" (1/1) ... [2023-11-26 12:05:04,152 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 12:05:04,771 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:05:04,785 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 12:05:04,965 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:05:05,012 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-26 12:05:05,020 INFO L206 MainTranslator]: Completed translation [2023-11-26 12:05:05,021 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05 WrapperNode [2023-11-26 12:05:05,021 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 12:05:05,022 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 12:05:05,023 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 12:05:05,023 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 12:05:05,031 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,094 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,255 INFO L138 Inliner]: procedures = 177, calls = 333, calls flagged for inlining = 5, calls inlined = 6, statements flattened = 1514 [2023-11-26 12:05:05,255 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 12:05:05,256 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 12:05:05,256 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 12:05:05,257 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 12:05:05,271 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,271 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,284 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,434 INFO L175 MemorySlicer]: Split 307 memory accesses to 4 slices as follows [2, 266, 5, 34]. 87 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0, 0]. The 63 writes are split as follows [0, 58, 1, 4]. [2023-11-26 12:05:05,434 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,434 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,497 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,522 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,539 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,556 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,576 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 12:05:05,577 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 12:05:05,578 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 12:05:05,578 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 12:05:05,579 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (1/1) ... [2023-11-26 12:05:05,585 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:05:05,600 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:05,615 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:05:05,637 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 12:05:05,663 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 12:05:05,663 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 12:05:05,664 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 12:05:05,664 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-26 12:05:05,664 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 12:05:05,664 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 12:05:05,664 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 12:05:05,665 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-26 12:05:05,665 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 12:05:05,665 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 12:05:05,665 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 12:05:05,665 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-26 12:05:05,666 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 12:05:05,666 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 12:05:05,667 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 12:05:05,668 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-26 12:05:05,668 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 12:05:05,668 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 12:05:05,668 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 12:05:05,669 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 12:05:05,669 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 12:05:05,669 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-26 12:05:05,669 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 12:05:05,670 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-26 12:05:05,670 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 12:05:05,670 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 12:05:05,671 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 12:05:05,671 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-26 12:05:05,671 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 12:05:05,671 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 12:05:05,672 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 12:05:05,673 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 12:05:05,673 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-26 12:05:05,673 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 12:05:05,674 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 12:05:06,024 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 12:05:06,027 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 12:05:06,031 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:05:06,093 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:05:06,113 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:05:06,133 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:05:08,244 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 12:05:08,263 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 12:05:08,263 INFO L309 CfgBuilder]: Removed 72 assume(true) statements. [2023-11-26 12:05:08,265 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:05:08 BoogieIcfgContainer [2023-11-26 12:05:08,266 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 12:05:08,267 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 12:05:08,267 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 12:05:08,271 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 12:05:08,272 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:05:08,272 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 12:05:04" (1/3) ... [2023-11-26 12:05:08,273 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@396596ff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:05:08, skipping insertion in model container [2023-11-26 12:05:08,273 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:05:08,274 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:05" (2/3) ... [2023-11-26 12:05:08,274 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@396596ff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:05:08, skipping insertion in model container [2023-11-26 12:05:08,274 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:05:08,275 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:05:08" (3/3) ... [2023-11-26 12:05:08,276 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_FNV_nondet_test3-2.i [2023-11-26 12:05:08,344 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 12:05:08,345 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 12:05:08,345 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 12:05:08,345 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 12:05:08,345 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 12:05:08,345 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 12:05:08,346 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 12:05:08,346 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 12:05:08,352 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 394 states, 389 states have (on average 1.6889460154241644) internal successors, (657), 389 states have internal predecessors, (657), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:08,402 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 378 [2023-11-26 12:05:08,403 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:08,403 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:08,411 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2023-11-26 12:05:08,411 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-26 12:05:08,411 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 12:05:08,413 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 394 states, 389 states have (on average 1.6889460154241644) internal successors, (657), 389 states have internal predecessors, (657), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:08,429 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 378 [2023-11-26 12:05:08,429 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:08,429 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:08,430 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2023-11-26 12:05:08,430 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-26 12:05:08,439 INFO L748 eck$LassoCheckResult]: Stem: 123#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 325#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~short279#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~nondet303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1, main_#t~post318#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1; 18#L737true assume !(main_~bound~0#1 % 4294967296 >= 10000);call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 205#L738-4true [2023-11-26 12:05:08,440 INFO L750 eck$LassoCheckResult]: Loop: 205#L738-4true call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 24#L738-1true assume !!(main_#t~mem7#1 % 4294967296 < main_~bound~0#1 % 4294967296);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 332#L740true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 21#L740-2true call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 391#L745-269true assume !true; 276#L738-3true call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 205#L738-4true [2023-11-26 12:05:08,446 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:08,446 INFO L85 PathProgramCache]: Analyzing trace with hash 65608, now seen corresponding path program 1 times [2023-11-26 12:05:08,457 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:08,457 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87410264] [2023-11-26 12:05:08,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:08,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:08,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:08,583 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:08,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:08,651 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:08,655 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:08,656 INFO L85 PathProgramCache]: Analyzing trace with hash -2012150932, now seen corresponding path program 1 times [2023-11-26 12:05:08,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:08,656 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658690332] [2023-11-26 12:05:08,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:08,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:08,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:08,755 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:08,760 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [658690332] [2023-11-26 12:05:08,761 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-26 12:05:08,761 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [307957788] [2023-11-26 12:05:08,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:08,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:08,763 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:08,769 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:08,800 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-26 12:05:08,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:08,975 INFO L262 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-26 12:05:08,976 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:08,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:08,996 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:08,998 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [307957788] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:08,999 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:08,999 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 12:05:09,000 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1583041949] [2023-11-26 12:05:09,001 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:09,007 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:09,008 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:09,050 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 12:05:09,051 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 12:05:09,055 INFO L87 Difference]: Start difference. First operand has 394 states, 389 states have (on average 1.6889460154241644) internal successors, (657), 389 states have internal predecessors, (657), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:09,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:09,111 INFO L93 Difference]: Finished difference Result 392 states and 581 transitions. [2023-11-26 12:05:09,113 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 392 states and 581 transitions. [2023-11-26 12:05:09,123 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 374 [2023-11-26 12:05:09,142 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 392 states to 386 states and 574 transitions. [2023-11-26 12:05:09,143 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 386 [2023-11-26 12:05:09,146 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 386 [2023-11-26 12:05:09,147 INFO L73 IsDeterministic]: Start isDeterministic. Operand 386 states and 574 transitions. [2023-11-26 12:05:09,159 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:09,159 INFO L218 hiAutomatonCegarLoop]: Abstraction has 386 states and 574 transitions. [2023-11-26 12:05:09,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386 states and 574 transitions. [2023-11-26 12:05:09,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386 to 386. [2023-11-26 12:05:09,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 386 states, 382 states have (on average 1.486910994764398) internal successors, (568), 381 states have internal predecessors, (568), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:09,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 386 states to 386 states and 574 transitions. [2023-11-26 12:05:09,222 INFO L240 hiAutomatonCegarLoop]: Abstraction has 386 states and 574 transitions. [2023-11-26 12:05:09,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 12:05:09,226 INFO L428 stractBuchiCegarLoop]: Abstraction has 386 states and 574 transitions. [2023-11-26 12:05:09,227 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 12:05:09,227 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 386 states and 574 transitions. [2023-11-26 12:05:09,229 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 374 [2023-11-26 12:05:09,229 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:09,229 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:09,231 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2023-11-26 12:05:09,232 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:09,232 INFO L748 eck$LassoCheckResult]: Stem: 1028#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1029#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~short279#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~nondet303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1, main_#t~post318#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1; 843#L737 assume !(main_~bound~0#1 % 4294967296 >= 10000);call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 844#L738-4 [2023-11-26 12:05:09,234 INFO L750 eck$LassoCheckResult]: Loop: 844#L738-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 855#L738-1 assume !!(main_#t~mem7#1 % 4294967296 < main_~bound~0#1 % 4294967296);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 857#L740 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 849#L740-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 850#L745-269 havoc main_~_ha_hashv~0#1; 966#L745-176 goto; 967#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1015#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1016#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 1168#L745-73 assume main_#t~switch33#1;call main_#t~mem34#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 823#L745-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 824#L745-76 assume main_#t~switch33#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 876#L745-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 877#L745-79 assume main_#t~switch33#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 1026#L745-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 1052#L745-82 assume main_#t~switch33#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1053#L745-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 1115#L745-85 assume main_#t~switch33#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1116#L745-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 1176#L745-88 assume !main_#t~switch33#1; 1139#L745-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 1072#L745-91 assume main_#t~switch33#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 864#L745-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 865#L745-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 1183#L745-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 1137#L745-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 1101#L745-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 1102#L745-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 1043#L745-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 1044#L745-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 848#L745-105 havoc main_#t~switch33#1; 841#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 842#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1001#L745-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 963#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 965#L745-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1111#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1128#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1160#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 946#L745-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1066#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 920#L745-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1133#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1166#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1167#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1048#L745-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1084#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 896#L745-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 817#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 818#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 984#L745-170 goto; 985#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1038#L745-173 goto; 1069#L745-175 goto; 862#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 863#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 1022#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 1023#L745-193 goto; 1098#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#1(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#1(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 1099#L745-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#1(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 1108#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 1109#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 950#L745-202 goto; 951#L745-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#1(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1106#L745-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 1107#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 1076#L745-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#1(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 1077#L745-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 1058#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1063#L745-260 goto; 1144#L745-262 havoc main_~_ha_bkt~0#1; 1171#L745-263 goto; 1172#L745-265 goto; 1186#L745-267 havoc main_~_ha_hashv~0#1; 1091#L745-268 goto; 1092#L738-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 844#L738-4 [2023-11-26 12:05:09,234 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:09,235 INFO L85 PathProgramCache]: Analyzing trace with hash 65608, now seen corresponding path program 2 times [2023-11-26 12:05:09,235 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:09,235 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [440223182] [2023-11-26 12:05:09,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:09,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:09,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:09,258 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:09,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:09,288 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:09,288 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:09,289 INFO L85 PathProgramCache]: Analyzing trace with hash 1166060693, now seen corresponding path program 1 times [2023-11-26 12:05:09,289 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:09,289 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114301852] [2023-11-26 12:05:09,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:09,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:09,379 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:09,383 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1991625747] [2023-11-26 12:05:09,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:09,384 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:09,384 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:09,412 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:09,432 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-26 12:05:09,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:09,790 INFO L262 TraceCheckSpWp]: Trace formula consists of 545 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 12:05:09,795 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:09,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:09,844 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:09,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:09,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114301852] [2023-11-26 12:05:09,845 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:05:09,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1991625747] [2023-11-26 12:05:09,846 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1991625747] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:09,846 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:09,846 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 12:05:09,846 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [172677585] [2023-11-26 12:05:09,847 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:09,847 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:09,848 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:09,848 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 12:05:09,848 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 12:05:09,849 INFO L87 Difference]: Start difference. First operand 386 states and 574 transitions. cyclomatic complexity: 193 Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:09,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:09,980 INFO L93 Difference]: Finished difference Result 407 states and 595 transitions. [2023-11-26 12:05:09,980 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 407 states and 595 transitions. [2023-11-26 12:05:09,986 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 395 [2023-11-26 12:05:09,990 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 407 states to 407 states and 595 transitions. [2023-11-26 12:05:09,991 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 407 [2023-11-26 12:05:09,991 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 407 [2023-11-26 12:05:09,991 INFO L73 IsDeterministic]: Start isDeterministic. Operand 407 states and 595 transitions. [2023-11-26 12:05:09,992 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:09,993 INFO L218 hiAutomatonCegarLoop]: Abstraction has 407 states and 595 transitions. [2023-11-26 12:05:09,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 407 states and 595 transitions. [2023-11-26 12:05:10,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 407 to 406. [2023-11-26 12:05:10,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 406 states, 402 states have (on average 1.462686567164179) internal successors, (588), 401 states have internal predecessors, (588), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:10,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 594 transitions. [2023-11-26 12:05:10,024 INFO L240 hiAutomatonCegarLoop]: Abstraction has 406 states and 594 transitions. [2023-11-26 12:05:10,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 12:05:10,029 INFO L428 stractBuchiCegarLoop]: Abstraction has 406 states and 594 transitions. [2023-11-26 12:05:10,029 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 12:05:10,029 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 406 states and 594 transitions. [2023-11-26 12:05:10,031 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 394 [2023-11-26 12:05:10,031 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:10,032 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:10,035 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2023-11-26 12:05:10,035 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:10,035 INFO L748 eck$LassoCheckResult]: Stem: 2053#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 2054#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~short279#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~nondet303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1, main_#t~post318#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1; 1867#L737 assume !(main_~bound~0#1 % 4294967296 >= 10000);call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1868#L738-4 [2023-11-26 12:05:10,042 INFO L750 eck$LassoCheckResult]: Loop: 1868#L738-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1879#L738-1 assume !!(main_#t~mem7#1 % 4294967296 < main_~bound~0#1 % 4294967296);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 1881#L740 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1873#L740-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 1874#L745-269 havoc main_~_ha_hashv~0#1; 1990#L745-176 goto; 1991#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2039#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2040#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 2195#L745-73 assume main_#t~switch33#1;call main_#t~mem34#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 2224#L745-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 2213#L745-76 assume main_#t~switch33#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 2214#L745-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 2050#L745-79 assume main_#t~switch33#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 2051#L745-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 2077#L745-82 assume main_#t~switch33#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 2078#L745-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 2141#L745-85 assume main_#t~switch33#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 2142#L745-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 2203#L745-88 assume main_#t~switch33#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2165#L745-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 2098#L745-91 assume main_#t~switch33#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1888#L745-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 1889#L745-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 2210#L745-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 2163#L745-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 2127#L745-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 2128#L745-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 2172#L745-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 2095#L745-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 1872#L745-105 havoc main_#t~switch33#1; 1865#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1866#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2025#L745-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1987#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1989#L745-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2137#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2154#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2187#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1970#L745-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2091#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1944#L745-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2159#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2193#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2194#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2073#L745-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2110#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1920#L745-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1841#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1842#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 2008#L745-170 goto; 2009#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2063#L745-173 goto; 2094#L745-175 goto; 1886#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1887#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 2046#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 2047#L745-193 goto; 2124#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#1(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#1(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 2125#L745-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#1(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 2134#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 2135#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 1974#L745-202 goto; 1975#L745-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#1(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2132#L745-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 2133#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 2102#L745-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#1(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 2103#L745-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 2083#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2088#L745-260 goto; 2170#L745-262 havoc main_~_ha_bkt~0#1; 2198#L745-263 goto; 2199#L745-265 goto; 2215#L745-267 havoc main_~_ha_hashv~0#1; 2117#L745-268 goto; 2118#L738-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1868#L738-4 [2023-11-26 12:05:10,043 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:10,043 INFO L85 PathProgramCache]: Analyzing trace with hash 65608, now seen corresponding path program 3 times [2023-11-26 12:05:10,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:10,044 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056446491] [2023-11-26 12:05:10,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:10,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:10,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:10,081 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:10,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:10,133 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:10,133 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:10,134 INFO L85 PathProgramCache]: Analyzing trace with hash -94856557, now seen corresponding path program 1 times [2023-11-26 12:05:10,134 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:10,134 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [724203663] [2023-11-26 12:05:10,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:10,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:10,219 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:10,220 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [239353198] [2023-11-26 12:05:10,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:10,220 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:10,220 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:10,225 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:10,256 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-26 12:05:10,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:10,559 INFO L262 TraceCheckSpWp]: Trace formula consists of 551 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 12:05:10,562 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:10,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:10,589 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:10,589 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:10,590 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [724203663] [2023-11-26 12:05:10,590 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:05:10,590 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [239353198] [2023-11-26 12:05:10,590 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [239353198] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:10,591 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:10,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 12:05:10,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [314295363] [2023-11-26 12:05:10,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:10,592 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:10,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:10,593 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 12:05:10,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 12:05:10,593 INFO L87 Difference]: Start difference. First operand 406 states and 594 transitions. cyclomatic complexity: 193 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:10,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:10,752 INFO L93 Difference]: Finished difference Result 393 states and 574 transitions. [2023-11-26 12:05:10,752 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 393 states and 574 transitions. [2023-11-26 12:05:10,756 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 381 [2023-11-26 12:05:10,760 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 393 states to 393 states and 574 transitions. [2023-11-26 12:05:10,760 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 393 [2023-11-26 12:05:10,761 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 393 [2023-11-26 12:05:10,761 INFO L73 IsDeterministic]: Start isDeterministic. Operand 393 states and 574 transitions. [2023-11-26 12:05:10,762 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:10,762 INFO L218 hiAutomatonCegarLoop]: Abstraction has 393 states and 574 transitions. [2023-11-26 12:05:10,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states and 574 transitions. [2023-11-26 12:05:10,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 392. [2023-11-26 12:05:10,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 388 states have (on average 1.461340206185567) internal successors, (567), 387 states have internal predecessors, (567), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:10,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 573 transitions. [2023-11-26 12:05:10,773 INFO L240 hiAutomatonCegarLoop]: Abstraction has 392 states and 573 transitions. [2023-11-26 12:05:10,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 12:05:10,774 INFO L428 stractBuchiCegarLoop]: Abstraction has 392 states and 573 transitions. [2023-11-26 12:05:10,774 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 12:05:10,775 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 392 states and 573 transitions. [2023-11-26 12:05:10,777 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 380 [2023-11-26 12:05:10,777 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:10,777 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:10,778 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2023-11-26 12:05:10,778 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:10,779 INFO L748 eck$LassoCheckResult]: Stem: 3085#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 3086#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~short279#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~nondet303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1, main_#t~post318#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1; 2900#L737 assume !(main_~bound~0#1 % 4294967296 >= 10000);call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2901#L738-4 [2023-11-26 12:05:10,779 INFO L750 eck$LassoCheckResult]: Loop: 2901#L738-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2912#L738-1 assume !!(main_#t~mem7#1 % 4294967296 < main_~bound~0#1 % 4294967296);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 2914#L740 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2906#L740-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 2907#L745-269 havoc main_~_ha_hashv~0#1; 3023#L745-176 goto; 3024#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3072#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3073#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 3227#L745-73 assume !main_#t~switch33#1; 2880#L745-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 2881#L745-76 assume !main_#t~switch33#1; 2933#L745-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 2934#L745-79 assume !main_#t~switch33#1; 3083#L745-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 3109#L745-82 assume !main_#t~switch33#1; 3110#L745-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 3172#L745-85 assume !main_#t~switch33#1; 3173#L745-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 3235#L745-88 assume !main_#t~switch33#1; 3197#L745-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 3129#L745-91 assume !main_#t~switch33#1; 2921#L745-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 2922#L745-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 3242#L745-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 3194#L745-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 3195#L745-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 3204#L745-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 3100#L745-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 3101#L745-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 2905#L745-105 havoc main_#t~switch33#1; 2898#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2899#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3058#L745-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3020#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3022#L745-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3168#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3185#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3219#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3003#L745-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3123#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2977#L745-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3190#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3225#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3226#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3105#L745-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3141#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2953#L745-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2874#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2875#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 3041#L745-170 goto; 3042#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3095#L745-173 goto; 3126#L745-175 goto; 2919#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2920#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 3079#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 3080#L745-193 goto; 3155#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#1(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#1(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 3156#L745-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#1(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 3165#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 3166#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 3007#L745-202 goto; 3008#L745-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#1(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3163#L745-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 3164#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 3133#L745-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#1(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 3134#L745-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 3115#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3120#L745-260 goto; 3202#L745-262 havoc main_~_ha_bkt~0#1; 3230#L745-263 goto; 3231#L745-265 goto; 3246#L745-267 havoc main_~_ha_hashv~0#1; 3148#L745-268 goto; 3149#L738-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 2901#L738-4 [2023-11-26 12:05:10,780 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:10,780 INFO L85 PathProgramCache]: Analyzing trace with hash 65608, now seen corresponding path program 4 times [2023-11-26 12:05:10,780 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:10,781 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474739562] [2023-11-26 12:05:10,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:10,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:10,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:10,798 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:10,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:10,820 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:10,821 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:10,821 INFO L85 PathProgramCache]: Analyzing trace with hash 1755390369, now seen corresponding path program 1 times [2023-11-26 12:05:10,821 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:10,822 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [877597322] [2023-11-26 12:05:10,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:10,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:10,873 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:10,873 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2121331550] [2023-11-26 12:05:10,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:10,874 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:10,874 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:10,880 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:10,912 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-26 12:05:11,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:11,853 INFO L262 TraceCheckSpWp]: Trace formula consists of 509 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 12:05:11,857 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:12,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:12,014 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:12,014 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:12,015 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [877597322] [2023-11-26 12:05:12,015 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:05:12,015 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2121331550] [2023-11-26 12:05:12,016 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2121331550] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:12,016 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:12,016 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-26 12:05:12,016 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [139341460] [2023-11-26 12:05:12,016 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:12,017 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:12,017 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:12,018 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2023-11-26 12:05:12,018 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2023-11-26 12:05:12,018 INFO L87 Difference]: Start difference. First operand 392 states and 573 transitions. cyclomatic complexity: 186 Second operand has 8 states, 8 states have (on average 9.5) internal successors, (76), 8 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:12,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:12,913 INFO L93 Difference]: Finished difference Result 441 states and 635 transitions. [2023-11-26 12:05:12,913 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 441 states and 635 transitions. [2023-11-26 12:05:12,917 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 429 [2023-11-26 12:05:12,922 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 441 states to 441 states and 635 transitions. [2023-11-26 12:05:12,922 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 441 [2023-11-26 12:05:12,923 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 441 [2023-11-26 12:05:12,923 INFO L73 IsDeterministic]: Start isDeterministic. Operand 441 states and 635 transitions. [2023-11-26 12:05:12,924 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:12,924 INFO L218 hiAutomatonCegarLoop]: Abstraction has 441 states and 635 transitions. [2023-11-26 12:05:12,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states and 635 transitions. [2023-11-26 12:05:12,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 432. [2023-11-26 12:05:12,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 432 states, 428 states have (on average 1.4369158878504673) internal successors, (615), 427 states have internal predecessors, (615), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:12,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 432 states to 432 states and 621 transitions. [2023-11-26 12:05:12,936 INFO L240 hiAutomatonCegarLoop]: Abstraction has 432 states and 621 transitions. [2023-11-26 12:05:12,940 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 12:05:12,942 INFO L428 stractBuchiCegarLoop]: Abstraction has 432 states and 621 transitions. [2023-11-26 12:05:12,942 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 12:05:12,943 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 432 states and 621 transitions. [2023-11-26 12:05:12,945 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 420 [2023-11-26 12:05:12,945 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:12,945 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:12,983 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2023-11-26 12:05:12,983 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:12,983 INFO L748 eck$LassoCheckResult]: Stem: 4154#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 4155#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~short279#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~nondet303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1, main_#t~post318#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1; 3969#L737 assume !(main_~bound~0#1 % 4294967296 >= 10000);call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3970#L738-4 [2023-11-26 12:05:12,986 INFO L750 eck$LassoCheckResult]: Loop: 3970#L738-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3981#L738-1 assume !!(main_#t~mem7#1 % 4294967296 < main_~bound~0#1 % 4294967296);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 3983#L740 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3975#L740-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 3976#L745-269 havoc main_~_ha_hashv~0#1; 4092#L745-176 goto; 4093#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4141#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4142#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 4298#L745-73 assume !main_#t~switch33#1; 4365#L745-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 4364#L745-76 assume !main_#t~switch33#1; 4363#L745-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 4362#L745-79 assume !main_#t~switch33#1; 4361#L745-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 4360#L745-82 assume !main_#t~switch33#1; 4359#L745-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 4358#L745-85 assume !main_#t~switch33#1; 4357#L745-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 4355#L745-88 assume !main_#t~switch33#1; 4354#L745-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 4352#L745-91 assume !main_#t~switch33#1; 4351#L745-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 4349#L745-94 assume !main_#t~switch33#1; 4348#L745-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 4345#L745-97 assume !main_#t~switch33#1; 4343#L745-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 4340#L745-100 assume !main_#t~switch33#1; 4338#L745-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 4336#L745-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 4334#L745-105 havoc main_#t~switch33#1; 4333#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4332#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4331#L745-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4330#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 4329#L745-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4281#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 4282#L745-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1; 4257#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4290#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4072#L745-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4192#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4046#L745-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4262#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4296#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4297#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4174#L745-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4210#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4022#L745-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3943#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3944#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 4110#L745-170 goto; 4111#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4164#L745-173 goto; 4195#L745-175 goto; 3988#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3989#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 4148#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 4149#L745-193 goto; 4225#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#1(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#1(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 4226#L745-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#1(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 4235#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 4236#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 4076#L745-202 goto; 4077#L745-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#1(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4233#L745-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 4234#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 4202#L745-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#1(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 4203#L745-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 4184#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4189#L745-260 goto; 4273#L745-262 havoc main_~_ha_bkt~0#1; 4301#L745-263 goto; 4302#L745-265 goto; 4317#L745-267 havoc main_~_ha_hashv~0#1; 4217#L745-268 goto; 4218#L738-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3970#L738-4 [2023-11-26 12:05:12,987 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:12,987 INFO L85 PathProgramCache]: Analyzing trace with hash 65608, now seen corresponding path program 5 times [2023-11-26 12:05:12,987 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:12,987 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1764663464] [2023-11-26 12:05:12,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:12,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:13,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:13,021 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:13,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:13,058 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:13,059 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:13,059 INFO L85 PathProgramCache]: Analyzing trace with hash 1188084515, now seen corresponding path program 1 times [2023-11-26 12:05:13,059 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:13,059 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2061360428] [2023-11-26 12:05:13,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:13,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:13,118 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:13,118 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1761496342] [2023-11-26 12:05:13,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:13,119 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:13,119 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:13,124 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:13,160 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-26 12:05:13,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:13,457 INFO L262 TraceCheckSpWp]: Trace formula consists of 492 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 12:05:13,460 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:13,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:13,530 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:13,531 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:13,531 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2061360428] [2023-11-26 12:05:13,531 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:05:13,531 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1761496342] [2023-11-26 12:05:13,532 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1761496342] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:13,532 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:13,532 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 12:05:13,532 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1399931868] [2023-11-26 12:05:13,533 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:13,533 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:13,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:13,534 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 12:05:13,534 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-26 12:05:13,534 INFO L87 Difference]: Start difference. First operand 432 states and 621 transitions. cyclomatic complexity: 194 Second operand has 5 states, 5 states have (on average 15.4) internal successors, (77), 5 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:13,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:13,675 INFO L93 Difference]: Finished difference Result 509 states and 747 transitions. [2023-11-26 12:05:13,676 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 509 states and 747 transitions. [2023-11-26 12:05:13,680 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 497 [2023-11-26 12:05:13,685 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 509 states to 509 states and 747 transitions. [2023-11-26 12:05:13,686 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 509 [2023-11-26 12:05:13,687 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 509 [2023-11-26 12:05:13,687 INFO L73 IsDeterministic]: Start isDeterministic. Operand 509 states and 747 transitions. [2023-11-26 12:05:13,688 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:13,688 INFO L218 hiAutomatonCegarLoop]: Abstraction has 509 states and 747 transitions. [2023-11-26 12:05:13,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 509 states and 747 transitions. [2023-11-26 12:05:13,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 509 to 432. [2023-11-26 12:05:13,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 432 states, 428 states have (on average 1.4299065420560748) internal successors, (612), 427 states have internal predecessors, (612), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:13,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 432 states to 432 states and 618 transitions. [2023-11-26 12:05:13,701 INFO L240 hiAutomatonCegarLoop]: Abstraction has 432 states and 618 transitions. [2023-11-26 12:05:13,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 12:05:13,709 INFO L428 stractBuchiCegarLoop]: Abstraction has 432 states and 618 transitions. [2023-11-26 12:05:13,709 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 12:05:13,710 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 432 states and 618 transitions. [2023-11-26 12:05:13,714 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 420 [2023-11-26 12:05:13,715 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:13,715 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:13,716 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2023-11-26 12:05:13,716 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:13,719 INFO L748 eck$LassoCheckResult]: Stem: 5332#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 5333#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~short279#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~nondet303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1, main_#t~post318#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1; 5146#L737 assume !(main_~bound~0#1 % 4294967296 >= 10000);call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5147#L738-4 [2023-11-26 12:05:13,719 INFO L750 eck$LassoCheckResult]: Loop: 5147#L738-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5158#L738-1 assume !!(main_#t~mem7#1 % 4294967296 < main_~bound~0#1 % 4294967296);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 5160#L740 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5152#L740-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 5153#L745-269 havoc main_~_ha_hashv~0#1; 5269#L745-176 goto; 5270#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5318#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5319#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 5506#L745-73 assume !main_#t~switch33#1; 5507#L745-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 5543#L745-76 assume !main_#t~switch33#1; 5542#L745-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 5329#L745-79 assume !main_#t~switch33#1; 5330#L745-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 5357#L745-82 assume !main_#t~switch33#1; 5358#L745-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 5422#L745-85 assume !main_#t~switch33#1; 5423#L745-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 5537#L745-88 assume !main_#t~switch33#1; 5536#L745-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 5535#L745-91 assume !main_#t~switch33#1; 5534#L745-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 5528#L745-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 5526#L745-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 5524#L745-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 5522#L745-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 5520#L745-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 5518#L745-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 5516#L745-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 5151#L745-105 havoc main_#t~switch33#1; 5144#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5145#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5338#L745-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5266#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 5268#L745-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5418#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 5459#L745-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1; 5435#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5467#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5249#L745-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5371#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5223#L745-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5440#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5473#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5474#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5353#L745-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5390#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5199#L745-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5120#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5121#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 5287#L745-170 goto; 5288#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5343#L745-173 goto; 5374#L745-175 goto; 5165#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5166#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 5325#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#1(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 5326#L745-193 goto; 5405#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#1(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#1(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 5406#L745-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#1(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 5415#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 5416#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 5253#L745-202 goto; 5254#L745-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#1(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5413#L745-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 5414#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 5382#L745-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#1(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 5383#L745-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 5363#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5368#L745-260 goto; 5451#L745-262 havoc main_~_ha_bkt~0#1; 5479#L745-263 goto; 5480#L745-265 goto; 5496#L745-267 havoc main_~_ha_hashv~0#1; 5397#L745-268 goto; 5398#L738-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 5147#L738-4 [2023-11-26 12:05:13,720 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:13,720 INFO L85 PathProgramCache]: Analyzing trace with hash 65608, now seen corresponding path program 6 times [2023-11-26 12:05:13,720 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:13,723 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2138128468] [2023-11-26 12:05:13,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:13,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:13,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:13,750 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:13,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:13,768 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:13,768 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:13,769 INFO L85 PathProgramCache]: Analyzing trace with hash -745194263, now seen corresponding path program 1 times [2023-11-26 12:05:13,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:13,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [146407505] [2023-11-26 12:05:13,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:13,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:13,825 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:13,825 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [338373783] [2023-11-26 12:05:13,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:13,826 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:13,826 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:13,829 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:13,833 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ed26a325-21b3-432e-99f5-fbaf96e12be1/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-26 12:05:14,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:14,372 INFO L262 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 17 conjunts are in the unsatisfiable core [2023-11-26 12:05:14,376 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:14,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:14,596 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:14,596 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:14,596 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [146407505] [2023-11-26 12:05:14,596 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:05:14,597 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [338373783] [2023-11-26 12:05:14,597 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [338373783] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:14,597 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:14,597 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-26 12:05:14,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1408245151] [2023-11-26 12:05:14,600 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:14,600 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:14,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:14,601 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2023-11-26 12:05:14,601 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2023-11-26 12:05:14,602 INFO L87 Difference]: Start difference. First operand 432 states and 618 transitions. cyclomatic complexity: 191 Second operand has 8 states, 8 states have (on average 9.625) internal successors, (77), 8 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:22,429 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 7.04s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 12:05:34,683 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 12:05:46,709 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.03s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 12:05:58,720 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []