./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test6-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test6-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8374eced2cbda6aab489eb004cb8e41f23aad88b98cd5c6913f13583171f2c3f --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:58:36,398 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:58:36,465 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:58:36,471 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:58:36,472 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:58:36,499 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:58:36,500 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:58:36,501 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:58:36,502 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:58:36,502 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:58:36,503 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:58:36,504 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:58:36,505 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:58:36,505 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:58:36,506 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:58:36,506 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:58:36,507 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:58:36,507 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:58:36,508 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:58:36,508 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:58:36,509 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:58:36,510 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:58:36,510 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:58:36,510 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:58:36,511 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:58:36,511 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:58:36,512 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:58:36,512 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:58:36,513 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:58:36,513 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:58:36,513 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:58:36,514 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:58:36,514 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:58:36,515 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:58:36,515 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:58:36,516 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:58:36,516 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:58:36,517 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:58:36,517 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8374eced2cbda6aab489eb004cb8e41f23aad88b98cd5c6913f13583171f2c3f [2023-11-26 11:58:36,790 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:58:36,814 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:58:36,820 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:58:36,822 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:58:36,823 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:58:36,824 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test6-1.i [2023-11-26 11:58:39,991 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:58:40,427 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:58:40,428 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test6-1.i [2023-11-26 11:58:40,453 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/data/88eaab419/5fe71aefd0884afe90bd2d29799c1924/FLAG39a063619 [2023-11-26 11:58:40,468 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/data/88eaab419/5fe71aefd0884afe90bd2d29799c1924 [2023-11-26 11:58:40,471 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:58:40,472 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:58:40,474 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:58:40,474 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:58:40,480 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:58:40,481 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:58:40" (1/1) ... [2023-11-26 11:58:40,482 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6b68fbd7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:40, skipping insertion in model container [2023-11-26 11:58:40,482 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:58:40" (1/1) ... [2023-11-26 11:58:40,555 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:58:41,451 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:58:41,477 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:58:41,644 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:58:41,764 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-26 11:58:41,776 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:58:41,777 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41 WrapperNode [2023-11-26 11:58:41,777 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:58:41,779 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:58:41,779 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:58:41,780 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:58:41,813 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:41,858 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:41,974 INFO L138 Inliner]: procedures = 282, calls = 298, calls flagged for inlining = 23, calls inlined = 33, statements flattened = 1512 [2023-11-26 11:58:41,975 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:58:41,975 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:58:41,976 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:58:41,976 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:58:41,989 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:41,989 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:42,007 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:42,170 INFO L175 MemorySlicer]: Split 270 memory accesses to 5 slices as follows [2, 221, 8, 34, 5]. 82 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0, 0, 0]. The 59 writes are split as follows [0, 50, 4, 4, 1]. [2023-11-26 11:58:42,170 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:42,170 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:42,225 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:42,256 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:42,267 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:42,284 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:42,312 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:58:42,314 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:58:42,314 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:58:42,314 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:58:42,315 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (1/1) ... [2023-11-26 11:58:42,321 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:58:42,332 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:58:42,346 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:58:42,366 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:58:42,399 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 11:58:42,399 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 11:58:42,400 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 11:58:42,400 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-26 11:58:42,400 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#4 [2023-11-26 11:58:42,400 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 11:58:42,400 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 11:58:42,400 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 11:58:42,401 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-26 11:58:42,401 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#4 [2023-11-26 11:58:42,401 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 11:58:42,401 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-26 11:58:42,401 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 11:58:42,401 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 11:58:42,403 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 11:58:42,403 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-26 11:58:42,403 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#4 [2023-11-26 11:58:42,403 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 11:58:42,403 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 11:58:42,403 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 11:58:42,404 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 11:58:42,404 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-26 11:58:42,404 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#4 [2023-11-26 11:58:42,405 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 11:58:42,405 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 11:58:42,406 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 11:58:42,406 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-26 11:58:42,406 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#4 [2023-11-26 11:58:42,406 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 11:58:42,406 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:58:42,407 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 11:58:42,407 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 11:58:42,407 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 11:58:42,408 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-26 11:58:42,408 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#4 [2023-11-26 11:58:42,408 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:58:42,409 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 11:58:42,409 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 11:58:42,409 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-26 11:58:42,409 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#4 [2023-11-26 11:58:42,409 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:58:42,409 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:58:42,718 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:58:42,723 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:58:42,727 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:58:42,777 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:58:42,794 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:58:42,811 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:58:42,826 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:58:44,616 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:58:44,654 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:58:44,654 INFO L309 CfgBuilder]: Removed 63 assume(true) statements. [2023-11-26 11:58:44,656 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:58:44 BoogieIcfgContainer [2023-11-26 11:58:44,656 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:58:44,665 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:58:44,665 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:58:44,670 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:58:44,670 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:58:44,671 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:58:40" (1/3) ... [2023-11-26 11:58:44,672 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@73ddead7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:58:44, skipping insertion in model container [2023-11-26 11:58:44,672 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:58:44,672 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:58:41" (2/3) ... [2023-11-26 11:58:44,672 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@73ddead7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:58:44, skipping insertion in model container [2023-11-26 11:58:44,672 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:58:44,673 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:58:44" (3/3) ... [2023-11-26 11:58:44,674 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_FNV_test6-1.i [2023-11-26 11:58:44,743 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:58:44,744 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:58:44,744 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:58:44,744 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:58:44,744 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:58:44,744 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:58:44,744 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:58:44,745 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:58:44,751 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:58:44,800 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 390 [2023-11-26 11:58:44,800 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:58:44,800 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:58:44,807 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:58:44,807 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:58:44,808 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:58:44,809 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:58:44,825 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 390 [2023-11-26 11:58:44,826 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:58:44,826 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:58:44,826 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:58:44,826 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:58:44,835 INFO L748 eck$LassoCheckResult]: Stem: 118#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 332#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8#L989-4true [2023-11-26 11:58:44,835 INFO L750 eck$LassoCheckResult]: Loop: 8#L989-4true call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 206#L989-1true assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 4#real_malloc_returnLabel#1true main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 9#L991true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 79#L991-2true call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 237#L996-263true assume !true; 390#L989-3true call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 8#L989-4true [2023-11-26 11:58:44,841 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:44,841 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 1 times [2023-11-26 11:58:44,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:44,855 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [320064587] [2023-11-26 11:58:44,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:44,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:44,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:44,981 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:58:45,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:45,036 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:58:45,039 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:45,039 INFO L85 PathProgramCache]: Analyzing trace with hash 1419562106, now seen corresponding path program 1 times [2023-11-26 11:58:45,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:45,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254650650] [2023-11-26 11:58:45,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:45,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:45,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:58:45,089 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:58:45,089 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254650650] [2023-11-26 11:58:45,090 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-26 11:58:45,090 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1237835328] [2023-11-26 11:58:45,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:45,091 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:58:45,091 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:58:45,101 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:58:45,106 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-26 11:58:45,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:58:45,318 INFO L262 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-26 11:58:45,319 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:58:45,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:58:45,344 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:58:45,357 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1237835328] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:58:45,357 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:58:45,358 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 11:58:45,359 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520177781] [2023-11-26 11:58:45,359 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:58:45,363 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:58:45,364 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:58:45,407 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 11:58:45,408 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 11:58:45,411 INFO L87 Difference]: Start difference. First operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:58:45,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:58:45,447 INFO L93 Difference]: Finished difference Result 397 states and 573 transitions. [2023-11-26 11:58:45,448 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 397 states and 573 transitions. [2023-11-26 11:58:45,462 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 367 [2023-11-26 11:58:45,480 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 397 states to 374 states and 550 transitions. [2023-11-26 11:58:45,481 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 374 [2023-11-26 11:58:45,483 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 374 [2023-11-26 11:58:45,484 INFO L73 IsDeterministic]: Start isDeterministic. Operand 374 states and 550 transitions. [2023-11-26 11:58:45,489 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:58:45,489 INFO L218 hiAutomatonCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 11:58:45,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states and 550 transitions. [2023-11-26 11:58:45,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 374. [2023-11-26 11:58:45,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 374 states, 370 states have (on average 1.4702702702702704) internal successors, (544), 369 states have internal predecessors, (544), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:58:45,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 550 transitions. [2023-11-26 11:58:45,556 INFO L240 hiAutomatonCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 11:58:45,558 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 11:58:45,561 INFO L428 stractBuchiCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 11:58:45,563 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:58:45,563 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 374 states and 550 transitions. [2023-11-26 11:58:45,566 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 367 [2023-11-26 11:58:45,568 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:58:45,568 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:58:45,573 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:58:45,576 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:58:45,577 INFO L748 eck$LassoCheckResult]: Stem: 1149#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 1150#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 859#L989-4 [2023-11-26 11:58:45,580 INFO L750 eck$LassoCheckResult]: Loop: 859#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 849#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 843#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 844#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 860#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 963#L996-263 havoc main_~_ha_hashv~0#1; 964#L996-176 goto; 1174#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 889#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 890#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 1105#L996-73 assume main_#t~switch68#1;call main_#t~mem69#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem69#1 % 256 % 4294967296);havoc main_#t~mem69#1; 1106#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 857#L996-76 assume main_#t~switch68#1;call main_#t~mem70#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem70#1 % 256 % 4294967296);havoc main_#t~mem70#1; 858#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 941#L996-79 assume main_#t~switch68#1;call main_#t~mem71#1 := read~int#1(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem71#1 % 256 % 4294967296);havoc main_#t~mem71#1; 942#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 965#L996-82 assume main_#t~switch68#1;call main_#t~mem72#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem72#1 % 256 % 4294967296);havoc main_#t~mem72#1; 933#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 906#L996-85 assume !main_#t~switch68#1; 907#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 934#L996-88 assume main_#t~switch68#1;call main_#t~mem74#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem74#1 % 256 % 4294967296);havoc main_#t~mem74#1; 951#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 1082#L996-91 assume main_#t~switch68#1;call main_#t~mem75#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem75#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem75#1 % 256 % 4294967296 else main_#t~mem75#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem75#1; 1083#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 1193#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 997#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 998#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 1206#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 1090#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 1088#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 904#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 905#L996-105 havoc main_#t~switch68#1; 1073#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 978#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 928#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 929#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1014#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1081#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1132#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1178#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 920#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1009#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 969#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1070#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1071#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1113#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 908#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 909#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1050#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1158#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 838#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 973#L996-170 goto; 974#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 955#L996-173 goto; 956#L996-175 goto; 1165#L996-260 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1166#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 1172#L996-190 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#1(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#1(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#1(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#1(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 1186#L996-189 goto; 996#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#1(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#1(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 1107#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#1(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 1033#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 1034#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 1062#L996-198 goto; 1157#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#1(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#1(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 937#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 938#L996-203 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 902#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#1(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 903#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 1135#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1176#L996-254 goto; 1209#L996-256 havoc main_~_ha_bkt~0#1; 1210#L996-257 goto; 1202#L996-259 goto; 876#L996-261 havoc main_~_ha_hashv~0#1; 877#L996-262 goto; 984#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 859#L989-4 [2023-11-26 11:58:45,588 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:45,589 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 2 times [2023-11-26 11:58:45,589 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:45,589 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410746855] [2023-11-26 11:58:45,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:45,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:45,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:45,625 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:58:45,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:45,683 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:58:45,688 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:45,688 INFO L85 PathProgramCache]: Analyzing trace with hash 997853422, now seen corresponding path program 1 times [2023-11-26 11:58:45,688 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:45,689 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393904428] [2023-11-26 11:58:45,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:45,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:45,784 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:58:45,787 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1833845714] [2023-11-26 11:58:45,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:45,787 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:58:45,787 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:58:45,816 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:58:45,845 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-26 11:58:46,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:58:46,170 INFO L262 TraceCheckSpWp]: Trace formula consists of 553 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:58:46,175 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:58:46,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:58:46,234 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:58:46,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:58:46,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393904428] [2023-11-26 11:58:46,235 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:58:46,236 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1833845714] [2023-11-26 11:58:46,236 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1833845714] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:58:46,236 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:58:46,236 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:58:46,237 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816826592] [2023-11-26 11:58:46,237 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:58:46,238 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:58:46,238 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:58:46,239 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 11:58:46,239 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 11:58:46,239 INFO L87 Difference]: Start difference. First operand 374 states and 550 transitions. cyclomatic complexity: 179 Second operand has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:58:46,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:58:46,420 INFO L93 Difference]: Finished difference Result 395 states and 571 transitions. [2023-11-26 11:58:46,420 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 395 states and 571 transitions. [2023-11-26 11:58:46,424 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 388 [2023-11-26 11:58:46,430 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 395 states to 395 states and 571 transitions. [2023-11-26 11:58:46,430 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 395 [2023-11-26 11:58:46,431 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 395 [2023-11-26 11:58:46,431 INFO L73 IsDeterministic]: Start isDeterministic. Operand 395 states and 571 transitions. [2023-11-26 11:58:46,434 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:58:46,434 INFO L218 hiAutomatonCegarLoop]: Abstraction has 395 states and 571 transitions. [2023-11-26 11:58:46,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states and 571 transitions. [2023-11-26 11:58:46,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 394. [2023-11-26 11:58:46,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 390 states have (on average 1.4461538461538461) internal successors, (564), 389 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:58:46,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 570 transitions. [2023-11-26 11:58:46,455 INFO L240 hiAutomatonCegarLoop]: Abstraction has 394 states and 570 transitions. [2023-11-26 11:58:46,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 11:58:46,456 INFO L428 stractBuchiCegarLoop]: Abstraction has 394 states and 570 transitions. [2023-11-26 11:58:46,457 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:58:46,457 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 394 states and 570 transitions. [2023-11-26 11:58:46,459 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 387 [2023-11-26 11:58:46,459 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:58:46,460 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:58:46,461 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:58:46,462 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:58:46,462 INFO L748 eck$LassoCheckResult]: Stem: 2154#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 2155#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1862#L989-4 [2023-11-26 11:58:46,462 INFO L750 eck$LassoCheckResult]: Loop: 1862#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1852#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 1846#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 1847#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1863#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 1965#L996-263 havoc main_~_ha_hashv~0#1; 1966#L996-176 goto; 2182#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1892#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1893#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 2110#L996-73 assume !main_#t~switch68#1; 2112#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 2230#L996-76 assume !main_#t~switch68#1; 2229#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 2228#L996-79 assume !main_#t~switch68#1; 2227#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 2226#L996-82 assume !main_#t~switch68#1; 1936#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 1937#L996-85 assume !main_#t~switch68#1; 1938#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 1939#L996-88 assume main_#t~switch68#1;call main_#t~mem74#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem74#1 % 256 % 4294967296);havoc main_#t~mem74#1; 1957#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 2089#L996-91 assume main_#t~switch68#1;call main_#t~mem75#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem75#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem75#1 % 256 % 4294967296 else main_#t~mem75#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem75#1; 2090#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 2203#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 2204#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 2217#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 2218#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 2098#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 2096#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 1907#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 1908#L996-105 havoc main_#t~switch68#1; 2080#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1988#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1931#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1932#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2024#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2088#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2140#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2188#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1923#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2016#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1976#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2077#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2078#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2121#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1911#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1912#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2057#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2167#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1841#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 1980#L996-170 goto; 1981#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1961#L996-173 goto; 1962#L996-175 goto; 2175#L996-260 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2176#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 2183#L996-190 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#1(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#1(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#1(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#1(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 2196#L996-189 goto; 2003#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#1(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#1(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 2115#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#1(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 2040#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 2041#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 2069#L996-198 goto; 2165#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#1(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#1(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1942#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 1943#L996-203 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 1905#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#1(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 1906#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 2143#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2186#L996-254 goto; 2221#L996-256 havoc main_~_ha_bkt~0#1; 2222#L996-257 goto; 2213#L996-259 goto; 1879#L996-261 havoc main_~_ha_hashv~0#1; 1880#L996-262 goto; 1991#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 1862#L989-4 [2023-11-26 11:58:46,463 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:46,463 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 3 times [2023-11-26 11:58:46,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:46,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1542622268] [2023-11-26 11:58:46,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:46,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:46,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:46,486 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:58:46,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:46,509 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:58:46,509 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:46,510 INFO L85 PathProgramCache]: Analyzing trace with hash -360302090, now seen corresponding path program 1 times [2023-11-26 11:58:46,510 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:46,510 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280771787] [2023-11-26 11:58:46,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:46,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:46,567 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:58:46,567 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [156306804] [2023-11-26 11:58:46,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:46,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:58:46,568 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:58:46,571 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:58:46,597 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-26 11:58:46,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:58:46,901 INFO L262 TraceCheckSpWp]: Trace formula consists of 529 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 11:58:46,906 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:58:46,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:58:46,975 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:58:46,975 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:58:46,975 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280771787] [2023-11-26 11:58:46,975 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:58:46,975 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [156306804] [2023-11-26 11:58:46,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [156306804] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:58:46,976 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:58:46,976 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:58:46,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [108666439] [2023-11-26 11:58:46,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:58:46,978 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:58:46,978 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:58:46,978 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:58:46,979 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:58:46,979 INFO L87 Difference]: Start difference. First operand 394 states and 570 transitions. cyclomatic complexity: 179 Second operand has 5 states, 5 states have (on average 15.4) internal successors, (77), 5 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:58:47,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:58:47,083 INFO L93 Difference]: Finished difference Result 381 states and 550 transitions. [2023-11-26 11:58:47,083 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 381 states and 550 transitions. [2023-11-26 11:58:47,087 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 374 [2023-11-26 11:58:47,093 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 381 states to 381 states and 550 transitions. [2023-11-26 11:58:47,093 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 381 [2023-11-26 11:58:47,094 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 381 [2023-11-26 11:58:47,094 INFO L73 IsDeterministic]: Start isDeterministic. Operand 381 states and 550 transitions. [2023-11-26 11:58:47,095 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:58:47,096 INFO L218 hiAutomatonCegarLoop]: Abstraction has 381 states and 550 transitions. [2023-11-26 11:58:47,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states and 550 transitions. [2023-11-26 11:58:47,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 380. [2023-11-26 11:58:47,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 376 states have (on average 1.4441489361702127) internal successors, (543), 375 states have internal predecessors, (543), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:58:47,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 549 transitions. [2023-11-26 11:58:47,115 INFO L240 hiAutomatonCegarLoop]: Abstraction has 380 states and 549 transitions. [2023-11-26 11:58:47,117 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 11:58:47,118 INFO L428 stractBuchiCegarLoop]: Abstraction has 380 states and 549 transitions. [2023-11-26 11:58:47,119 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:58:47,119 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 380 states and 549 transitions. [2023-11-26 11:58:47,121 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 373 [2023-11-26 11:58:47,122 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:58:47,122 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:58:47,126 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:58:47,127 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:58:47,133 INFO L748 eck$LassoCheckResult]: Stem: 3161#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 3162#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2873#L989-4 [2023-11-26 11:58:47,133 INFO L750 eck$LassoCheckResult]: Loop: 2873#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2863#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 2857#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 2858#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2874#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 2977#L996-263 havoc main_~_ha_hashv~0#1; 2978#L996-176 goto; 3188#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2903#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2904#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 3118#L996-73 assume !main_#t~switch68#1; 3119#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 2871#L996-76 assume !main_#t~switch68#1; 2872#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 2955#L996-79 assume !main_#t~switch68#1; 2956#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 2984#L996-82 assume !main_#t~switch68#1; 2947#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 2920#L996-85 assume !main_#t~switch68#1; 2921#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 2948#L996-88 assume !main_#t~switch68#1; 2965#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 3096#L996-91 assume !main_#t~switch68#1; 3097#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 3207#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 3011#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 3012#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 3221#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 3104#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 3102#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 2918#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 2919#L996-105 havoc main_#t~switch68#1; 3087#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2992#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2942#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2943#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3028#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3095#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3145#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3192#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2933#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3023#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2982#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3084#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3085#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3127#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2922#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2923#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3064#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3172#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2852#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 2987#L996-170 goto; 2988#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2969#L996-173 goto; 2970#L996-175 goto; 3179#L996-260 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3180#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 3186#L996-190 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#1(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#1(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#1(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#1(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 3200#L996-189 goto; 3010#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#1(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#1(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 3121#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#1(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 3047#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 3048#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 3076#L996-198 goto; 3171#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#1(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#1(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2951#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 2952#L996-203 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 2916#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#1(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 2917#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 3149#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3190#L996-254 goto; 3224#L996-256 havoc main_~_ha_bkt~0#1; 3225#L996-257 goto; 3217#L996-259 goto; 2890#L996-261 havoc main_~_ha_hashv~0#1; 2891#L996-262 goto; 2998#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 2873#L989-4 [2023-11-26 11:58:47,134 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:47,134 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 4 times [2023-11-26 11:58:47,134 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:47,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695370451] [2023-11-26 11:58:47,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:47,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:47,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:47,169 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:58:47,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:47,206 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:58:47,206 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:47,207 INFO L85 PathProgramCache]: Analyzing trace with hash -2007566726, now seen corresponding path program 1 times [2023-11-26 11:58:47,207 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:47,207 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340126940] [2023-11-26 11:58:47,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:47,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:47,272 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:58:47,272 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [917152463] [2023-11-26 11:58:47,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:47,273 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:58:47,273 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:58:47,284 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:58:47,288 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-26 11:58:47,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:58:47,780 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 11:58:47,784 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:58:47,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:58:47,978 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:58:47,979 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:58:47,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1340126940] [2023-11-26 11:58:47,979 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:58:47,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [917152463] [2023-11-26 11:58:47,979 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [917152463] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:58:47,980 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:58:47,980 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 11:58:47,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102678660] [2023-11-26 11:58:47,980 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:58:47,981 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:58:47,981 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:58:47,981 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 11:58:47,982 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 11:58:47,982 INFO L87 Difference]: Start difference. First operand 380 states and 549 transitions. cyclomatic complexity: 172 Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:58:48,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:58:48,520 INFO L93 Difference]: Finished difference Result 420 states and 597 transitions. [2023-11-26 11:58:48,520 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 420 states and 597 transitions. [2023-11-26 11:58:48,525 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 413 [2023-11-26 11:58:48,529 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 420 states to 420 states and 597 transitions. [2023-11-26 11:58:48,530 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 420 [2023-11-26 11:58:48,531 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 420 [2023-11-26 11:58:48,531 INFO L73 IsDeterministic]: Start isDeterministic. Operand 420 states and 597 transitions. [2023-11-26 11:58:48,532 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:58:48,532 INFO L218 hiAutomatonCegarLoop]: Abstraction has 420 states and 597 transitions. [2023-11-26 11:58:48,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420 states and 597 transitions. [2023-11-26 11:58:48,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420 to 417. [2023-11-26 11:58:48,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 417 states, 413 states have (on average 1.4213075060532687) internal successors, (587), 412 states have internal predecessors, (587), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:58:48,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 593 transitions. [2023-11-26 11:58:48,545 INFO L240 hiAutomatonCegarLoop]: Abstraction has 417 states and 593 transitions. [2023-11-26 11:58:48,546 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:58:48,547 INFO L428 stractBuchiCegarLoop]: Abstraction has 417 states and 593 transitions. [2023-11-26 11:58:48,547 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 11:58:48,547 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 417 states and 593 transitions. [2023-11-26 11:58:48,550 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 410 [2023-11-26 11:58:48,550 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:58:48,550 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:58:48,551 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:58:48,552 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:58:48,554 INFO L748 eck$LassoCheckResult]: Stem: 4202#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 4203#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3910#L989-4 [2023-11-26 11:58:48,554 INFO L750 eck$LassoCheckResult]: Loop: 3910#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3900#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 3894#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 3895#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3911#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 4011#L996-263 havoc main_~_ha_hashv~0#1; 4012#L996-176 goto; 4228#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3940#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3941#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 4158#L996-73 assume !main_#t~switch68#1; 4159#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 3908#L996-76 assume !main_#t~switch68#1; 3909#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 3990#L996-79 assume !main_#t~switch68#1; 3991#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 4017#L996-82 assume !main_#t~switch68#1; 3984#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 3957#L996-85 assume !main_#t~switch68#1; 3958#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 3985#L996-88 assume !main_#t~switch68#1; 4003#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 4136#L996-91 assume !main_#t~switch68#1; 4137#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 4250#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 4049#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 4050#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 4264#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 4146#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 4143#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 4144#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 4125#L996-105 havoc main_#t~switch68#1; 4126#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4167#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4278#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4069#L996-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 4070#L996-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet81#1 := main_~_hj_j~0#1; 4134#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4135#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 4188#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4234#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3971#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4061#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4021#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4122#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4123#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4169#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3959#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3960#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4102#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4215#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3889#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 4025#L996-170 goto; 4026#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4007#L996-173 goto; 4008#L996-175 goto; 4221#L996-260 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4222#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 4229#L996-190 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#1(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#1(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#1(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#1(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 4242#L996-189 goto; 4048#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#1(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#1(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 4162#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#1(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 4085#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 4086#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 4114#L996-198 goto; 4213#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#1(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#1(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3988#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 3989#L996-203 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 3953#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#1(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 3954#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 4191#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4232#L996-254 goto; 4267#L996-256 havoc main_~_ha_bkt~0#1; 4268#L996-257 goto; 4260#L996-259 goto; 3927#L996-261 havoc main_~_ha_hashv~0#1; 3928#L996-262 goto; 4036#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 3910#L989-4 [2023-11-26 11:58:48,555 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:48,555 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 5 times [2023-11-26 11:58:48,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:48,556 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2070973669] [2023-11-26 11:58:48,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:48,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:48,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:48,575 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:58:48,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:48,596 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:58:48,611 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:48,611 INFO L85 PathProgramCache]: Analyzing trace with hash -241550153, now seen corresponding path program 1 times [2023-11-26 11:58:48,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:48,612 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648989803] [2023-11-26 11:58:48,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:48,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:48,668 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:58:48,668 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [528497761] [2023-11-26 11:58:48,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:48,669 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:58:48,669 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:58:48,673 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:58:48,686 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-26 11:58:49,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:58:49,145 INFO L262 TraceCheckSpWp]: Trace formula consists of 518 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 11:58:49,149 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:58:49,367 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:58:49,367 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:58:49,367 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:58:49,367 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648989803] [2023-11-26 11:58:49,368 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:58:49,368 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [528497761] [2023-11-26 11:58:49,368 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [528497761] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:58:49,368 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:58:49,368 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 11:58:49,369 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [235292917] [2023-11-26 11:58:49,369 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:58:49,369 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:58:49,370 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:58:49,370 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:58:49,370 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:58:49,371 INFO L87 Difference]: Start difference. First operand 417 states and 593 transitions. cyclomatic complexity: 179 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:58:50,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:58:50,318 INFO L93 Difference]: Finished difference Result 428 states and 609 transitions. [2023-11-26 11:58:50,318 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 428 states and 609 transitions. [2023-11-26 11:58:50,323 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 421 [2023-11-26 11:58:50,328 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 428 states to 428 states and 609 transitions. [2023-11-26 11:58:50,328 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 428 [2023-11-26 11:58:50,329 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 428 [2023-11-26 11:58:50,330 INFO L73 IsDeterministic]: Start isDeterministic. Operand 428 states and 609 transitions. [2023-11-26 11:58:50,331 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:58:50,332 INFO L218 hiAutomatonCegarLoop]: Abstraction has 428 states and 609 transitions. [2023-11-26 11:58:50,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 428 states and 609 transitions. [2023-11-26 11:58:50,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 428 to 425. [2023-11-26 11:58:50,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 425 states, 421 states have (on average 1.4228028503562946) internal successors, (599), 420 states have internal predecessors, (599), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:58:50,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 605 transitions. [2023-11-26 11:58:50,347 INFO L240 hiAutomatonCegarLoop]: Abstraction has 425 states and 605 transitions. [2023-11-26 11:58:50,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 11:58:50,348 INFO L428 stractBuchiCegarLoop]: Abstraction has 425 states and 605 transitions. [2023-11-26 11:58:50,349 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 11:58:50,349 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 425 states and 605 transitions. [2023-11-26 11:58:50,352 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 418 [2023-11-26 11:58:50,352 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:58:50,352 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:58:50,354 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:58:50,354 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:58:50,354 INFO L748 eck$LassoCheckResult]: Stem: 5288#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 5289#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4998#L989-4 [2023-11-26 11:58:50,355 INFO L750 eck$LassoCheckResult]: Loop: 4998#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4988#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 4982#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 4983#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4999#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 5099#L996-263 havoc main_~_ha_hashv~0#1; 5100#L996-176 goto; 5314#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5028#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5029#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 5245#L996-73 assume !main_#t~switch68#1; 5246#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 4996#L996-76 assume !main_#t~switch68#1; 4997#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 5078#L996-79 assume !main_#t~switch68#1; 5079#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 5105#L996-82 assume !main_#t~switch68#1; 5072#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 5045#L996-85 assume !main_#t~switch68#1; 5046#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 5073#L996-88 assume !main_#t~switch68#1; 5091#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 5222#L996-91 assume !main_#t~switch68#1; 5223#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 5336#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 5137#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 5138#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 5353#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 5232#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 5233#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 5043#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 5044#L996-105 havoc main_#t~switch68#1; 5212#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5121#L996-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 5122#L996-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 5331#L996-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet80#1 := 0; 5340#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5361#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 5352#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5358#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 5274#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5320#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5059#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5149#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5109#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5209#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5210#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5255#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5047#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5048#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5189#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5301#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4977#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 5113#L996-170 goto; 5114#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5095#L996-173 goto; 5096#L996-175 goto; 5307#L996-260 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5308#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 5315#L996-190 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#1(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#1(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#1(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#1(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 5329#L996-189 goto; 5136#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#1(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#1(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 5249#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#1(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 5172#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 5173#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 5201#L996-198 goto; 5299#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#1(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#1(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5076#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 5077#L996-203 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 5041#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#1(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 5042#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 5277#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5318#L996-254 goto; 5356#L996-256 havoc main_~_ha_bkt~0#1; 5357#L996-257 goto; 5347#L996-259 goto; 5015#L996-261 havoc main_~_ha_hashv~0#1; 5016#L996-262 goto; 5124#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 4998#L989-4 [2023-11-26 11:58:50,356 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:50,356 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 6 times [2023-11-26 11:58:50,356 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:50,357 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863365125] [2023-11-26 11:58:50,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:50,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:50,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:50,376 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:58:50,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:50,417 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:58:50,417 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:50,417 INFO L85 PathProgramCache]: Analyzing trace with hash -177113515, now seen corresponding path program 1 times [2023-11-26 11:58:50,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:50,418 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [192069482] [2023-11-26 11:58:50,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:50,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:50,490 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:58:50,490 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [945638938] [2023-11-26 11:58:50,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:50,491 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:58:50,491 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:58:50,497 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:58:50,545 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-26 11:58:50,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:58:50,988 INFO L262 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 11:58:50,991 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:58:51,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:58:51,238 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:58:51,238 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:58:51,238 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [192069482] [2023-11-26 11:58:51,238 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:58:51,239 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [945638938] [2023-11-26 11:58:51,239 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [945638938] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:58:51,239 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:58:51,239 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 11:58:51,242 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1028209442] [2023-11-26 11:58:51,242 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:58:51,242 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:58:51,243 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:58:51,243 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 11:58:51,243 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 11:58:51,244 INFO L87 Difference]: Start difference. First operand 425 states and 605 transitions. cyclomatic complexity: 183 Second operand has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:58:51,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:58:51,756 INFO L93 Difference]: Finished difference Result 431 states and 612 transitions. [2023-11-26 11:58:51,756 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 431 states and 612 transitions. [2023-11-26 11:58:51,760 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 424 [2023-11-26 11:58:51,764 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 431 states to 431 states and 612 transitions. [2023-11-26 11:58:51,765 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 431 [2023-11-26 11:58:51,765 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 431 [2023-11-26 11:58:51,766 INFO L73 IsDeterministic]: Start isDeterministic. Operand 431 states and 612 transitions. [2023-11-26 11:58:51,766 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:58:51,767 INFO L218 hiAutomatonCegarLoop]: Abstraction has 431 states and 612 transitions. [2023-11-26 11:58:51,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 431 states and 612 transitions. [2023-11-26 11:58:51,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 431 to 425. [2023-11-26 11:58:51,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 425 states, 421 states have (on average 1.4228028503562946) internal successors, (599), 420 states have internal predecessors, (599), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:58:51,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 605 transitions. [2023-11-26 11:58:51,779 INFO L240 hiAutomatonCegarLoop]: Abstraction has 425 states and 605 transitions. [2023-11-26 11:58:51,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:58:51,780 INFO L428 stractBuchiCegarLoop]: Abstraction has 425 states and 605 transitions. [2023-11-26 11:58:51,780 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 11:58:51,780 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 425 states and 605 transitions. [2023-11-26 11:58:51,783 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 418 [2023-11-26 11:58:51,783 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:58:51,783 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:58:51,784 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:58:51,784 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:58:51,784 INFO L748 eck$LassoCheckResult]: Stem: 6391#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 6392#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6097#L989-4 [2023-11-26 11:58:51,785 INFO L750 eck$LassoCheckResult]: Loop: 6097#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6087#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 6081#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 6082#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6098#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 6199#L996-263 havoc main_~_ha_hashv~0#1; 6200#L996-176 goto; 6418#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6127#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6128#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 6380#L996-73 assume !main_#t~switch68#1; 6453#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 6095#L996-76 assume !main_#t~switch68#1; 6096#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 6177#L996-79 assume !main_#t~switch68#1; 6178#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 6205#L996-82 assume !main_#t~switch68#1; 6171#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 6144#L996-85 assume !main_#t~switch68#1; 6145#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 6172#L996-88 assume !main_#t~switch68#1; 6490#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 6322#L996-91 assume !main_#t~switch68#1; 6323#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 6439#L996-94 assume !main_#t~switch68#1; 6440#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 6489#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 6456#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 6332#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 6333#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 6142#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 6143#L996-105 havoc main_#t~switch68#1; 6312#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6221#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 6166#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6167#L996-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 6257#L996-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet81#1 := main_~_hj_j~0#1; 6320#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6321#L996-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 6395#L996-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet82#1 := main_~_ha_hashv~0#1; 6376#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6424#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6158#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6249#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6209#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6309#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6310#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6357#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6146#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6147#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6289#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6404#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6076#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 6213#L996-170 goto; 6214#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6195#L996-173 goto; 6196#L996-175 goto; 6411#L996-260 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6412#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 6419#L996-190 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#1(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#1(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#1(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#1(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 6432#L996-189 goto; 6236#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#1(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#1(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 6349#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#1(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 6272#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 6273#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 6301#L996-198 goto; 6402#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#1(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#1(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6175#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 6176#L996-203 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 6140#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#1(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 6141#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 6379#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6422#L996-254 goto; 6459#L996-256 havoc main_~_ha_bkt~0#1; 6460#L996-257 goto; 6450#L996-259 goto; 6114#L996-261 havoc main_~_ha_hashv~0#1; 6115#L996-262 goto; 6224#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 6097#L989-4 [2023-11-26 11:58:51,785 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:51,786 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 7 times [2023-11-26 11:58:51,786 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:51,786 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [149900058] [2023-11-26 11:58:51,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:51,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:51,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:51,800 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:58:51,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:51,816 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:58:51,817 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:51,817 INFO L85 PathProgramCache]: Analyzing trace with hash -299174767, now seen corresponding path program 1 times [2023-11-26 11:58:51,817 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:51,817 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [452581326] [2023-11-26 11:58:51,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:51,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:51,866 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:58:51,866 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [247564216] [2023-11-26 11:58:51,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:51,867 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:58:51,867 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:58:51,873 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:58:51,885 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-26 11:58:52,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:58:52,220 INFO L262 TraceCheckSpWp]: Trace formula consists of 513 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 11:58:52,223 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:58:52,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:58:52,291 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:58:52,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:58:52,292 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [452581326] [2023-11-26 11:58:52,292 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:58:52,292 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [247564216] [2023-11-26 11:58:52,292 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [247564216] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:58:52,292 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:58:52,292 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:58:52,293 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [546937685] [2023-11-26 11:58:52,293 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:58:52,293 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:58:52,293 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:58:52,294 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:58:52,294 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:58:52,294 INFO L87 Difference]: Start difference. First operand 425 states and 605 transitions. cyclomatic complexity: 183 Second operand has 5 states, 5 states have (on average 15.8) internal successors, (79), 5 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:58:52,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:58:52,435 INFO L93 Difference]: Finished difference Result 498 states and 724 transitions. [2023-11-26 11:58:52,435 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 498 states and 724 transitions. [2023-11-26 11:58:52,439 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 491 [2023-11-26 11:58:52,444 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 498 states to 498 states and 724 transitions. [2023-11-26 11:58:52,445 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 498 [2023-11-26 11:58:52,445 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 498 [2023-11-26 11:58:52,446 INFO L73 IsDeterministic]: Start isDeterministic. Operand 498 states and 724 transitions. [2023-11-26 11:58:52,446 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:58:52,447 INFO L218 hiAutomatonCegarLoop]: Abstraction has 498 states and 724 transitions. [2023-11-26 11:58:52,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 498 states and 724 transitions. [2023-11-26 11:58:52,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 498 to 425. [2023-11-26 11:58:52,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 425 states, 421 states have (on average 1.4156769596199525) internal successors, (596), 420 states have internal predecessors, (596), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:58:52,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 602 transitions. [2023-11-26 11:58:52,458 INFO L240 hiAutomatonCegarLoop]: Abstraction has 425 states and 602 transitions. [2023-11-26 11:58:52,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:58:52,459 INFO L428 stractBuchiCegarLoop]: Abstraction has 425 states and 602 transitions. [2023-11-26 11:58:52,459 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 11:58:52,459 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 425 states and 602 transitions. [2023-11-26 11:58:52,462 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 418 [2023-11-26 11:58:52,462 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:58:52,462 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:58:52,463 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:58:52,463 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:58:52,463 INFO L748 eck$LassoCheckResult]: Stem: 7553#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 7554#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7262#L989-4 [2023-11-26 11:58:52,463 INFO L750 eck$LassoCheckResult]: Loop: 7262#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7252#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 7246#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 7247#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7263#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 7365#L996-263 havoc main_~_ha_hashv~0#1; 7366#L996-176 goto; 7580#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7292#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7293#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 7510#L996-73 assume !main_#t~switch68#1; 7511#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 7260#L996-76 assume !main_#t~switch68#1; 7261#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 7343#L996-79 assume !main_#t~switch68#1; 7344#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 7371#L996-82 assume !main_#t~switch68#1; 7336#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 7309#L996-85 assume !main_#t~switch68#1; 7310#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 7356#L996-88 assume !main_#t~switch68#1; 7357#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 7649#L996-91 assume !main_#t~switch68#1; 7625#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 7602#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 7603#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 7662#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 7624#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 7498#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 7495#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 7496#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 7308#L996-105 havoc main_#t~switch68#1; 7478#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7387#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 7334#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7335#L996-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 7423#L996-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 7617#L996-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet81#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 7618#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7626#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 7539#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7586#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7323#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7415#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7375#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7475#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7476#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7520#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7311#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7312#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7455#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7566#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7241#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 7379#L996-170 goto; 7380#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7361#L996-173 goto; 7362#L996-175 goto; 7573#L996-260 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7574#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 7581#L996-190 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#1(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#1(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#1(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#1(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 7595#L996-189 goto; 7402#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#1(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#1(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 7514#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#1(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 7438#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 7439#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 7469#L996-198 goto; 7564#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#1(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#1(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7341#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 7342#L996-203 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 7305#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#1(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 7306#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 7542#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7584#L996-254 goto; 7620#L996-256 havoc main_~_ha_bkt~0#1; 7621#L996-257 goto; 7613#L996-259 goto; 7279#L996-261 havoc main_~_ha_hashv~0#1; 7280#L996-262 goto; 7389#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 7262#L989-4 [2023-11-26 11:58:52,464 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:52,464 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 8 times [2023-11-26 11:58:52,464 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:52,464 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696925338] [2023-11-26 11:58:52,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:52,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:52,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:52,478 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:58:52,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:58:52,493 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:58:52,494 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:58:52,494 INFO L85 PathProgramCache]: Analyzing trace with hash -461098509, now seen corresponding path program 1 times [2023-11-26 11:58:52,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:58:52,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830230868] [2023-11-26 11:58:52,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:52,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:58:52,548 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:58:52,548 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1063617589] [2023-11-26 11:58:52,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:58:52,549 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:58:52,549 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:58:52,557 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:58:52,563 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-26 11:59:16,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:59:16,849 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 62 conjunts are in the unsatisfiable core [2023-11-26 11:59:16,853 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:59:17,101 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-26 11:59:17,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 44 treesize of output 22 [2023-11-26 11:59:17,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:59:17,541 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:59:17,542 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:59:17,542 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830230868] [2023-11-26 11:59:17,542 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:59:17,542 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1063617589] [2023-11-26 11:59:17,542 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1063617589] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:59:17,542 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:59:17,542 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2023-11-26 11:59:17,543 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1322436926] [2023-11-26 11:59:17,543 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:59:17,543 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:59:17,543 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:59:17,544 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2023-11-26 11:59:17,544 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=152, Unknown=0, NotChecked=0, Total=182 [2023-11-26 11:59:17,544 INFO L87 Difference]: Start difference. First operand 425 states and 602 transitions. cyclomatic complexity: 180 Second operand has 14 states, 14 states have (on average 5.642857142857143) internal successors, (79), 14 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:59:20,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:59:20,615 INFO L93 Difference]: Finished difference Result 441 states and 621 transitions. [2023-11-26 11:59:20,615 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 441 states and 621 transitions. [2023-11-26 11:59:20,619 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 434 [2023-11-26 11:59:20,624 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 441 states to 441 states and 621 transitions. [2023-11-26 11:59:20,624 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 441 [2023-11-26 11:59:20,624 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 441 [2023-11-26 11:59:20,625 INFO L73 IsDeterministic]: Start isDeterministic. Operand 441 states and 621 transitions. [2023-11-26 11:59:20,625 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:59:20,626 INFO L218 hiAutomatonCegarLoop]: Abstraction has 441 states and 621 transitions. [2023-11-26 11:59:20,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states and 621 transitions. [2023-11-26 11:59:20,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 435. [2023-11-26 11:59:20,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 431 states have (on average 1.408352668213457) internal successors, (607), 430 states have internal predecessors, (607), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:59:20,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 613 transitions. [2023-11-26 11:59:20,638 INFO L240 hiAutomatonCegarLoop]: Abstraction has 435 states and 613 transitions. [2023-11-26 11:59:20,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2023-11-26 11:59:20,639 INFO L428 stractBuchiCegarLoop]: Abstraction has 435 states and 613 transitions. [2023-11-26 11:59:20,639 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-26 11:59:20,639 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 435 states and 613 transitions. [2023-11-26 11:59:20,642 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 428 [2023-11-26 11:59:20,642 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:59:20,642 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:59:20,643 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:59:20,643 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:59:20,643 INFO L748 eck$LassoCheckResult]: Stem: 8680#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 8681#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8383#L989-4 [2023-11-26 11:59:20,644 INFO L750 eck$LassoCheckResult]: Loop: 8383#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8373#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 8367#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 8368#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 8384#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 8485#L996-263 havoc main_~_ha_hashv~0#1; 8486#L996-176 goto; 8710#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 8413#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8414#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 8667#L996-73 assume !main_#t~switch68#1; 8790#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 8789#L996-76 assume !main_#t~switch68#1; 8788#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 8787#L996-79 assume !main_#t~switch68#1; 8668#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 8669#L996-82 assume !main_#t~switch68#1; 8456#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 8430#L996-85 assume !main_#t~switch68#1; 8431#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 8476#L996-88 assume !main_#t~switch68#1; 8477#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 8779#L996-91 assume !main_#t~switch68#1; 8756#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 8734#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 8525#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 8526#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 8755#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 8621#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 8618#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 8619#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 8429#L996-105 havoc main_#t~switch68#1; 8601#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8641#L996-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 8728#L996-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 8729#L996-111 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet80#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 8738#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8795#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 8609#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8610#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 8663#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8721#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 8537#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8538#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8496#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8598#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 8599#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8644#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8432#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8433#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8580#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8696#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8362#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 8500#L996-170 goto; 8501#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8481#L996-173 goto; 8482#L996-175 goto; 8700#L996-260 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8701#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 8708#L996-190 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#1(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#1(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#1(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#1(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 8724#L996-189 goto; 8524#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#1(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#1(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 8637#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#1(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 8559#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 8560#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 8590#L996-198 goto; 8691#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#1(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#1(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8461#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 8462#L996-203 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 8424#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#1(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 8425#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 8665#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 8711#L996-254 goto; 8751#L996-256 havoc main_~_ha_bkt~0#1; 8752#L996-257 goto; 8745#L996-259 goto; 8400#L996-261 havoc main_~_ha_hashv~0#1; 8401#L996-262 goto; 8511#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 8383#L989-4 [2023-11-26 11:59:20,644 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:20,644 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 9 times [2023-11-26 11:59:20,644 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:20,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747455419] [2023-11-26 11:59:20,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:20,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:20,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:20,707 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:59:20,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:20,722 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:59:20,723 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:20,723 INFO L85 PathProgramCache]: Analyzing trace with hash 2068465939, now seen corresponding path program 1 times [2023-11-26 11:59:20,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:20,724 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [967522085] [2023-11-26 11:59:20,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:20,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:20,774 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:59:20,774 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [441761894] [2023-11-26 11:59:20,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:20,774 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:59:20,775 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:59:20,781 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:59:20,788 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56e292fd-d3b6-419b-b907-80cfe2ff4c91/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-26 11:59:22,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:59:22,068 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 18 conjunts are in the unsatisfiable core [2023-11-26 11:59:22,071 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:59:32,235 WARN L293 SmtUtils]: Spent 8.06s on a formula simplification that was a NOOP. DAG size: 19 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)