./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 112ef0f8366461020cac5f2ac7dec2d7e41f31b24e653cd7734885d2bb23b087 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 10:48:10,796 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 10:48:10,878 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 10:48:10,883 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 10:48:10,884 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 10:48:10,910 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 10:48:10,910 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 10:48:10,911 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 10:48:10,912 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 10:48:10,912 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 10:48:10,913 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 10:48:10,914 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 10:48:10,914 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 10:48:10,915 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 10:48:10,915 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 10:48:10,916 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 10:48:10,916 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 10:48:10,917 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 10:48:10,917 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 10:48:10,918 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 10:48:10,918 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 10:48:10,920 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 10:48:10,921 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 10:48:10,921 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 10:48:10,922 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 10:48:10,922 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 10:48:10,923 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 10:48:10,923 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 10:48:10,923 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 10:48:10,924 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 10:48:10,925 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 10:48:10,925 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 10:48:10,926 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 10:48:10,926 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 10:48:10,926 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 10:48:10,926 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 10:48:10,927 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 10:48:10,927 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 10:48:10,928 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 112ef0f8366461020cac5f2ac7dec2d7e41f31b24e653cd7734885d2bb23b087 [2023-11-26 10:48:11,241 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 10:48:11,263 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 10:48:11,265 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 10:48:11,267 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 10:48:11,267 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 10:48:11,269 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i [2023-11-26 10:48:14,447 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 10:48:14,827 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 10:48:14,827 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i [2023-11-26 10:48:14,853 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/data/3bf3ad2ad/595ec0db28ec4e3285575b23147b32af/FLAG3d44c799a [2023-11-26 10:48:14,872 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/data/3bf3ad2ad/595ec0db28ec4e3285575b23147b32af [2023-11-26 10:48:14,875 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 10:48:14,877 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 10:48:14,879 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 10:48:14,879 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 10:48:14,889 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 10:48:14,890 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:48:14" (1/1) ... [2023-11-26 10:48:14,892 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5f7e38e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:14, skipping insertion in model container [2023-11-26 10:48:14,892 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:48:14" (1/1) ... [2023-11-26 10:48:15,034 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 10:48:15,615 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 10:48:15,636 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 10:48:15,780 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 10:48:15,844 INFO L206 MainTranslator]: Completed translation [2023-11-26 10:48:15,845 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15 WrapperNode [2023-11-26 10:48:15,845 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 10:48:15,847 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 10:48:15,847 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 10:48:15,847 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 10:48:15,856 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:15,915 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:16,001 INFO L138 Inliner]: procedures = 177, calls = 228, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 919 [2023-11-26 10:48:16,002 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 10:48:16,003 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 10:48:16,003 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 10:48:16,003 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 10:48:16,016 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:16,017 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:16,044 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:16,135 INFO L175 MemorySlicer]: Split 211 memory accesses to 3 slices as follows [2, 204, 5]. 97 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 51 writes are split as follows [0, 50, 1]. [2023-11-26 10:48:16,136 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:16,136 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:16,212 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:16,223 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:16,230 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:16,252 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:16,262 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 10:48:16,263 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 10:48:16,264 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 10:48:16,264 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 10:48:16,265 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (1/1) ... [2023-11-26 10:48:16,284 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:16,300 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:16,332 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:16,359 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5c613e23-d547-4e54-8398-e647e36145c3/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 10:48:16,382 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 10:48:16,383 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 10:48:16,383 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 10:48:16,383 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 10:48:16,383 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 10:48:16,384 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 10:48:16,384 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 10:48:16,384 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 10:48:16,384 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 10:48:16,384 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 10:48:16,385 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 10:48:16,385 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 10:48:16,385 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 10:48:16,385 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 10:48:16,385 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 10:48:16,388 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 10:48:16,388 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 10:48:16,388 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 10:48:16,388 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 10:48:16,388 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 10:48:16,389 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 10:48:16,389 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 10:48:16,389 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 10:48:16,390 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 10:48:16,390 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 10:48:16,391 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 10:48:16,392 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 10:48:16,678 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 10:48:16,682 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 10:48:16,687 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:48:16,769 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:48:16,792 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:48:18,290 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 10:48:18,304 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 10:48:18,304 INFO L309 CfgBuilder]: Removed 40 assume(true) statements. [2023-11-26 10:48:18,306 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:48:18 BoogieIcfgContainer [2023-11-26 10:48:18,306 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 10:48:18,307 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 10:48:18,307 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 10:48:18,311 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 10:48:18,312 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:48:18,312 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 10:48:14" (1/3) ... [2023-11-26 10:48:18,313 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3300a623 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:48:18, skipping insertion in model container [2023-11-26 10:48:18,313 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:48:18,314 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:15" (2/3) ... [2023-11-26 10:48:18,314 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3300a623 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:48:18, skipping insertion in model container [2023-11-26 10:48:18,314 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:48:18,314 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:48:18" (3/3) ... [2023-11-26 10:48:18,316 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_OAT_nondet_test1-2.i [2023-11-26 10:48:18,376 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 10:48:18,376 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 10:48:18,376 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 10:48:18,376 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 10:48:18,377 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 10:48:18,377 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 10:48:18,377 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 10:48:18,377 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 10:48:18,383 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 224 states, 219 states have (on average 1.6666666666666667) internal successors, (365), 219 states have internal predecessors, (365), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:18,420 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 206 [2023-11-26 10:48:18,420 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:18,420 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:18,427 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:18,427 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2023-11-26 10:48:18,427 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 10:48:18,429 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 224 states, 219 states have (on average 1.6666666666666667) internal successors, (365), 219 states have internal predecessors, (365), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:18,439 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 206 [2023-11-26 10:48:18,440 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:18,440 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:18,440 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:18,441 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2023-11-26 10:48:18,449 INFO L748 eck$LassoCheckResult]: Stem: 131#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 139#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 206#L737-3true [2023-11-26 10:48:18,449 INFO L750 eck$LassoCheckResult]: Loop: 206#L737-3true assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 2#L739true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 208#L739-2true call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 222#L745-269true assume !true; 72#L737-2true main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 206#L737-3true [2023-11-26 10:48:18,455 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:18,456 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 1 times [2023-11-26 10:48:18,465 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:18,466 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634860186] [2023-11-26 10:48:18,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:18,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:18,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:18,550 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:18,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:18,592 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:18,595 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:18,595 INFO L85 PathProgramCache]: Analyzing trace with hash 64057162, now seen corresponding path program 1 times [2023-11-26 10:48:18,595 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:18,596 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [166768007] [2023-11-26 10:48:18,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:18,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:18,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:18,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:18,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:18,696 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [166768007] [2023-11-26 10:48:18,700 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [166768007] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:18,701 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:18,701 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 10:48:18,702 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18334294] [2023-11-26 10:48:18,703 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:18,710 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:18,711 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:18,769 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 10:48:18,770 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 10:48:18,772 INFO L87 Difference]: Start difference. First operand has 224 states, 219 states have (on average 1.6666666666666667) internal successors, (365), 219 states have internal predecessors, (365), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:18,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:18,816 INFO L93 Difference]: Finished difference Result 223 states and 324 transitions. [2023-11-26 10:48:18,818 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 223 states and 324 transitions. [2023-11-26 10:48:18,823 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 206 [2023-11-26 10:48:18,833 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 223 states to 218 states and 319 transitions. [2023-11-26 10:48:18,834 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 218 [2023-11-26 10:48:18,836 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 218 [2023-11-26 10:48:18,837 INFO L73 IsDeterministic]: Start isDeterministic. Operand 218 states and 319 transitions. [2023-11-26 10:48:18,840 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:18,840 INFO L218 hiAutomatonCegarLoop]: Abstraction has 218 states and 319 transitions. [2023-11-26 10:48:18,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states and 319 transitions. [2023-11-26 10:48:18,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 218. [2023-11-26 10:48:18,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 218 states, 214 states have (on average 1.4626168224299065) internal successors, (313), 213 states have internal predecessors, (313), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:18,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 319 transitions. [2023-11-26 10:48:18,885 INFO L240 hiAutomatonCegarLoop]: Abstraction has 218 states and 319 transitions. [2023-11-26 10:48:18,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 10:48:18,890 INFO L428 stractBuchiCegarLoop]: Abstraction has 218 states and 319 transitions. [2023-11-26 10:48:18,890 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 10:48:18,890 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 218 states and 319 transitions. [2023-11-26 10:48:18,893 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 206 [2023-11-26 10:48:18,893 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:18,894 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:18,896 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:18,896 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:18,896 INFO L748 eck$LassoCheckResult]: Stem: 639#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 640#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 582#L737-3 [2023-11-26 10:48:18,899 INFO L750 eck$LassoCheckResult]: Loop: 582#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 455#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 456#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 671#L745-269 havoc main_~_ha_hashv~0#1; 595#L745-176 goto; 596#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 635#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 608#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 609#L745-73 assume main_#t~switch29#1;call main_#t~mem30#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem30#1 % 256 % 4294967296);havoc main_#t~mem30#1; 465#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 466#L745-76 assume main_#t~switch29#1;call main_#t~mem31#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem31#1 % 256 % 4294967296);havoc main_#t~mem31#1; 517#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 518#L745-79 assume main_#t~switch29#1;call main_#t~mem32#1 := read~int#1(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 638#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 650#L745-82 assume main_#t~switch29#1;call main_#t~mem33#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 505#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 487#L745-85 assume main_#t~switch29#1;call main_#t~mem34#1 := read~int#1(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 488#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 620#L745-88 assume main_#t~switch29#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 545#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 546#L745-91 assume main_#t~switch29#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem36#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem36#1 % 256 % 4294967296 else main_#t~mem36#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem36#1; 503#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 504#L745-94 assume !main_#t~switch29#1; 636#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 539#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 540#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 560#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 561#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 647#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 482#L745-105 havoc main_#t~switch29#1; 480#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 481#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 492#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 547#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 467#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 468#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 512#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 593#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 589#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 630#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 529#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 530#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 605#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 606#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 618#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 615#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 536#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 462#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 463#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 613#L745-170 goto; 614#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 645#L745-173 goto; 658#L745-175 goto; 499#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 500#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 637#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 576#L745-193 goto; 577#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 668#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 459#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 460#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 506#L745-202 goto; 590#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 457#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 458#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 641#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 665#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 654#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 558#L745-260 goto; 559#L745-262 havoc main_~_ha_bkt~0#1; 610#L745-263 goto; 611#L745-265 goto; 646#L745-267 havoc main_~_ha_hashv~0#1; 662#L745-268 goto; 581#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 582#L737-3 [2023-11-26 10:48:18,900 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:18,901 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 2 times [2023-11-26 10:48:18,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:18,901 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089620547] [2023-11-26 10:48:18,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:18,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:18,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:18,913 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:18,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:18,931 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:18,932 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:18,932 INFO L85 PathProgramCache]: Analyzing trace with hash -1832271533, now seen corresponding path program 1 times [2023-11-26 10:48:18,932 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:18,933 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843902413] [2023-11-26 10:48:18,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:18,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:19,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:19,456 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:19,456 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:19,456 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [843902413] [2023-11-26 10:48:19,457 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [843902413] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:19,457 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:19,457 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 10:48:19,458 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [219341375] [2023-11-26 10:48:19,458 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:19,458 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:19,459 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:19,459 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 10:48:19,460 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 10:48:19,460 INFO L87 Difference]: Start difference. First operand 218 states and 319 transitions. cyclomatic complexity: 105 Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:19,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:19,619 INFO L93 Difference]: Finished difference Result 222 states and 316 transitions. [2023-11-26 10:48:19,619 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 222 states and 316 transitions. [2023-11-26 10:48:19,622 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 210 [2023-11-26 10:48:19,626 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 222 states to 222 states and 316 transitions. [2023-11-26 10:48:19,627 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 222 [2023-11-26 10:48:19,628 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 222 [2023-11-26 10:48:19,628 INFO L73 IsDeterministic]: Start isDeterministic. Operand 222 states and 316 transitions. [2023-11-26 10:48:19,630 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:19,631 INFO L218 hiAutomatonCegarLoop]: Abstraction has 222 states and 316 transitions. [2023-11-26 10:48:19,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states and 316 transitions. [2023-11-26 10:48:19,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 218. [2023-11-26 10:48:19,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 218 states, 214 states have (on average 1.4299065420560748) internal successors, (306), 213 states have internal predecessors, (306), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:19,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 312 transitions. [2023-11-26 10:48:19,648 INFO L240 hiAutomatonCegarLoop]: Abstraction has 218 states and 312 transitions. [2023-11-26 10:48:19,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 10:48:19,650 INFO L428 stractBuchiCegarLoop]: Abstraction has 218 states and 312 transitions. [2023-11-26 10:48:19,650 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 10:48:19,650 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 218 states and 312 transitions. [2023-11-26 10:48:19,652 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 206 [2023-11-26 10:48:19,653 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:19,653 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:19,655 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:19,655 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:19,656 INFO L748 eck$LassoCheckResult]: Stem: 1088#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1089#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 1031#L737-3 [2023-11-26 10:48:19,657 INFO L750 eck$LassoCheckResult]: Loop: 1031#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 904#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 905#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 1120#L745-269 havoc main_~_ha_hashv~0#1; 1044#L745-176 goto; 1045#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1084#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1057#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 1058#L745-73 assume !main_#t~switch29#1; 914#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 915#L745-76 assume !main_#t~switch29#1; 966#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 967#L745-79 assume !main_#t~switch29#1; 1087#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 1099#L745-82 assume !main_#t~switch29#1; 954#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 936#L745-85 assume !main_#t~switch29#1; 937#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 1069#L745-88 assume !main_#t~switch29#1; 994#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 995#L745-91 assume !main_#t~switch29#1; 952#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 953#L745-94 assume !main_#t~switch29#1; 1085#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 988#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 989#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 1009#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1010#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 1096#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 931#L745-105 havoc main_#t~switch29#1; 929#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 930#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 941#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 996#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 916#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 917#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 961#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1042#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1038#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1079#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 978#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 979#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1054#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1055#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1067#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1064#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 985#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 911#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 912#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 1062#L745-170 goto; 1063#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1094#L745-173 goto; 1107#L745-175 goto; 948#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 949#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1086#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1025#L745-193 goto; 1026#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 1117#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 908#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 909#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 955#L745-202 goto; 1039#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 906#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 907#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 1090#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 1114#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 1103#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1007#L745-260 goto; 1008#L745-262 havoc main_~_ha_bkt~0#1; 1059#L745-263 goto; 1060#L745-265 goto; 1095#L745-267 havoc main_~_ha_hashv~0#1; 1111#L745-268 goto; 1030#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1031#L737-3 [2023-11-26 10:48:19,658 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:19,658 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 3 times [2023-11-26 10:48:19,658 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:19,659 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821959441] [2023-11-26 10:48:19,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:19,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:19,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:19,673 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:19,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:19,691 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:19,692 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:19,693 INFO L85 PathProgramCache]: Analyzing trace with hash 17975393, now seen corresponding path program 1 times [2023-11-26 10:48:19,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:19,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1002910305] [2023-11-26 10:48:19,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:19,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:19,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:19,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:19,975 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:19,975 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1002910305] [2023-11-26 10:48:19,975 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1002910305] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:19,976 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:19,976 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 10:48:19,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959578341] [2023-11-26 10:48:19,976 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:19,977 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:19,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:19,978 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 10:48:19,978 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 10:48:19,978 INFO L87 Difference]: Start difference. First operand 218 states and 312 transitions. cyclomatic complexity: 98 Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:20,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:20,055 INFO L93 Difference]: Finished difference Result 179 states and 241 transitions. [2023-11-26 10:48:20,055 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 179 states and 241 transitions. [2023-11-26 10:48:20,057 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 167 [2023-11-26 10:48:20,060 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 179 states to 179 states and 241 transitions. [2023-11-26 10:48:20,061 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 179 [2023-11-26 10:48:20,061 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 179 [2023-11-26 10:48:20,062 INFO L73 IsDeterministic]: Start isDeterministic. Operand 179 states and 241 transitions. [2023-11-26 10:48:20,063 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:20,063 INFO L218 hiAutomatonCegarLoop]: Abstraction has 179 states and 241 transitions. [2023-11-26 10:48:20,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states and 241 transitions. [2023-11-26 10:48:20,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 179. [2023-11-26 10:48:20,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 175 states have (on average 1.3428571428571427) internal successors, (235), 174 states have internal predecessors, (235), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:20,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 241 transitions. [2023-11-26 10:48:20,074 INFO L240 hiAutomatonCegarLoop]: Abstraction has 179 states and 241 transitions. [2023-11-26 10:48:20,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 10:48:20,076 INFO L428 stractBuchiCegarLoop]: Abstraction has 179 states and 241 transitions. [2023-11-26 10:48:20,076 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 10:48:20,076 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 179 states and 241 transitions. [2023-11-26 10:48:20,078 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 167 [2023-11-26 10:48:20,078 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:20,078 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:20,080 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:20,080 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:20,081 INFO L748 eck$LassoCheckResult]: Stem: 1364#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1365#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 1386#L737-3 [2023-11-26 10:48:20,081 INFO L750 eck$LassoCheckResult]: Loop: 1386#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 1310#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1311#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 1485#L745-269 havoc main_~_ha_hashv~0#1; 1479#L745-176 goto; 1477#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1346#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1347#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 1487#L745-73 assume !main_#t~switch29#1; 1340#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 1341#L745-76 assume !main_#t~switch29#1; 1384#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 1360#L745-79 assume !main_#t~switch29#1; 1361#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 1413#L745-82 assume !main_#t~switch29#1; 1385#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 1368#L745-85 assume !main_#t~switch29#1; 1369#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 1380#L745-88 assume !main_#t~switch29#1; 1445#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 1446#L745-91 assume !main_#t~switch29#1; 1383#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 1348#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1349#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 1435#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1441#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 1458#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1402#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 1403#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1359#L745-105 havoc main_#t~switch29#1; 1357#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1358#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1329#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1447#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1342#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1343#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1410#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1404#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1330#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1331#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1427#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1428#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1483#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1453#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1407#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1475#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1392#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1334#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1335#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 1350#L745-170 goto; 1397#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1398#L745-173 goto; 1442#L745-175 goto; 1378#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1379#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1353#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1354#L745-193 goto; 1468#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 1480#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 1325#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 1326#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 1393#L745-202 goto; 1448#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1320#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 1321#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 1387#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 1469#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 1415#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1426#L745-260 goto; 1390#L745-262 havoc main_~_ha_bkt~0#1; 1391#L745-263 goto; 1399#L745-265 goto; 1400#L745-267 havoc main_~_ha_hashv~0#1; 1455#L745-268 goto; 1471#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1386#L737-3 [2023-11-26 10:48:20,082 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:20,082 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 4 times [2023-11-26 10:48:20,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:20,083 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646049076] [2023-11-26 10:48:20,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:20,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:20,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:20,092 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:20,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:20,104 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:20,105 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:20,105 INFO L85 PathProgramCache]: Analyzing trace with hash -425925281, now seen corresponding path program 1 times [2023-11-26 10:48:20,106 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:20,106 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [137964621] [2023-11-26 10:48:20,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:20,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:20,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:21,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:21,280 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:21,281 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [137964621] [2023-11-26 10:48:21,281 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [137964621] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:21,281 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:21,282 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 10:48:21,282 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [518432525] [2023-11-26 10:48:21,282 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:21,283 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:21,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:21,284 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 10:48:21,284 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2023-11-26 10:48:21,285 INFO L87 Difference]: Start difference. First operand 179 states and 241 transitions. cyclomatic complexity: 66 Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:22,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:22,403 INFO L93 Difference]: Finished difference Result 184 states and 248 transitions. [2023-11-26 10:48:22,403 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 184 states and 248 transitions. [2023-11-26 10:48:22,405 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 172 [2023-11-26 10:48:22,408 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 184 states to 184 states and 248 transitions. [2023-11-26 10:48:22,409 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 184 [2023-11-26 10:48:22,410 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 184 [2023-11-26 10:48:22,410 INFO L73 IsDeterministic]: Start isDeterministic. Operand 184 states and 248 transitions. [2023-11-26 10:48:22,411 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:22,411 INFO L218 hiAutomatonCegarLoop]: Abstraction has 184 states and 248 transitions. [2023-11-26 10:48:22,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states and 248 transitions. [2023-11-26 10:48:22,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 181. [2023-11-26 10:48:22,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 181 states, 177 states have (on average 1.3389830508474576) internal successors, (237), 176 states have internal predecessors, (237), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:22,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 243 transitions. [2023-11-26 10:48:22,423 INFO L240 hiAutomatonCegarLoop]: Abstraction has 181 states and 243 transitions. [2023-11-26 10:48:22,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 10:48:22,425 INFO L428 stractBuchiCegarLoop]: Abstraction has 181 states and 243 transitions. [2023-11-26 10:48:22,425 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 10:48:22,425 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 181 states and 243 transitions. [2023-11-26 10:48:22,427 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 169 [2023-11-26 10:48:22,427 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:22,428 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:22,430 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:22,430 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:22,430 INFO L748 eck$LassoCheckResult]: Stem: 1738#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1739#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 1761#L737-3 [2023-11-26 10:48:22,431 INFO L750 eck$LassoCheckResult]: Loop: 1761#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 1684#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1685#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 1861#L745-269 havoc main_~_ha_hashv~0#1; 1856#L745-176 goto; 1853#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1723#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1724#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 1863#L745-73 assume !main_#t~switch29#1; 1714#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 1715#L745-76 assume !main_#t~switch29#1; 1758#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 1734#L745-79 assume !main_#t~switch29#1; 1735#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 1788#L745-82 assume !main_#t~switch29#1; 1759#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 1742#L745-85 assume !main_#t~switch29#1; 1743#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 1754#L745-88 assume !main_#t~switch29#1; 1820#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 1821#L745-91 assume !main_#t~switch29#1; 1755#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 1720#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1721#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 1810#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1816#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 1831#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1776#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 1777#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1733#L745-105 havoc main_#t~switch29#1; 1731#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1732#L745-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 1746#L745-109 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet41#1 := main_~_hj_i~0#1; 1703#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1822#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1716#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1717#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1785#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1779#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1704#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1705#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1802#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1803#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1859#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1828#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1782#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1851#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1767#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1708#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1709#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 1722#L745-170 goto; 1772#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1773#L745-173 goto; 1817#L745-175 goto; 1752#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1753#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1727#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1728#L745-193 goto; 1842#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 1855#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 1697#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 1698#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 1768#L745-202 goto; 1823#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1690#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 1691#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 1760#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 1843#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 1790#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1801#L745-260 goto; 1764#L745-262 havoc main_~_ha_bkt~0#1; 1765#L745-263 goto; 1774#L745-265 goto; 1775#L745-267 havoc main_~_ha_hashv~0#1; 1830#L745-268 goto; 1845#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1761#L737-3 [2023-11-26 10:48:22,432 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:22,432 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 5 times [2023-11-26 10:48:22,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:22,433 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [90919172] [2023-11-26 10:48:22,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:22,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:22,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:22,443 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:22,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:22,455 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:22,456 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:22,457 INFO L85 PathProgramCache]: Analyzing trace with hash -436207054, now seen corresponding path program 1 times [2023-11-26 10:48:22,457 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:22,457 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164120189] [2023-11-26 10:48:22,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:22,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:22,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:23,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:23,219 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:23,219 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164120189] [2023-11-26 10:48:23,219 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1164120189] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:23,219 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:23,220 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 10:48:23,220 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [892825924] [2023-11-26 10:48:23,220 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:23,221 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:23,221 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:23,221 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 10:48:23,221 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 10:48:23,222 INFO L87 Difference]: Start difference. First operand 181 states and 243 transitions. cyclomatic complexity: 66 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:23,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:23,470 INFO L93 Difference]: Finished difference Result 181 states and 242 transitions. [2023-11-26 10:48:23,470 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 181 states and 242 transitions. [2023-11-26 10:48:23,472 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 169 [2023-11-26 10:48:23,475 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 181 states to 181 states and 242 transitions. [2023-11-26 10:48:23,475 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 181 [2023-11-26 10:48:23,476 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 181 [2023-11-26 10:48:23,476 INFO L73 IsDeterministic]: Start isDeterministic. Operand 181 states and 242 transitions. [2023-11-26 10:48:23,477 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:23,477 INFO L218 hiAutomatonCegarLoop]: Abstraction has 181 states and 242 transitions. [2023-11-26 10:48:23,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states and 242 transitions. [2023-11-26 10:48:23,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 181. [2023-11-26 10:48:23,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 181 states, 177 states have (on average 1.3333333333333333) internal successors, (236), 176 states have internal predecessors, (236), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:23,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 242 transitions. [2023-11-26 10:48:23,486 INFO L240 hiAutomatonCegarLoop]: Abstraction has 181 states and 242 transitions. [2023-11-26 10:48:23,486 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 10:48:23,487 INFO L428 stractBuchiCegarLoop]: Abstraction has 181 states and 242 transitions. [2023-11-26 10:48:23,488 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 10:48:23,488 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 181 states and 242 transitions. [2023-11-26 10:48:23,489 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 169 [2023-11-26 10:48:23,490 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:23,490 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:23,491 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:23,492 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:23,492 INFO L748 eck$LassoCheckResult]: Stem: 2105#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 2106#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 2129#L737-3 [2023-11-26 10:48:23,493 INFO L750 eck$LassoCheckResult]: Loop: 2129#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 2053#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2054#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 2229#L745-269 havoc main_~_ha_hashv~0#1; 2223#L745-176 goto; 2221#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2089#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2090#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 2231#L745-73 assume !main_#t~switch29#1; 2083#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 2084#L745-76 assume !main_#t~switch29#1; 2127#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 2103#L745-79 assume !main_#t~switch29#1; 2104#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 2157#L745-82 assume !main_#t~switch29#1; 2128#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 2111#L745-85 assume !main_#t~switch29#1; 2112#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 2123#L745-88 assume !main_#t~switch29#1; 2189#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 2190#L745-91 assume !main_#t~switch29#1; 2126#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 2091#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 2092#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 2179#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 2185#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 2200#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2146#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 2147#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 2102#L745-105 havoc main_#t~switch29#1; 2100#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2101#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2135#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2191#L745-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 2087#L745-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1; 2085#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2086#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2154#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2148#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2073#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2074#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2171#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2172#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2227#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2197#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2151#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2219#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2136#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2077#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2078#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 2093#L745-170 goto; 2141#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2142#L745-173 goto; 2186#L745-175 goto; 2121#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2122#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 2096#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 2097#L745-193 goto; 2212#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 2224#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 2068#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 2069#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 2137#L745-202 goto; 2192#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2063#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 2064#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 2130#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 2213#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 2162#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2170#L745-260 goto; 2133#L745-262 havoc main_~_ha_bkt~0#1; 2134#L745-263 goto; 2143#L745-265 goto; 2144#L745-267 havoc main_~_ha_hashv~0#1; 2199#L745-268 goto; 2214#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2129#L737-3 [2023-11-26 10:48:23,493 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:23,494 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 6 times [2023-11-26 10:48:23,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:23,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039304501] [2023-11-26 10:48:23,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:23,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:23,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:23,504 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:23,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:23,515 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:23,516 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:23,516 INFO L85 PathProgramCache]: Analyzing trace with hash 709846247, now seen corresponding path program 1 times [2023-11-26 10:48:23,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:23,517 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [39964698] [2023-11-26 10:48:23,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:23,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:23,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:24,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:24,059 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:24,060 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [39964698] [2023-11-26 10:48:24,060 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [39964698] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:24,060 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:24,061 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 10:48:24,061 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [605138766] [2023-11-26 10:48:24,061 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:24,062 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:24,062 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:24,063 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 10:48:24,063 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 10:48:24,063 INFO L87 Difference]: Start difference. First operand 181 states and 242 transitions. cyclomatic complexity: 65 Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:24,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:24,670 INFO L93 Difference]: Finished difference Result 186 states and 248 transitions. [2023-11-26 10:48:24,670 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 186 states and 248 transitions. [2023-11-26 10:48:24,672 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 174 [2023-11-26 10:48:24,675 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 186 states to 186 states and 248 transitions. [2023-11-26 10:48:24,676 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 186 [2023-11-26 10:48:24,676 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 186 [2023-11-26 10:48:24,676 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 248 transitions. [2023-11-26 10:48:24,677 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:24,677 INFO L218 hiAutomatonCegarLoop]: Abstraction has 186 states and 248 transitions. [2023-11-26 10:48:24,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 248 transitions. [2023-11-26 10:48:24,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 185. [2023-11-26 10:48:24,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 185 states, 181 states have (on average 1.3314917127071824) internal successors, (241), 180 states have internal predecessors, (241), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:24,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 247 transitions. [2023-11-26 10:48:24,686 INFO L240 hiAutomatonCegarLoop]: Abstraction has 185 states and 247 transitions. [2023-11-26 10:48:24,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 10:48:24,687 INFO L428 stractBuchiCegarLoop]: Abstraction has 185 states and 247 transitions. [2023-11-26 10:48:24,688 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 10:48:24,688 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 185 states and 247 transitions. [2023-11-26 10:48:24,689 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 173 [2023-11-26 10:48:24,690 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:24,690 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:24,691 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:24,691 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:24,692 INFO L748 eck$LassoCheckResult]: Stem: 2486#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 2487#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 2509#L737-3 [2023-11-26 10:48:24,692 INFO L750 eck$LassoCheckResult]: Loop: 2509#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 2432#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2433#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 2609#L745-269 havoc main_~_ha_hashv~0#1; 2604#L745-176 goto; 2601#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2469#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2470#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 2611#L745-73 assume !main_#t~switch29#1; 2462#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 2463#L745-76 assume !main_#t~switch29#1; 2506#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 2482#L745-79 assume !main_#t~switch29#1; 2483#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 2537#L745-82 assume !main_#t~switch29#1; 2507#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 2492#L745-85 assume !main_#t~switch29#1; 2493#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 2502#L745-88 assume !main_#t~switch29#1; 2570#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 2571#L745-91 assume !main_#t~switch29#1; 2505#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 2471#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 2472#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 2559#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 2565#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 2580#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2524#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 2525#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 2481#L745-105 havoc main_#t~switch29#1; 2479#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2480#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2514#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2569#L745-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 2466#L745-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1; 2464#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2465#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 2588#L745-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1; 2533#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2527#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2452#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2453#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2551#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2552#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2607#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2577#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2530#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2599#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2515#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2456#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2457#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 2468#L745-170 goto; 2517#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2518#L745-173 goto; 2566#L745-175 goto; 2500#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2501#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 2475#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 2476#L745-193 goto; 2591#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 2603#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 2445#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 2446#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 2516#L745-202 goto; 2572#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2438#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 2439#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 2508#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 2592#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 2539#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2549#L745-260 goto; 2510#L745-262 havoc main_~_ha_bkt~0#1; 2511#L745-263 goto; 2519#L745-265 goto; 2520#L745-267 havoc main_~_ha_hashv~0#1; 2579#L745-268 goto; 2594#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2509#L737-3 [2023-11-26 10:48:24,693 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:24,693 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 7 times [2023-11-26 10:48:24,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:24,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721846678] [2023-11-26 10:48:24,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:24,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:24,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:24,704 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:24,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:24,716 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:24,717 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:24,717 INFO L85 PathProgramCache]: Analyzing trace with hash 1202676308, now seen corresponding path program 1 times [2023-11-26 10:48:24,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:24,718 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211401900] [2023-11-26 10:48:24,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:24,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:24,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:25,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:25,559 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:25,559 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211401900] [2023-11-26 10:48:25,559 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1211401900] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:25,559 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:25,560 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2023-11-26 10:48:25,560 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2109783213] [2023-11-26 10:48:25,560 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:25,560 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:25,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:25,561 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-26 10:48:25,561 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2023-11-26 10:48:25,562 INFO L87 Difference]: Start difference. First operand 185 states and 247 transitions. cyclomatic complexity: 66 Second operand has 9 states, 9 states have (on average 8.555555555555555) internal successors, (77), 9 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:26,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:26,605 INFO L93 Difference]: Finished difference Result 197 states and 264 transitions. [2023-11-26 10:48:26,605 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 197 states and 264 transitions. [2023-11-26 10:48:26,608 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 185 [2023-11-26 10:48:26,611 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 197 states to 197 states and 264 transitions. [2023-11-26 10:48:26,611 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 197 [2023-11-26 10:48:26,612 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 197 [2023-11-26 10:48:26,612 INFO L73 IsDeterministic]: Start isDeterministic. Operand 197 states and 264 transitions. [2023-11-26 10:48:26,613 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:26,613 INFO L218 hiAutomatonCegarLoop]: Abstraction has 197 states and 264 transitions. [2023-11-26 10:48:26,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states and 264 transitions. [2023-11-26 10:48:26,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 194. [2023-11-26 10:48:26,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 194 states, 190 states have (on average 1.3368421052631578) internal successors, (254), 189 states have internal predecessors, (254), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:26,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 260 transitions. [2023-11-26 10:48:26,621 INFO L240 hiAutomatonCegarLoop]: Abstraction has 194 states and 260 transitions. [2023-11-26 10:48:26,621 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2023-11-26 10:48:26,622 INFO L428 stractBuchiCegarLoop]: Abstraction has 194 states and 260 transitions. [2023-11-26 10:48:26,622 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 10:48:26,623 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 194 states and 260 transitions. [2023-11-26 10:48:26,624 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 182 [2023-11-26 10:48:26,625 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:26,625 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:26,626 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:26,626 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:26,626 INFO L748 eck$LassoCheckResult]: Stem: 2886#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 2887#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 2910#L737-3 [2023-11-26 10:48:26,627 INFO L750 eck$LassoCheckResult]: Loop: 2910#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 2834#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2835#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 3016#L745-269 havoc main_~_ha_hashv~0#1; 3010#L745-176 goto; 3007#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2870#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2871#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 3018#L745-73 assume !main_#t~switch29#1; 2864#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 2865#L745-76 assume !main_#t~switch29#1; 2908#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 2884#L745-79 assume !main_#t~switch29#1; 2885#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 2940#L745-82 assume !main_#t~switch29#1; 2909#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 2892#L745-85 assume !main_#t~switch29#1; 2893#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 2904#L745-88 assume !main_#t~switch29#1; 2972#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 2973#L745-91 assume !main_#t~switch29#1; 2907#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 2872#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 2873#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 2962#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 2968#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 2983#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2927#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 2928#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 2883#L745-105 havoc main_#t~switch29#1; 2881#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2882#L745-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 2896#L745-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 2852#L745-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet41#1 := 0; 2853#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2974#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2937#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3027#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2935#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3020#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2854#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2855#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2954#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2955#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3014#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2980#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2932#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3005#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2917#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2858#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2859#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 2874#L745-170 goto; 2922#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2923#L745-173 goto; 2969#L745-175 goto; 2902#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2903#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 2877#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 2878#L745-193 goto; 2995#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 3011#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 2849#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 2850#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 2918#L745-202 goto; 2975#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2842#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 2843#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 2911#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 2996#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 2945#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2953#L745-260 goto; 2914#L745-262 havoc main_~_ha_bkt~0#1; 2915#L745-263 goto; 2924#L745-265 goto; 2925#L745-267 havoc main_~_ha_hashv~0#1; 2982#L745-268 goto; 2997#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2910#L737-3 [2023-11-26 10:48:26,628 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:26,628 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 8 times [2023-11-26 10:48:26,628 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:26,628 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [110188190] [2023-11-26 10:48:26,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:26,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:26,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:26,639 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:26,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:26,651 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:26,652 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:26,652 INFO L85 PathProgramCache]: Analyzing trace with hash -1583444326, now seen corresponding path program 1 times [2023-11-26 10:48:26,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:26,653 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242614194] [2023-11-26 10:48:26,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:26,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:26,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:27,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:27,108 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:27,108 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242614194] [2023-11-26 10:48:27,109 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1242614194] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:27,109 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:27,109 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 10:48:27,110 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [116049352] [2023-11-26 10:48:27,110 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:27,110 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:27,111 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:27,111 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 10:48:27,111 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 10:48:27,112 INFO L87 Difference]: Start difference. First operand 194 states and 260 transitions. cyclomatic complexity: 70 Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:27,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:27,563 INFO L93 Difference]: Finished difference Result 198 states and 264 transitions. [2023-11-26 10:48:27,563 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 198 states and 264 transitions. [2023-11-26 10:48:27,566 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 186 [2023-11-26 10:48:27,569 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 198 states to 198 states and 264 transitions. [2023-11-26 10:48:27,569 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 198 [2023-11-26 10:48:27,569 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 198 [2023-11-26 10:48:27,569 INFO L73 IsDeterministic]: Start isDeterministic. Operand 198 states and 264 transitions. [2023-11-26 10:48:27,570 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:27,570 INFO L218 hiAutomatonCegarLoop]: Abstraction has 198 states and 264 transitions. [2023-11-26 10:48:27,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states and 264 transitions. [2023-11-26 10:48:27,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 197. [2023-11-26 10:48:27,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 197 states, 193 states have (on average 1.3316062176165804) internal successors, (257), 192 states have internal predecessors, (257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:27,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 263 transitions. [2023-11-26 10:48:27,578 INFO L240 hiAutomatonCegarLoop]: Abstraction has 197 states and 263 transitions. [2023-11-26 10:48:27,579 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 10:48:27,580 INFO L428 stractBuchiCegarLoop]: Abstraction has 197 states and 263 transitions. [2023-11-26 10:48:27,580 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-26 10:48:27,580 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 197 states and 263 transitions. [2023-11-26 10:48:27,582 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 185 [2023-11-26 10:48:27,582 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:27,582 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:27,583 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:27,584 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:27,584 INFO L748 eck$LassoCheckResult]: Stem: 3290#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 3291#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 3313#L737-3 [2023-11-26 10:48:27,584 INFO L750 eck$LassoCheckResult]: Loop: 3313#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 3235#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3236#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 3418#L745-269 havoc main_~_ha_hashv~0#1; 3413#L745-176 goto; 3410#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3275#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3276#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 3420#L745-73 assume !main_#t~switch29#1; 3266#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 3267#L745-76 assume !main_#t~switch29#1; 3310#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 3286#L745-79 assume !main_#t~switch29#1; 3287#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 3341#L745-82 assume !main_#t~switch29#1; 3311#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 3294#L745-85 assume !main_#t~switch29#1; 3295#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 3306#L745-88 assume !main_#t~switch29#1; 3373#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 3374#L745-91 assume !main_#t~switch29#1; 3307#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 3272#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 3273#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 3363#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 3369#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 3384#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 3328#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 3329#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 3285#L745-105 havoc main_#t~switch29#1; 3283#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3284#L745-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 3298#L745-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 3253#L745-111 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet41#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 3255#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3429#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3268#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3269#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3337#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3422#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3256#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3257#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3355#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3356#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3416#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3381#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3334#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3408#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3319#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3260#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3261#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 3274#L745-170 goto; 3324#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3325#L745-173 goto; 3370#L745-175 goto; 3304#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3305#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 3279#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 3280#L745-193 goto; 3396#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 3412#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 3248#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 3249#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 3320#L745-202 goto; 3376#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3243#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 3244#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 3312#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 3397#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 3343#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3354#L745-260 goto; 3316#L745-262 havoc main_~_ha_bkt~0#1; 3317#L745-263 goto; 3326#L745-265 goto; 3327#L745-267 havoc main_~_ha_hashv~0#1; 3383#L745-268 goto; 3399#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3313#L737-3 [2023-11-26 10:48:27,585 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:27,585 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 9 times [2023-11-26 10:48:27,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:27,586 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1367560523] [2023-11-26 10:48:27,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:27,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:27,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:27,596 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:27,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:27,608 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:27,609 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:27,609 INFO L85 PathProgramCache]: Analyzing trace with hash 662135128, now seen corresponding path program 1 times [2023-11-26 10:48:27,609 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:27,610 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771220959] [2023-11-26 10:48:27,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:27,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:27,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:28,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:28,307 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:28,307 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1771220959] [2023-11-26 10:48:28,308 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1771220959] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:28,308 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:28,309 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 10:48:28,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [610206678] [2023-11-26 10:48:28,309 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:28,310 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:28,310 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:28,311 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 10:48:28,312 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 10:48:28,312 INFO L87 Difference]: Start difference. First operand 197 states and 263 transitions. cyclomatic complexity: 70 Second operand has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:29,773 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.10s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 10:48:30,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:30,451 INFO L93 Difference]: Finished difference Result 202 states and 269 transitions. [2023-11-26 10:48:30,451 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 202 states and 269 transitions. [2023-11-26 10:48:30,454 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 190 [2023-11-26 10:48:30,457 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 202 states to 202 states and 269 transitions. [2023-11-26 10:48:30,457 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 202 [2023-11-26 10:48:30,458 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 202 [2023-11-26 10:48:30,458 INFO L73 IsDeterministic]: Start isDeterministic. Operand 202 states and 269 transitions. [2023-11-26 10:48:30,459 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:30,459 INFO L218 hiAutomatonCegarLoop]: Abstraction has 202 states and 269 transitions. [2023-11-26 10:48:30,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states and 269 transitions. [2023-11-26 10:48:30,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 197. [2023-11-26 10:48:30,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 197 states, 193 states have (on average 1.3316062176165804) internal successors, (257), 192 states have internal predecessors, (257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:30,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 263 transitions. [2023-11-26 10:48:30,466 INFO L240 hiAutomatonCegarLoop]: Abstraction has 197 states and 263 transitions. [2023-11-26 10:48:30,466 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 10:48:30,467 INFO L428 stractBuchiCegarLoop]: Abstraction has 197 states and 263 transitions. [2023-11-26 10:48:30,468 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-26 10:48:30,468 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 197 states and 263 transitions. [2023-11-26 10:48:30,469 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 185 [2023-11-26 10:48:30,470 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:30,470 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:30,471 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:30,471 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:30,471 INFO L748 eck$LassoCheckResult]: Stem: 3702#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 3703#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 3725#L737-3 [2023-11-26 10:48:30,472 INFO L750 eck$LassoCheckResult]: Loop: 3725#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 3648#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3649#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 3827#L745-269 havoc main_~_ha_hashv~0#1; 3822#L745-176 goto; 3818#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3684#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3685#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 3829#L745-73 assume !main_#t~switch29#1; 3679#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 3680#L745-76 assume !main_#t~switch29#1; 3722#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 3698#L745-79 assume !main_#t~switch29#1; 3699#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 3754#L745-82 assume !main_#t~switch29#1; 3723#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 3706#L745-85 assume !main_#t~switch29#1; 3707#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 3718#L745-88 assume !main_#t~switch29#1; 3786#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 3787#L745-91 assume !main_#t~switch29#1; 3721#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 3686#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 3687#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 3776#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 3782#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 3801#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 3741#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 3742#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 3697#L745-105 havoc main_#t~switch29#1; 3695#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3696#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3730#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3840#L745-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 3839#L745-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 3838#L745-118 assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet42#1 := 0; 3837#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3836#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3749#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3819#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3669#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3670#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3768#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3769#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3825#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3794#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3746#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3816#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3732#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3673#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3674#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 3688#L745-170 goto; 3738#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3739#L745-173 goto; 3783#L745-175 goto; 3716#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3717#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 3691#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 3692#L745-193 goto; 3808#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 3821#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 3661#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 3662#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 3731#L745-202 goto; 3789#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3654#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 3655#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 3724#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 3809#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 3756#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3766#L745-260 goto; 3726#L745-262 havoc main_~_ha_bkt~0#1; 3727#L745-263 goto; 3733#L745-265 goto; 3734#L745-267 havoc main_~_ha_hashv~0#1; 3796#L745-268 goto; 3811#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3725#L737-3 [2023-11-26 10:48:30,472 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:30,473 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 10 times [2023-11-26 10:48:30,473 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:30,473 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623188425] [2023-11-26 10:48:30,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:30,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:30,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:30,482 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:30,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:30,492 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:30,493 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:30,493 INFO L85 PathProgramCache]: Analyzing trace with hash -2115575814, now seen corresponding path program 1 times [2023-11-26 10:48:30,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:30,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105899895] [2023-11-26 10:48:30,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:30,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:30,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:31,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:31,598 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:31,598 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1105899895] [2023-11-26 10:48:31,598 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1105899895] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:31,598 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:31,598 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-26 10:48:31,599 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [798899077] [2023-11-26 10:48:31,599 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:31,599 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:31,599 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:31,600 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2023-11-26 10:48:31,600 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2023-11-26 10:48:31,600 INFO L87 Difference]: Start difference. First operand 197 states and 263 transitions. cyclomatic complexity: 70 Second operand has 8 states, 8 states have (on average 9.625) internal successors, (77), 8 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:32,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:32,421 INFO L93 Difference]: Finished difference Result 201 states and 267 transitions. [2023-11-26 10:48:32,422 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 201 states and 267 transitions. [2023-11-26 10:48:32,424 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 189 [2023-11-26 10:48:32,427 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 201 states to 201 states and 267 transitions. [2023-11-26 10:48:32,427 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 201 [2023-11-26 10:48:32,427 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 201 [2023-11-26 10:48:32,427 INFO L73 IsDeterministic]: Start isDeterministic. Operand 201 states and 267 transitions. [2023-11-26 10:48:32,429 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:32,429 INFO L218 hiAutomatonCegarLoop]: Abstraction has 201 states and 267 transitions. [2023-11-26 10:48:32,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states and 267 transitions. [2023-11-26 10:48:32,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 200. [2023-11-26 10:48:32,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 200 states, 196 states have (on average 1.3265306122448979) internal successors, (260), 195 states have internal predecessors, (260), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:48:32,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 266 transitions. [2023-11-26 10:48:32,438 INFO L240 hiAutomatonCegarLoop]: Abstraction has 200 states and 266 transitions. [2023-11-26 10:48:32,438 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 10:48:32,440 INFO L428 stractBuchiCegarLoop]: Abstraction has 200 states and 266 transitions. [2023-11-26 10:48:32,440 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-26 10:48:32,440 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 200 states and 266 transitions. [2023-11-26 10:48:32,442 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 188 [2023-11-26 10:48:32,442 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:32,442 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:32,443 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:32,443 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:32,444 INFO L748 eck$LassoCheckResult]: Stem: 4116#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 4117#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 4140#L737-3 [2023-11-26 10:48:32,444 INFO L750 eck$LassoCheckResult]: Loop: 4140#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 4063#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4064#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 4244#L745-269 havoc main_~_ha_hashv~0#1; 4238#L745-176 goto; 4236#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4100#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4101#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 4246#L745-73 assume !main_#t~switch29#1; 4094#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 4095#L745-76 assume !main_#t~switch29#1; 4138#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 4114#L745-79 assume !main_#t~switch29#1; 4115#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 4170#L745-82 assume !main_#t~switch29#1; 4139#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 4122#L745-85 assume !main_#t~switch29#1; 4123#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 4134#L745-88 assume !main_#t~switch29#1; 4202#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 4203#L745-91 assume !main_#t~switch29#1; 4137#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 4102#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 4103#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 4192#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 4198#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 4213#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 4157#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 4158#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 4113#L745-105 havoc main_#t~switch29#1; 4111#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4112#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4146#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4262#L745-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 4098#L745-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 4099#L745-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 4259#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4257#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 4165#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4248#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4084#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4085#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4184#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4185#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4242#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4210#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4162#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4234#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4147#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4088#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4089#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 4104#L745-170 goto; 4152#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4153#L745-173 goto; 4199#L745-175 goto; 4132#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4133#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 4107#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 4108#L745-193 goto; 4225#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 4239#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 4078#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 4079#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 4148#L745-202 goto; 4205#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4071#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 4072#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 4141#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 4226#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 4175#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4183#L745-260 goto; 4144#L745-262 havoc main_~_ha_bkt~0#1; 4145#L745-263 goto; 4154#L745-265 goto; 4155#L745-267 havoc main_~_ha_hashv~0#1; 4212#L745-268 goto; 4227#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4140#L737-3 [2023-11-26 10:48:32,447 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:32,447 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 11 times [2023-11-26 10:48:32,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:32,448 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [339053394] [2023-11-26 10:48:32,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:32,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:32,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:32,457 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:32,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:32,469 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:32,469 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:32,470 INFO L85 PathProgramCache]: Analyzing trace with hash -1867429320, now seen corresponding path program 1 times [2023-11-26 10:48:32,470 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:32,470 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [462697015] [2023-11-26 10:48:32,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:32,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:32,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:45,992 WARN L854 $PredicateComparison]: unable to prove that (<= 4408680402991862184 (+ (* |c_ULTIMATE.start_main_~_hj_j~0#1| 1030789529) (* (div (+ (* |c_ULTIMATE.start_main_~_hj_i~0#1| (- 1030789530)) 4408680402991864378 (* |c_ULTIMATE.start_main_~_hj_j~0#1| (- 1030789529))) 4294967296) 4294967296) (* 1030789530 |c_ULTIMATE.start_main_~_hj_i~0#1|))) is different from false