./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test6-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test6-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bd635b7902366e8a0b08b14a90a1f3949f04bf734a3e09a83f5077ced842f5da --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:57:16,167 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:57:16,247 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:57:16,253 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:57:16,254 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:57:16,284 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:57:16,285 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:57:16,286 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:57:16,287 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:57:16,288 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:57:16,289 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:57:16,289 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:57:16,290 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:57:16,291 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:57:16,291 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:57:16,292 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:57:16,292 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:57:16,293 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:57:16,293 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:57:16,294 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:57:16,295 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:57:16,296 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:57:16,297 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:57:16,297 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:57:16,298 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:57:16,298 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:57:16,299 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:57:16,299 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:57:16,300 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:57:16,300 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:57:16,302 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:57:16,302 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:57:16,302 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:57:16,303 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:57:16,303 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:57:16,303 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:57:16,303 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:57:16,304 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:57:16,304 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bd635b7902366e8a0b08b14a90a1f3949f04bf734a3e09a83f5077ced842f5da [2023-11-26 11:57:16,631 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:57:16,672 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:57:16,675 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:57:16,676 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:57:16,677 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:57:16,678 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test6-2.i [2023-11-26 11:57:19,966 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:57:20,414 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:57:20,415 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test6-2.i [2023-11-26 11:57:20,440 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/data/9e49d479a/d993ce4c9b884fcaaffaafb67ae6e8a2/FLAG1c0859fe6 [2023-11-26 11:57:20,453 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/data/9e49d479a/d993ce4c9b884fcaaffaafb67ae6e8a2 [2023-11-26 11:57:20,456 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:57:20,457 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:57:20,459 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:57:20,459 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:57:20,472 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:57:20,473 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:57:20" (1/1) ... [2023-11-26 11:57:20,474 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@20e8097d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:20, skipping insertion in model container [2023-11-26 11:57:20,475 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:57:20" (1/1) ... [2023-11-26 11:57:20,546 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:57:21,554 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:57:21,572 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:57:21,696 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:57:21,778 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-26 11:57:21,786 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:57:21,787 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21 WrapperNode [2023-11-26 11:57:21,787 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:57:21,788 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:57:21,788 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:57:21,788 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:57:21,796 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:21,842 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:21,941 INFO L138 Inliner]: procedures = 282, calls = 351, calls flagged for inlining = 25, calls inlined = 37, statements flattened = 1709 [2023-11-26 11:57:21,941 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:57:21,942 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:57:21,942 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:57:21,943 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:57:21,959 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:21,960 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:21,996 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:22,194 INFO L175 MemorySlicer]: Split 322 memory accesses to 5 slices as follows [2, 34, 10, 5, 271]. 84 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0, 0, 0]. The 67 writes are split as follows [0, 4, 4, 1, 58]. [2023-11-26 11:57:22,198 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:22,199 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:22,301 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:22,330 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:22,346 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:22,363 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:22,388 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:57:22,389 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:57:22,390 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:57:22,390 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:57:22,391 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (1/1) ... [2023-11-26 11:57:22,397 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:57:22,409 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:57:22,426 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:57:22,461 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:57:22,483 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 11:57:22,483 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 11:57:22,483 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 11:57:22,484 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-26 11:57:22,484 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#4 [2023-11-26 11:57:22,484 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 11:57:22,484 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 11:57:22,485 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 11:57:22,485 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-26 11:57:22,486 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#4 [2023-11-26 11:57:22,486 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 11:57:22,486 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-26 11:57:22,486 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 11:57:22,486 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 11:57:22,488 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 11:57:22,488 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-26 11:57:22,489 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#4 [2023-11-26 11:57:22,489 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 11:57:22,489 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 11:57:22,489 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 11:57:22,489 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 11:57:22,489 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-26 11:57:22,490 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#4 [2023-11-26 11:57:22,490 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 11:57:22,491 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 11:57:22,491 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 11:57:22,491 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-26 11:57:22,491 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#4 [2023-11-26 11:57:22,492 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 11:57:22,492 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:57:22,493 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 11:57:22,493 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 11:57:22,493 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 11:57:22,493 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-26 11:57:22,494 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#4 [2023-11-26 11:57:22,494 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:57:22,494 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 11:57:22,495 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 11:57:22,495 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-26 11:57:22,495 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#4 [2023-11-26 11:57:22,495 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:57:22,495 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:57:22,838 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:57:22,840 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:57:22,845 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:57:22,904 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:57:22,922 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:57:22,939 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:57:22,955 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:57:24,866 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:57:24,901 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:57:24,901 INFO L309 CfgBuilder]: Removed 72 assume(true) statements. [2023-11-26 11:57:24,903 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:57:24 BoogieIcfgContainer [2023-11-26 11:57:24,903 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:57:24,904 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:57:24,904 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:57:24,908 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:57:24,909 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:57:24,909 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:57:20" (1/3) ... [2023-11-26 11:57:24,910 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4deb7adb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:57:24, skipping insertion in model container [2023-11-26 11:57:24,911 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:57:24,911 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:57:21" (2/3) ... [2023-11-26 11:57:24,914 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4deb7adb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:57:24, skipping insertion in model container [2023-11-26 11:57:24,914 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:57:24,914 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:57:24" (3/3) ... [2023-11-26 11:57:24,915 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_OAT_test6-2.i [2023-11-26 11:57:25,012 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:57:25,012 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:57:25,013 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:57:25,013 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:57:25,013 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:57:25,013 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:57:25,013 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:57:25,013 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:57:25,020 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 458 states, 453 states have (on average 1.6445916114790287) internal successors, (745), 453 states have internal predecessors, (745), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:57:25,073 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 431 [2023-11-26 11:57:25,074 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:57:25,074 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:57:25,082 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:57:25,082 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:57:25,082 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:57:25,084 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 458 states, 453 states have (on average 1.6445916114790287) internal successors, (745), 453 states have internal predecessors, (745), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:57:25,100 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 431 [2023-11-26 11:57:25,100 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:57:25,100 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:57:25,101 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:57:25,101 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:57:25,110 INFO L748 eck$LassoCheckResult]: Stem: 128#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 371#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem340#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~nondet341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~post345#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1, main_#t~post356#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite312#1.base, main_#t~ite312#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8#L989-4true [2023-11-26 11:57:25,111 INFO L750 eck$LassoCheckResult]: Loop: 8#L989-4true call main_#t~mem42#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 232#L989-1true assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 4#real_malloc_returnLabel#1true main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 9#L991true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 82#L991-2true call main_#t~mem44#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 267#L996-263true assume !true; 434#L989-3true call main_#t~mem40#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#1(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 8#L989-4true [2023-11-26 11:57:25,117 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:25,118 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 1 times [2023-11-26 11:57:25,127 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:25,128 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1715000212] [2023-11-26 11:57:25,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:25,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:25,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:25,260 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:57:25,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:25,343 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:57:25,347 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:25,347 INFO L85 PathProgramCache]: Analyzing trace with hash 1419562106, now seen corresponding path program 1 times [2023-11-26 11:57:25,348 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:25,348 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34608244] [2023-11-26 11:57:25,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:25,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:25,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:57:25,446 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:57:25,448 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34608244] [2023-11-26 11:57:25,448 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-26 11:57:25,449 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1688199342] [2023-11-26 11:57:25,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:25,449 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:57:25,450 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:57:25,456 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:57:25,499 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-26 11:57:25,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:57:25,691 INFO L262 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-26 11:57:25,693 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:57:25,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:57:25,713 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:57:25,714 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1688199342] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:57:25,714 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:57:25,714 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 11:57:25,715 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055595557] [2023-11-26 11:57:25,716 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:57:25,721 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:57:25,722 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:57:25,762 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 11:57:25,763 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 11:57:25,766 INFO L87 Difference]: Start difference. First operand has 458 states, 453 states have (on average 1.6445916114790287) internal successors, (745), 453 states have internal predecessors, (745), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:57:25,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:57:25,824 INFO L93 Difference]: Finished difference Result 439 states and 628 transitions. [2023-11-26 11:57:25,825 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 439 states and 628 transitions. [2023-11-26 11:57:25,836 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 404 [2023-11-26 11:57:25,854 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 439 states to 422 states and 611 transitions. [2023-11-26 11:57:25,855 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 422 [2023-11-26 11:57:25,859 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 422 [2023-11-26 11:57:25,859 INFO L73 IsDeterministic]: Start isDeterministic. Operand 422 states and 611 transitions. [2023-11-26 11:57:25,870 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:57:25,870 INFO L218 hiAutomatonCegarLoop]: Abstraction has 422 states and 611 transitions. [2023-11-26 11:57:25,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 422 states and 611 transitions. [2023-11-26 11:57:25,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 422 to 422. [2023-11-26 11:57:25,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 422 states, 418 states have (on average 1.4473684210526316) internal successors, (605), 417 states have internal predecessors, (605), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:57:25,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 422 states to 422 states and 611 transitions. [2023-11-26 11:57:25,935 INFO L240 hiAutomatonCegarLoop]: Abstraction has 422 states and 611 transitions. [2023-11-26 11:57:25,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 11:57:25,939 INFO L428 stractBuchiCegarLoop]: Abstraction has 422 states and 611 transitions. [2023-11-26 11:57:25,940 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:57:25,940 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 422 states and 611 transitions. [2023-11-26 11:57:25,943 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 404 [2023-11-26 11:57:25,943 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:57:25,943 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:57:25,945 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:57:25,945 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:57:25,945 INFO L748 eck$LassoCheckResult]: Stem: 1133#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 1134#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem340#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~nondet341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~post345#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1, main_#t~post356#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite312#1.base, main_#t~ite312#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 933#L989-4 [2023-11-26 11:57:25,948 INFO L750 eck$LassoCheckResult]: Loop: 933#L989-4 call main_#t~mem42#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 934#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 927#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 928#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 935#L991-2 call main_#t~mem44#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 1066#L996-263 havoc main_~_ha_hashv~0#1; 1158#L996-176 goto; 1159#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 995#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1267#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 1309#L996-73 assume main_#t~switch68#1;call main_#t~mem69#1 := read~int#4(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem69#1 % 256 % 4294967296);havoc main_#t~mem69#1; 1227#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 931#L996-76 assume main_#t~switch68#1;call main_#t~mem70#1 := read~int#4(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem70#1 % 256 % 4294967296);havoc main_#t~mem70#1; 932#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 1181#L996-79 assume main_#t~switch68#1;call main_#t~mem71#1 := read~int#4(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem71#1 % 256 % 4294967296);havoc main_#t~mem71#1; 1119#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 1120#L996-82 assume main_#t~switch68#1;call main_#t~mem72#1 := read~int#4(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem72#1 % 256 % 4294967296);havoc main_#t~mem72#1; 1272#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 972#L996-85 assume !main_#t~switch68#1; 973#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 1273#L996-88 assume main_#t~switch68#1;call main_#t~mem74#1 := read~int#4(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem74#1 % 256 % 4294967296);havoc main_#t~mem74#1; 1274#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 1074#L996-91 assume main_#t~switch68#1;call main_#t~mem75#1 := read~int#4(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem75#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem75#1 % 256 % 4294967296 else main_#t~mem75#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem75#1; 1075#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 1193#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 1194#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 1237#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 1238#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 1081#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 1082#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 1268#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 1070#L996-105 havoc main_#t~switch68#1; 1071#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1015#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1016#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1039#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1040#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1302#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1117#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1171#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1172#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1290#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1180#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1300#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1163#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1102#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 974#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 975#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1154#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1330#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 924#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 1006#L996-170 goto; 1007#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1276#L996-173 goto; 1223#L996-175 goto; 1146#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1147#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 1185#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 1186#L996-189 goto; 1026#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 1094#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 1095#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 1235#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 1298#L996-198 goto; 1246#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1247#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 1003#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 970#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 971#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 1320#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1335#L996-254 goto; 1344#L996-256 havoc main_~_ha_bkt~0#1; 1252#L996-257 goto; 1216#L996-259 goto; 950#L996-261 havoc main_~_ha_hashv~0#1; 951#L996-262 goto; 1283#L989-3 call main_#t~mem40#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#1(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 933#L989-4 [2023-11-26 11:57:25,948 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:25,948 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 2 times [2023-11-26 11:57:25,949 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:25,949 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501969221] [2023-11-26 11:57:25,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:25,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:25,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:25,973 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:57:25,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:26,003 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:57:26,004 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:26,004 INFO L85 PathProgramCache]: Analyzing trace with hash 997853422, now seen corresponding path program 1 times [2023-11-26 11:57:26,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:26,004 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2042613010] [2023-11-26 11:57:26,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:26,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:26,135 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:57:26,139 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1126961716] [2023-11-26 11:57:26,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:26,140 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:57:26,140 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:57:26,187 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:57:26,199 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-26 11:57:26,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:57:26,574 INFO L262 TraceCheckSpWp]: Trace formula consists of 553 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:57:26,579 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:57:26,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:57:26,637 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:57:26,638 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:57:26,638 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2042613010] [2023-11-26 11:57:26,638 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:57:26,638 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1126961716] [2023-11-26 11:57:26,638 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1126961716] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:57:26,639 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:57:26,639 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:57:26,639 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [512790045] [2023-11-26 11:57:26,639 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:57:26,641 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:57:26,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:57:26,641 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 11:57:26,642 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 11:57:26,642 INFO L87 Difference]: Start difference. First operand 422 states and 611 transitions. cyclomatic complexity: 193 Second operand has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:57:26,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:57:26,776 INFO L93 Difference]: Finished difference Result 443 states and 632 transitions. [2023-11-26 11:57:26,777 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 443 states and 632 transitions. [2023-11-26 11:57:26,784 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 425 [2023-11-26 11:57:26,789 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 443 states to 443 states and 632 transitions. [2023-11-26 11:57:26,789 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 443 [2023-11-26 11:57:26,790 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 443 [2023-11-26 11:57:26,791 INFO L73 IsDeterministic]: Start isDeterministic. Operand 443 states and 632 transitions. [2023-11-26 11:57:26,792 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:57:26,792 INFO L218 hiAutomatonCegarLoop]: Abstraction has 443 states and 632 transitions. [2023-11-26 11:57:26,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 443 states and 632 transitions. [2023-11-26 11:57:26,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 443 to 442. [2023-11-26 11:57:26,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 442 states, 438 states have (on average 1.4269406392694064) internal successors, (625), 437 states have internal predecessors, (625), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:57:26,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 442 states to 442 states and 631 transitions. [2023-11-26 11:57:26,827 INFO L240 hiAutomatonCegarLoop]: Abstraction has 442 states and 631 transitions. [2023-11-26 11:57:26,827 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 11:57:26,828 INFO L428 stractBuchiCegarLoop]: Abstraction has 442 states and 631 transitions. [2023-11-26 11:57:26,828 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:57:26,829 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 442 states and 631 transitions. [2023-11-26 11:57:26,850 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 424 [2023-11-26 11:57:26,850 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:57:26,850 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:57:26,852 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:57:26,852 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:57:26,853 INFO L748 eck$LassoCheckResult]: Stem: 2232#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 2233#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem340#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~nondet341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~post345#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1, main_#t~post356#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite312#1.base, main_#t~ite312#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2032#L989-4 [2023-11-26 11:57:26,853 INFO L750 eck$LassoCheckResult]: Loop: 2032#L989-4 call main_#t~mem42#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2033#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 2026#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 2027#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2034#L991-2 call main_#t~mem44#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 2165#L996-263 havoc main_~_ha_hashv~0#1; 2257#L996-176 goto; 2258#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2094#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2366#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 2410#L996-73 assume main_#t~switch68#1;call main_#t~mem69#1 := read~int#4(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem69#1 % 256 % 4294967296);havoc main_#t~mem69#1; 2326#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 2030#L996-76 assume main_#t~switch68#1;call main_#t~mem70#1 := read~int#4(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem70#1 % 256 % 4294967296);havoc main_#t~mem70#1; 2031#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 2280#L996-79 assume main_#t~switch68#1;call main_#t~mem71#1 := read~int#4(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem71#1 % 256 % 4294967296);havoc main_#t~mem71#1; 2218#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 2219#L996-82 assume main_#t~switch68#1;call main_#t~mem72#1 := read~int#4(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem72#1 % 256 % 4294967296);havoc main_#t~mem72#1; 2371#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 2071#L996-85 assume main_#t~switch68#1;call main_#t~mem73#1 := read~int#4(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem73#1 % 256 % 4294967296);havoc main_#t~mem73#1; 2072#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 2372#L996-88 assume main_#t~switch68#1;call main_#t~mem74#1 := read~int#4(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem74#1 % 256 % 4294967296);havoc main_#t~mem74#1; 2373#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 2173#L996-91 assume main_#t~switch68#1;call main_#t~mem75#1 := read~int#4(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem75#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem75#1 % 256 % 4294967296 else main_#t~mem75#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem75#1; 2174#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 2292#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 2293#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 2336#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 2337#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 2180#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 2181#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 2367#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 2169#L996-105 havoc main_#t~switch68#1; 2170#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2114#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2115#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2138#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2139#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2401#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2216#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2270#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2271#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2389#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2279#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2399#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2262#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2201#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2073#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2074#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2253#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2432#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2023#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 2105#L996-170 goto; 2106#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2375#L996-173 goto; 2322#L996-175 goto; 2245#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2246#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 2284#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 2285#L996-189 goto; 2125#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 2193#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 2194#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 2334#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 2397#L996-198 goto; 2345#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2346#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 2102#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 2069#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 2070#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 2422#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2439#L996-254 goto; 2448#L996-256 havoc main_~_ha_bkt~0#1; 2351#L996-257 goto; 2315#L996-259 goto; 2049#L996-261 havoc main_~_ha_hashv~0#1; 2050#L996-262 goto; 2382#L989-3 call main_#t~mem40#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#1(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 2032#L989-4 [2023-11-26 11:57:26,854 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:26,854 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 3 times [2023-11-26 11:57:26,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:26,855 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1408190353] [2023-11-26 11:57:26,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:26,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:26,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:26,878 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:57:26,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:26,903 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:57:26,904 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:26,904 INFO L85 PathProgramCache]: Analyzing trace with hash 437153644, now seen corresponding path program 1 times [2023-11-26 11:57:26,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:26,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205522615] [2023-11-26 11:57:26,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:26,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:26,965 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:57:26,965 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1543665933] [2023-11-26 11:57:26,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:26,966 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:57:26,966 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:57:26,972 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:57:26,979 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-26 11:57:27,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:57:27,315 INFO L262 TraceCheckSpWp]: Trace formula consists of 559 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:57:27,319 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:57:27,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:57:27,346 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:57:27,347 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:57:27,347 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1205522615] [2023-11-26 11:57:27,347 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:57:27,348 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1543665933] [2023-11-26 11:57:27,348 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1543665933] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:57:27,348 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:57:27,348 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 11:57:27,349 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [670742477] [2023-11-26 11:57:27,349 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:57:27,349 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:57:27,350 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:57:27,350 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 11:57:27,350 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 11:57:27,351 INFO L87 Difference]: Start difference. First operand 442 states and 631 transitions. cyclomatic complexity: 193 Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:57:27,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:57:27,512 INFO L93 Difference]: Finished difference Result 429 states and 611 transitions. [2023-11-26 11:57:27,512 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 429 states and 611 transitions. [2023-11-26 11:57:27,517 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 411 [2023-11-26 11:57:27,523 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 429 states to 429 states and 611 transitions. [2023-11-26 11:57:27,523 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 429 [2023-11-26 11:57:27,524 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 429 [2023-11-26 11:57:27,524 INFO L73 IsDeterministic]: Start isDeterministic. Operand 429 states and 611 transitions. [2023-11-26 11:57:27,525 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:57:27,526 INFO L218 hiAutomatonCegarLoop]: Abstraction has 429 states and 611 transitions. [2023-11-26 11:57:27,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states and 611 transitions. [2023-11-26 11:57:27,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 428. [2023-11-26 11:57:27,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 428 states, 424 states have (on average 1.4245283018867925) internal successors, (604), 423 states have internal predecessors, (604), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:57:27,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 428 states to 428 states and 610 transitions. [2023-11-26 11:57:27,541 INFO L240 hiAutomatonCegarLoop]: Abstraction has 428 states and 610 transitions. [2023-11-26 11:57:27,542 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 11:57:27,543 INFO L428 stractBuchiCegarLoop]: Abstraction has 428 states and 610 transitions. [2023-11-26 11:57:27,543 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:57:27,543 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 428 states and 610 transitions. [2023-11-26 11:57:27,546 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 410 [2023-11-26 11:57:27,547 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:57:27,547 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:57:27,549 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:57:27,549 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:57:27,549 INFO L748 eck$LassoCheckResult]: Stem: 3340#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 3341#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem340#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~nondet341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~post345#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1, main_#t~post356#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite312#1.base, main_#t~ite312#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3140#L989-4 [2023-11-26 11:57:27,550 INFO L750 eck$LassoCheckResult]: Loop: 3140#L989-4 call main_#t~mem42#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3141#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 3134#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 3135#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3142#L991-2 call main_#t~mem44#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 3273#L996-263 havoc main_~_ha_hashv~0#1; 3365#L996-176 goto; 3366#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3202#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3475#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 3517#L996-73 assume !main_#t~switch68#1; 3435#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 3138#L996-76 assume !main_#t~switch68#1; 3139#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 3388#L996-79 assume !main_#t~switch68#1; 3326#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 3327#L996-82 assume !main_#t~switch68#1; 3480#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 3179#L996-85 assume !main_#t~switch68#1; 3180#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 3481#L996-88 assume !main_#t~switch68#1; 3482#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 3281#L996-91 assume !main_#t~switch68#1; 3282#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 3400#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 3401#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 3445#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 3446#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 3288#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 3289#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 3476#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 3277#L996-105 havoc main_#t~switch68#1; 3278#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3222#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3223#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3246#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3247#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3510#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3324#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3378#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3379#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3498#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3387#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3508#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3370#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3309#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3181#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3182#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3361#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3538#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3131#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 3213#L996-170 goto; 3214#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3484#L996-173 goto; 3431#L996-175 goto; 3353#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3354#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 3392#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 3393#L996-189 goto; 3231#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 3301#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 3302#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 3443#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 3506#L996-198 goto; 3454#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3455#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 3210#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 3177#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 3178#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 3528#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3543#L996-254 goto; 3552#L996-256 havoc main_~_ha_bkt~0#1; 3460#L996-257 goto; 3420#L996-259 goto; 3157#L996-261 havoc main_~_ha_hashv~0#1; 3158#L996-262 goto; 3490#L989-3 call main_#t~mem40#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#1(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 3140#L989-4 [2023-11-26 11:57:27,551 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:27,551 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 4 times [2023-11-26 11:57:27,552 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:27,552 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [234460326] [2023-11-26 11:57:27,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:27,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:27,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:27,575 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:57:27,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:27,599 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:57:27,600 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:27,600 INFO L85 PathProgramCache]: Analyzing trace with hash -2007566726, now seen corresponding path program 1 times [2023-11-26 11:57:27,601 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:27,601 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808345058] [2023-11-26 11:57:27,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:27,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:27,667 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:57:27,667 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2119399484] [2023-11-26 11:57:27,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:27,668 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:57:27,668 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:57:27,672 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:57:27,695 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-26 11:57:28,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:57:28,148 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 11:57:28,152 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:57:28,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:57:28,339 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:57:28,340 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:57:28,340 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808345058] [2023-11-26 11:57:28,340 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:57:28,340 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2119399484] [2023-11-26 11:57:28,341 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2119399484] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:57:28,341 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:57:28,341 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-26 11:57:28,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [715557975] [2023-11-26 11:57:28,342 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:57:28,342 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:57:28,342 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:57:28,343 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2023-11-26 11:57:28,343 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2023-11-26 11:57:28,343 INFO L87 Difference]: Start difference. First operand 428 states and 610 transitions. cyclomatic complexity: 186 Second operand has 8 states, 8 states have (on average 9.625) internal successors, (77), 8 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:57:28,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:57:28,894 INFO L93 Difference]: Finished difference Result 477 states and 672 transitions. [2023-11-26 11:57:28,894 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 477 states and 672 transitions. [2023-11-26 11:57:28,899 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 459 [2023-11-26 11:57:28,904 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 477 states to 477 states and 672 transitions. [2023-11-26 11:57:28,904 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 477 [2023-11-26 11:57:28,905 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 477 [2023-11-26 11:57:28,906 INFO L73 IsDeterministic]: Start isDeterministic. Operand 477 states and 672 transitions. [2023-11-26 11:57:28,907 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:57:28,907 INFO L218 hiAutomatonCegarLoop]: Abstraction has 477 states and 672 transitions. [2023-11-26 11:57:28,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 477 states and 672 transitions. [2023-11-26 11:57:28,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 477 to 468. [2023-11-26 11:57:28,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 468 states, 464 states have (on average 1.4051724137931034) internal successors, (652), 463 states have internal predecessors, (652), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:57:28,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 468 states to 468 states and 658 transitions. [2023-11-26 11:57:28,920 INFO L240 hiAutomatonCegarLoop]: Abstraction has 468 states and 658 transitions. [2023-11-26 11:57:28,922 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 11:57:28,923 INFO L428 stractBuchiCegarLoop]: Abstraction has 468 states and 658 transitions. [2023-11-26 11:57:28,923 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 11:57:28,923 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 468 states and 658 transitions. [2023-11-26 11:57:28,926 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 450 [2023-11-26 11:57:28,926 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:57:28,926 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:57:28,927 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:57:28,928 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:57:28,928 INFO L748 eck$LassoCheckResult]: Stem: 4484#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 4485#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem340#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~nondet341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~post345#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1, main_#t~post356#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite312#1.base, main_#t~ite312#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4284#L989-4 [2023-11-26 11:57:28,928 INFO L750 eck$LassoCheckResult]: Loop: 4284#L989-4 call main_#t~mem42#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4285#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 4278#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 4279#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4286#L991-2 call main_#t~mem44#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 4417#L996-263 havoc main_~_ha_hashv~0#1; 4510#L996-176 goto; 4511#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4594#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4684#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 4685#L996-73 assume !main_#t~switch68#1; 4580#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 4581#L996-76 assume !main_#t~switch68#1; 4532#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 4533#L996-79 assume !main_#t~switch68#1; 4470#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 4471#L996-82 assume !main_#t~switch68#1; 4627#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 4628#L996-85 assume !main_#t~switch68#1; 4629#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 4630#L996-88 assume !main_#t~switch68#1; 4699#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 4700#L996-91 assume !main_#t~switch68#1; 4715#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 4716#L996-94 assume !main_#t~switch68#1; 4737#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 4734#L996-97 assume !main_#t~switch68#1; 4733#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 4731#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 4732#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 4730#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 4729#L996-105 havoc main_#t~switch68#1; 4728#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4727#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4726#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4725#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 4724#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4691#L996-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 4692#L996-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet82#1 := main_~_ha_hashv~0#1; 4468#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4522#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4523#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4652#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4531#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4662#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4515#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4453#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4325#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4326#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4507#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4698#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4275#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 4357#L996-170 goto; 4358#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4636#L996-173 goto; 4575#L996-175 goto; 4497#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4498#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 4535#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 4536#L996-189 goto; 4375#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 4445#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 4446#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 4588#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 4660#L996-198 goto; 4600#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4601#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 4354#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 4319#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 4320#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 4683#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4702#L996-254 goto; 4714#L996-256 havoc main_~_ha_bkt~0#1; 4607#L996-257 goto; 4565#L996-259 goto; 4301#L996-261 havoc main_~_ha_hashv~0#1; 4302#L996-262 goto; 4644#L989-3 call main_#t~mem40#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#1(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 4284#L989-4 [2023-11-26 11:57:28,929 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:28,929 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 5 times [2023-11-26 11:57:28,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:28,929 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133830657] [2023-11-26 11:57:28,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:28,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:28,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:28,949 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:57:28,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:28,970 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:57:28,970 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:28,970 INFO L85 PathProgramCache]: Analyzing trace with hash 1816459944, now seen corresponding path program 1 times [2023-11-26 11:57:28,971 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:28,971 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [932415757] [2023-11-26 11:57:28,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:28,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:29,022 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:57:29,022 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1685687538] [2023-11-26 11:57:29,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:29,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:57:29,023 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:57:29,028 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:57:29,038 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-26 11:57:29,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:57:29,423 INFO L262 TraceCheckSpWp]: Trace formula consists of 506 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 11:57:29,432 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:57:29,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:57:29,515 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:57:29,515 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:57:29,516 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [932415757] [2023-11-26 11:57:29,516 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:57:29,517 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1685687538] [2023-11-26 11:57:29,517 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1685687538] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:57:29,517 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:57:29,517 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:57:29,518 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1244884619] [2023-11-26 11:57:29,518 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:57:29,519 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:57:29,520 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:57:29,520 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:57:29,525 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:57:29,525 INFO L87 Difference]: Start difference. First operand 468 states and 658 transitions. cyclomatic complexity: 194 Second operand has 5 states, 5 states have (on average 15.6) internal successors, (78), 5 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:57:29,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:57:29,676 INFO L93 Difference]: Finished difference Result 545 states and 784 transitions. [2023-11-26 11:57:29,676 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 545 states and 784 transitions. [2023-11-26 11:57:29,680 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 527 [2023-11-26 11:57:29,686 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 545 states to 545 states and 784 transitions. [2023-11-26 11:57:29,686 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 545 [2023-11-26 11:57:29,687 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 545 [2023-11-26 11:57:29,687 INFO L73 IsDeterministic]: Start isDeterministic. Operand 545 states and 784 transitions. [2023-11-26 11:57:29,688 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:57:29,688 INFO L218 hiAutomatonCegarLoop]: Abstraction has 545 states and 784 transitions. [2023-11-26 11:57:29,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states and 784 transitions. [2023-11-26 11:57:29,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 468. [2023-11-26 11:57:29,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 468 states, 464 states have (on average 1.3987068965517242) internal successors, (649), 463 states have internal predecessors, (649), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:57:29,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 468 states to 468 states and 655 transitions. [2023-11-26 11:57:29,702 INFO L240 hiAutomatonCegarLoop]: Abstraction has 468 states and 655 transitions. [2023-11-26 11:57:29,702 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:57:29,708 INFO L428 stractBuchiCegarLoop]: Abstraction has 468 states and 655 transitions. [2023-11-26 11:57:29,708 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 11:57:29,708 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 468 states and 655 transitions. [2023-11-26 11:57:29,711 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 450 [2023-11-26 11:57:29,711 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:57:29,711 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:57:29,712 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:57:29,713 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:57:29,714 INFO L748 eck$LassoCheckResult]: Stem: 5737#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 5738#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem340#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~nondet341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~post345#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1, main_#t~post356#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite312#1.base, main_#t~ite312#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5536#L989-4 [2023-11-26 11:57:29,714 INFO L750 eck$LassoCheckResult]: Loop: 5536#L989-4 call main_#t~mem42#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5537#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 5530#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 5531#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5538#L991-2 call main_#t~mem44#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 5669#L996-263 havoc main_~_ha_hashv~0#1; 5765#L996-176 goto; 5766#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5845#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5873#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 5922#L996-73 assume !main_#t~switch68#1; 5831#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 5534#L996-76 assume !main_#t~switch68#1; 5535#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 5784#L996-79 assume !main_#t~switch68#1; 5722#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 5723#L996-82 assume !main_#t~switch68#1; 5878#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 5879#L996-85 assume !main_#t~switch68#1; 5880#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 5881#L996-88 assume !main_#t~switch68#1; 5884#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 5948#L996-91 assume !main_#t~switch68#1; 5964#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 5796#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 5797#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 5897#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 5962#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 5963#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 5990#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 5988#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 5673#L996-105 havoc main_#t~switch68#1; 5674#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5615#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5616#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5639#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 5640#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5915#L996-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 5939#L996-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet82#1 := main_~_ha_hashv~0#1; 5718#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5771#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5772#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5903#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5781#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5912#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5762#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5705#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5577#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5578#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5757#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5944#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5527#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 5609#L996-170 goto; 5610#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5886#L996-173 goto; 5826#L996-175 goto; 5749#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5750#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 5788#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 5789#L996-189 goto; 5627#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 5697#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 5698#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 5840#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 5911#L996-198 goto; 5852#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5853#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 5606#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 5573#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 5574#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 5935#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5951#L996-254 goto; 5961#L996-256 havoc main_~_ha_bkt~0#1; 5858#L996-257 goto; 5820#L996-259 goto; 5553#L996-261 havoc main_~_ha_hashv~0#1; 5554#L996-262 goto; 5895#L989-3 call main_#t~mem40#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#1(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 5536#L989-4 [2023-11-26 11:57:29,715 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:29,715 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 6 times [2023-11-26 11:57:29,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:29,716 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1098631415] [2023-11-26 11:57:29,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:29,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:29,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:29,756 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:57:29,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:29,789 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:57:29,790 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:29,790 INFO L85 PathProgramCache]: Analyzing trace with hash -597899092, now seen corresponding path program 1 times [2023-11-26 11:57:29,790 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:29,790 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [573258296] [2023-11-26 11:57:29,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:29,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:29,860 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:57:29,860 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1918250648] [2023-11-26 11:57:29,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:29,861 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:57:29,861 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:57:29,864 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:57:29,888 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-26 11:57:30,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:57:30,325 INFO L262 TraceCheckSpWp]: Trace formula consists of 518 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 11:57:30,328 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:57:30,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:57:30,494 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:57:30,494 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:57:30,495 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [573258296] [2023-11-26 11:57:30,495 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:57:30,495 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1918250648] [2023-11-26 11:57:30,495 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1918250648] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:57:30,495 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:57:30,495 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 11:57:30,496 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1465133311] [2023-11-26 11:57:30,496 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:57:30,496 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:57:30,496 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:57:30,497 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:57:30,497 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:57:30,497 INFO L87 Difference]: Start difference. First operand 468 states and 655 transitions. cyclomatic complexity: 191 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:57:31,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:57:31,306 INFO L93 Difference]: Finished difference Result 486 states and 682 transitions. [2023-11-26 11:57:31,306 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 486 states and 682 transitions. [2023-11-26 11:57:31,310 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 468 [2023-11-26 11:57:31,318 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 486 states to 486 states and 682 transitions. [2023-11-26 11:57:31,319 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 486 [2023-11-26 11:57:31,319 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 486 [2023-11-26 11:57:31,320 INFO L73 IsDeterministic]: Start isDeterministic. Operand 486 states and 682 transitions. [2023-11-26 11:57:31,321 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:57:31,321 INFO L218 hiAutomatonCegarLoop]: Abstraction has 486 states and 682 transitions. [2023-11-26 11:57:31,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 486 states and 682 transitions. [2023-11-26 11:57:31,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 486 to 478. [2023-11-26 11:57:31,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 478 states, 474 states have (on average 1.4029535864978904) internal successors, (665), 473 states have internal predecessors, (665), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:57:31,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 478 states to 478 states and 671 transitions. [2023-11-26 11:57:31,338 INFO L240 hiAutomatonCegarLoop]: Abstraction has 478 states and 671 transitions. [2023-11-26 11:57:31,339 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 11:57:31,341 INFO L428 stractBuchiCegarLoop]: Abstraction has 478 states and 671 transitions. [2023-11-26 11:57:31,341 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 11:57:31,341 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 478 states and 671 transitions. [2023-11-26 11:57:31,344 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 460 [2023-11-26 11:57:31,344 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:57:31,344 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:57:31,345 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:57:31,345 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:57:31,345 INFO L748 eck$LassoCheckResult]: Stem: 6937#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 6938#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem340#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~nondet341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~post345#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1, main_#t~post356#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite312#1.base, main_#t~ite312#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6737#L989-4 [2023-11-26 11:57:31,346 INFO L750 eck$LassoCheckResult]: Loop: 6737#L989-4 call main_#t~mem42#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6738#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 6731#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 6732#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6739#L991-2 call main_#t~mem44#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 6870#L996-263 havoc main_~_ha_hashv~0#1; 6962#L996-176 goto; 6963#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7043#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7204#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 7203#L996-73 assume !main_#t~switch68#1; 7202#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 7201#L996-76 assume !main_#t~switch68#1; 7200#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 7199#L996-79 assume !main_#t~switch68#1; 7198#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 7197#L996-82 assume !main_#t~switch68#1; 7196#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 7195#L996-85 assume !main_#t~switch68#1; 7194#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 7193#L996-88 assume !main_#t~switch68#1; 7187#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 6878#L996-91 assume !main_#t~switch68#1; 6879#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 6996#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 6997#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 7192#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 7191#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 7190#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 7189#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 7188#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 6874#L996-105 havoc main_#t~switch68#1; 6875#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6819#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 6820#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7172#L996-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 7150#L996-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 7036#L996-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet81#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 6844#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7109#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 6921#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7160#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7074#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7097#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6983#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7107#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6967#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6906#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6778#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6779#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6958#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7138#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6728#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 6810#L996-170 goto; 6811#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7083#L996-173 goto; 7027#L996-175 goto; 6950#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6951#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 6988#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 6989#L996-189 goto; 6830#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 6898#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 6899#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 7039#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 7105#L996-198 goto; 7051#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7052#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 6807#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 6774#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 6775#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 7127#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7144#L996-254 goto; 7157#L996-256 havoc main_~_ha_bkt~0#1; 7057#L996-257 goto; 7020#L996-259 goto; 6754#L996-261 havoc main_~_ha_hashv~0#1; 6755#L996-262 goto; 7090#L989-3 call main_#t~mem40#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#1(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 6737#L989-4 [2023-11-26 11:57:31,347 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:31,347 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 7 times [2023-11-26 11:57:31,348 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:31,348 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569325391] [2023-11-26 11:57:31,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:31,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:31,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:31,369 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:57:31,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:31,398 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:57:31,399 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:31,399 INFO L85 PathProgramCache]: Analyzing trace with hash -461098509, now seen corresponding path program 1 times [2023-11-26 11:57:31,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:31,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1312696332] [2023-11-26 11:57:31,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:31,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:31,458 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:57:31,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1277502420] [2023-11-26 11:57:31,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:31,459 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:57:31,459 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:57:31,464 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:57:31,488 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-26 11:57:36,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:57:36,478 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 42 conjunts are in the unsatisfiable core [2023-11-26 11:57:36,487 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:57:37,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:57:37,324 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:57:37,324 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:57:37,325 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1312696332] [2023-11-26 11:57:37,325 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:57:37,325 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1277502420] [2023-11-26 11:57:37,325 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1277502420] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:57:37,325 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:57:37,325 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2023-11-26 11:57:37,326 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1823263202] [2023-11-26 11:57:37,326 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:57:37,326 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:57:37,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:57:37,327 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2023-11-26 11:57:37,327 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2023-11-26 11:57:37,327 INFO L87 Difference]: Start difference. First operand 478 states and 671 transitions. cyclomatic complexity: 197 Second operand has 11 states, 11 states have (on average 7.181818181818182) internal successors, (79), 11 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:57:40,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:57:40,575 INFO L93 Difference]: Finished difference Result 495 states and 694 transitions. [2023-11-26 11:57:40,576 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 495 states and 694 transitions. [2023-11-26 11:57:40,580 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 477 [2023-11-26 11:57:40,585 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 495 states to 495 states and 694 transitions. [2023-11-26 11:57:40,585 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 495 [2023-11-26 11:57:40,586 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 495 [2023-11-26 11:57:40,586 INFO L73 IsDeterministic]: Start isDeterministic. Operand 495 states and 694 transitions. [2023-11-26 11:57:40,587 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:57:40,588 INFO L218 hiAutomatonCegarLoop]: Abstraction has 495 states and 694 transitions. [2023-11-26 11:57:40,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 495 states and 694 transitions. [2023-11-26 11:57:40,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 495 to 488. [2023-11-26 11:57:40,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 488 states, 484 states have (on average 1.4008264462809918) internal successors, (678), 483 states have internal predecessors, (678), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:57:40,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 488 states to 488 states and 684 transitions. [2023-11-26 11:57:40,601 INFO L240 hiAutomatonCegarLoop]: Abstraction has 488 states and 684 transitions. [2023-11-26 11:57:40,601 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2023-11-26 11:57:40,602 INFO L428 stractBuchiCegarLoop]: Abstraction has 488 states and 684 transitions. [2023-11-26 11:57:40,602 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 11:57:40,602 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 488 states and 684 transitions. [2023-11-26 11:57:40,605 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 470 [2023-11-26 11:57:40,605 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:57:40,605 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:57:40,606 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:57:40,606 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:57:40,607 INFO L748 eck$LassoCheckResult]: Stem: 8160#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 8161#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem340#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~nondet341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~post345#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1, main_#t~post356#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite312#1.base, main_#t~ite312#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7960#L989-4 [2023-11-26 11:57:40,607 INFO L750 eck$LassoCheckResult]: Loop: 7960#L989-4 call main_#t~mem42#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7961#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 7954#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 7955#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7962#L991-2 call main_#t~mem44#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 8093#L996-263 havoc main_~_ha_hashv~0#1; 8185#L996-176 goto; 8186#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 8268#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8297#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 8341#L996-73 assume !main_#t~switch68#1; 8255#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 7958#L996-76 assume !main_#t~switch68#1; 7959#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 8208#L996-79 assume !main_#t~switch68#1; 8146#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 8147#L996-82 assume !main_#t~switch68#1; 8309#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 7999#L996-85 assume !main_#t~switch68#1; 8000#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 8304#L996-88 assume !main_#t~switch68#1; 8305#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 8396#L996-91 assume !main_#t~switch68#1; 8383#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 8220#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 8221#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 8407#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 8403#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 8404#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 8432#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 8431#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 8097#L996-105 havoc main_#t~switch68#1; 8098#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8042#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 8043#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8066#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 8067#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8334#L996-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 8359#L996-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet82#1 := main_~_ha_hashv~0#1; 8410#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8408#L996-128 assume !(0 == main_~_hj_i~0#1 % 4294967296); 8406#L996-130 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~nondet83#1 := main_~_hj_i~0#1; 8343#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8400#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8207#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8332#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 8190#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8129#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8001#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8002#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8181#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8363#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7951#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 8033#L996-170 goto; 8034#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8307#L996-173 goto; 8251#L996-175 goto; 8173#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8174#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 8212#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 8213#L996-189 goto; 8053#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 8121#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 8122#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 8264#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 8330#L996-198 goto; 8276#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8277#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 8030#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 7997#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 7998#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 8353#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 8369#L996-254 goto; 8382#L996-256 havoc main_~_ha_bkt~0#1; 8282#L996-257 goto; 8244#L996-259 goto; 7977#L996-261 havoc main_~_ha_hashv~0#1; 7978#L996-262 goto; 8315#L989-3 call main_#t~mem40#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#1(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 7960#L989-4 [2023-11-26 11:57:40,608 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:40,608 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 8 times [2023-11-26 11:57:40,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:40,608 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [12001499] [2023-11-26 11:57:40,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:40,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:40,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:40,624 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:57:40,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:40,641 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:57:40,642 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:40,642 INFO L85 PathProgramCache]: Analyzing trace with hash -746569233, now seen corresponding path program 1 times [2023-11-26 11:57:40,642 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:40,642 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307897578] [2023-11-26 11:57:40,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:40,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:40,690 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:57:40,690 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1643182794] [2023-11-26 11:57:40,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:40,691 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:57:40,691 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:57:40,696 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:57:40,720 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-26 11:57:41,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:57:41,692 INFO L262 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 11:57:41,714 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:57:41,888 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:57:41,888 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:57:41,888 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:57:41,889 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307897578] [2023-11-26 11:57:41,889 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:57:41,889 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1643182794] [2023-11-26 11:57:41,889 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1643182794] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:57:41,889 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:57:41,889 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 11:57:41,890 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1492527186] [2023-11-26 11:57:41,890 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:57:41,890 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:57:41,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:57:41,891 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 11:57:41,891 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 11:57:41,891 INFO L87 Difference]: Start difference. First operand 488 states and 684 transitions. cyclomatic complexity: 200 Second operand has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:57:42,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:57:42,499 INFO L93 Difference]: Finished difference Result 484 states and 677 transitions. [2023-11-26 11:57:42,500 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 484 states and 677 transitions. [2023-11-26 11:57:42,504 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 466 [2023-11-26 11:57:42,509 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 484 states to 484 states and 677 transitions. [2023-11-26 11:57:42,509 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 484 [2023-11-26 11:57:42,510 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 484 [2023-11-26 11:57:42,510 INFO L73 IsDeterministic]: Start isDeterministic. Operand 484 states and 677 transitions. [2023-11-26 11:57:42,511 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:57:42,511 INFO L218 hiAutomatonCegarLoop]: Abstraction has 484 states and 677 transitions. [2023-11-26 11:57:42,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 484 states and 677 transitions. [2023-11-26 11:57:42,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 484 to 484. [2023-11-26 11:57:42,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 484 states, 480 states have (on average 1.3979166666666667) internal successors, (671), 479 states have internal predecessors, (671), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:57:42,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 484 states to 484 states and 677 transitions. [2023-11-26 11:57:42,524 INFO L240 hiAutomatonCegarLoop]: Abstraction has 484 states and 677 transitions. [2023-11-26 11:57:42,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:57:42,525 INFO L428 stractBuchiCegarLoop]: Abstraction has 484 states and 677 transitions. [2023-11-26 11:57:42,525 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-26 11:57:42,525 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 484 states and 677 transitions. [2023-11-26 11:57:42,528 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 466 [2023-11-26 11:57:42,529 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:57:42,529 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:57:42,530 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:57:42,530 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:57:42,530 INFO L748 eck$LassoCheckResult]: Stem: 9375#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 9376#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem340#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~nondet341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~post345#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1, main_#t~post356#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite312#1.base, main_#t~ite312#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9175#L989-4 [2023-11-26 11:57:42,530 INFO L750 eck$LassoCheckResult]: Loop: 9175#L989-4 call main_#t~mem42#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9176#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 9169#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 9170#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9177#L991-2 call main_#t~mem44#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 9308#L996-263 havoc main_~_ha_hashv~0#1; 9400#L996-176 goto; 9401#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9482#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9511#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 9554#L996-73 assume !main_#t~switch68#1; 9470#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 9173#L996-76 assume !main_#t~switch68#1; 9174#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 9423#L996-79 assume !main_#t~switch68#1; 9361#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 9362#L996-82 assume !main_#t~switch68#1; 9517#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 9214#L996-85 assume !main_#t~switch68#1; 9215#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 9518#L996-88 assume !main_#t~switch68#1; 9519#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 9316#L996-91 assume !main_#t~switch68#1; 9317#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 9435#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 9436#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 9648#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 9647#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 9646#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 9645#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 9644#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 9312#L996-105 havoc main_#t~switch68#1; 9313#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9257#L996-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 9259#L996-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 9587#L996-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet80#1 := 0; 9516#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9281#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 9282#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9547#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 9359#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9597#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 9556#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9595#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 9422#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9545#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9405#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9344#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 9216#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9217#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9396#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9578#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 9166#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 9248#L996-170 goto; 9249#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 9521#L996-173 goto; 9466#L996-175 goto; 9388#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9389#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 9427#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 9428#L996-189 goto; 9268#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 9336#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 9337#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 9478#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 9543#L996-198 goto; 9490#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9491#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 9245#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 9212#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 9213#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 9566#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9583#L996-254 goto; 9593#L996-256 havoc main_~_ha_bkt~0#1; 9496#L996-257 goto; 9459#L996-259 goto; 9192#L996-261 havoc main_~_ha_hashv~0#1; 9193#L996-262 goto; 9528#L989-3 call main_#t~mem40#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#1(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 9175#L989-4 [2023-11-26 11:57:42,531 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:42,531 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 9 times [2023-11-26 11:57:42,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:42,532 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1496677897] [2023-11-26 11:57:42,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:42,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:42,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:42,546 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:57:42,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:42,563 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:57:42,564 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:42,564 INFO L85 PathProgramCache]: Analyzing trace with hash -177113515, now seen corresponding path program 1 times [2023-11-26 11:57:42,564 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:42,565 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514689254] [2023-11-26 11:57:42,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:42,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:42,609 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:57:42,609 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [641687311] [2023-11-26 11:57:42,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:42,610 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:57:42,610 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:57:42,616 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:57:42,624 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-26 11:57:43,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:57:43,749 INFO L262 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 11:57:43,751 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:57:43,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:57:43,921 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:57:43,921 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:57:43,921 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [514689254] [2023-11-26 11:57:43,921 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:57:43,921 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [641687311] [2023-11-26 11:57:43,922 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [641687311] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:57:43,922 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:57:43,922 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 11:57:43,925 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705505982] [2023-11-26 11:57:43,925 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:57:43,925 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:57:43,925 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:57:43,926 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 11:57:43,926 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 11:57:43,926 INFO L87 Difference]: Start difference. First operand 484 states and 677 transitions. cyclomatic complexity: 197 Second operand has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:57:44,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:57:44,402 INFO L93 Difference]: Finished difference Result 489 states and 683 transitions. [2023-11-26 11:57:44,403 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 489 states and 683 transitions. [2023-11-26 11:57:44,410 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 471 [2023-11-26 11:57:44,416 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 489 states to 489 states and 683 transitions. [2023-11-26 11:57:44,416 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 489 [2023-11-26 11:57:44,417 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 489 [2023-11-26 11:57:44,417 INFO L73 IsDeterministic]: Start isDeterministic. Operand 489 states and 683 transitions. [2023-11-26 11:57:44,418 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:57:44,418 INFO L218 hiAutomatonCegarLoop]: Abstraction has 489 states and 683 transitions. [2023-11-26 11:57:44,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 489 states and 683 transitions. [2023-11-26 11:57:44,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 489 to 488. [2023-11-26 11:57:44,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 488 states, 484 states have (on average 1.396694214876033) internal successors, (676), 483 states have internal predecessors, (676), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:57:44,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 488 states to 488 states and 682 transitions. [2023-11-26 11:57:44,430 INFO L240 hiAutomatonCegarLoop]: Abstraction has 488 states and 682 transitions. [2023-11-26 11:57:44,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:57:44,431 INFO L428 stractBuchiCegarLoop]: Abstraction has 488 states and 682 transitions. [2023-11-26 11:57:44,432 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-26 11:57:44,432 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 488 states and 682 transitions. [2023-11-26 11:57:44,434 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 470 [2023-11-26 11:57:44,434 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:57:44,434 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:57:44,435 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:57:44,435 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:57:44,435 INFO L748 eck$LassoCheckResult]: Stem: 10590#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 10591#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1.base, main_#t~mem335#1.offset, main_#t~mem336#1, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem340#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1, main_#t~nondet341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1, main_#t~post345#1, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1, main_#t~post356#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite312#1.base, main_#t~ite312#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10391#L989-4 [2023-11-26 11:57:44,436 INFO L750 eck$LassoCheckResult]: Loop: 10391#L989-4 call main_#t~mem42#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10392#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 10385#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 10386#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 10393#L991-2 call main_#t~mem44#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 10523#L996-263 havoc main_~_ha_hashv~0#1; 10616#L996-176 goto; 10617#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 10699#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 10727#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 10771#L996-73 assume !main_#t~switch68#1; 10685#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 10389#L996-76 assume !main_#t~switch68#1; 10390#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 10638#L996-79 assume !main_#t~switch68#1; 10576#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 10577#L996-82 assume !main_#t~switch68#1; 10734#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 10430#L996-85 assume !main_#t~switch68#1; 10431#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 10735#L996-88 assume !main_#t~switch68#1; 10736#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 10531#L996-91 assume !main_#t~switch68#1; 10532#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 10650#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 10651#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 10866#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 10865#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 10864#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 10863#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 10862#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 10527#L996-105 havoc main_#t~switch68#1; 10528#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10473#L996-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 10475#L996-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 10804#L996-111 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet80#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 10732#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10733#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 10690#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10764#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 10574#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10815#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 10773#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10813#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 10637#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10762#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 10621#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10559#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 10432#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10433#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 10613#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10797#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 10384#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 10467#L996-170 goto; 10468#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 10738#L996-173 goto; 10681#L996-175 goto; 10603#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 10604#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 10642#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 10643#L996-189 goto; 10482#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 10551#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 10552#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 10693#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 10760#L996-198 goto; 10705#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 10706#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 10461#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 10426#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 10427#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 10783#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 10799#L996-254 goto; 10811#L996-256 havoc main_~_ha_bkt~0#1; 10712#L996-257 goto; 10670#L996-259 goto; 10408#L996-261 havoc main_~_ha_hashv~0#1; 10409#L996-262 goto; 10744#L989-3 call main_#t~mem40#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#1(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 10391#L989-4 [2023-11-26 11:57:44,436 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:44,436 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 10 times [2023-11-26 11:57:44,437 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:44,437 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [18868603] [2023-11-26 11:57:44,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:44,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:44,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:44,465 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:57:44,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:57:44,485 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:57:44,486 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:57:44,487 INFO L85 PathProgramCache]: Analyzing trace with hash 2068465939, now seen corresponding path program 1 times [2023-11-26 11:57:44,487 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:57:44,487 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317055925] [2023-11-26 11:57:44,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:44,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:57:44,531 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:57:44,532 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1488572990] [2023-11-26 11:57:44,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:57:44,532 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:57:44,532 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:57:44,536 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:57:44,544 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_808ff4e4-e501-4386-95db-c212bd1b8f63/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2023-11-26 11:57:49,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:57:49,173 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 18 conjunts are in the unsatisfiable core [2023-11-26 11:57:49,176 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:58:01,438 WARN L293 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 18 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-26 11:58:14,195 WARN L293 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 19 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)