./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test1-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test1-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash fdc85b042221b41aa26e62667e19ce1f6c246be9a2cb4f81fe8b15c8429db160 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 12:02:19,639 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 12:02:19,797 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 12:02:19,808 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 12:02:19,809 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 12:02:19,851 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 12:02:19,852 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 12:02:19,852 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 12:02:19,853 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 12:02:19,858 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 12:02:19,860 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 12:02:19,860 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 12:02:19,861 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 12:02:19,863 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 12:02:19,863 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 12:02:19,863 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 12:02:19,864 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 12:02:19,865 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 12:02:19,866 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 12:02:19,866 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 12:02:19,867 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 12:02:19,867 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 12:02:19,868 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 12:02:19,868 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 12:02:19,869 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 12:02:19,869 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 12:02:19,869 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 12:02:19,870 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 12:02:19,870 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 12:02:19,871 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 12:02:19,872 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 12:02:19,872 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 12:02:19,872 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 12:02:19,873 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 12:02:19,873 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 12:02:19,873 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 12:02:19,873 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 12:02:19,874 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 12:02:19,874 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fdc85b042221b41aa26e62667e19ce1f6c246be9a2cb4f81fe8b15c8429db160 [2023-11-26 12:02:20,222 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 12:02:20,254 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 12:02:20,256 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 12:02:20,258 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 12:02:20,259 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 12:02:20,260 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test1-1.i [2023-11-26 12:02:23,354 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 12:02:23,774 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 12:02:23,775 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test1-1.i [2023-11-26 12:02:23,809 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/data/8ccafba46/1492106205784ab4a2fd671d4d3c46ca/FLAG5bcd8b400 [2023-11-26 12:02:23,826 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/data/8ccafba46/1492106205784ab4a2fd671d4d3c46ca [2023-11-26 12:02:23,832 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 12:02:23,835 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 12:02:23,839 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 12:02:23,839 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 12:02:23,844 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 12:02:23,845 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:02:23" (1/1) ... [2023-11-26 12:02:23,846 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4853a5bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:23, skipping insertion in model container [2023-11-26 12:02:23,846 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:02:23" (1/1) ... [2023-11-26 12:02:23,931 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 12:02:24,545 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:02:24,565 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 12:02:24,684 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:02:24,726 INFO L206 MainTranslator]: Completed translation [2023-11-26 12:02:24,727 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24 WrapperNode [2023-11-26 12:02:24,727 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 12:02:24,728 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 12:02:24,728 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 12:02:24,729 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 12:02:24,736 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:24,761 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:24,839 INFO L138 Inliner]: procedures = 177, calls = 177, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 754 [2023-11-26 12:02:24,839 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 12:02:24,840 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 12:02:24,840 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 12:02:24,840 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 12:02:24,853 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:24,853 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:24,894 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:24,955 INFO L175 MemorySlicer]: Split 163 memory accesses to 3 slices as follows [2, 5, 156]. 96 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 43 writes are split as follows [0, 1, 42]. [2023-11-26 12:02:24,955 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:24,956 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:25,009 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:25,020 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:25,039 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:25,044 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:25,053 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 12:02:25,054 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 12:02:25,054 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 12:02:25,054 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 12:02:25,055 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (1/1) ... [2023-11-26 12:02:25,061 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:02:25,073 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:02:25,087 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:02:25,105 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd43d33a-4447-4b6d-bbe9-5b7532151d42/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 12:02:25,130 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 12:02:25,131 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 12:02:25,131 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 12:02:25,131 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 12:02:25,131 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 12:02:25,132 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 12:02:25,132 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 12:02:25,132 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 12:02:25,132 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 12:02:25,132 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 12:02:25,133 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 12:02:25,133 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 12:02:25,133 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 12:02:25,133 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 12:02:25,133 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 12:02:25,135 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 12:02:25,136 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 12:02:25,136 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 12:02:25,136 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 12:02:25,136 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 12:02:25,136 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 12:02:25,137 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 12:02:25,137 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 12:02:25,137 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 12:02:25,137 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 12:02:25,138 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 12:02:25,139 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 12:02:25,378 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 12:02:25,379 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 12:02:25,383 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:02:25,440 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:02:25,460 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:02:26,684 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 12:02:26,698 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 12:02:26,699 INFO L309 CfgBuilder]: Removed 31 assume(true) statements. [2023-11-26 12:02:26,700 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:02:26 BoogieIcfgContainer [2023-11-26 12:02:26,700 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 12:02:26,701 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 12:02:26,701 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 12:02:26,705 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 12:02:26,706 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:02:26,706 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 12:02:23" (1/3) ... [2023-11-26 12:02:26,707 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@51cea9bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:02:26, skipping insertion in model container [2023-11-26 12:02:26,707 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:02:26,707 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:02:24" (2/3) ... [2023-11-26 12:02:26,707 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@51cea9bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:02:26, skipping insertion in model container [2023-11-26 12:02:26,708 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:02:26,708 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:02:26" (3/3) ... [2023-11-26 12:02:26,709 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_SAX_nondet_test1-1.i [2023-11-26 12:02:26,768 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 12:02:26,768 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 12:02:26,768 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 12:02:26,768 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 12:02:26,768 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 12:02:26,768 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 12:02:26,769 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 12:02:26,769 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 12:02:26,774 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 190 states, 185 states have (on average 1.6702702702702703) internal successors, (309), 185 states have internal predecessors, (309), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:02:26,809 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 175 [2023-11-26 12:02:26,809 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:02:26,810 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:02:26,816 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:02:26,816 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2023-11-26 12:02:26,816 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 12:02:26,817 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 190 states, 185 states have (on average 1.6702702702702703) internal successors, (309), 185 states have internal predecessors, (309), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:02:26,828 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 175 [2023-11-26 12:02:26,828 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:02:26,828 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:02:26,828 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:02:26,829 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2023-11-26 12:02:26,836 INFO L748 eck$LassoCheckResult]: Stem: 37#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 55#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 155#L737-3true [2023-11-26 12:02:26,837 INFO L750 eck$LassoCheckResult]: Loop: 155#L737-3true assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 2#L739true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 157#L739-2true call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#2(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#2(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 188#L745-269true assume !true; 131#L737-2true main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 155#L737-3true [2023-11-26 12:02:26,842 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:26,843 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 1 times [2023-11-26 12:02:26,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:26,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139166248] [2023-11-26 12:02:26,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:26,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:26,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:26,949 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:02:26,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:26,988 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:02:26,991 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:26,991 INFO L85 PathProgramCache]: Analyzing trace with hash 64057162, now seen corresponding path program 1 times [2023-11-26 12:02:26,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:26,991 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096705722] [2023-11-26 12:02:26,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:26,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:27,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:02:27,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:02:27,064 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:02:27,064 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096705722] [2023-11-26 12:02:27,065 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1096705722] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:02:27,065 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:02:27,065 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 12:02:27,065 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [568450407] [2023-11-26 12:02:27,066 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:02:27,070 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:02:27,071 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:02:27,103 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 12:02:27,104 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 12:02:27,109 INFO L87 Difference]: Start difference. First operand has 190 states, 185 states have (on average 1.6702702702702703) internal successors, (309), 185 states have internal predecessors, (309), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:02:27,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:02:27,156 INFO L93 Difference]: Finished difference Result 189 states and 277 transitions. [2023-11-26 12:02:27,157 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 189 states and 277 transitions. [2023-11-26 12:02:27,162 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 175 [2023-11-26 12:02:27,174 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 189 states to 182 states and 270 transitions. [2023-11-26 12:02:27,175 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 182 [2023-11-26 12:02:27,176 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 182 [2023-11-26 12:02:27,177 INFO L73 IsDeterministic]: Start isDeterministic. Operand 182 states and 270 transitions. [2023-11-26 12:02:27,180 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:02:27,180 INFO L218 hiAutomatonCegarLoop]: Abstraction has 182 states and 270 transitions. [2023-11-26 12:02:27,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states and 270 transitions. [2023-11-26 12:02:27,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2023-11-26 12:02:27,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 182 states, 178 states have (on average 1.4831460674157304) internal successors, (264), 177 states have internal predecessors, (264), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:02:27,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 270 transitions. [2023-11-26 12:02:27,245 INFO L240 hiAutomatonCegarLoop]: Abstraction has 182 states and 270 transitions. [2023-11-26 12:02:27,246 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 12:02:27,249 INFO L428 stractBuchiCegarLoop]: Abstraction has 182 states and 270 transitions. [2023-11-26 12:02:27,250 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 12:02:27,250 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 182 states and 270 transitions. [2023-11-26 12:02:27,252 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 175 [2023-11-26 12:02:27,253 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:02:27,253 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:02:27,255 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:02:27,255 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:02:27,256 INFO L748 eck$LassoCheckResult]: Stem: 454#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 455#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 478#L737-3 [2023-11-26 12:02:27,258 INFO L750 eck$LassoCheckResult]: Loop: 478#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 387#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 388#L739-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#2(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#2(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 566#L745-269 havoc main_~_ha_hashv~0#1; 561#L745-176 goto; 558#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 431#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 433#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 567#L745-73 assume main_#t~switch29#1;call main_#t~mem30#1 := read~int#2(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem30#1 % 256 % 4294967296);havoc main_#t~mem30#1; 419#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 420#L745-76 assume main_#t~switch29#1;call main_#t~mem31#1 := read~int#2(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem31#1 % 256 % 4294967296);havoc main_#t~mem31#1; 475#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 449#L745-79 assume main_#t~switch29#1;call main_#t~mem32#1 := read~int#2(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 450#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 502#L745-82 assume main_#t~switch29#1;call main_#t~mem33#1 := read~int#2(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 476#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 456#L745-85 assume main_#t~switch29#1;call main_#t~mem34#1 := read~int#2(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 457#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 469#L745-88 assume main_#t~switch29#1;call main_#t~mem35#1 := read~int#2(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 525#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 526#L745-91 assume main_#t~switch29#1;call main_#t~mem36#1 := read~int#2(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem36#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem36#1 % 256 % 4294967296 else main_#t~mem36#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem36#1; 472#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 428#L745-94 assume !main_#t~switch29#1; 429#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 520#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 521#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 535#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 492#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 493#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 448#L745-105 havoc main_#t~switch29#1; 446#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 447#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 407#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 524#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 421#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 422#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 501#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 495#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 408#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 409#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 510#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 511#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 564#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 531#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 498#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 557#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 483#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 412#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 413#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 430#L745-170 goto; 485#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 486#L745-173 goto; 522#L745-175 goto; 467#L745-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 468#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 441#L745-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#2(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#2(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 442#L745-193 goto; 545#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#2(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#2(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 560#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#2(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 398#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 399#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 484#L745-202 goto; 527#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#2(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 393#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 394#L745-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 477#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#2(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 546#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 504#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 509#L745-260 goto; 479#L745-262 havoc main_~_ha_bkt~0#1; 480#L745-263 goto; 487#L745-265 goto; 488#L745-267 havoc main_~_ha_hashv~0#1; 534#L745-268 goto; 548#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 478#L737-3 [2023-11-26 12:02:27,259 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:27,259 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 2 times [2023-11-26 12:02:27,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:27,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122801580] [2023-11-26 12:02:27,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:27,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:27,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:27,271 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:02:27,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:27,285 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:02:27,286 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:27,286 INFO L85 PathProgramCache]: Analyzing trace with hash -1832271533, now seen corresponding path program 1 times [2023-11-26 12:02:27,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:27,289 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638624978] [2023-11-26 12:02:27,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:27,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:27,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:02:27,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:02:27,874 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:02:27,875 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1638624978] [2023-11-26 12:02:27,875 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1638624978] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:02:27,875 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:02:27,876 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 12:02:27,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1208304009] [2023-11-26 12:02:27,877 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:02:27,878 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:02:27,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:02:27,883 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 12:02:27,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 12:02:27,884 INFO L87 Difference]: Start difference. First operand 182 states and 270 transitions. cyclomatic complexity: 91 Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:02:28,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:02:28,033 INFO L93 Difference]: Finished difference Result 186 states and 267 transitions. [2023-11-26 12:02:28,034 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 186 states and 267 transitions. [2023-11-26 12:02:28,038 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 179 [2023-11-26 12:02:28,042 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 186 states to 186 states and 267 transitions. [2023-11-26 12:02:28,047 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 186 [2023-11-26 12:02:28,049 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 186 [2023-11-26 12:02:28,049 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 267 transitions. [2023-11-26 12:02:28,051 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:02:28,051 INFO L218 hiAutomatonCegarLoop]: Abstraction has 186 states and 267 transitions. [2023-11-26 12:02:28,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 267 transitions. [2023-11-26 12:02:28,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 182. [2023-11-26 12:02:28,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 182 states, 178 states have (on average 1.4438202247191012) internal successors, (257), 177 states have internal predecessors, (257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:02:28,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 263 transitions. [2023-11-26 12:02:28,107 INFO L240 hiAutomatonCegarLoop]: Abstraction has 182 states and 263 transitions. [2023-11-26 12:02:28,107 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 12:02:28,109 INFO L428 stractBuchiCegarLoop]: Abstraction has 182 states and 263 transitions. [2023-11-26 12:02:28,110 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 12:02:28,110 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 182 states and 263 transitions. [2023-11-26 12:02:28,112 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 175 [2023-11-26 12:02:28,112 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:02:28,112 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:02:28,117 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:02:28,117 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:02:28,117 INFO L748 eck$LassoCheckResult]: Stem: 829#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 830#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 854#L737-3 [2023-11-26 12:02:28,118 INFO L750 eck$LassoCheckResult]: Loop: 854#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 764#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 765#L739-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#2(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#2(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 943#L745-269 havoc main_~_ha_hashv~0#1; 937#L745-176 goto; 935#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 805#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 807#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 944#L745-73 assume !main_#t~switch29#1; 796#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 797#L745-76 assume !main_#t~switch29#1; 852#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 826#L745-79 assume !main_#t~switch29#1; 827#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 879#L745-82 assume !main_#t~switch29#1; 853#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 833#L745-85 assume !main_#t~switch29#1; 834#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 846#L745-88 assume !main_#t~switch29#1; 901#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 902#L745-91 assume !main_#t~switch29#1; 851#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 808#L745-94 assume !main_#t~switch29#1; 809#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 897#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 898#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 912#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 870#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 871#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 825#L745-105 havoc main_#t~switch29#1; 823#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 824#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 784#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 903#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 798#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 799#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 878#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 872#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 785#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 786#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 887#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 888#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 941#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 908#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 875#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 934#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 860#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 789#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 790#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 810#L745-170 goto; 862#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 863#L745-173 goto; 900#L745-175 goto; 844#L745-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 845#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 821#L745-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#2(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#2(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 822#L745-193 goto; 922#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#2(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#2(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 938#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#2(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 775#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 776#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 861#L745-202 goto; 904#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#2(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 770#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 771#L745-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 855#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#2(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 923#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 881#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 886#L745-260 goto; 856#L745-262 havoc main_~_ha_bkt~0#1; 857#L745-263 goto; 864#L745-265 goto; 865#L745-267 havoc main_~_ha_hashv~0#1; 911#L745-268 goto; 925#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 854#L737-3 [2023-11-26 12:02:28,119 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:28,119 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 3 times [2023-11-26 12:02:28,120 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:28,121 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2042305343] [2023-11-26 12:02:28,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:28,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:28,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:28,142 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:02:28,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:28,158 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:02:28,167 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:28,167 INFO L85 PathProgramCache]: Analyzing trace with hash 17975393, now seen corresponding path program 1 times [2023-11-26 12:02:28,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:28,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808319333] [2023-11-26 12:02:28,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:28,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:28,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:02:28,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:02:28,464 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:02:28,464 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808319333] [2023-11-26 12:02:28,465 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [808319333] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:02:28,465 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:02:28,465 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 12:02:28,466 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1871762929] [2023-11-26 12:02:28,466 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:02:28,467 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:02:28,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:02:28,467 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 12:02:28,468 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 12:02:28,468 INFO L87 Difference]: Start difference. First operand 182 states and 263 transitions. cyclomatic complexity: 84 Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:02:28,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:02:28,560 INFO L93 Difference]: Finished difference Result 143 states and 192 transitions. [2023-11-26 12:02:28,560 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 143 states and 192 transitions. [2023-11-26 12:02:28,562 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 136 [2023-11-26 12:02:28,564 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 143 states to 143 states and 192 transitions. [2023-11-26 12:02:28,564 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 143 [2023-11-26 12:02:28,564 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 143 [2023-11-26 12:02:28,565 INFO L73 IsDeterministic]: Start isDeterministic. Operand 143 states and 192 transitions. [2023-11-26 12:02:28,567 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:02:28,568 INFO L218 hiAutomatonCegarLoop]: Abstraction has 143 states and 192 transitions. [2023-11-26 12:02:28,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states and 192 transitions. [2023-11-26 12:02:28,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2023-11-26 12:02:28,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 139 states have (on average 1.3381294964028776) internal successors, (186), 138 states have internal predecessors, (186), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:02:28,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 192 transitions. [2023-11-26 12:02:28,580 INFO L240 hiAutomatonCegarLoop]: Abstraction has 143 states and 192 transitions. [2023-11-26 12:02:28,580 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 12:02:28,582 INFO L428 stractBuchiCegarLoop]: Abstraction has 143 states and 192 transitions. [2023-11-26 12:02:28,582 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 12:02:28,583 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 143 states and 192 transitions. [2023-11-26 12:02:28,584 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 136 [2023-11-26 12:02:28,584 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:02:28,584 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:02:28,586 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:02:28,586 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:02:28,586 INFO L748 eck$LassoCheckResult]: Stem: 1148#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1149#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 1165#L737-3 [2023-11-26 12:02:28,587 INFO L750 eck$LassoCheckResult]: Loop: 1165#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 1098#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1099#L739-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#2(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#2(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 1238#L745-269 havoc main_~_ha_hashv~0#1; 1233#L745-176 goto; 1230#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1133#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1134#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 1239#L745-73 assume !main_#t~switch29#1; 1126#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 1127#L745-76 assume !main_#t~switch29#1; 1162#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 1144#L745-79 assume !main_#t~switch29#1; 1145#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 1184#L745-82 assume !main_#t~switch29#1; 1163#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 1150#L745-85 assume !main_#t~switch29#1; 1151#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 1158#L745-88 assume !main_#t~switch29#1; 1204#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 1205#L745-91 assume !main_#t~switch29#1; 1161#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 1135#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1136#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 1201#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1202#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 1215#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1175#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 1176#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1143#L745-105 havoc main_#t~switch29#1; 1141#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1142#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1116#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1206#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1128#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1129#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1183#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1177#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1117#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1118#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1191#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1192#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1236#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1210#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1181#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1229#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1169#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1121#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1122#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 1132#L745-170 goto; 1170#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1171#L745-173 goto; 1203#L745-175 goto; 1156#L745-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1157#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1139#L745-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#2(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#2(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1140#L745-193 goto; 1222#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#2(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#2(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 1232#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#2(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 1107#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 1108#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 1168#L745-202 goto; 1207#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#2(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1102#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 1103#L745-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 1164#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#2(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 1223#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 1186#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1190#L745-260 goto; 1166#L745-262 havoc main_~_ha_bkt~0#1; 1167#L745-263 goto; 1172#L745-265 goto; 1173#L745-267 havoc main_~_ha_hashv~0#1; 1212#L745-268 goto; 1224#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1165#L737-3 [2023-11-26 12:02:28,587 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:28,588 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 4 times [2023-11-26 12:02:28,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:28,588 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876643204] [2023-11-26 12:02:28,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:28,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:28,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:28,597 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:02:28,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:28,611 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:02:28,612 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:28,612 INFO L85 PathProgramCache]: Analyzing trace with hash -425925281, now seen corresponding path program 1 times [2023-11-26 12:02:28,612 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:28,612 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139385369] [2023-11-26 12:02:28,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:28,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:28,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:02:29,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:02:29,509 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:02:29,509 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1139385369] [2023-11-26 12:02:29,510 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1139385369] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:02:29,510 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:02:29,510 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 12:02:29,510 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1811467564] [2023-11-26 12:02:29,511 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:02:29,511 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:02:29,511 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:02:29,512 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 12:02:29,512 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2023-11-26 12:02:29,512 INFO L87 Difference]: Start difference. First operand 143 states and 192 transitions. cyclomatic complexity: 52 Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:02:30,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:02:30,053 INFO L93 Difference]: Finished difference Result 148 states and 198 transitions. [2023-11-26 12:02:30,053 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 148 states and 198 transitions. [2023-11-26 12:02:30,054 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 141 [2023-11-26 12:02:30,056 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 148 states to 148 states and 198 transitions. [2023-11-26 12:02:30,057 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 148 [2023-11-26 12:02:30,057 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 148 [2023-11-26 12:02:30,057 INFO L73 IsDeterministic]: Start isDeterministic. Operand 148 states and 198 transitions. [2023-11-26 12:02:30,058 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:02:30,058 INFO L218 hiAutomatonCegarLoop]: Abstraction has 148 states and 198 transitions. [2023-11-26 12:02:30,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states and 198 transitions. [2023-11-26 12:02:30,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 147. [2023-11-26 12:02:30,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 143 states have (on average 1.3356643356643356) internal successors, (191), 142 states have internal predecessors, (191), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:02:30,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 197 transitions. [2023-11-26 12:02:30,065 INFO L240 hiAutomatonCegarLoop]: Abstraction has 147 states and 197 transitions. [2023-11-26 12:02:30,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 12:02:30,066 INFO L428 stractBuchiCegarLoop]: Abstraction has 147 states and 197 transitions. [2023-11-26 12:02:30,067 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 12:02:30,067 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 147 states and 197 transitions. [2023-11-26 12:02:30,068 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 140 [2023-11-26 12:02:30,068 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:02:30,068 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:02:30,069 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:02:30,069 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:02:30,070 INFO L748 eck$LassoCheckResult]: Stem: 1450#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1451#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 1467#L737-3 [2023-11-26 12:02:30,070 INFO L750 eck$LassoCheckResult]: Loop: 1467#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 1400#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1401#L739-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#2(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#2(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 1544#L745-269 havoc main_~_ha_hashv~0#1; 1539#L745-176 goto; 1536#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1435#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1436#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 1545#L745-73 assume !main_#t~switch29#1; 1428#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 1429#L745-76 assume !main_#t~switch29#1; 1464#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 1446#L745-79 assume !main_#t~switch29#1; 1447#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 1488#L745-82 assume !main_#t~switch29#1; 1465#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 1452#L745-85 assume !main_#t~switch29#1; 1453#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 1460#L745-88 assume !main_#t~switch29#1; 1509#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 1510#L745-91 assume !main_#t~switch29#1; 1463#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 1437#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1438#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 1505#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1506#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 1517#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1477#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 1478#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1445#L745-105 havoc main_#t~switch29#1; 1443#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1444#L745-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 1454#L745-109 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet41#1 := main_~_hj_i~0#1; 1418#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1508#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1430#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1431#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1486#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1480#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1419#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1420#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1495#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1496#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1542#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1514#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1483#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1535#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1471#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1423#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1424#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 1434#L745-170 goto; 1473#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1474#L745-173 goto; 1507#L745-175 goto; 1458#L745-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1459#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1441#L745-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#2(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#2(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1442#L745-193 goto; 1526#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#2(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#2(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 1538#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#2(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 1409#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 1410#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 1472#L745-202 goto; 1511#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#2(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1404#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 1405#L745-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 1466#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#2(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 1527#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 1490#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1494#L745-260 goto; 1468#L745-262 havoc main_~_ha_bkt~0#1; 1469#L745-263 goto; 1475#L745-265 goto; 1476#L745-267 havoc main_~_ha_hashv~0#1; 1516#L745-268 goto; 1528#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1467#L737-3 [2023-11-26 12:02:30,071 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:30,071 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 5 times [2023-11-26 12:02:30,071 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:30,071 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414891001] [2023-11-26 12:02:30,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:30,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:30,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:30,078 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:02:30,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:30,086 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:02:30,087 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:30,087 INFO L85 PathProgramCache]: Analyzing trace with hash -436207054, now seen corresponding path program 1 times [2023-11-26 12:02:30,087 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:30,087 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184739435] [2023-11-26 12:02:30,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:30,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:30,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:02:30,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:02:30,992 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:02:30,995 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1184739435] [2023-11-26 12:02:30,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1184739435] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:02:30,997 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:02:30,997 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 12:02:30,997 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [116829201] [2023-11-26 12:02:30,997 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:02:30,999 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:02:30,999 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:02:30,999 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 12:02:30,999 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 12:02:31,000 INFO L87 Difference]: Start difference. First operand 147 states and 197 transitions. cyclomatic complexity: 53 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:02:31,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:02:31,142 INFO L93 Difference]: Finished difference Result 147 states and 196 transitions. [2023-11-26 12:02:31,142 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 147 states and 196 transitions. [2023-11-26 12:02:31,144 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 140 [2023-11-26 12:02:31,146 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 147 states to 147 states and 196 transitions. [2023-11-26 12:02:31,146 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 147 [2023-11-26 12:02:31,146 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 147 [2023-11-26 12:02:31,163 INFO L73 IsDeterministic]: Start isDeterministic. Operand 147 states and 196 transitions. [2023-11-26 12:02:31,164 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:02:31,164 INFO L218 hiAutomatonCegarLoop]: Abstraction has 147 states and 196 transitions. [2023-11-26 12:02:31,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states and 196 transitions. [2023-11-26 12:02:31,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2023-11-26 12:02:31,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 143 states have (on average 1.3286713286713288) internal successors, (190), 142 states have internal predecessors, (190), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:02:31,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 196 transitions. [2023-11-26 12:02:31,169 INFO L240 hiAutomatonCegarLoop]: Abstraction has 147 states and 196 transitions. [2023-11-26 12:02:31,170 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 12:02:31,170 INFO L428 stractBuchiCegarLoop]: Abstraction has 147 states and 196 transitions. [2023-11-26 12:02:31,170 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 12:02:31,171 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 147 states and 196 transitions. [2023-11-26 12:02:31,172 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 140 [2023-11-26 12:02:31,172 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:02:31,172 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:02:31,173 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:02:31,173 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:02:31,173 INFO L748 eck$LassoCheckResult]: Stem: 1749#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1750#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 1767#L737-3 [2023-11-26 12:02:31,173 INFO L750 eck$LassoCheckResult]: Loop: 1767#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 1701#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1702#L739-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#2(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#2(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 1842#L745-269 havoc main_~_ha_hashv~0#1; 1836#L745-176 goto; 1834#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1735#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1736#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 1843#L745-73 assume !main_#t~switch29#1; 1729#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 1730#L745-76 assume !main_#t~switch29#1; 1765#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 1747#L745-79 assume !main_#t~switch29#1; 1748#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 1788#L745-82 assume !main_#t~switch29#1; 1766#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 1753#L745-85 assume !main_#t~switch29#1; 1754#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 1761#L745-88 assume !main_#t~switch29#1; 1808#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 1809#L745-91 assume !main_#t~switch29#1; 1764#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 1737#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1738#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 1805#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1806#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 1817#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1779#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 1780#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1746#L745-105 havoc main_#t~switch29#1; 1744#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1745#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1771#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1810#L745-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 1733#L745-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1; 1731#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1732#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1787#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1781#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1720#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1721#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1795#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1796#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1840#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1814#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1784#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1833#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1772#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1724#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1725#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 1739#L745-170 goto; 1774#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1775#L745-173 goto; 1807#L745-175 goto; 1759#L745-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1760#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1742#L745-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#2(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#2(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1743#L745-193 goto; 1826#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#2(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#2(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 1837#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#2(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 1710#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 1711#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 1773#L745-202 goto; 1811#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#2(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1705#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 1706#L745-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 1768#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#2(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 1827#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 1790#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1794#L745-260 goto; 1769#L745-262 havoc main_~_ha_bkt~0#1; 1770#L745-263 goto; 1776#L745-265 goto; 1777#L745-267 havoc main_~_ha_hashv~0#1; 1816#L745-268 goto; 1828#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1767#L737-3 [2023-11-26 12:02:31,174 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:31,174 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 6 times [2023-11-26 12:02:31,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:31,174 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89131999] [2023-11-26 12:02:31,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:31,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:31,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:31,181 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:02:31,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:31,188 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:02:31,189 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:31,189 INFO L85 PathProgramCache]: Analyzing trace with hash 709846247, now seen corresponding path program 1 times [2023-11-26 12:02:31,189 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:31,189 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [935969870] [2023-11-26 12:02:31,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:31,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:31,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:02:31,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:02:31,554 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:02:31,554 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [935969870] [2023-11-26 12:02:31,554 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [935969870] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:02:31,554 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:02:31,554 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 12:02:31,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293562694] [2023-11-26 12:02:31,555 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:02:31,555 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:02:31,555 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:02:31,556 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 12:02:31,556 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 12:02:31,556 INFO L87 Difference]: Start difference. First operand 147 states and 196 transitions. cyclomatic complexity: 52 Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:02:31,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:02:31,976 INFO L93 Difference]: Finished difference Result 152 states and 202 transitions. [2023-11-26 12:02:31,976 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 152 states and 202 transitions. [2023-11-26 12:02:31,978 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 145 [2023-11-26 12:02:31,979 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 152 states to 152 states and 202 transitions. [2023-11-26 12:02:31,980 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 152 [2023-11-26 12:02:31,980 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 152 [2023-11-26 12:02:31,980 INFO L73 IsDeterministic]: Start isDeterministic. Operand 152 states and 202 transitions. [2023-11-26 12:02:31,980 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:02:31,981 INFO L218 hiAutomatonCegarLoop]: Abstraction has 152 states and 202 transitions. [2023-11-26 12:02:31,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states and 202 transitions. [2023-11-26 12:02:31,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 151. [2023-11-26 12:02:31,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 151 states, 147 states have (on average 1.3265306122448979) internal successors, (195), 146 states have internal predecessors, (195), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:02:31,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 201 transitions. [2023-11-26 12:02:31,985 INFO L240 hiAutomatonCegarLoop]: Abstraction has 151 states and 201 transitions. [2023-11-26 12:02:31,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 12:02:31,987 INFO L428 stractBuchiCegarLoop]: Abstraction has 151 states and 201 transitions. [2023-11-26 12:02:31,987 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 12:02:31,987 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 151 states and 201 transitions. [2023-11-26 12:02:31,988 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 144 [2023-11-26 12:02:31,988 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:02:31,988 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:02:31,989 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:02:31,989 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:02:32,007 INFO L748 eck$LassoCheckResult]: Stem: 2061#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 2062#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 2079#L737-3 [2023-11-26 12:02:32,007 INFO L750 eck$LassoCheckResult]: Loop: 2079#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 2012#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2013#L739-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#2(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#2(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 2155#L745-269 havoc main_~_ha_hashv~0#1; 2149#L745-176 goto; 2147#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2047#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2048#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 2156#L745-73 assume !main_#t~switch29#1; 2040#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 2041#L745-76 assume !main_#t~switch29#1; 2077#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 2059#L745-79 assume !main_#t~switch29#1; 2060#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 2100#L745-82 assume !main_#t~switch29#1; 2078#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 2065#L745-85 assume !main_#t~switch29#1; 2066#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 2073#L745-88 assume !main_#t~switch29#1; 2120#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 2121#L745-91 assume !main_#t~switch29#1; 2076#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 2049#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 2050#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 2117#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 2118#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 2129#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2091#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 2092#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 2058#L745-105 havoc main_#t~switch29#1; 2056#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2057#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2083#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2122#L745-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 2044#L745-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1; 2045#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2135#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 2136#L745-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1; 2099#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2093#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2031#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2032#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2107#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2108#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2153#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2126#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2096#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2146#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2084#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2035#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2036#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 2051#L745-170 goto; 2086#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2087#L745-173 goto; 2119#L745-175 goto; 2071#L745-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2072#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 2054#L745-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#2(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#2(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 2055#L745-193 goto; 2139#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#2(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#2(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 2150#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#2(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 2021#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 2022#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 2085#L745-202 goto; 2123#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#2(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2016#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 2017#L745-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 2080#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#2(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 2140#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 2102#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2106#L745-260 goto; 2081#L745-262 havoc main_~_ha_bkt~0#1; 2082#L745-263 goto; 2088#L745-265 goto; 2089#L745-267 havoc main_~_ha_hashv~0#1; 2128#L745-268 goto; 2141#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2079#L737-3 [2023-11-26 12:02:32,008 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:32,008 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 7 times [2023-11-26 12:02:32,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:32,008 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [762093963] [2023-11-26 12:02:32,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:32,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:32,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:32,023 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:02:32,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:32,033 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:02:32,035 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:32,035 INFO L85 PathProgramCache]: Analyzing trace with hash 1202676308, now seen corresponding path program 1 times [2023-11-26 12:02:32,035 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:32,036 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [292075340] [2023-11-26 12:02:32,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:32,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:32,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:02:32,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:02:32,760 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:02:32,760 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [292075340] [2023-11-26 12:02:32,760 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [292075340] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:02:32,761 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:02:32,761 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2023-11-26 12:02:32,761 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2043231935] [2023-11-26 12:02:32,761 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:02:32,778 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:02:32,779 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:02:32,779 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-26 12:02:32,779 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2023-11-26 12:02:32,780 INFO L87 Difference]: Start difference. First operand 151 states and 201 transitions. cyclomatic complexity: 53 Second operand has 9 states, 9 states have (on average 8.555555555555555) internal successors, (77), 9 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:02:33,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:02:33,654 INFO L93 Difference]: Finished difference Result 161 states and 214 transitions. [2023-11-26 12:02:33,654 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 161 states and 214 transitions. [2023-11-26 12:02:33,655 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 154 [2023-11-26 12:02:33,657 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 161 states to 161 states and 214 transitions. [2023-11-26 12:02:33,658 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 161 [2023-11-26 12:02:33,658 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 161 [2023-11-26 12:02:33,658 INFO L73 IsDeterministic]: Start isDeterministic. Operand 161 states and 214 transitions. [2023-11-26 12:02:33,659 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:02:33,659 INFO L218 hiAutomatonCegarLoop]: Abstraction has 161 states and 214 transitions. [2023-11-26 12:02:33,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states and 214 transitions. [2023-11-26 12:02:33,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 158. [2023-11-26 12:02:33,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 158 states, 154 states have (on average 1.3246753246753247) internal successors, (204), 153 states have internal predecessors, (204), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:02:33,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 210 transitions. [2023-11-26 12:02:33,663 INFO L240 hiAutomatonCegarLoop]: Abstraction has 158 states and 210 transitions. [2023-11-26 12:02:33,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2023-11-26 12:02:33,665 INFO L428 stractBuchiCegarLoop]: Abstraction has 158 states and 210 transitions. [2023-11-26 12:02:33,665 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 12:02:33,665 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 158 states and 210 transitions. [2023-11-26 12:02:33,666 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 151 [2023-11-26 12:02:33,666 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:02:33,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:02:33,667 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:02:33,667 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:02:33,668 INFO L748 eck$LassoCheckResult]: Stem: 2394#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 2395#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 2410#L737-3 [2023-11-26 12:02:33,668 INFO L750 eck$LassoCheckResult]: Loop: 2410#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 2344#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2345#L739-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#2(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#2(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 2492#L745-269 havoc main_~_ha_hashv~0#1; 2484#L745-176 goto; 2481#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2378#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2379#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 2493#L745-73 assume !main_#t~switch29#1; 2372#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 2373#L745-76 assume !main_#t~switch29#1; 2408#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 2390#L745-79 assume !main_#t~switch29#1; 2391#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 2432#L745-82 assume !main_#t~switch29#1; 2409#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 2396#L745-85 assume !main_#t~switch29#1; 2397#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 2404#L745-88 assume !main_#t~switch29#1; 2452#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 2453#L745-91 assume !main_#t~switch29#1; 2407#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 2380#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 2381#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 2449#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 2450#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 2463#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2422#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 2423#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 2389#L745-105 havoc main_#t~switch29#1; 2387#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2388#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2414#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2454#L745-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 2376#L745-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 2377#L745-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 2498#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2497#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2430#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2482#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2363#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2364#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2439#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2440#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2490#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2458#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2427#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2480#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2415#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2367#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2368#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 2382#L745-170 goto; 2419#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2420#L745-173 goto; 2451#L745-175 goto; 2402#L745-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2403#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 2385#L745-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#2(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#2(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 2386#L745-193 goto; 2471#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#2(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#2(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 2485#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#2(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 2353#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 2354#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 2416#L745-202 goto; 2455#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#2(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2350#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 2351#L745-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 2411#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#2(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 2472#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 2434#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2438#L745-260 goto; 2412#L745-262 havoc main_~_ha_bkt~0#1; 2413#L745-263 goto; 2417#L745-265 goto; 2418#L745-267 havoc main_~_ha_hashv~0#1; 2460#L745-268 goto; 2473#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2410#L737-3 [2023-11-26 12:02:33,668 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:33,669 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 8 times [2023-11-26 12:02:33,669 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:33,669 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1080400757] [2023-11-26 12:02:33,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:33,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:33,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:33,676 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:02:33,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:02:33,684 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:02:33,684 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:02:33,684 INFO L85 PathProgramCache]: Analyzing trace with hash -1867429320, now seen corresponding path program 1 times [2023-11-26 12:02:33,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:02:33,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488810984] [2023-11-26 12:02:33,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:02:33,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:02:33,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat