./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test3-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test3-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a379a11019678fc2a367efcf212f49fd3083d5f94e928c550866b32de723f686 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:44:39,862 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:44:39,935 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:44:39,940 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:44:39,940 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:44:39,967 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:44:39,968 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:44:39,969 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:44:39,970 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:44:39,971 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:44:39,972 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:44:39,972 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:44:39,973 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:44:39,973 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:44:39,974 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:44:39,974 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:44:39,975 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:44:39,975 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:44:39,976 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:44:39,977 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:44:39,977 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:44:39,979 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:44:39,979 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:44:39,980 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:44:39,980 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:44:39,980 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:44:39,981 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:44:39,981 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:44:39,982 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:44:39,982 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:44:39,983 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:44:39,984 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:44:39,984 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:44:39,984 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:44:39,996 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:44:39,997 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:44:39,997 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:44:39,998 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:44:39,998 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a379a11019678fc2a367efcf212f49fd3083d5f94e928c550866b32de723f686 [2023-11-26 11:44:40,282 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:44:40,316 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:44:40,320 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:44:40,321 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:44:40,322 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:44:40,324 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test3-1.i [2023-11-26 11:44:43,474 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:44:43,815 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:44:43,816 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test3-1.i [2023-11-26 11:44:43,839 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/data/26e7375f4/c87091b265bd4b9ea4b22ad2301cb6f8/FLAGb5d0956eb [2023-11-26 11:44:43,857 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/data/26e7375f4/c87091b265bd4b9ea4b22ad2301cb6f8 [2023-11-26 11:44:43,859 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:44:43,861 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:44:43,863 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:44:43,863 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:44:43,869 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:44:43,870 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:44:43" (1/1) ... [2023-11-26 11:44:43,871 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6122441a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:43, skipping insertion in model container [2023-11-26 11:44:43,871 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:44:43" (1/1) ... [2023-11-26 11:44:43,968 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:44:44,732 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:44:44,746 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:44:44,871 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:44:44,933 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-26 11:44:44,941 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:44:44,942 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44 WrapperNode [2023-11-26 11:44:44,942 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:44:44,944 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:44:44,944 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:44:44,944 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:44:44,954 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,012 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,189 INFO L138 Inliner]: procedures = 177, calls = 287, calls flagged for inlining = 10, calls inlined = 14, statements flattened = 1392 [2023-11-26 11:44:45,189 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:44:45,190 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:44:45,196 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:44:45,196 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:44:45,210 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,210 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,229 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,333 INFO L175 MemorySlicer]: Split 260 memory accesses to 4 slices as follows [34, 2, 5, 219]. 84 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [0, 2, 0, 0]. The 55 writes are split as follows [4, 0, 1, 50]. [2023-11-26 11:44:45,333 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,334 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,384 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,400 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,406 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,425 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,455 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:44:45,456 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:44:45,456 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:44:45,456 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:44:45,457 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (1/1) ... [2023-11-26 11:44:45,474 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:45,489 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:45,512 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:45,542 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:44:45,568 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 11:44:45,568 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 11:44:45,568 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 11:44:45,569 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-26 11:44:45,569 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 11:44:45,569 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 11:44:45,569 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 11:44:45,569 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-26 11:44:45,570 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 11:44:45,570 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 11:44:45,570 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 11:44:45,570 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-26 11:44:45,571 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 11:44:45,571 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 11:44:45,573 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 11:44:45,573 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-26 11:44:45,573 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 11:44:45,573 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:44:45,574 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 11:44:45,574 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 11:44:45,574 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 11:44:45,574 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-26 11:44:45,575 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 11:44:45,575 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-26 11:44:45,576 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 11:44:45,576 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 11:44:45,576 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 11:44:45,576 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-26 11:44:45,577 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 11:44:45,577 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:44:45,577 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 11:44:45,577 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 11:44:45,577 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-26 11:44:45,577 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:44:45,577 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:44:45,846 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:44:45,849 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:44:45,854 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:44:45,928 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:44:45,962 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:44:45,990 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:44:47,482 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:44:47,514 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:44:47,515 INFO L309 CfgBuilder]: Removed 63 assume(true) statements. [2023-11-26 11:44:47,517 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:44:47 BoogieIcfgContainer [2023-11-26 11:44:47,517 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:44:47,518 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:44:47,518 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:44:47,522 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:44:47,523 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:44:47,524 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:44:43" (1/3) ... [2023-11-26 11:44:47,525 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4c2623c9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:44:47, skipping insertion in model container [2023-11-26 11:44:47,525 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:44:47,525 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:44" (2/3) ... [2023-11-26 11:44:47,527 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4c2623c9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:44:47, skipping insertion in model container [2023-11-26 11:44:47,528 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:44:47,528 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:44:47" (3/3) ... [2023-11-26 11:44:47,529 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_SAX_test3-1.i [2023-11-26 11:44:47,608 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:44:47,609 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:44:47,609 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:44:47,609 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:44:47,609 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:44:47,609 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:44:47,610 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:44:47,610 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:44:47,616 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 380 states, 375 states have (on average 1.6853333333333333) internal successors, (632), 375 states have internal predecessors, (632), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:47,664 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 368 [2023-11-26 11:44:47,664 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:47,665 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:47,672 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:47,672 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-26 11:44:47,672 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:44:47,674 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 380 states, 375 states have (on average 1.6853333333333333) internal successors, (632), 375 states have internal predecessors, (632), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:47,716 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 368 [2023-11-26 11:44:47,717 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:47,717 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:47,717 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:47,718 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-26 11:44:47,726 INFO L748 eck$LassoCheckResult]: Stem: 243#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 260#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#0(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 324#L735-4true [2023-11-26 11:44:47,726 INFO L750 eck$LassoCheckResult]: Loop: 324#L735-4true call main_#t~mem7#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 65#L735-1true assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 31#L737true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 126#L737-2true call main_#t~mem9#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 145#L742-269true assume !true; 59#L735-3true call main_#t~mem5#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#0(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 324#L735-4true [2023-11-26 11:44:47,735 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:47,736 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 1 times [2023-11-26 11:44:47,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:47,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568180511] [2023-11-26 11:44:47,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:47,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:47,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:47,870 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:47,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:47,941 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:47,950 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:47,950 INFO L85 PathProgramCache]: Analyzing trace with hash 2134899084, now seen corresponding path program 1 times [2023-11-26 11:44:47,950 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:47,951 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317783120] [2023-11-26 11:44:47,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:47,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:47,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:48,013 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:48,019 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317783120] [2023-11-26 11:44:48,020 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-26 11:44:48,020 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [615413212] [2023-11-26 11:44:48,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:48,021 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:48,021 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:48,025 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:48,038 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-26 11:44:48,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:48,208 INFO L262 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-26 11:44:48,210 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:48,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:48,231 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:48,232 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [615413212] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:48,233 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:48,233 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 11:44:48,234 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1162145756] [2023-11-26 11:44:48,235 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:48,239 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:48,240 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:48,281 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 11:44:48,282 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 11:44:48,284 INFO L87 Difference]: Start difference. First operand has 380 states, 375 states have (on average 1.6853333333333333) internal successors, (632), 375 states have internal predecessors, (632), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:48,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:48,341 INFO L93 Difference]: Finished difference Result 374 states and 553 transitions. [2023-11-26 11:44:48,343 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 374 states and 553 transitions. [2023-11-26 11:44:48,352 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 356 [2023-11-26 11:44:48,366 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 374 states to 364 states and 543 transitions. [2023-11-26 11:44:48,368 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 364 [2023-11-26 11:44:48,369 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 364 [2023-11-26 11:44:48,371 INFO L73 IsDeterministic]: Start isDeterministic. Operand 364 states and 543 transitions. [2023-11-26 11:44:48,376 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:48,376 INFO L218 hiAutomatonCegarLoop]: Abstraction has 364 states and 543 transitions. [2023-11-26 11:44:48,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 364 states and 543 transitions. [2023-11-26 11:44:48,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 364 to 364. [2023-11-26 11:44:48,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 364 states, 360 states have (on average 1.4916666666666667) internal successors, (537), 359 states have internal predecessors, (537), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:48,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 543 transitions. [2023-11-26 11:44:48,427 INFO L240 hiAutomatonCegarLoop]: Abstraction has 364 states and 543 transitions. [2023-11-26 11:44:48,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 11:44:48,432 INFO L428 stractBuchiCegarLoop]: Abstraction has 364 states and 543 transitions. [2023-11-26 11:44:48,432 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:44:48,432 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 364 states and 543 transitions. [2023-11-26 11:44:48,435 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 356 [2023-11-26 11:44:48,435 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:48,435 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:48,437 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:48,437 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:48,438 INFO L748 eck$LassoCheckResult]: Stem: 1112#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 1113#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#0(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 894#L735-4 [2023-11-26 11:44:48,440 INFO L750 eck$LassoCheckResult]: Loop: 894#L735-4 call main_#t~mem7#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 906#L735-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 841#L737 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 842#L737-2 call main_#t~mem9#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 1002#L742-269 havoc main_~_ha_hashv~0#1; 1027#L742-176 goto; 1140#L742-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1117#L742-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1124#L742-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 944#L742-73 assume main_#t~switch33#1;call main_#t~mem34#1 := read~int#3(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 807#L742-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 808#L742-76 assume !main_#t~switch33#1; 908#L742-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 779#L742-79 assume main_#t~switch33#1;call main_#t~mem36#1 := read~int#3(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 780#L742-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 974#L742-82 assume main_#t~switch33#1;call main_#t~mem37#1 := read~int#3(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 975#L742-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 1050#L742-85 assume main_#t~switch33#1;call main_#t~mem38#1 := read~int#3(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 781#L742-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 782#L742-88 assume main_#t~switch33#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1100#L742-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 913#L742-91 assume main_#t~switch33#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 914#L742-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 888#L742-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 889#L742-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 998#L742-97 assume !main_#t~switch33#1; 1033#L742-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 901#L742-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 902#L742-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 964#L742-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 1101#L742-105 havoc main_#t~switch33#1; 895#L742-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 896#L742-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1080#L742-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1006#L742-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1007#L742-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1040#L742-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 978#L742-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 945#L742-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 777#L742-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 778#L742-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 935#L742-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1021#L742-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 990#L742-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1120#L742-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1067#L742-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 879#L742-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 881#L742-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 992#L742-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1046#L742-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 825#L742-170 goto; 826#L742-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1108#L742-173 goto; 1123#L742-175 goto; 1129#L742-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 845#L742-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 846#L742-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#3(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#3(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 958#L742-193 goto; 838#L742-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#3(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#3(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 839#L742-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#3(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 1084#L742-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 824#L742-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 855#L742-202 goto; 829#L742-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#3(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#3(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 830#L742-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 871#L742-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 951#L742-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#3(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 952#L742-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 794#L742-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 805#L742-260 goto; 806#L742-262 havoc main_~_ha_bkt~0#1; 1061#L742-263 goto; 1062#L742-265 goto; 1126#L742-267 havoc main_~_ha_hashv~0#1; 1134#L742-268 goto; 893#L735-3 call main_#t~mem5#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#0(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 894#L735-4 [2023-11-26 11:44:48,440 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:48,441 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 2 times [2023-11-26 11:44:48,441 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:48,441 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1061414894] [2023-11-26 11:44:48,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:48,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:48,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:48,461 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:48,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:48,485 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:48,485 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:48,486 INFO L85 PathProgramCache]: Analyzing trace with hash 1198917207, now seen corresponding path program 1 times [2023-11-26 11:44:48,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:48,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264006489] [2023-11-26 11:44:48,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:48,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:48,567 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:48,567 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1927568164] [2023-11-26 11:44:48,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:48,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:48,568 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:48,601 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:48,626 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-26 11:44:48,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:48,966 INFO L262 TraceCheckSpWp]: Trace formula consists of 539 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:44:48,969 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:49,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:49,017 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:49,017 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:49,018 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [264006489] [2023-11-26 11:44:49,018 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:49,018 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1927568164] [2023-11-26 11:44:49,018 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1927568164] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:49,018 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:49,019 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:44:49,019 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1917112261] [2023-11-26 11:44:49,019 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:49,020 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:49,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:49,020 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 11:44:49,021 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 11:44:49,021 INFO L87 Difference]: Start difference. First operand 364 states and 543 transitions. cyclomatic complexity: 183 Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:49,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:49,148 INFO L93 Difference]: Finished difference Result 385 states and 564 transitions. [2023-11-26 11:44:49,149 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 385 states and 564 transitions. [2023-11-26 11:44:49,154 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 377 [2023-11-26 11:44:49,162 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 385 states to 385 states and 564 transitions. [2023-11-26 11:44:49,162 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 385 [2023-11-26 11:44:49,164 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 385 [2023-11-26 11:44:49,165 INFO L73 IsDeterministic]: Start isDeterministic. Operand 385 states and 564 transitions. [2023-11-26 11:44:49,172 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:49,172 INFO L218 hiAutomatonCegarLoop]: Abstraction has 385 states and 564 transitions. [2023-11-26 11:44:49,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 385 states and 564 transitions. [2023-11-26 11:44:49,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 385 to 384. [2023-11-26 11:44:49,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 384 states, 380 states have (on average 1.4657894736842105) internal successors, (557), 379 states have internal predecessors, (557), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:49,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 384 states to 384 states and 563 transitions. [2023-11-26 11:44:49,199 INFO L240 hiAutomatonCegarLoop]: Abstraction has 384 states and 563 transitions. [2023-11-26 11:44:49,199 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 11:44:49,200 INFO L428 stractBuchiCegarLoop]: Abstraction has 384 states and 563 transitions. [2023-11-26 11:44:49,201 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:44:49,201 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 384 states and 563 transitions. [2023-11-26 11:44:49,203 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 376 [2023-11-26 11:44:49,203 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:49,204 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:49,205 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:49,206 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:49,206 INFO L748 eck$LassoCheckResult]: Stem: 2097#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 2098#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#0(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1874#L735-4 [2023-11-26 11:44:49,207 INFO L750 eck$LassoCheckResult]: Loop: 1874#L735-4 call main_#t~mem7#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1886#L735-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 1820#L737 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1821#L737-2 call main_#t~mem9#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 1983#L742-269 havoc main_~_ha_hashv~0#1; 2011#L742-176 goto; 2127#L742-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2102#L742-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2108#L742-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 1918#L742-73 assume main_#t~switch33#1;call main_#t~mem34#1 := read~int#3(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 1782#L742-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 1783#L742-76 assume main_#t~switch33#1;call main_#t~mem35#1 := read~int#3(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 1888#L742-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 1759#L742-79 assume main_#t~switch33#1;call main_#t~mem36#1 := read~int#3(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 1760#L742-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 1957#L742-82 assume main_#t~switch33#1;call main_#t~mem37#1 := read~int#3(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1958#L742-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 2032#L742-85 assume main_#t~switch33#1;call main_#t~mem38#1 := read~int#3(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1761#L742-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 1762#L742-88 assume main_#t~switch33#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2085#L742-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 1895#L742-91 assume main_#t~switch33#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1896#L742-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 1868#L742-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 1869#L742-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 2122#L742-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 2123#L742-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 1884#L742-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 1885#L742-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 1947#L742-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 2087#L742-105 havoc main_#t~switch33#1; 1877#L742-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1878#L742-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2067#L742-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1991#L742-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1992#L742-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2025#L742-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1962#L742-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1931#L742-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1757#L742-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1758#L742-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1915#L742-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2005#L742-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1973#L742-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2105#L742-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2052#L742-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1859#L742-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1861#L742-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1978#L742-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2034#L742-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 1805#L742-170 goto; 1806#L742-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2094#L742-173 goto; 2109#L742-175 goto; 2115#L742-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1827#L742-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 1828#L742-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#3(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#3(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 1943#L742-193 goto; 1818#L742-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#3(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#3(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 1819#L742-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#3(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 2069#L742-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 1804#L742-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 1835#L742-202 goto; 1809#L742-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#3(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#3(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1810#L742-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 1851#L742-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 1934#L742-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#3(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 1935#L742-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 1774#L742-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1787#L742-260 goto; 1788#L742-262 havoc main_~_ha_bkt~0#1; 2046#L742-263 goto; 2047#L742-265 goto; 2111#L742-267 havoc main_~_ha_hashv~0#1; 2119#L742-268 goto; 1873#L735-3 call main_#t~mem5#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#0(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1874#L735-4 [2023-11-26 11:44:49,208 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:49,208 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 3 times [2023-11-26 11:44:49,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:49,208 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1002812402] [2023-11-26 11:44:49,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:49,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:49,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:49,229 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:49,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:49,250 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:49,251 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:49,251 INFO L85 PathProgramCache]: Analyzing trace with hash 618715859, now seen corresponding path program 1 times [2023-11-26 11:44:49,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:49,252 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1839810392] [2023-11-26 11:44:49,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:49,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:49,325 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:49,326 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1901233465] [2023-11-26 11:44:49,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:49,326 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:49,326 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:49,330 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:49,358 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-26 11:44:49,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:49,681 INFO L262 TraceCheckSpWp]: Trace formula consists of 551 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:44:49,686 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:49,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:49,737 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:49,737 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:49,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1839810392] [2023-11-26 11:44:49,738 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:49,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1901233465] [2023-11-26 11:44:49,739 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1901233465] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:49,739 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:49,739 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 11:44:49,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [411020221] [2023-11-26 11:44:49,740 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:49,740 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:49,741 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:49,741 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 11:44:49,741 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 11:44:49,742 INFO L87 Difference]: Start difference. First operand 384 states and 563 transitions. cyclomatic complexity: 183 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:49,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:49,866 INFO L93 Difference]: Finished difference Result 371 states and 543 transitions. [2023-11-26 11:44:49,867 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 371 states and 543 transitions. [2023-11-26 11:44:49,871 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 363 [2023-11-26 11:44:49,875 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 371 states to 371 states and 543 transitions. [2023-11-26 11:44:49,876 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 371 [2023-11-26 11:44:49,877 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 371 [2023-11-26 11:44:49,878 INFO L73 IsDeterministic]: Start isDeterministic. Operand 371 states and 543 transitions. [2023-11-26 11:44:49,878 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:49,879 INFO L218 hiAutomatonCegarLoop]: Abstraction has 371 states and 543 transitions. [2023-11-26 11:44:49,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states and 543 transitions. [2023-11-26 11:44:49,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 370. [2023-11-26 11:44:49,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 370 states, 366 states have (on average 1.46448087431694) internal successors, (536), 365 states have internal predecessors, (536), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:49,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 370 states to 370 states and 542 transitions. [2023-11-26 11:44:49,940 INFO L240 hiAutomatonCegarLoop]: Abstraction has 370 states and 542 transitions. [2023-11-26 11:44:49,940 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 11:44:49,943 INFO L428 stractBuchiCegarLoop]: Abstraction has 370 states and 542 transitions. [2023-11-26 11:44:49,943 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:44:49,943 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 370 states and 542 transitions. [2023-11-26 11:44:49,946 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 362 [2023-11-26 11:44:49,946 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:49,947 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:49,952 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:49,955 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:49,956 INFO L748 eck$LassoCheckResult]: Stem: 3085#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 3086#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#0(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2864#L735-4 [2023-11-26 11:44:49,957 INFO L750 eck$LassoCheckResult]: Loop: 2864#L735-4 call main_#t~mem7#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2876#L735-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 2809#L737 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2810#L737-2 call main_#t~mem9#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 2970#L742-269 havoc main_~_ha_hashv~0#1; 2998#L742-176 goto; 3115#L742-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3090#L742-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3097#L742-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 2911#L742-73 assume !main_#t~switch33#1; 2774#L742-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 2775#L742-76 assume !main_#t~switch33#1; 2878#L742-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 2748#L742-79 assume !main_#t~switch33#1; 2749#L742-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 2945#L742-82 assume !main_#t~switch33#1; 2946#L742-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 3022#L742-85 assume !main_#t~switch33#1; 2750#L742-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 2751#L742-88 assume !main_#t~switch33#1; 3072#L742-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 2885#L742-91 assume !main_#t~switch33#1; 2886#L742-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 2859#L742-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 2860#L742-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 3110#L742-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 3111#L742-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 2874#L742-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 2875#L742-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 3084#L742-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 3074#L742-105 havoc main_#t~switch33#1; 2867#L742-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2868#L742-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3054#L742-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2983#L742-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2984#L742-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3012#L742-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2949#L742-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2915#L742-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2746#L742-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2747#L742-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2902#L742-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2992#L742-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2960#L742-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3093#L742-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3038#L742-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2845#L742-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2847#L742-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2963#L742-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3018#L742-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 2794#L742-170 goto; 2795#L742-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3080#L742-173 goto; 3096#L742-175 goto; 3102#L742-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2814#L742-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 2815#L742-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#3(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#3(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 2926#L742-193 goto; 2805#L742-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#3(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#3(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 2806#L742-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#3(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 3056#L742-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 2793#L742-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 2821#L742-202 goto; 2798#L742-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#3(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#3(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2799#L742-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 2840#L742-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 2921#L742-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#3(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 2922#L742-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 2763#L742-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2772#L742-260 goto; 2773#L742-262 havoc main_~_ha_bkt~0#1; 3032#L742-263 goto; 3033#L742-265 goto; 3099#L742-267 havoc main_~_ha_hashv~0#1; 3107#L742-268 goto; 2863#L735-3 call main_#t~mem5#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#0(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 2864#L735-4 [2023-11-26 11:44:49,958 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:49,958 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 4 times [2023-11-26 11:44:49,958 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:49,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140792726] [2023-11-26 11:44:49,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:49,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:50,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:50,014 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:50,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:50,042 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:50,043 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:50,043 INFO L85 PathProgramCache]: Analyzing trace with hash -1826004511, now seen corresponding path program 1 times [2023-11-26 11:44:50,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:50,048 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1792857894] [2023-11-26 11:44:50,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:50,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:50,117 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:50,118 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [743438687] [2023-11-26 11:44:50,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:50,118 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:50,118 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,122 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,147 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-26 11:44:51,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:51,261 INFO L262 TraceCheckSpWp]: Trace formula consists of 509 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 11:44:51,265 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:51,477 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:51,478 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:51,478 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:51,478 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1792857894] [2023-11-26 11:44:51,478 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:51,478 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [743438687] [2023-11-26 11:44:51,479 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [743438687] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:51,479 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:51,479 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 11:44:51,479 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [487594529] [2023-11-26 11:44:51,479 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:51,480 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:51,480 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:51,480 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 11:44:51,481 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 11:44:51,481 INFO L87 Difference]: Start difference. First operand 370 states and 542 transitions. cyclomatic complexity: 176 Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:52,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:52,202 INFO L93 Difference]: Finished difference Result 410 states and 590 transitions. [2023-11-26 11:44:52,203 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 410 states and 590 transitions. [2023-11-26 11:44:52,207 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 402 [2023-11-26 11:44:52,211 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 410 states to 410 states and 590 transitions. [2023-11-26 11:44:52,212 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 410 [2023-11-26 11:44:52,212 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 410 [2023-11-26 11:44:52,212 INFO L73 IsDeterministic]: Start isDeterministic. Operand 410 states and 590 transitions. [2023-11-26 11:44:52,213 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:52,214 INFO L218 hiAutomatonCegarLoop]: Abstraction has 410 states and 590 transitions. [2023-11-26 11:44:52,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 410 states and 590 transitions. [2023-11-26 11:44:52,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 410 to 407. [2023-11-26 11:44:52,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 407 states, 403 states have (on average 1.4392059553349876) internal successors, (580), 402 states have internal predecessors, (580), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:52,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 407 states to 407 states and 586 transitions. [2023-11-26 11:44:52,226 INFO L240 hiAutomatonCegarLoop]: Abstraction has 407 states and 586 transitions. [2023-11-26 11:44:52,227 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:44:52,228 INFO L428 stractBuchiCegarLoop]: Abstraction has 407 states and 586 transitions. [2023-11-26 11:44:52,228 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 11:44:52,228 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 407 states and 586 transitions. [2023-11-26 11:44:52,231 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 399 [2023-11-26 11:44:52,231 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:52,231 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:52,232 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:52,232 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:52,232 INFO L748 eck$LassoCheckResult]: Stem: 4099#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 4100#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#0(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3878#L735-4 [2023-11-26 11:44:52,233 INFO L750 eck$LassoCheckResult]: Loop: 3878#L735-4 call main_#t~mem7#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3890#L735-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 3823#L737 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3824#L737-2 call main_#t~mem9#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 3984#L742-269 havoc main_~_ha_hashv~0#1; 4011#L742-176 goto; 4128#L742-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4129#L742-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4165#L742-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 4164#L742-73 assume !main_#t~switch33#1; 4163#L742-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 4162#L742-76 assume !main_#t~switch33#1; 4161#L742-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 4160#L742-79 assume !main_#t~switch33#1; 4159#L742-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 4158#L742-82 assume !main_#t~switch33#1; 4157#L742-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 4156#L742-85 assume !main_#t~switch33#1; 4155#L742-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 4154#L742-88 assume !main_#t~switch33#1; 4153#L742-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 4152#L742-91 assume !main_#t~switch33#1; 4151#L742-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 3871#L742-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 3872#L742-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 3983#L742-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 4124#L742-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 3888#L742-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 3889#L742-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 3949#L742-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 4087#L742-105 havoc main_#t~switch33#1; 3881#L742-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3882#L742-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4092#L742-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3992#L742-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 3993#L742-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1; 4025#L742-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4026#L742-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3964#L742-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3933#L742-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3760#L742-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3761#L742-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3919#L742-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4005#L742-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3975#L742-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4107#L742-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4053#L742-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3862#L742-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3864#L742-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3980#L742-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4035#L742-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 3808#L742-170 goto; 3809#L742-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4095#L742-173 goto; 4111#L742-175 goto; 4117#L742-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3830#L742-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 3831#L742-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#3(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#3(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 3945#L742-193 goto; 3821#L742-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#3(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#3(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 3822#L742-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#3(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 4069#L742-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 3807#L742-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 3838#L742-202 goto; 3812#L742-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#3(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#3(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3813#L742-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 3854#L742-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 3936#L742-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#3(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 3937#L742-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 3777#L742-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3790#L742-260 goto; 3791#L742-262 havoc main_~_ha_bkt~0#1; 4047#L742-263 goto; 4048#L742-265 goto; 4113#L742-267 havoc main_~_ha_hashv~0#1; 4121#L742-268 goto; 3877#L735-3 call main_#t~mem5#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#0(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3878#L735-4 [2023-11-26 11:44:52,234 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:52,234 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 5 times [2023-11-26 11:44:52,234 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:52,234 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805119418] [2023-11-26 11:44:52,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:52,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:52,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:52,249 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:52,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:52,290 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:52,293 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:52,294 INFO L85 PathProgramCache]: Analyzing trace with hash 257063087, now seen corresponding path program 1 times [2023-11-26 11:44:52,294 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:52,294 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785461100] [2023-11-26 11:44:52,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:52,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:52,353 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:52,354 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1061142728] [2023-11-26 11:44:52,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:52,355 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:52,355 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:52,359 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:52,382 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-26 11:44:52,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:52,744 INFO L262 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 11:44:52,748 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:52,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:52,951 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:52,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:52,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1785461100] [2023-11-26 11:44:52,952 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:52,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1061142728] [2023-11-26 11:44:52,952 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1061142728] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:52,953 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:52,953 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 11:44:52,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1725380780] [2023-11-26 11:44:52,953 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:52,954 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:52,954 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:52,954 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:44:52,955 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:44:52,955 INFO L87 Difference]: Start difference. First operand 407 states and 586 transitions. cyclomatic complexity: 183 Second operand has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:53,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:53,803 INFO L93 Difference]: Finished difference Result 418 states and 602 transitions. [2023-11-26 11:44:53,803 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 418 states and 602 transitions. [2023-11-26 11:44:53,807 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 410 [2023-11-26 11:44:53,811 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 418 states to 418 states and 602 transitions. [2023-11-26 11:44:53,812 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 418 [2023-11-26 11:44:53,812 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 418 [2023-11-26 11:44:53,813 INFO L73 IsDeterministic]: Start isDeterministic. Operand 418 states and 602 transitions. [2023-11-26 11:44:53,813 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:53,814 INFO L218 hiAutomatonCegarLoop]: Abstraction has 418 states and 602 transitions. [2023-11-26 11:44:53,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 418 states and 602 transitions. [2023-11-26 11:44:53,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 418 to 415. [2023-11-26 11:44:53,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 415 states, 411 states have (on average 1.440389294403893) internal successors, (592), 410 states have internal predecessors, (592), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:53,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 415 states to 415 states and 598 transitions. [2023-11-26 11:44:53,825 INFO L240 hiAutomatonCegarLoop]: Abstraction has 415 states and 598 transitions. [2023-11-26 11:44:53,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 11:44:53,833 INFO L428 stractBuchiCegarLoop]: Abstraction has 415 states and 598 transitions. [2023-11-26 11:44:53,833 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 11:44:53,833 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 415 states and 598 transitions. [2023-11-26 11:44:53,835 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 407 [2023-11-26 11:44:53,835 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:53,835 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:53,836 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:53,836 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:53,838 INFO L748 eck$LassoCheckResult]: Stem: 5162#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 5163#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#0(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4943#L735-4 [2023-11-26 11:44:53,840 INFO L750 eck$LassoCheckResult]: Loop: 4943#L735-4 call main_#t~mem7#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4955#L735-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 4888#L737 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4889#L737-2 call main_#t~mem9#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 5048#L742-269 havoc main_~_ha_hashv~0#1; 5076#L742-176 goto; 5193#L742-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5174#L742-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5175#L742-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 4987#L742-73 assume !main_#t~switch33#1; 4850#L742-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 4851#L742-76 assume !main_#t~switch33#1; 4957#L742-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 4827#L742-79 assume !main_#t~switch33#1; 4828#L742-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 5023#L742-82 assume !main_#t~switch33#1; 5024#L742-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 5230#L742-85 assume !main_#t~switch33#1; 5228#L742-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 5227#L742-88 assume !main_#t~switch33#1; 5225#L742-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 5224#L742-91 assume !main_#t~switch33#1; 5223#L742-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 5221#L742-94 assume !main_#t~switch33#1; 5220#L742-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 5218#L742-97 assume !main_#t~switch33#1; 5217#L742-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 5215#L742-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 5216#L742-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 5212#L742-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 5211#L742-105 havoc main_#t~switch33#1; 5210#L742-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5208#L742-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5205#L742-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5203#L742-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 5204#L742-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1; 5201#L742-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5172#L742-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 5026#L742-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1; 5028#L742-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4997#L742-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4825#L742-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4826#L742-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4984#L742-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5070#L742-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5039#L742-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5170#L742-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5116#L742-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4927#L742-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4929#L742-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5044#L742-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5098#L742-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 4873#L742-170 goto; 4874#L742-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5159#L742-173 goto; 5176#L742-175 goto; 5182#L742-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4895#L742-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 4896#L742-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#3(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#3(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 5009#L742-193 goto; 4886#L742-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#3(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#3(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 4887#L742-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#3(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 5134#L742-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 4872#L742-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 4903#L742-202 goto; 4877#L742-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#3(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#3(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4878#L742-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 4919#L742-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 5000#L742-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#3(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 5001#L742-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 4842#L742-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4855#L742-260 goto; 4856#L742-262 havoc main_~_ha_bkt~0#1; 5110#L742-263 goto; 5111#L742-265 goto; 5178#L742-267 havoc main_~_ha_hashv~0#1; 5186#L742-268 goto; 4942#L735-3 call main_#t~mem5#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#0(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 4943#L735-4 [2023-11-26 11:44:53,840 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:53,840 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 6 times [2023-11-26 11:44:53,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:53,846 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [749576520] [2023-11-26 11:44:53,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:53,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:53,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:53,875 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:53,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:53,897 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:53,898 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:53,898 INFO L85 PathProgramCache]: Analyzing trace with hash 1881986330, now seen corresponding path program 1 times [2023-11-26 11:44:53,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:53,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1679312305] [2023-11-26 11:44:53,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:53,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:53,999 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:54,000 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1537834450] [2023-11-26 11:44:54,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:54,000 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:54,000 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:54,006 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:54,015 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-26 11:44:54,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:54,343 INFO L262 TraceCheckSpWp]: Trace formula consists of 499 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 11:44:54,351 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:54,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:54,400 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:54,400 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:54,401 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1679312305] [2023-11-26 11:44:54,401 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:54,401 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1537834450] [2023-11-26 11:44:54,401 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1537834450] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:54,401 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:54,401 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:44:54,404 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1356216149] [2023-11-26 11:44:54,404 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:54,404 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:54,404 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:54,405 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:44:54,405 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:44:54,405 INFO L87 Difference]: Start difference. First operand 415 states and 598 transitions. cyclomatic complexity: 187 Second operand has 5 states, 5 states have (on average 15.6) internal successors, (78), 5 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:54,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:54,565 INFO L93 Difference]: Finished difference Result 488 states and 717 transitions. [2023-11-26 11:44:54,565 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 488 states and 717 transitions. [2023-11-26 11:44:54,572 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 480 [2023-11-26 11:44:54,578 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 488 states to 488 states and 717 transitions. [2023-11-26 11:44:54,578 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 488 [2023-11-26 11:44:54,579 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 488 [2023-11-26 11:44:54,579 INFO L73 IsDeterministic]: Start isDeterministic. Operand 488 states and 717 transitions. [2023-11-26 11:44:54,580 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:54,580 INFO L218 hiAutomatonCegarLoop]: Abstraction has 488 states and 717 transitions. [2023-11-26 11:44:54,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 488 states and 717 transitions. [2023-11-26 11:44:54,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 488 to 415. [2023-11-26 11:44:54,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 415 states, 411 states have (on average 1.4330900243309002) internal successors, (589), 410 states have internal predecessors, (589), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:54,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 415 states to 415 states and 595 transitions. [2023-11-26 11:44:54,593 INFO L240 hiAutomatonCegarLoop]: Abstraction has 415 states and 595 transitions. [2023-11-26 11:44:54,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:44:54,595 INFO L428 stractBuchiCegarLoop]: Abstraction has 415 states and 595 transitions. [2023-11-26 11:44:54,595 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 11:44:54,595 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 415 states and 595 transitions. [2023-11-26 11:44:54,597 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 407 [2023-11-26 11:44:54,598 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:54,598 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:54,600 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:54,601 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:54,601 INFO L748 eck$LassoCheckResult]: Stem: 6311#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 6312#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#0(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6085#L735-4 [2023-11-26 11:44:54,601 INFO L750 eck$LassoCheckResult]: Loop: 6085#L735-4 call main_#t~mem7#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6097#L735-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 6030#L737 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6031#L737-2 call main_#t~mem9#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 6192#L742-269 havoc main_~_ha_hashv~0#1; 6219#L742-176 goto; 6345#L742-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6346#L742-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6337#L742-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 6130#L742-73 assume !main_#t~switch33#1; 5992#L742-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 5993#L742-76 assume !main_#t~switch33#1; 6327#L742-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 5969#L742-79 assume !main_#t~switch33#1; 5970#L742-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 6167#L742-82 assume !main_#t~switch33#1; 6168#L742-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 6270#L742-85 assume !main_#t~switch33#1; 6373#L742-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 6339#L742-88 assume !main_#t~switch33#1; 6340#L742-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 6107#L742-91 assume !main_#t~switch33#1; 6108#L742-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 6133#L742-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 6370#L742-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 6368#L742-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 6366#L742-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 6364#L742-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 6362#L742-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 6360#L742-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 6359#L742-105 havoc main_#t~switch33#1; 6088#L742-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6089#L742-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 6304#L742-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6200#L742-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 6201#L742-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1; 6234#L742-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6235#L742-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 6170#L742-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1; 6172#L742-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6141#L742-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5967#L742-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5968#L742-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6127#L742-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6213#L742-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6183#L742-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6319#L742-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6262#L742-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6069#L742-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6071#L742-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6188#L742-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6244#L742-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 6015#L742-170 goto; 6016#L742-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6307#L742-173 goto; 6323#L742-175 goto; 6330#L742-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6037#L742-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 6038#L742-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#3(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#3(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 6153#L742-193 goto; 6028#L742-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#3(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#3(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 6029#L742-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#3(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 6279#L742-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 6014#L742-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 6045#L742-202 goto; 6019#L742-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#3(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#3(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6020#L742-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 6061#L742-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 6144#L742-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#3(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 6145#L742-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 5984#L742-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5997#L742-260 goto; 5998#L742-262 havoc main_~_ha_bkt~0#1; 6256#L742-263 goto; 6257#L742-265 goto; 6325#L742-267 havoc main_~_ha_hashv~0#1; 6334#L742-268 goto; 6084#L735-3 call main_#t~mem5#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#0(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 6085#L735-4 [2023-11-26 11:44:54,602 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:54,602 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 7 times [2023-11-26 11:44:54,602 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:54,602 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [726164674] [2023-11-26 11:44:54,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:54,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:54,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:54,627 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:54,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:54,649 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:54,649 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:54,650 INFO L85 PathProgramCache]: Analyzing trace with hash 51300246, now seen corresponding path program 1 times [2023-11-26 11:44:54,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:54,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [481409995] [2023-11-26 11:44:54,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:54,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:54,699 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:54,699 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1546576712] [2023-11-26 11:44:54,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:54,700 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:54,700 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:54,704 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:54,712 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-26 11:44:55,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:55,087 INFO L262 TraceCheckSpWp]: Trace formula consists of 511 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 11:44:55,090 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:55,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:55,206 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:55,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:55,206 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [481409995] [2023-11-26 11:44:55,206 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:55,206 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1546576712] [2023-11-26 11:44:55,208 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1546576712] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:55,208 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:55,208 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 11:44:55,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [699018494] [2023-11-26 11:44:55,208 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:55,209 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:55,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:55,209 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:44:55,210 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:44:55,214 INFO L87 Difference]: Start difference. First operand 415 states and 595 transitions. cyclomatic complexity: 184 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:56,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:56,140 INFO L93 Difference]: Finished difference Result 429 states and 615 transitions. [2023-11-26 11:44:56,140 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 429 states and 615 transitions. [2023-11-26 11:44:56,148 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 421 [2023-11-26 11:44:56,153 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 429 states to 429 states and 615 transitions. [2023-11-26 11:44:56,153 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 429 [2023-11-26 11:44:56,154 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 429 [2023-11-26 11:44:56,154 INFO L73 IsDeterministic]: Start isDeterministic. Operand 429 states and 615 transitions. [2023-11-26 11:44:56,155 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:56,155 INFO L218 hiAutomatonCegarLoop]: Abstraction has 429 states and 615 transitions. [2023-11-26 11:44:56,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states and 615 transitions. [2023-11-26 11:44:56,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 421. [2023-11-26 11:44:56,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 421 states, 417 states have (on average 1.434052757793765) internal successors, (598), 416 states have internal predecessors, (598), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:56,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 421 states to 421 states and 604 transitions. [2023-11-26 11:44:56,167 INFO L240 hiAutomatonCegarLoop]: Abstraction has 421 states and 604 transitions. [2023-11-26 11:44:56,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 11:44:56,169 INFO L428 stractBuchiCegarLoop]: Abstraction has 421 states and 604 transitions. [2023-11-26 11:44:56,170 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 11:44:56,170 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 421 states and 604 transitions. [2023-11-26 11:44:56,172 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 413 [2023-11-26 11:44:56,172 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:56,172 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:56,173 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:56,173 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:56,173 INFO L748 eck$LassoCheckResult]: Stem: 7399#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 7400#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem168#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem171#1, main_#t~mem173#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem175#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~switch188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~nondet211#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~short222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~ret224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~short231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem254#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1, main_#t~nondet255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~post259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~post270#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem272#1, main_#t~mem273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#0(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7176#L735-4 [2023-11-26 11:44:56,174 INFO L750 eck$LassoCheckResult]: Loop: 7176#L735-4 call main_#t~mem7#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7188#L735-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 7121#L737 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7122#L737-2 call main_#t~mem9#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 7281#L742-269 havoc main_~_ha_hashv~0#1; 7308#L742-176 goto; 7431#L742-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7412#L742-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7413#L742-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 7220#L742-73 assume !main_#t~switch33#1; 7083#L742-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 7084#L742-76 assume !main_#t~switch33#1; 7190#L742-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 7060#L742-79 assume !main_#t~switch33#1; 7061#L742-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 7256#L742-82 assume !main_#t~switch33#1; 7257#L742-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 7331#L742-85 assume !main_#t~switch33#1; 7062#L742-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 7063#L742-88 assume !main_#t~switch33#1; 7383#L742-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 7197#L742-91 assume !main_#t~switch33#1; 7198#L742-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 7169#L742-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 7170#L742-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 7458#L742-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 7455#L742-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 7453#L742-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 7450#L742-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 7448#L742-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 7385#L742-105 havoc main_#t~switch33#1; 7386#L742-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7391#L742-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 7392#L742-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7289#L742-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 7290#L742-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 7439#L742-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet46#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 7436#L742-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7434#L742-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 7261#L742-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7315#L742-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7058#L742-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7059#L742-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7217#L742-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7302#L742-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7272#L742-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7407#L742-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7351#L742-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7160#L742-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7162#L742-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7277#L742-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7333#L742-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 7106#L742-170 goto; 7107#L742-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7395#L742-173 goto; 7414#L742-175 goto; 7420#L742-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7128#L742-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 7129#L742-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#3(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#3(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 7242#L742-193 goto; 7119#L742-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#3(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#3(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 7120#L742-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#3(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 7367#L742-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 7105#L742-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 7136#L742-202 goto; 7110#L742-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#3(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#3(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7111#L742-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 7152#L742-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 7233#L742-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#3(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 7234#L742-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 7075#L742-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7088#L742-260 goto; 7089#L742-262 havoc main_~_ha_bkt~0#1; 7345#L742-263 goto; 7346#L742-265 goto; 7416#L742-267 havoc main_~_ha_hashv~0#1; 7424#L742-268 goto; 7175#L735-3 call main_#t~mem5#1 := read~int#0(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#0(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 7176#L735-4 [2023-11-26 11:44:56,174 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:56,175 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 8 times [2023-11-26 11:44:56,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:56,175 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1944679696] [2023-11-26 11:44:56,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:56,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:56,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:56,188 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:56,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:56,202 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:56,203 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:56,203 INFO L85 PathProgramCache]: Analyzing trace with hash 1276161914, now seen corresponding path program 1 times [2023-11-26 11:44:56,203 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:56,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012790198] [2023-11-26 11:44:56,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:56,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:56,254 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:56,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1936393531] [2023-11-26 11:44:56,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:56,254 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:56,255 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:56,258 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:56,270 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9e8e5511-198d-4eed-bf9a-24b9dcff8fe4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-26 11:45:03,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:03,213 INFO L262 TraceCheckSpWp]: Trace formula consists of 509 conjuncts, 52 conjunts are in the unsatisfiable core [2023-11-26 11:45:03,217 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:45:03,449 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-26 11:45:03,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 44 treesize of output 22 [2023-11-26 11:45:05,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:05,690 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:45:05,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:05,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2012790198] [2023-11-26 11:45:05,691 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:45:05,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1936393531] [2023-11-26 11:45:05,691 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1936393531] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:45:05,692 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:45:05,692 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2023-11-26 11:45:05,692 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [110919225] [2023-11-26 11:45:05,692 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:45:05,693 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:45:05,693 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:45:05,693 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2023-11-26 11:45:05,693 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2023-11-26 11:45:05,694 INFO L87 Difference]: Start difference. First operand 421 states and 604 transitions. cyclomatic complexity: 187 Second operand has 15 states, 15 states have (on average 5.2) internal successors, (78), 15 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:19,028 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 11:45:32,177 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 11:45:44,208 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []