./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test1-2.i --full-output --architecture 32bit


--------------------------------------------------------------------------------


Checking for termination
Using default analysis
Version 0e0057cc
Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test1-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 60f6803c5e3744d9299e1af81cd011414f5ac623b556345642fa85a1d93686e4
--- Real Ultimate output ---
This is Ultimate 0.2.4-dev-0e0057c
[2023-11-26 10:43:29,350 INFO  L188        SettingsManager]: Resetting all preferences to default values...
[2023-11-26 10:43:29,437 INFO  L114        SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf
[2023-11-26 10:43:29,443 WARN  L101        SettingsManager]: Preference file contains the following unknown settings:
[2023-11-26 10:43:29,444 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2023-11-26 10:43:29,472 INFO  L130        SettingsManager]: Preferences different from defaults after loading the file:
[2023-11-26 10:43:29,472 INFO  L151        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2023-11-26 10:43:29,473 INFO  L153        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2023-11-26 10:43:29,474 INFO  L151        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2023-11-26 10:43:29,475 INFO  L153        SettingsManager]:  * Use memory slicer=true
[2023-11-26 10:43:29,476 INFO  L151        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2023-11-26 10:43:29,476 INFO  L153        SettingsManager]:  * Create parallel compositions if possible=false
[2023-11-26 10:43:29,477 INFO  L153        SettingsManager]:  * Use SBE=true
[2023-11-26 10:43:29,477 INFO  L151        SettingsManager]: Preferences of BuchiAutomizer differ from their defaults:
[2023-11-26 10:43:29,478 INFO  L153        SettingsManager]:  * NCSB implementation=INTSET_LAZY3
[2023-11-26 10:43:29,479 INFO  L153        SettingsManager]:  * Use old map elimination=false
[2023-11-26 10:43:29,479 INFO  L153        SettingsManager]:  * Use external solver (rank synthesis)=false
[2023-11-26 10:43:29,480 INFO  L153        SettingsManager]:  * Use only trivial implications for array writes=true
[2023-11-26 10:43:29,480 INFO  L153        SettingsManager]:  * Rank analysis=LINEAR_WITH_GUESSES
[2023-11-26 10:43:29,481 INFO  L151        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2023-11-26 10:43:29,482 INFO  L153        SettingsManager]:  * Pointer base address is valid at dereference=ASSUME
[2023-11-26 10:43:29,483 INFO  L153        SettingsManager]:  * sizeof long=4
[2023-11-26 10:43:29,483 INFO  L153        SettingsManager]:  * Overapproximate operations on floating types=true
[2023-11-26 10:43:29,484 INFO  L153        SettingsManager]:  * sizeof POINTER=4
[2023-11-26 10:43:29,484 INFO  L153        SettingsManager]:  * Check division by zero=IGNORE
[2023-11-26 10:43:29,485 INFO  L153        SettingsManager]:  * Pointer to allocated memory at dereference=ASSUME
[2023-11-26 10:43:29,486 INFO  L153        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=ASSUME
[2023-11-26 10:43:29,486 INFO  L153        SettingsManager]:  * Check array bounds for arrays that are off heap=ASSUME
[2023-11-26 10:43:29,487 INFO  L153        SettingsManager]:  * Check unreachability of reach_error function=false
[2023-11-26 10:43:29,487 INFO  L153        SettingsManager]:  * sizeof long double=12
[2023-11-26 10:43:29,488 INFO  L153        SettingsManager]:  * Check if freed pointer was valid=false
[2023-11-26 10:43:29,488 INFO  L153        SettingsManager]:  * Assume nondeterminstic values are in range=false
[2023-11-26 10:43:29,489 INFO  L153        SettingsManager]:  * Use constant arrays=true
[2023-11-26 10:43:29,489 INFO  L151        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2023-11-26 10:43:29,490 INFO  L153        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2023-11-26 10:43:29,490 INFO  L151        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2023-11-26 10:43:29,491 INFO  L153        SettingsManager]:  * Trace refinement strategy=CAMEL
[2023-11-26 10:43:29,491 INFO  L151        SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2023-11-26 10:43:29,492 INFO  L153        SettingsManager]:  * TransformationType=MODULO_NEIGHBOR
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 60f6803c5e3744d9299e1af81cd011414f5ac623b556345642fa85a1d93686e4
[2023-11-26 10:43:29,819 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2023-11-26 10:43:29,854 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2023-11-26 10:43:29,858 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2023-11-26 10:43:29,859 INFO  L270        PluginConnector]: Initializing CDTParser...
[2023-11-26 10:43:29,860 INFO  L274        PluginConnector]: CDTParser initialized
[2023-11-26 10:43:29,862 INFO  L431   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test1-2.i
[2023-11-26 10:43:33,129 INFO  L533              CDTParser]: Created temporary CDT project at NULL
[2023-11-26 10:43:33,520 INFO  L384              CDTParser]: Found 1 translation units.
[2023-11-26 10:43:33,522 INFO  L180              CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test1-2.i
[2023-11-26 10:43:33,549 INFO  L427              CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/data/7a119e53b/497dacf712fb46eb9a8829eba1bee459/FLAGc225d5824
[2023-11-26 10:43:33,569 INFO  L435              CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/data/7a119e53b/497dacf712fb46eb9a8829eba1bee459
[2023-11-26 10:43:33,576 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2023-11-26 10:43:33,578 INFO  L133        ToolchainWalker]: Walking toolchain with 6 elements.
[2023-11-26 10:43:33,581 INFO  L112        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2023-11-26 10:43:33,581 INFO  L270        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2023-11-26 10:43:33,587 INFO  L274        PluginConnector]: CACSL2BoogieTranslator initialized
[2023-11-26 10:43:33,592 INFO  L184        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:43:33" (1/1) ...
[2023-11-26 10:43:33,593 INFO  L204        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@ab1e9e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:33, skipping insertion in model container
[2023-11-26 10:43:33,594 INFO  L184        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:43:33" (1/1) ...
[2023-11-26 10:43:33,678 INFO  L177         MainTranslator]: Built tables and reachable declarations
[2023-11-26 10:43:34,248 INFO  L209          PostProcessor]: Analyzing one entry point: main
[2023-11-26 10:43:34,262 INFO  L202         MainTranslator]: Completed pre-run
[2023-11-26 10:43:34,407 INFO  L209          PostProcessor]: Analyzing one entry point: main
[2023-11-26 10:43:34,461 INFO  L206         MainTranslator]: Completed translation
[2023-11-26 10:43:34,461 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34 WrapperNode
[2023-11-26 10:43:34,461 INFO  L131        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2023-11-26 10:43:34,463 INFO  L112        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2023-11-26 10:43:34,463 INFO  L270        PluginConnector]: Initializing Boogie Procedure Inliner...
[2023-11-26 10:43:34,463 INFO  L274        PluginConnector]: Boogie Procedure Inliner initialized
[2023-11-26 10:43:34,472 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,519 INFO  L184        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,605 INFO  L138                Inliner]: procedures = 177, calls = 238, calls flagged for inlining = 14, calls inlined = 23, statements flattened = 1016
[2023-11-26 10:43:34,606 INFO  L131        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2023-11-26 10:43:34,606 INFO  L112        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2023-11-26 10:43:34,607 INFO  L270        PluginConnector]: Initializing Boogie Preprocessor...
[2023-11-26 10:43:34,607 INFO  L274        PluginConnector]: Boogie Preprocessor initialized
[2023-11-26 10:43:34,619 INFO  L184        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,620 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,631 INFO  L184        PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,722 INFO  L175           MemorySlicer]: Split 211 memory accesses to 3 slices as follows [5, 2, 204]. 97 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [0, 2, 0]. The 51 writes are split as follows [1, 0, 50].
[2023-11-26 10:43:34,722 INFO  L184        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,723 INFO  L184        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,822 INFO  L184        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,843 INFO  L184        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,863 INFO  L184        PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,879 INFO  L184        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,892 INFO  L131        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2023-11-26 10:43:34,893 INFO  L112        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2023-11-26 10:43:34,893 INFO  L270        PluginConnector]: Initializing RCFGBuilder...
[2023-11-26 10:43:34,894 INFO  L274        PluginConnector]: RCFGBuilder initialized
[2023-11-26 10:43:34,895 INFO  L184        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (1/1) ...
[2023-11-26 10:43:34,902 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2023-11-26 10:43:34,917 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:43:34,935 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2023-11-26 10:43:34,975 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process
[2023-11-26 10:43:34,984 INFO  L130     BoogieDeclarations]: Found specification of procedure read~int#0
[2023-11-26 10:43:34,985 INFO  L130     BoogieDeclarations]: Found specification of procedure read~int#1
[2023-11-26 10:43:34,985 INFO  L130     BoogieDeclarations]: Found specification of procedure read~int#2
[2023-11-26 10:43:34,985 INFO  L130     BoogieDeclarations]: Found specification of procedure write~int#0
[2023-11-26 10:43:34,985 INFO  L130     BoogieDeclarations]: Found specification of procedure write~int#1
[2023-11-26 10:43:34,985 INFO  L130     BoogieDeclarations]: Found specification of procedure write~int#2
[2023-11-26 10:43:34,985 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0
[2023-11-26 10:43:34,985 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1
[2023-11-26 10:43:34,986 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2
[2023-11-26 10:43:34,986 INFO  L138     BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0
[2023-11-26 10:43:34,986 INFO  L138     BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1
[2023-11-26 10:43:34,986 INFO  L138     BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2
[2023-11-26 10:43:34,986 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap
[2023-11-26 10:43:34,986 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2023-11-26 10:43:34,986 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack
[2023-11-26 10:43:34,988 INFO  L130     BoogieDeclarations]: Found specification of procedure write~$Pointer$#0
[2023-11-26 10:43:34,988 INFO  L130     BoogieDeclarations]: Found specification of procedure write~$Pointer$#1
[2023-11-26 10:43:34,988 INFO  L130     BoogieDeclarations]: Found specification of procedure write~$Pointer$#2
[2023-11-26 10:43:34,988 INFO  L130     BoogieDeclarations]: Found specification of procedure read~$Pointer$#0
[2023-11-26 10:43:34,989 INFO  L130     BoogieDeclarations]: Found specification of procedure read~$Pointer$#1
[2023-11-26 10:43:34,989 INFO  L130     BoogieDeclarations]: Found specification of procedure read~$Pointer$#2
[2023-11-26 10:43:34,989 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2023-11-26 10:43:34,989 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int#0
[2023-11-26 10:43:34,989 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int#1
[2023-11-26 10:43:34,989 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int#2
[2023-11-26 10:43:34,990 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2023-11-26 10:43:34,990 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2023-11-26 10:43:35,226 INFO  L241             CfgBuilder]: Building ICFG
[2023-11-26 10:43:35,232 INFO  L267             CfgBuilder]: Building CFG for each procedure with an implementation
[2023-11-26 10:43:35,237 WARN  L821   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2023-11-26 10:43:35,300 WARN  L821   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2023-11-26 10:43:35,318 WARN  L821   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2023-11-26 10:43:36,695 INFO  L282             CfgBuilder]: Performing block encoding
[2023-11-26 10:43:36,716 INFO  L304             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2023-11-26 10:43:36,716 INFO  L309             CfgBuilder]: Removed 40 assume(true) statements.
[2023-11-26 10:43:36,718 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:43:36 BoogieIcfgContainer
[2023-11-26 10:43:36,718 INFO  L131        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2023-11-26 10:43:36,719 INFO  L112        PluginConnector]: ------------------------BuchiAutomizer----------------------------
[2023-11-26 10:43:36,719 INFO  L270        PluginConnector]: Initializing BuchiAutomizer...
[2023-11-26 10:43:36,728 INFO  L274        PluginConnector]: BuchiAutomizer initialized
[2023-11-26 10:43:36,729 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2023-11-26 10:43:36,729 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 10:43:33" (1/3) ...
[2023-11-26 10:43:36,730 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@51f4945a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:43:36, skipping insertion in model container
[2023-11-26 10:43:36,730 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2023-11-26 10:43:36,731 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:43:34" (2/3) ...
[2023-11-26 10:43:36,733 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@51f4945a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:43:36, skipping insertion in model container
[2023-11-26 10:43:36,733 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2023-11-26 10:43:36,734 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:43:36" (3/3) ...
[2023-11-26 10:43:36,737 INFO  L332   chiAutomizerObserver]: Analyzing ICFG uthash_JEN_test1-2.i
[2023-11-26 10:43:36,803 INFO  L303   stractBuchiCegarLoop]: Interprodecural is true
[2023-11-26 10:43:36,803 INFO  L304   stractBuchiCegarLoop]: Hoare is false
[2023-11-26 10:43:36,803 INFO  L305   stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates
[2023-11-26 10:43:36,804 INFO  L306   stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE
[2023-11-26 10:43:36,804 INFO  L307   stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2023-11-26 10:43:36,804 INFO  L308   stractBuchiCegarLoop]: Difference is false
[2023-11-26 10:43:36,804 INFO  L309   stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA
[2023-11-26 10:43:36,804 INFO  L313   stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ========
[2023-11-26 10:43:36,810 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 272 states, 267 states have (on average 1.651685393258427) internal successors, (441), 267 states have internal predecessors, (441), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:43:36,853 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 258
[2023-11-26 10:43:36,853 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:43:36,853 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:43:36,860 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:43:36,860 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1]
[2023-11-26 10:43:36,860 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 1 ============
[2023-11-26 10:43:36,862 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 272 states, 267 states have (on average 1.651685393258427) internal successors, (441), 267 states have internal predecessors, (441), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:43:36,875 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 258
[2023-11-26 10:43:36,876 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:43:36,876 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:43:36,876 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:43:36,876 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1]
[2023-11-26 10:43:36,885 INFO  L748   eck$LassoCheckResult]: Stem: 177#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 186#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~nondet79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~memset~res99#1.base, main_#t~memset~res99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~nondet105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem121#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~nondet122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 107#L750-3true 
[2023-11-26 10:43:36,885 INFO  L750   eck$LassoCheckResult]: Loop: 107#L750-3true assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 70#L752true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 71#L752-2true call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#2(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 149#L757-269true assume !true; 196#L750-2true main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 107#L750-3true 
[2023-11-26 10:43:36,891 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:36,891 INFO  L85        PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 1 times
[2023-11-26 10:43:36,901 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:36,902 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1927346108]
[2023-11-26 10:43:36,902 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:36,903 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:37,004 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:37,004 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2023-11-26 10:43:37,017 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:37,046 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2023-11-26 10:43:37,050 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:37,050 INFO  L85        PathProgramCache]: Analyzing trace with hash 64057162, now seen corresponding path program 1 times
[2023-11-26 10:43:37,050 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:37,050 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369952855]
[2023-11-26 10:43:37,051 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:37,051 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:37,068 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:43:37,090 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2023-11-26 10:43:37,090 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369952855]
[2023-11-26 10:43:37,091 WARN  L311   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic
[2023-11-26 10:43:37,091 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [131380807]
[2023-11-26 10:43:37,091 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:37,091 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2023-11-26 10:43:37,092 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:43:37,099 INFO  L229       MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2023-11-26 10:43:37,114 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2023-11-26 10:43:37,238 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:43:37,241 INFO  L262         TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 1 conjunts are in the unsatisfiable core
[2023-11-26 10:43:37,242 INFO  L285         TraceCheckSpWp]: Computing forward predicates...
[2023-11-26 10:43:37,268 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2023-11-26 10:43:37,268 INFO  L323         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2023-11-26 10:43:37,268 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [131380807] provided 1 perfect and 0 imperfect interpolant sequences
[2023-11-26 10:43:37,269 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2023-11-26 10:43:37,270 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2023-11-26 10:43:37,275 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1921113447]
[2023-11-26 10:43:37,275 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2023-11-26 10:43:37,286 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2023-11-26 10:43:37,287 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2023-11-26 10:43:37,332 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants.
[2023-11-26 10:43:37,333 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2023-11-26 10:43:37,336 INFO  L87              Difference]: Start difference. First operand  has 272 states, 267 states have (on average 1.651685393258427) internal successors, (441), 267 states have internal predecessors, (441), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand  has 2 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2023-11-26 10:43:37,381 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2023-11-26 10:43:37,381 INFO  L93              Difference]: Finished difference Result 262 states and 373 transitions.
[2023-11-26 10:43:37,383 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 262 states and 373 transitions.
[2023-11-26 10:43:37,400 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 238
[2023-11-26 10:43:37,415 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 262 states to 248 states and 359 transitions.
[2023-11-26 10:43:37,416 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 248
[2023-11-26 10:43:37,419 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 248
[2023-11-26 10:43:37,420 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 248 states and 359 transitions.
[2023-11-26 10:43:37,428 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2023-11-26 10:43:37,428 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 248 states and 359 transitions.
[2023-11-26 10:43:37,447 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 248 states and 359 transitions.
[2023-11-26 10:43:37,468 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248.
[2023-11-26 10:43:37,469 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 248 states, 244 states have (on average 1.4467213114754098) internal successors, (353), 243 states have internal predecessors, (353), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:43:37,471 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 359 transitions.
[2023-11-26 10:43:37,472 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 248 states and 359 transitions.
[2023-11-26 10:43:37,473 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. 
[2023-11-26 10:43:37,476 INFO  L428   stractBuchiCegarLoop]: Abstraction has 248 states and 359 transitions.
[2023-11-26 10:43:37,477 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 2 ============
[2023-11-26 10:43:37,477 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 248 states and 359 transitions.
[2023-11-26 10:43:37,479 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 238
[2023-11-26 10:43:37,479 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:43:37,479 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:43:37,481 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:43:37,481 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2023-11-26 10:43:37,481 INFO  L748   eck$LassoCheckResult]: Stem: 774#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 775#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~nondet79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~memset~res99#1.base, main_#t~memset~res99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~nondet105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem121#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~nondet122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 715#L750-3 
[2023-11-26 10:43:37,484 INFO  L750   eck$LassoCheckResult]: Loop: 715#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 671#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 672#L752-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#2(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 673#L757-269 havoc main_~_ha_hashv~0#1; 752#L757-176 goto; 727#L757-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 654#L757-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 656#L757-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 776#L757-73 assume main_#t~switch28#1;call main_#t~mem29#1 := read~int#2(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem29#1 % 256 % 4294967296);havoc main_#t~mem29#1; 771#L757-75 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 742#L757-76 assume main_#t~switch28#1;call main_#t~mem30#1 := read~int#2(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem30#1 % 256 % 4294967296);havoc main_#t~mem30#1; 743#L757-78 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 791#L757-79 assume main_#t~switch28#1;call main_#t~mem31#1 := read~int#2(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem31#1 % 256 % 4294967296);havoc main_#t~mem31#1; 652#L757-81 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 653#L757-82 assume main_#t~switch28#1;call main_#t~mem32#1 := read~int#2(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 757#L757-84 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 662#L757-85 assume main_#t~switch28#1;call main_#t~mem33#1 := read~int#2(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 612#L757-87 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 613#L757-88 assume main_#t~switch28#1;call main_#t~mem34#1 := read~int#2(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 764#L757-90 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 765#L757-91 assume main_#t~switch28#1;call main_#t~mem35#1 := read~int#2(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem35#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem35#1 % 256 % 4294967296 else main_#t~mem35#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem35#1; 787#L757-93 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 626#L757-94 assume !main_#t~switch28#1; 627#L757-96 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 780#L757-97 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 781#L757-99 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 785#L757-100 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 577#L757-102 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 578#L757-103 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem39#1; 741#L757-105 havoc main_#t~switch28#1; 768#L757-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 689#L757-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 610#L757-113 main_~_hj_i~0#1 := main_#t~nondet40#1;havoc main_#t~nondet40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 611#L757-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 696#L757-120 main_~_hj_j~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 602#L757-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 603#L757-127 main_~_ha_hashv~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 661#L757-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 682#L757-134 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 701#L757-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 607#L757-141 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 608#L757-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 668#L757-148 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 669#L757-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 651#L757-155 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 709#L757-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 710#L757-162 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 717#L757-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 685#L757-169 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1; 592#L757-170 goto; 593#L757-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 621#L757-173 goto; 624#L757-175 goto; 625#L757-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 691#L757-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 693#L757-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#2(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#2(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 683#L757-193 goto; 637#L757-264 havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#2(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 638#L757-203 call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#2(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 584#L757-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~nondet79#1 := 0; 585#L757-201 main_~_ha_bkt~0#1 := main_#t~nondet79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~nondet79#1; 642#L757-202 goto; 657#L757-261 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#2(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 795#L757-205 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 712#L757-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 619#L757-208 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#2(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 620#L757-210 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 639#L757-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 708#L757-260 goto; 744#L757-262 havoc main_~_ha_bkt~0#1; 745#L757-263 goto; 731#L757-265 goto; 633#L757-267 havoc main_~_ha_hashv~0#1; 634#L757-268 goto; 726#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 715#L750-3 
[2023-11-26 10:43:37,484 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:37,484 INFO  L85        PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 2 times
[2023-11-26 10:43:37,485 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:37,485 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [699384885]
[2023-11-26 10:43:37,485 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:37,485 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:37,498 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:37,500 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2023-11-26 10:43:37,508 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:37,522 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2023-11-26 10:43:37,522 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:37,523 INFO  L85        PathProgramCache]: Analyzing trace with hash -1832271533, now seen corresponding path program 1 times
[2023-11-26 10:43:37,523 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:37,523 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2144695287]
[2023-11-26 10:43:37,523 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:37,529 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:37,622 ERROR L246   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2023-11-26 10:43:37,622 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [867499672]
[2023-11-26 10:43:37,623 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:37,623 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2023-11-26 10:43:37,623 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:43:37,656 INFO  L229       MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2023-11-26 10:43:37,678 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2023-11-26 10:43:38,028 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:43:38,031 INFO  L262         TraceCheckSpWp]: Trace formula consists of 521 conjuncts, 3 conjunts are in the unsatisfiable core
[2023-11-26 10:43:38,040 INFO  L285         TraceCheckSpWp]: Computing forward predicates...
[2023-11-26 10:43:38,097 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2023-11-26 10:43:38,097 INFO  L323         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2023-11-26 10:43:38,097 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2023-11-26 10:43:38,098 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2144695287]
[2023-11-26 10:43:38,098 WARN  L311   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2023-11-26 10:43:38,098 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [867499672]
[2023-11-26 10:43:38,098 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [867499672] provided 1 perfect and 0 imperfect interpolant sequences
[2023-11-26 10:43:38,098 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2023-11-26 10:43:38,099 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2023-11-26 10:43:38,099 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1113280971]
[2023-11-26 10:43:38,099 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2023-11-26 10:43:38,100 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2023-11-26 10:43:38,100 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2023-11-26 10:43:38,101 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2023-11-26 10:43:38,101 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2023-11-26 10:43:38,101 INFO  L87              Difference]: Start difference. First operand 248 states and 359 transitions. cyclomatic complexity: 115 Second operand  has 3 states, 3 states have (on average 25.0) internal successors, (75), 3 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2023-11-26 10:43:38,210 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2023-11-26 10:43:38,211 INFO  L93              Difference]: Finished difference Result 269 states and 380 transitions.
[2023-11-26 10:43:38,211 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 269 states and 380 transitions.
[2023-11-26 10:43:38,214 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 259
[2023-11-26 10:43:38,218 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 269 states to 269 states and 380 transitions.
[2023-11-26 10:43:38,218 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 269
[2023-11-26 10:43:38,219 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 269
[2023-11-26 10:43:38,219 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 269 states and 380 transitions.
[2023-11-26 10:43:38,220 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2023-11-26 10:43:38,220 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 269 states and 380 transitions.
[2023-11-26 10:43:38,222 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 269 states and 380 transitions.
[2023-11-26 10:43:38,247 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 268.
[2023-11-26 10:43:38,250 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 268 states, 264 states have (on average 1.4128787878787878) internal successors, (373), 263 states have internal predecessors, (373), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:43:38,252 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 379 transitions.
[2023-11-26 10:43:38,252 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 268 states and 379 transitions.
[2023-11-26 10:43:38,255 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2023-11-26 10:43:38,255 INFO  L428   stractBuchiCegarLoop]: Abstraction has 268 states and 379 transitions.
[2023-11-26 10:43:38,256 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 3 ============
[2023-11-26 10:43:38,256 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 268 states and 379 transitions.
[2023-11-26 10:43:38,258 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 258
[2023-11-26 10:43:38,258 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:43:38,258 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:43:38,260 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:43:38,260 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2023-11-26 10:43:38,261 INFO  L748   eck$LassoCheckResult]: Stem: 1520#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 1521#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~nondet79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~memset~res99#1.base, main_#t~memset~res99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~nondet105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem121#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~nondet122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 1459#L750-3 
[2023-11-26 10:43:38,261 INFO  L750   eck$LassoCheckResult]: Loop: 1459#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 1416#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1417#L752-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#2(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 1418#L757-269 havoc main_~_ha_hashv~0#1; 1498#L757-176 goto; 1472#L757-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1399#L757-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1401#L757-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 1522#L757-73 assume main_#t~switch28#1;call main_#t~mem29#1 := read~int#2(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem29#1 % 256 % 4294967296);havoc main_#t~mem29#1; 1516#L757-75 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 1488#L757-76 assume main_#t~switch28#1;call main_#t~mem30#1 := read~int#2(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem30#1 % 256 % 4294967296);havoc main_#t~mem30#1; 1489#L757-78 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 1537#L757-79 assume main_#t~switch28#1;call main_#t~mem31#1 := read~int#2(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem31#1 % 256 % 4294967296);havoc main_#t~mem31#1; 1397#L757-81 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 1398#L757-82 assume main_#t~switch28#1;call main_#t~mem32#1 := read~int#2(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 1503#L757-84 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 1407#L757-85 assume main_#t~switch28#1;call main_#t~mem33#1 := read~int#2(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 1357#L757-87 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 1358#L757-88 assume main_#t~switch28#1;call main_#t~mem34#1 := read~int#2(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 1510#L757-90 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 1511#L757-91 assume main_#t~switch28#1;call main_#t~mem35#1 := read~int#2(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem35#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem35#1 % 256 % 4294967296 else main_#t~mem35#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem35#1; 1534#L757-93 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 1371#L757-94 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 1372#L757-96 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 1526#L757-97 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1527#L757-99 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 1531#L757-100 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1532#L757-102 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 1486#L757-103 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem39#1; 1487#L757-105 havoc main_#t~switch28#1; 1514#L757-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1434#L757-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1355#L757-113 main_~_hj_i~0#1 := main_#t~nondet40#1;havoc main_#t~nondet40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1356#L757-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1441#L757-120 main_~_hj_j~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1345#L757-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1346#L757-127 main_~_ha_hashv~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1406#L757-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1427#L757-134 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1446#L757-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1352#L757-141 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1353#L757-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1412#L757-148 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1413#L757-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1396#L757-155 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1454#L757-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1455#L757-162 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1462#L757-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1430#L757-169 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1; 1337#L757-170 goto; 1338#L757-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1366#L757-173 goto; 1369#L757-175 goto; 1370#L757-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1436#L757-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 1438#L757-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#2(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#2(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 1428#L757-193 goto; 1382#L757-264 havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#2(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 1383#L757-203 call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#2(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 1329#L757-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~nondet79#1 := 0; 1330#L757-201 main_~_ha_bkt~0#1 := main_#t~nondet79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~nondet79#1; 1387#L757-202 goto; 1402#L757-261 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#2(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1542#L757-205 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 1457#L757-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 1364#L757-208 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#2(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 1365#L757-210 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 1384#L757-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1453#L757-260 goto; 1490#L757-262 havoc main_~_ha_bkt~0#1; 1491#L757-263 goto; 1477#L757-265 goto; 1380#L757-267 havoc main_~_ha_hashv~0#1; 1381#L757-268 goto; 1471#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 1459#L750-3 
[2023-11-26 10:43:38,262 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:38,262 INFO  L85        PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 3 times
[2023-11-26 10:43:38,262 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:38,262 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498767632]
[2023-11-26 10:43:38,263 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:38,263 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:38,276 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:38,276 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2023-11-26 10:43:38,283 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:38,292 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2023-11-26 10:43:38,293 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:38,293 INFO  L85        PathProgramCache]: Analyzing trace with hash 2018795089, now seen corresponding path program 1 times
[2023-11-26 10:43:38,293 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:38,293 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1306203658]
[2023-11-26 10:43:38,294 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:38,294 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:38,369 ERROR L246   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2023-11-26 10:43:38,369 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1762234185]
[2023-11-26 10:43:38,370 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:38,370 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2023-11-26 10:43:38,370 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:43:38,374 INFO  L229       MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2023-11-26 10:43:38,406 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process
[2023-11-26 10:43:38,671 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:43:38,674 INFO  L262         TraceCheckSpWp]: Trace formula consists of 527 conjuncts, 3 conjunts are in the unsatisfiable core
[2023-11-26 10:43:38,678 INFO  L285         TraceCheckSpWp]: Computing forward predicates...
[2023-11-26 10:43:38,704 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2023-11-26 10:43:38,704 INFO  L323         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2023-11-26 10:43:38,704 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2023-11-26 10:43:38,704 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1306203658]
[2023-11-26 10:43:38,704 WARN  L311   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2023-11-26 10:43:38,705 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1762234185]
[2023-11-26 10:43:38,705 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1762234185] provided 1 perfect and 0 imperfect interpolant sequences
[2023-11-26 10:43:38,705 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2023-11-26 10:43:38,705 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2023-11-26 10:43:38,705 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1123433959]
[2023-11-26 10:43:38,706 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2023-11-26 10:43:38,706 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2023-11-26 10:43:38,706 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2023-11-26 10:43:38,707 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2023-11-26 10:43:38,707 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2023-11-26 10:43:38,707 INFO  L87              Difference]: Start difference. First operand 268 states and 379 transitions. cyclomatic complexity: 115 Second operand  has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2023-11-26 10:43:38,835 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2023-11-26 10:43:38,835 INFO  L93              Difference]: Finished difference Result 255 states and 359 transitions.
[2023-11-26 10:43:38,835 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 255 states and 359 transitions.
[2023-11-26 10:43:38,839 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 245
[2023-11-26 10:43:38,842 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 255 states to 255 states and 359 transitions.
[2023-11-26 10:43:38,842 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 255
[2023-11-26 10:43:38,843 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 255
[2023-11-26 10:43:38,843 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 255 states and 359 transitions.
[2023-11-26 10:43:38,843 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2023-11-26 10:43:38,843 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 255 states and 359 transitions.
[2023-11-26 10:43:38,845 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 255 states and 359 transitions.
[2023-11-26 10:43:38,865 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 255 to 254.
[2023-11-26 10:43:38,866 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 254 states, 250 states have (on average 1.408) internal successors, (352), 249 states have internal predecessors, (352), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:43:38,867 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 358 transitions.
[2023-11-26 10:43:38,868 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 254 states and 358 transitions.
[2023-11-26 10:43:38,872 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2023-11-26 10:43:38,874 INFO  L428   stractBuchiCegarLoop]: Abstraction has 254 states and 358 transitions.
[2023-11-26 10:43:38,874 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 4 ============
[2023-11-26 10:43:38,874 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 254 states and 358 transitions.
[2023-11-26 10:43:38,876 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 244
[2023-11-26 10:43:38,876 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:43:38,877 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:43:38,878 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:43:38,878 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2023-11-26 10:43:38,879 INFO  L748   eck$LassoCheckResult]: Stem: 2275#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 2276#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~nondet79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~memset~res99#1.base, main_#t~memset~res99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~nondet105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem121#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~nondet122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 2214#L750-3 
[2023-11-26 10:43:38,879 INFO  L750   eck$LassoCheckResult]: Loop: 2214#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 2171#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2172#L752-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#2(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 2173#L757-269 havoc main_~_ha_hashv~0#1; 2253#L757-176 goto; 2227#L757-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2154#L757-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2156#L757-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 2277#L757-73 assume !main_#t~switch28#1; 2271#L757-75 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 2243#L757-76 assume !main_#t~switch28#1; 2244#L757-78 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 2292#L757-79 assume !main_#t~switch28#1; 2152#L757-81 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 2153#L757-82 assume !main_#t~switch28#1; 2258#L757-84 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 2162#L757-85 assume !main_#t~switch28#1; 2111#L757-87 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 2112#L757-88 assume !main_#t~switch28#1; 2265#L757-90 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 2266#L757-91 assume !main_#t~switch28#1; 2289#L757-93 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 2125#L757-94 assume !main_#t~switch28#1; 2126#L757-96 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 2296#L757-97 assume !main_#t~switch28#1; 2305#L757-99 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 2306#L757-100 assume !main_#t~switch28#1; 2076#L757-102 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 2077#L757-103 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem39#1; 2242#L757-105 havoc main_#t~switch28#1; 2269#L757-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2189#L757-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2109#L757-113 main_~_hj_i~0#1 := main_#t~nondet40#1;havoc main_#t~nondet40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2110#L757-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2196#L757-120 main_~_hj_j~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2101#L757-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2102#L757-127 main_~_ha_hashv~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2161#L757-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2182#L757-134 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2201#L757-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2106#L757-141 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2107#L757-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2167#L757-148 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2168#L757-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2151#L757-155 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2209#L757-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2210#L757-162 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2217#L757-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2185#L757-169 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1; 2091#L757-170 goto; 2092#L757-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2120#L757-173 goto; 2123#L757-175 goto; 2124#L757-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2191#L757-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 2193#L757-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#2(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#2(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 2183#L757-193 goto; 2137#L757-264 havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#2(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 2138#L757-203 call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#2(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 2083#L757-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~nondet79#1 := 0; 2084#L757-201 main_~_ha_bkt~0#1 := main_#t~nondet79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~nondet79#1; 2142#L757-202 goto; 2157#L757-261 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#2(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2298#L757-205 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 2212#L757-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 2118#L757-208 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#2(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 2119#L757-210 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 2139#L757-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2208#L757-260 goto; 2245#L757-262 havoc main_~_ha_bkt~0#1; 2246#L757-263 goto; 2232#L757-265 goto; 2135#L757-267 havoc main_~_ha_hashv~0#1; 2136#L757-268 goto; 2226#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 2214#L750-3 
[2023-11-26 10:43:38,880 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:38,880 INFO  L85        PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 4 times
[2023-11-26 10:43:38,880 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:38,881 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1007833114]
[2023-11-26 10:43:38,881 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:38,882 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:38,898 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:38,900 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2023-11-26 10:43:38,908 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:38,916 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2023-11-26 10:43:38,916 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:38,916 INFO  L85        PathProgramCache]: Analyzing trace with hash -2026129435, now seen corresponding path program 1 times
[2023-11-26 10:43:38,917 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:38,917 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1192306584]
[2023-11-26 10:43:38,917 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:38,917 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:38,985 ERROR L246   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2023-11-26 10:43:38,986 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [95415520]
[2023-11-26 10:43:38,986 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:38,986 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2023-11-26 10:43:38,986 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:43:38,990 INFO  L229       MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2023-11-26 10:43:39,002 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process
[2023-11-26 10:43:39,280 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:43:39,283 INFO  L262         TraceCheckSpWp]: Trace formula consists of 467 conjuncts, 4 conjunts are in the unsatisfiable core
[2023-11-26 10:43:39,286 INFO  L285         TraceCheckSpWp]: Computing forward predicates...
[2023-11-26 10:43:39,358 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2023-11-26 10:43:39,358 INFO  L323         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2023-11-26 10:43:39,358 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2023-11-26 10:43:39,358 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1192306584]
[2023-11-26 10:43:39,358 WARN  L311   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2023-11-26 10:43:39,358 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [95415520]
[2023-11-26 10:43:39,359 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [95415520] provided 1 perfect and 0 imperfect interpolant sequences
[2023-11-26 10:43:39,359 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2023-11-26 10:43:39,359 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2023-11-26 10:43:39,359 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [336116881]
[2023-11-26 10:43:39,359 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2023-11-26 10:43:39,360 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2023-11-26 10:43:39,360 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2023-11-26 10:43:39,360 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2023-11-26 10:43:39,361 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2023-11-26 10:43:39,361 INFO  L87              Difference]: Start difference. First operand 254 states and 358 transitions. cyclomatic complexity: 108 Second operand  has 5 states, 5 states have (on average 15.0) internal successors, (75), 5 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2023-11-26 10:43:39,493 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2023-11-26 10:43:39,493 INFO  L93              Difference]: Finished difference Result 364 states and 524 transitions.
[2023-11-26 10:43:39,494 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 364 states and 524 transitions.
[2023-11-26 10:43:39,497 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 354
[2023-11-26 10:43:39,501 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 364 states to 364 states and 524 transitions.
[2023-11-26 10:43:39,501 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 364
[2023-11-26 10:43:39,502 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 364
[2023-11-26 10:43:39,502 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 364 states and 524 transitions.
[2023-11-26 10:43:39,503 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2023-11-26 10:43:39,503 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 364 states and 524 transitions.
[2023-11-26 10:43:39,504 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 364 states and 524 transitions.
[2023-11-26 10:43:39,509 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 364 to 277.
[2023-11-26 10:43:39,510 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 277 states, 273 states have (on average 1.380952380952381) internal successors, (377), 272 states have internal predecessors, (377), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:43:39,512 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 277 states to 277 states and 383 transitions.
[2023-11-26 10:43:39,512 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 277 states and 383 transitions.
[2023-11-26 10:43:39,513 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2023-11-26 10:43:39,513 INFO  L428   stractBuchiCegarLoop]: Abstraction has 277 states and 383 transitions.
[2023-11-26 10:43:39,514 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 5 ============
[2023-11-26 10:43:39,514 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 277 states and 383 transitions.
[2023-11-26 10:43:39,515 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 267
[2023-11-26 10:43:39,516 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:43:39,516 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:43:39,517 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:43:39,517 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2023-11-26 10:43:39,517 INFO  L748   eck$LassoCheckResult]: Stem: 3126#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 3127#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~nondet79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~memset~res99#1.base, main_#t~memset~res99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~nondet105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem121#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~nondet122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 3065#L750-3 
[2023-11-26 10:43:39,517 INFO  L750   eck$LassoCheckResult]: Loop: 3065#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 3020#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3021#L752-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#2(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 3022#L757-269 havoc main_~_ha_hashv~0#1; 3102#L757-176 goto; 3076#L757-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3002#L757-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3004#L757-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 3168#L757-73 assume !main_#t~switch28#1; 3169#L757-75 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 3092#L757-76 assume !main_#t~switch28#1; 3093#L757-78 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 3145#L757-79 assume !main_#t~switch28#1; 3146#L757-81 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 3163#L757-82 assume !main_#t~switch28#1; 3164#L757-84 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 3010#L757-85 assume !main_#t~switch28#1; 3011#L757-87 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 3149#L757-88 assume !main_#t~switch28#1; 3150#L757-90 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 3158#L757-91 assume !main_#t~switch28#1; 3159#L757-93 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 2973#L757-94 assume !main_#t~switch28#1; 2974#L757-96 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 3175#L757-97 assume !main_#t~switch28#1; 3173#L757-99 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 3138#L757-100 assume !main_#t~switch28#1; 3139#L757-102 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 3090#L757-103 assume !main_#t~switch28#1; 3091#L757-105 havoc main_#t~switch28#1; 3118#L757-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3038#L757-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2957#L757-113 main_~_hj_i~0#1 := main_#t~nondet40#1;havoc main_#t~nondet40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2958#L757-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3045#L757-120 main_~_hj_j~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2947#L757-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2948#L757-127 main_~_ha_hashv~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3009#L757-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3031#L757-134 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3050#L757-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2954#L757-141 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2955#L757-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3016#L757-148 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3017#L757-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2999#L757-155 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3058#L757-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3059#L757-162 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3066#L757-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3034#L757-169 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1; 2939#L757-170 goto; 2940#L757-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2968#L757-173 goto; 2971#L757-175 goto; 2972#L757-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3040#L757-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 3042#L757-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#2(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#2(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 3032#L757-193 goto; 2985#L757-264 havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#2(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 2986#L757-203 call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#2(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 2931#L757-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~nondet79#1 := 0; 2932#L757-201 main_~_ha_bkt~0#1 := main_#t~nondet79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~nondet79#1; 2990#L757-202 goto; 3005#L757-261 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#2(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3153#L757-205 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 3061#L757-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 2966#L757-208 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#2(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 2967#L757-210 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 2987#L757-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3057#L757-260 goto; 3094#L757-262 havoc main_~_ha_bkt~0#1; 3095#L757-263 goto; 3081#L757-265 goto; 2983#L757-267 havoc main_~_ha_hashv~0#1; 2984#L757-268 goto; 3075#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 3065#L750-3 
[2023-11-26 10:43:39,518 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:39,518 INFO  L85        PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 5 times
[2023-11-26 10:43:39,518 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:39,518 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330340979]
[2023-11-26 10:43:39,518 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:39,519 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:39,528 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:39,528 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2023-11-26 10:43:39,533 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:39,540 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2023-11-26 10:43:39,541 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:39,541 INFO  L85        PathProgramCache]: Analyzing trace with hash 1915749479, now seen corresponding path program 1 times
[2023-11-26 10:43:39,541 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:39,542 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991091880]
[2023-11-26 10:43:39,542 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:39,542 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:39,589 ERROR L246   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2023-11-26 10:43:39,589 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [132170255]
[2023-11-26 10:43:39,589 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:39,590 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2023-11-26 10:43:39,590 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:43:39,595 INFO  L229       MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2023-11-26 10:43:39,603 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process
[2023-11-26 10:43:39,904 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:43:39,907 INFO  L262         TraceCheckSpWp]: Trace formula consists of 461 conjuncts, 4 conjunts are in the unsatisfiable core
[2023-11-26 10:43:39,917 INFO  L285         TraceCheckSpWp]: Computing forward predicates...
[2023-11-26 10:43:39,976 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2023-11-26 10:43:39,976 INFO  L323         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2023-11-26 10:43:39,976 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2023-11-26 10:43:39,976 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991091880]
[2023-11-26 10:43:39,977 WARN  L311   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2023-11-26 10:43:39,977 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [132170255]
[2023-11-26 10:43:39,977 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [132170255] provided 1 perfect and 0 imperfect interpolant sequences
[2023-11-26 10:43:39,977 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2023-11-26 10:43:39,977 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2023-11-26 10:43:39,978 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064341239]
[2023-11-26 10:43:39,978 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2023-11-26 10:43:39,980 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2023-11-26 10:43:39,981 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2023-11-26 10:43:39,981 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2023-11-26 10:43:39,981 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2023-11-26 10:43:39,982 INFO  L87              Difference]: Start difference. First operand 277 states and 383 transitions. cyclomatic complexity: 110 Second operand  has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2023-11-26 10:43:40,050 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2023-11-26 10:43:40,050 INFO  L93              Difference]: Finished difference Result 209 states and 281 transitions.
[2023-11-26 10:43:40,050 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 209 states and 281 transitions.
[2023-11-26 10:43:40,053 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 199
[2023-11-26 10:43:40,055 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 209 states to 209 states and 281 transitions.
[2023-11-26 10:43:40,056 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 209
[2023-11-26 10:43:40,057 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 209
[2023-11-26 10:43:40,057 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 209 states and 281 transitions.
[2023-11-26 10:43:40,057 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2023-11-26 10:43:40,057 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 209 states and 281 transitions.
[2023-11-26 10:43:40,058 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 209 states and 281 transitions.
[2023-11-26 10:43:40,061 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209.
[2023-11-26 10:43:40,062 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 209 states, 205 states have (on average 1.3414634146341464) internal successors, (275), 204 states have internal predecessors, (275), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:43:40,063 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 281 transitions.
[2023-11-26 10:43:40,063 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 209 states and 281 transitions.
[2023-11-26 10:43:40,064 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2023-11-26 10:43:40,066 INFO  L428   stractBuchiCegarLoop]: Abstraction has 209 states and 281 transitions.
[2023-11-26 10:43:40,066 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 6 ============
[2023-11-26 10:43:40,067 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 209 states and 281 transitions.
[2023-11-26 10:43:40,068 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 199
[2023-11-26 10:43:40,068 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:43:40,068 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:43:40,070 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:43:40,071 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2023-11-26 10:43:40,075 INFO  L748   eck$LassoCheckResult]: Stem: 3801#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 3802#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~nondet79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~memset~res99#1.base, main_#t~memset~res99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~nondet105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem121#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~nondet122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 3752#L750-3 
[2023-11-26 10:43:40,077 INFO  L750   eck$LassoCheckResult]: Loop: 3752#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 3716#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3717#L752-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#2(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 3718#L757-269 havoc main_~_ha_hashv~0#1; 3785#L757-176 goto; 3765#L757-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3704#L757-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3705#L757-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 3803#L757-73 assume !main_#t~switch28#1; 3798#L757-75 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 3777#L757-76 assume !main_#t~switch28#1; 3778#L757-78 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 3818#L757-79 assume !main_#t~switch28#1; 3702#L757-81 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 3703#L757-82 assume !main_#t~switch28#1; 3787#L757-84 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 3708#L757-85 assume !main_#t~switch28#1; 3667#L757-87 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 3668#L757-88 assume !main_#t~switch28#1; 3792#L757-90 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 3793#L757-91 assume !main_#t~switch28#1; 3814#L757-93 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 3678#L757-94 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 3679#L757-96 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 3807#L757-97 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 3808#L757-99 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 3812#L757-100 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 3632#L757-102 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 3633#L757-103 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem39#1; 3776#L757-105 havoc main_#t~switch28#1; 3796#L757-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3730#L757-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3665#L757-113 main_~_hj_i~0#1 := main_#t~nondet40#1;havoc main_#t~nondet40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3666#L757-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3737#L757-120 main_~_hj_j~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3657#L757-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3658#L757-127 main_~_ha_hashv~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3707#L757-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3723#L757-134 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3740#L757-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3662#L757-141 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3663#L757-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3714#L757-148 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3715#L757-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3701#L757-155 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3747#L757-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3748#L757-162 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3755#L757-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3726#L757-169 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1; 3647#L757-170 goto; 3648#L757-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3675#L757-173 goto; 3676#L757-175 goto; 3677#L757-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3732#L757-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 3734#L757-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#2(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#2(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 3724#L757-193 goto; 3687#L757-264 havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#2(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 3688#L757-203 call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#2(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 3639#L757-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~nondet79#1 := 0; 3640#L757-201 main_~_ha_bkt~0#1 := main_#t~nondet79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~nondet79#1; 3692#L757-202 goto; 3706#L757-261 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#2(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3822#L757-205 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 3750#L757-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 3673#L757-208 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#2(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 3674#L757-210 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 3689#L757-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3746#L757-260 goto; 3779#L757-262 havoc main_~_ha_bkt~0#1; 3780#L757-263 goto; 3769#L757-265 goto; 3683#L757-267 havoc main_~_ha_hashv~0#1; 3684#L757-268 goto; 3764#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 3752#L750-3 
[2023-11-26 10:43:40,077 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:40,077 INFO  L85        PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 6 times
[2023-11-26 10:43:40,077 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:40,082 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1636306442]
[2023-11-26 10:43:40,082 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:40,082 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:40,103 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:40,103 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2023-11-26 10:43:40,108 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:40,119 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2023-11-26 10:43:40,120 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:40,120 INFO  L85        PathProgramCache]: Analyzing trace with hash -425925281, now seen corresponding path program 1 times
[2023-11-26 10:43:40,120 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:40,121 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662857091]
[2023-11-26 10:43:40,121 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:40,122 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:40,180 ERROR L246   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2023-11-26 10:43:40,180 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1448766346]
[2023-11-26 10:43:40,180 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:40,180 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2023-11-26 10:43:40,181 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:43:40,187 INFO  L229       MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2023-11-26 10:43:40,200 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process
[2023-11-26 10:43:40,862 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:43:40,866 INFO  L262         TraceCheckSpWp]: Trace formula consists of 485 conjuncts, 13 conjunts are in the unsatisfiable core
[2023-11-26 10:43:40,868 INFO  L285         TraceCheckSpWp]: Computing forward predicates...
[2023-11-26 10:43:41,091 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2023-11-26 10:43:41,091 INFO  L323         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2023-11-26 10:43:41,091 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2023-11-26 10:43:41,092 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [662857091]
[2023-11-26 10:43:41,092 WARN  L311   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2023-11-26 10:43:41,092 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1448766346]
[2023-11-26 10:43:41,092 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1448766346] provided 1 perfect and 0 imperfect interpolant sequences
[2023-11-26 10:43:41,092 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2023-11-26 10:43:41,093 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2023-11-26 10:43:41,095 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1108689190]
[2023-11-26 10:43:41,095 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2023-11-26 10:43:41,096 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2023-11-26 10:43:41,096 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2023-11-26 10:43:41,096 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2023-11-26 10:43:41,096 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30
[2023-11-26 10:43:41,097 INFO  L87              Difference]: Start difference. First operand 209 states and 281 transitions. cyclomatic complexity: 76 Second operand  has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2023-11-26 10:43:41,444 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2023-11-26 10:43:41,444 INFO  L93              Difference]: Finished difference Result 214 states and 286 transitions.
[2023-11-26 10:43:41,444 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 214 states and 286 transitions.
[2023-11-26 10:43:41,447 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 204
[2023-11-26 10:43:41,449 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 214 states to 214 states and 286 transitions.
[2023-11-26 10:43:41,449 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 214
[2023-11-26 10:43:41,450 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 214
[2023-11-26 10:43:41,450 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 214 states and 286 transitions.
[2023-11-26 10:43:41,450 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2023-11-26 10:43:41,451 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 214 states and 286 transitions.
[2023-11-26 10:43:41,451 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 214 states and 286 transitions.
[2023-11-26 10:43:41,454 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 213.
[2023-11-26 10:43:41,455 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 213 states, 209 states have (on average 1.3349282296650717) internal successors, (279), 208 states have internal predecessors, (279), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:43:41,457 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 285 transitions.
[2023-11-26 10:43:41,457 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 213 states and 285 transitions.
[2023-11-26 10:43:41,457 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2023-11-26 10:43:41,458 INFO  L428   stractBuchiCegarLoop]: Abstraction has 213 states and 285 transitions.
[2023-11-26 10:43:41,458 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 7 ============
[2023-11-26 10:43:41,458 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 213 states and 285 transitions.
[2023-11-26 10:43:41,459 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 203
[2023-11-26 10:43:41,460 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:43:41,460 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:43:41,460 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:43:41,460 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2023-11-26 10:43:41,461 INFO  L748   eck$LassoCheckResult]: Stem: 4455#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 4456#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~nondet79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~memset~res99#1.base, main_#t~memset~res99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~nondet105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem121#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~nondet122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 4408#L750-3 
[2023-11-26 10:43:41,461 INFO  L750   eck$LassoCheckResult]: Loop: 4408#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 4370#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4371#L752-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#2(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 4372#L757-269 havoc main_~_ha_hashv~0#1; 4439#L757-176 goto; 4419#L757-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4359#L757-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4360#L757-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 4457#L757-73 assume !main_#t~switch28#1; 4451#L757-75 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 4431#L757-76 assume !main_#t~switch28#1; 4432#L757-78 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 4471#L757-79 assume !main_#t~switch28#1; 4356#L757-81 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 4357#L757-82 assume !main_#t~switch28#1; 4441#L757-84 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 4362#L757-85 assume !main_#t~switch28#1; 4321#L757-87 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 4322#L757-88 assume !main_#t~switch28#1; 4446#L757-90 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 4447#L757-91 assume !main_#t~switch28#1; 4469#L757-93 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 4332#L757-94 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 4333#L757-96 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 4461#L757-97 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 4462#L757-99 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 4467#L757-100 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 4286#L757-102 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 4287#L757-103 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem39#1; 4430#L757-105 havoc main_#t~switch28#1; 4449#L757-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4384#L757-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4319#L757-113 main_~_hj_i~0#1 := main_#t~nondet40#1;havoc main_#t~nondet40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4320#L757-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 4465#L757-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet41#1 := main_~_hj_j~0#1; 4391#L757-120 main_~_hj_j~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4309#L757-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 4310#L757-127 main_~_ha_hashv~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4361#L757-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4377#L757-134 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4394#L757-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4316#L757-141 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4317#L757-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4365#L757-148 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4366#L757-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4355#L757-155 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4401#L757-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4402#L757-162 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4409#L757-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4380#L757-169 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1; 4301#L757-170 goto; 4302#L757-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4329#L757-173 goto; 4330#L757-175 goto; 4331#L757-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4386#L757-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 4388#L757-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#2(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#2(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 4378#L757-193 goto; 4341#L757-264 havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#2(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 4342#L757-203 call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#2(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 4293#L757-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~nondet79#1 := 0; 4294#L757-201 main_~_ha_bkt~0#1 := main_#t~nondet79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~nondet79#1; 4346#L757-202 goto; 4358#L757-261 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#2(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4476#L757-205 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 4404#L757-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 4327#L757-208 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#2(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 4328#L757-210 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 4343#L757-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4400#L757-260 goto; 4433#L757-262 havoc main_~_ha_bkt~0#1; 4434#L757-263 goto; 4424#L757-265 goto; 4337#L757-267 havoc main_~_ha_hashv~0#1; 4338#L757-268 goto; 4418#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 4408#L750-3 
[2023-11-26 10:43:41,461 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:41,461 INFO  L85        PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 7 times
[2023-11-26 10:43:41,462 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:41,462 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917671908]
[2023-11-26 10:43:41,462 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:41,462 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:41,471 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:41,472 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2023-11-26 10:43:41,476 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:41,483 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2023-11-26 10:43:41,484 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:41,484 INFO  L85        PathProgramCache]: Analyzing trace with hash 709846247, now seen corresponding path program 1 times
[2023-11-26 10:43:41,484 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:41,484 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1053268646]
[2023-11-26 10:43:41,484 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:41,485 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:41,530 ERROR L246   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2023-11-26 10:43:41,530 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2145285010]
[2023-11-26 10:43:41,530 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:41,531 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2023-11-26 10:43:41,531 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:43:41,534 INFO  L229       MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2023-11-26 10:43:41,553 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process
[2023-11-26 10:43:41,966 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:43:41,970 INFO  L262         TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 15 conjunts are in the unsatisfiable core
[2023-11-26 10:43:41,973 INFO  L285         TraceCheckSpWp]: Computing forward predicates...
[2023-11-26 10:43:42,185 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2023-11-26 10:43:42,185 INFO  L323         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2023-11-26 10:43:42,185 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2023-11-26 10:43:42,185 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1053268646]
[2023-11-26 10:43:42,186 WARN  L311   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2023-11-26 10:43:42,186 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2145285010]
[2023-11-26 10:43:42,186 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [2145285010] provided 1 perfect and 0 imperfect interpolant sequences
[2023-11-26 10:43:42,186 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2023-11-26 10:43:42,186 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2023-11-26 10:43:42,186 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710655018]
[2023-11-26 10:43:42,187 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2023-11-26 10:43:42,187 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2023-11-26 10:43:42,187 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2023-11-26 10:43:42,187 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2023-11-26 10:43:42,188 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2023-11-26 10:43:42,188 INFO  L87              Difference]: Start difference. First operand 213 states and 285 transitions. cyclomatic complexity: 76 Second operand  has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2023-11-26 10:43:42,655 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2023-11-26 10:43:42,655 INFO  L93              Difference]: Finished difference Result 218 states and 291 transitions.
[2023-11-26 10:43:42,655 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 218 states and 291 transitions.
[2023-11-26 10:43:42,658 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 208
[2023-11-26 10:43:42,660 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 218 states to 218 states and 291 transitions.
[2023-11-26 10:43:42,661 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 218
[2023-11-26 10:43:42,661 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 218
[2023-11-26 10:43:42,661 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 218 states and 291 transitions.
[2023-11-26 10:43:42,662 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2023-11-26 10:43:42,662 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 218 states and 291 transitions.
[2023-11-26 10:43:42,662 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 218 states and 291 transitions.
[2023-11-26 10:43:42,666 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 217.
[2023-11-26 10:43:42,666 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 217 states, 213 states have (on average 1.3333333333333333) internal successors, (284), 212 states have internal predecessors, (284), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:43:42,668 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 290 transitions.
[2023-11-26 10:43:42,668 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 217 states and 290 transitions.
[2023-11-26 10:43:42,668 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2023-11-26 10:43:42,669 INFO  L428   stractBuchiCegarLoop]: Abstraction has 217 states and 290 transitions.
[2023-11-26 10:43:42,669 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 8 ============
[2023-11-26 10:43:42,669 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 217 states and 290 transitions.
[2023-11-26 10:43:42,670 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 207
[2023-11-26 10:43:42,671 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:43:42,671 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:43:42,671 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:43:42,671 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2023-11-26 10:43:42,672 INFO  L748   eck$LassoCheckResult]: Stem: 5125#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 5126#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~nondet79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~memset~res99#1.base, main_#t~memset~res99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~nondet105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem121#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~nondet122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 5075#L750-3 
[2023-11-26 10:43:42,672 INFO  L750   eck$LassoCheckResult]: Loop: 5075#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 5038#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5039#L752-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#2(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 5040#L757-269 havoc main_~_ha_hashv~0#1; 5109#L757-176 goto; 5089#L757-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5025#L757-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5026#L757-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 5127#L757-73 assume !main_#t~switch28#1; 5121#L757-75 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 5101#L757-76 assume !main_#t~switch28#1; 5102#L757-78 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 5141#L757-79 assume !main_#t~switch28#1; 5023#L757-81 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 5024#L757-82 assume !main_#t~switch28#1; 5111#L757-84 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 5030#L757-85 assume !main_#t~switch28#1; 4988#L757-87 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 4989#L757-88 assume !main_#t~switch28#1; 5116#L757-90 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 5117#L757-91 assume !main_#t~switch28#1; 5138#L757-93 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 4999#L757-94 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 5000#L757-96 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 5131#L757-97 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 5132#L757-99 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 5136#L757-100 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 4954#L757-102 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 4955#L757-103 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem39#1; 5100#L757-105 havoc main_#t~switch28#1; 5120#L757-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5052#L757-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4986#L757-113 main_~_hj_i~0#1 := main_#t~nondet40#1;havoc main_#t~nondet40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4987#L757-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 5079#L757-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet41#1 := main_~_hj_j~0#1; 5080#L757-120 main_~_hj_j~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4977#L757-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 4978#L757-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet42#1 := main_~_ha_hashv~0#1; 5028#L757-127 main_~_ha_hashv~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5029#L757-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5045#L757-134 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5063#L757-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4983#L757-141 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4984#L757-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5035#L757-148 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5036#L757-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5022#L757-155 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5070#L757-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5071#L757-162 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5078#L757-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5048#L757-169 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1; 4969#L757-170 goto; 4970#L757-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4996#L757-173 goto; 4997#L757-175 goto; 4998#L757-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5054#L757-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 5056#L757-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#2(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#2(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 5046#L757-193 goto; 5008#L757-264 havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#2(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 5009#L757-203 call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#2(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 4961#L757-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~nondet79#1 := 0; 4962#L757-201 main_~_ha_bkt~0#1 := main_#t~nondet79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~nondet79#1; 5013#L757-202 goto; 5027#L757-261 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#2(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5146#L757-205 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 5073#L757-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 4994#L757-208 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#2(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 4995#L757-210 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 5010#L757-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5069#L757-260 goto; 5103#L757-262 havoc main_~_ha_bkt~0#1; 5104#L757-263 goto; 5094#L757-265 goto; 5006#L757-267 havoc main_~_ha_hashv~0#1; 5007#L757-268 goto; 5088#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 5075#L750-3 
[2023-11-26 10:43:42,672 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:42,673 INFO  L85        PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 8 times
[2023-11-26 10:43:42,673 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:42,673 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1302816098]
[2023-11-26 10:43:42,673 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:42,673 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:42,682 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:42,682 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2023-11-26 10:43:42,686 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:42,693 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2023-11-26 10:43:42,694 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:42,694 INFO  L85        PathProgramCache]: Analyzing trace with hash 1202676308, now seen corresponding path program 1 times
[2023-11-26 10:43:42,694 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:42,695 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079842956]
[2023-11-26 10:43:42,695 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:42,695 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:42,746 ERROR L246   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2023-11-26 10:43:42,747 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [274951887]
[2023-11-26 10:43:42,747 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:42,747 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2023-11-26 10:43:42,747 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:43:42,750 INFO  L229       MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2023-11-26 10:43:42,779 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process
[2023-11-26 10:43:43,149 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:43:43,153 INFO  L262         TraceCheckSpWp]: Trace formula consists of 487 conjuncts, 13 conjunts are in the unsatisfiable core
[2023-11-26 10:43:43,155 INFO  L285         TraceCheckSpWp]: Computing forward predicates...
[2023-11-26 10:43:43,270 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2023-11-26 10:43:43,271 INFO  L323         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2023-11-26 10:43:43,271 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2023-11-26 10:43:43,271 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079842956]
[2023-11-26 10:43:43,271 WARN  L311   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2023-11-26 10:43:43,272 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [274951887]
[2023-11-26 10:43:43,272 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [274951887] provided 1 perfect and 0 imperfect interpolant sequences
[2023-11-26 10:43:43,272 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2023-11-26 10:43:43,272 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2023-11-26 10:43:43,272 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1719729415]
[2023-11-26 10:43:43,273 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2023-11-26 10:43:43,273 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2023-11-26 10:43:43,273 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2023-11-26 10:43:43,274 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2023-11-26 10:43:43,274 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2023-11-26 10:43:43,274 INFO  L87              Difference]: Start difference. First operand 217 states and 290 transitions. cyclomatic complexity: 77 Second operand  has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2023-11-26 10:43:43,771 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2023-11-26 10:43:43,771 INFO  L93              Difference]: Finished difference Result 223 states and 298 transitions.
[2023-11-26 10:43:43,772 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 223 states and 298 transitions.
[2023-11-26 10:43:43,791 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 213
[2023-11-26 10:43:43,794 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 223 states to 223 states and 298 transitions.
[2023-11-26 10:43:43,794 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 223
[2023-11-26 10:43:43,795 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 223
[2023-11-26 10:43:43,795 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 223 states and 298 transitions.
[2023-11-26 10:43:43,795 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2023-11-26 10:43:43,796 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 223 states and 298 transitions.
[2023-11-26 10:43:43,796 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 223 states and 298 transitions.
[2023-11-26 10:43:43,800 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 219.
[2023-11-26 10:43:43,801 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 219 states, 215 states have (on average 1.330232558139535) internal successors, (286), 214 states have internal predecessors, (286), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:43:43,803 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 292 transitions.
[2023-11-26 10:43:43,803 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 219 states and 292 transitions.
[2023-11-26 10:43:43,803 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. 
[2023-11-26 10:43:43,806 INFO  L428   stractBuchiCegarLoop]: Abstraction has 219 states and 292 transitions.
[2023-11-26 10:43:43,806 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 9 ============
[2023-11-26 10:43:43,806 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 219 states and 292 transitions.
[2023-11-26 10:43:43,808 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 209
[2023-11-26 10:43:43,808 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:43:43,808 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:43:43,809 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:43:43,809 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2023-11-26 10:43:43,809 INFO  L748   eck$LassoCheckResult]: Stem: 5808#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 5809#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~nondet79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~memset~res99#1.base, main_#t~memset~res99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~nondet105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem121#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~nondet122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 5759#L750-3 
[2023-11-26 10:43:43,810 INFO  L750   eck$LassoCheckResult]: Loop: 5759#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 5722#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5723#L752-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#2(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 5724#L757-269 havoc main_~_ha_hashv~0#1; 5792#L757-176 goto; 5772#L757-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5709#L757-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5710#L757-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 5810#L757-73 assume !main_#t~switch28#1; 5804#L757-75 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 5784#L757-76 assume !main_#t~switch28#1; 5785#L757-78 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 5827#L757-79 assume !main_#t~switch28#1; 5707#L757-81 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 5708#L757-82 assume !main_#t~switch28#1; 5794#L757-84 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 5714#L757-85 assume !main_#t~switch28#1; 5672#L757-87 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 5673#L757-88 assume !main_#t~switch28#1; 5799#L757-90 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 5800#L757-91 assume !main_#t~switch28#1; 5824#L757-93 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 5683#L757-94 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 5684#L757-96 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 5814#L757-97 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 5815#L757-99 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 5822#L757-100 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 5638#L757-102 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 5639#L757-103 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem39#1; 5783#L757-105 havoc main_#t~switch28#1; 5803#L757-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5736#L757-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 5737#L757-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 5742#L757-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet40#1 := 0; 5670#L757-113 main_~_hj_i~0#1 := main_#t~nondet40#1;havoc main_#t~nondet40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5671#L757-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 5834#L757-120 main_~_hj_j~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5842#L757-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 5712#L757-127 main_~_ha_hashv~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5713#L757-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5729#L757-134 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5747#L757-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5667#L757-141 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5668#L757-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5719#L757-148 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5720#L757-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5706#L757-155 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5754#L757-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5755#L757-162 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5762#L757-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5732#L757-169 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1; 5653#L757-170 goto; 5654#L757-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5680#L757-173 goto; 5681#L757-175 goto; 5682#L757-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5739#L757-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 5741#L757-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#2(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#2(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 5730#L757-193 goto; 5692#L757-264 havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#2(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 5693#L757-203 call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#2(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 5645#L757-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~nondet79#1 := 0; 5646#L757-201 main_~_ha_bkt~0#1 := main_#t~nondet79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~nondet79#1; 5697#L757-202 goto; 5711#L757-261 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#2(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5832#L757-205 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 5757#L757-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 5678#L757-208 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#2(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 5679#L757-210 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 5694#L757-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5753#L757-260 goto; 5786#L757-262 havoc main_~_ha_bkt~0#1; 5787#L757-263 goto; 5777#L757-265 goto; 5690#L757-267 havoc main_~_ha_hashv~0#1; 5691#L757-268 goto; 5771#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 5759#L750-3 
[2023-11-26 10:43:43,811 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:43,811 INFO  L85        PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 9 times
[2023-11-26 10:43:43,811 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:43,811 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131409515]
[2023-11-26 10:43:43,811 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:43,812 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:43,835 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:43,838 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2023-11-26 10:43:43,846 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:43,855 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2023-11-26 10:43:43,856 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:43,856 INFO  L85        PathProgramCache]: Analyzing trace with hash -1583444326, now seen corresponding path program 1 times
[2023-11-26 10:43:43,856 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:43,857 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860493566]
[2023-11-26 10:43:43,857 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:43,857 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:43,919 ERROR L246   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2023-11-26 10:43:43,920 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [47676582]
[2023-11-26 10:43:43,920 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:43,920 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2023-11-26 10:43:43,921 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:43:43,927 INFO  L229       MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2023-11-26 10:43:43,942 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process
[2023-11-26 10:43:44,378 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:43:44,382 INFO  L262         TraceCheckSpWp]: Trace formula consists of 487 conjuncts, 15 conjunts are in the unsatisfiable core
[2023-11-26 10:43:44,384 INFO  L285         TraceCheckSpWp]: Computing forward predicates...
[2023-11-26 10:43:44,498 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2023-11-26 10:43:44,498 INFO  L323         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2023-11-26 10:43:44,499 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2023-11-26 10:43:44,499 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1860493566]
[2023-11-26 10:43:44,499 WARN  L311   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2023-11-26 10:43:44,499 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [47676582]
[2023-11-26 10:43:44,499 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [47676582] provided 1 perfect and 0 imperfect interpolant sequences
[2023-11-26 10:43:44,499 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2023-11-26 10:43:44,500 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2023-11-26 10:43:44,500 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1325564049]
[2023-11-26 10:43:44,500 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2023-11-26 10:43:44,501 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2023-11-26 10:43:44,501 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2023-11-26 10:43:44,501 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2023-11-26 10:43:44,501 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42
[2023-11-26 10:43:44,502 INFO  L87              Difference]: Start difference. First operand 219 states and 292 transitions. cyclomatic complexity: 77 Second operand  has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2023-11-26 10:43:44,720 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2023-11-26 10:43:44,720 INFO  L93              Difference]: Finished difference Result 229 states and 304 transitions.
[2023-11-26 10:43:44,720 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 229 states and 304 transitions.
[2023-11-26 10:43:44,722 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 219
[2023-11-26 10:43:44,725 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 229 states to 229 states and 304 transitions.
[2023-11-26 10:43:44,725 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 229
[2023-11-26 10:43:44,726 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 229
[2023-11-26 10:43:44,726 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 229 states and 304 transitions.
[2023-11-26 10:43:44,726 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2023-11-26 10:43:44,726 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 229 states and 304 transitions.
[2023-11-26 10:43:44,727 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 229 states and 304 transitions.
[2023-11-26 10:43:44,730 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 222.
[2023-11-26 10:43:44,731 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 222 states, 218 states have (on average 1.3302752293577982) internal successors, (290), 217 states have internal predecessors, (290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:43:44,733 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 296 transitions.
[2023-11-26 10:43:44,733 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 222 states and 296 transitions.
[2023-11-26 10:43:44,733 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2023-11-26 10:43:44,734 INFO  L428   stractBuchiCegarLoop]: Abstraction has 222 states and 296 transitions.
[2023-11-26 10:43:44,734 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 10 ============
[2023-11-26 10:43:44,734 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 222 states and 296 transitions.
[2023-11-26 10:43:44,735 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 212
[2023-11-26 10:43:44,736 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:43:44,736 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:43:44,736 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:43:44,737 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2023-11-26 10:43:44,737 INFO  L748   eck$LassoCheckResult]: Stem: 6493#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 6494#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~nondet79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~memset~res99#1.base, main_#t~memset~res99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~nondet105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem121#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~nondet122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 6445#L750-3 
[2023-11-26 10:43:44,737 INFO  L750   eck$LassoCheckResult]: Loop: 6445#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 6408#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6409#L752-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#2(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 6410#L757-269 havoc main_~_ha_hashv~0#1; 6477#L757-176 goto; 6456#L757-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6396#L757-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6397#L757-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 6495#L757-73 assume !main_#t~switch28#1; 6492#L757-75 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 6469#L757-76 assume !main_#t~switch28#1; 6470#L757-78 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 6511#L757-79 assume !main_#t~switch28#1; 6393#L757-81 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 6394#L757-82 assume !main_#t~switch28#1; 6479#L757-84 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 6400#L757-85 assume !main_#t~switch28#1; 6358#L757-87 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 6359#L757-88 assume !main_#t~switch28#1; 6484#L757-90 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 6485#L757-91 assume !main_#t~switch28#1; 6507#L757-93 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 6369#L757-94 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 6370#L757-96 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 6499#L757-97 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 6500#L757-99 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 6505#L757-100 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 6324#L757-102 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 6325#L757-103 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem39#1; 6468#L757-105 havoc main_#t~switch28#1; 6487#L757-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6422#L757-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 6356#L757-113 main_~_hj_i~0#1 := main_#t~nondet40#1;havoc main_#t~nondet40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6357#L757-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 6527#L757-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 6516#L757-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 6517#L757-120 main_~_hj_j~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6528#L757-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 6461#L757-127 main_~_ha_hashv~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6524#L757-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6413#L757-134 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6432#L757-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6353#L757-141 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6354#L757-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6403#L757-148 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6404#L757-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6392#L757-155 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6439#L757-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6440#L757-162 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6447#L757-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6418#L757-169 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1; 6339#L757-170 goto; 6340#L757-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6366#L757-173 goto; 6367#L757-175 goto; 6368#L757-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6424#L757-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 6426#L757-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#2(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#2(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 6416#L757-193 goto; 6378#L757-264 havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#2(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 6379#L757-203 call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#2(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 6331#L757-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~nondet79#1 := 0; 6332#L757-201 main_~_ha_bkt~0#1 := main_#t~nondet79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~nondet79#1; 6383#L757-202 goto; 6395#L757-261 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#2(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6514#L757-205 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 6442#L757-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 6364#L757-208 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#2(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 6365#L757-210 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 6380#L757-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6438#L757-260 goto; 6471#L757-262 havoc main_~_ha_bkt~0#1; 6472#L757-263 goto; 6462#L757-265 goto; 6374#L757-267 havoc main_~_ha_hashv~0#1; 6375#L757-268 goto; 6455#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 6445#L750-3 
[2023-11-26 10:43:44,738 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:44,738 INFO  L85        PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 10 times
[2023-11-26 10:43:44,738 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:44,739 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74616462]
[2023-11-26 10:43:44,739 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:44,739 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:44,747 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:44,747 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2023-11-26 10:43:44,751 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:43:44,759 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2023-11-26 10:43:44,759 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:43:44,759 INFO  L85        PathProgramCache]: Analyzing trace with hash -1867429320, now seen corresponding path program 1 times
[2023-11-26 10:43:44,760 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:43:44,760 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1955724623]
[2023-11-26 10:43:44,760 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:44,760 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:43:44,805 ERROR L246   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2023-11-26 10:43:44,805 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [520519234]
[2023-11-26 10:43:44,805 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:43:44,806 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2023-11-26 10:43:44,806 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:43:44,811 INFO  L229       MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2023-11-26 10:43:44,820 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process
[2023-11-26 10:44:11,284 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:44:11,301 INFO  L262         TraceCheckSpWp]: Trace formula consists of 485 conjuncts, 43 conjunts are in the unsatisfiable core
[2023-11-26 10:44:11,305 INFO  L285         TraceCheckSpWp]: Computing forward predicates...
[2023-11-26 10:44:11,917 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2023-11-26 10:44:11,918 INFO  L323         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2023-11-26 10:44:11,918 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2023-11-26 10:44:11,918 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1955724623]
[2023-11-26 10:44:11,918 WARN  L311   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2023-11-26 10:44:11,918 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [520519234]
[2023-11-26 10:44:11,918 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [520519234] provided 1 perfect and 0 imperfect interpolant sequences
[2023-11-26 10:44:11,918 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2023-11-26 10:44:11,919 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11
[2023-11-26 10:44:11,919 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1438034385]
[2023-11-26 10:44:11,919 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2023-11-26 10:44:11,919 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2023-11-26 10:44:11,919 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2023-11-26 10:44:11,920 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants.
[2023-11-26 10:44:11,920 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110
[2023-11-26 10:44:11,920 INFO  L87              Difference]: Start difference. First operand 222 states and 296 transitions. cyclomatic complexity: 78 Second operand  has 11 states, 11 states have (on average 7.0) internal successors, (77), 11 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2023-11-26 10:44:14,003 WARN  L539   Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.40s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []
[2023-11-26 10:44:15,372 WARN  L539   Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.07s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []
[2023-11-26 10:44:16,430 WARN  L539   Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.01s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []
[2023-11-26 10:44:19,109 WARN  L539   Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.89s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []
[2023-11-26 10:44:21,444 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2023-11-26 10:44:21,445 INFO  L93              Difference]: Finished difference Result 238 states and 316 transitions.
[2023-11-26 10:44:21,445 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 238 states and 316 transitions.
[2023-11-26 10:44:21,450 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 228
[2023-11-26 10:44:21,452 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 238 states to 238 states and 316 transitions.
[2023-11-26 10:44:21,452 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 238
[2023-11-26 10:44:21,453 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 238
[2023-11-26 10:44:21,453 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 238 states and 316 transitions.
[2023-11-26 10:44:21,453 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2023-11-26 10:44:21,454 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 238 states and 316 transitions.
[2023-11-26 10:44:21,454 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 238 states and 316 transitions.
[2023-11-26 10:44:21,459 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 238 to 231.
[2023-11-26 10:44:21,460 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 231 states, 227 states have (on average 1.3215859030837005) internal successors, (300), 226 states have internal predecessors, (300), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2023-11-26 10:44:21,462 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 306 transitions.
[2023-11-26 10:44:21,462 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 231 states and 306 transitions.
[2023-11-26 10:44:21,462 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 
[2023-11-26 10:44:21,463 INFO  L428   stractBuchiCegarLoop]: Abstraction has 231 states and 306 transitions.
[2023-11-26 10:44:21,463 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 11 ============
[2023-11-26 10:44:21,464 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 231 states and 306 transitions.
[2023-11-26 10:44:21,465 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 221
[2023-11-26 10:44:21,465 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2023-11-26 10:44:21,465 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2023-11-26 10:44:21,466 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2023-11-26 10:44:21,466 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2023-11-26 10:44:21,466 INFO  L748   eck$LassoCheckResult]: Stem: 7199#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 7200#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~nondet79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~memset~res99#1.base, main_#t~memset~res99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~nondet105#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem121#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~nondet122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~ite164#1.base, main_#t~ite164#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~short169#1, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~nondet193#1, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1, main_#t~post197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1, main_#t~post208#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite166#1.base, main_#t~ite166#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 7150#L750-3 
[2023-11-26 10:44:21,467 INFO  L750   eck$LassoCheckResult]: Loop: 7150#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 7112#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7113#L752-2 call write~int#2(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#2(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 7114#L757-269 havoc main_~_ha_hashv~0#1; 7183#L757-176 goto; 7162#L757-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7099#L757-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7100#L757-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 7201#L757-73 assume !main_#t~switch28#1; 7195#L757-75 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 7175#L757-76 assume !main_#t~switch28#1; 7176#L757-78 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 7215#L757-79 assume !main_#t~switch28#1; 7097#L757-81 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 7098#L757-82 assume !main_#t~switch28#1; 7185#L757-84 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 7104#L757-85 assume !main_#t~switch28#1; 7062#L757-87 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 7063#L757-88 assume !main_#t~switch28#1; 7190#L757-90 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 7191#L757-91 assume !main_#t~switch28#1; 7212#L757-93 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 7073#L757-94 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 7074#L757-96 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 7205#L757-97 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 7206#L757-99 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 7210#L757-100 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 7028#L757-102 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 7029#L757-103 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem39#1; 7174#L757-105 havoc main_#t~switch28#1; 7194#L757-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7126#L757-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 7127#L757-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 7132#L757-111 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet40#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 7226#L757-113 main_~_hj_i~0#1 := main_#t~nondet40#1;havoc main_#t~nondet40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7241#L757-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 7238#L757-120 main_~_hj_j~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7235#L757-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 7167#L757-127 main_~_ha_hashv~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7232#L757-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7119#L757-134 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7229#L757-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7057#L757-141 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7058#L757-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7109#L757-148 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7110#L757-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7096#L757-155 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7145#L757-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7146#L757-162 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7153#L757-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7122#L757-169 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1; 7043#L757-170 goto; 7044#L757-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7070#L757-173 goto; 7071#L757-175 goto; 7072#L757-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7129#L757-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 7131#L757-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#2(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#2(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#2(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 7120#L757-193 goto; 7082#L757-264 havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#2(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 7083#L757-203 call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#2(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 7035#L757-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~nondet79#1 := 0; 7036#L757-201 main_~_ha_bkt~0#1 := main_#t~nondet79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~nondet79#1; 7087#L757-202 goto; 7101#L757-261 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#2(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#2(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7220#L757-205 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 7148#L757-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 7068#L757-208 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#2(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 7069#L757-210 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 7084#L757-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7144#L757-260 goto; 7177#L757-262 havoc main_~_ha_bkt~0#1; 7178#L757-263 goto; 7168#L757-265 goto; 7080#L757-267 havoc main_~_ha_hashv~0#1; 7081#L757-268 goto; 7161#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 7150#L750-3 
[2023-11-26 10:44:21,467 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:44:21,467 INFO  L85        PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 11 times
[2023-11-26 10:44:21,468 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:44:21,468 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980919270]
[2023-11-26 10:44:21,468 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:44:21,468 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:44:21,486 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:44:21,486 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2023-11-26 10:44:21,493 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2023-11-26 10:44:21,501 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2023-11-26 10:44:21,502 INFO  L160       PredicateUnifier]: Initialized classic predicate unifier
[2023-11-26 10:44:21,502 INFO  L85        PathProgramCache]: Analyzing trace with hash 662135128, now seen corresponding path program 1 times
[2023-11-26 10:44:21,502 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2023-11-26 10:44:21,506 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1994781907]
[2023-11-26 10:44:21,506 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:44:21,506 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2023-11-26 10:44:21,559 ERROR L246   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2023-11-26 10:44:21,560 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2014720985]
[2023-11-26 10:44:21,560 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2023-11-26 10:44:21,560 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2023-11-26 10:44:21,561 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3
[2023-11-26 10:44:21,567 INFO  L229       MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2023-11-26 10:44:21,604 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ba2d949a-6b2c-4763-a8ba-93c4192d3586/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process
[2023-11-26 10:44:22,018 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2023-11-26 10:44:22,021 INFO  L262         TraceCheckSpWp]: Trace formula consists of 485 conjuncts, 16 conjunts are in the unsatisfiable core
[2023-11-26 10:44:22,023 INFO  L285         TraceCheckSpWp]: Computing forward predicates...