./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-crafted/LexIndexValue-Pointer-2.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-crafted/LexIndexValue-Pointer-2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 1bedc761cea545b8144ad4138a379d7139cc98703c76e9b536a2e7389d5b6a10 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:44:44,594 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:44:44,663 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-64bit-Automizer_Default.epf [2023-11-26 11:44:44,669 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:44:44,670 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:44:44,713 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:44:44,714 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:44:44,714 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:44:44,715 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:44:44,716 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:44:44,716 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:44:44,717 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:44:44,717 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:44:44,723 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:44:44,723 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:44:44,724 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:44:44,726 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:44:44,730 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:44:44,731 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:44:44,731 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:44:44,733 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:44:44,734 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:44:44,734 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:44:44,734 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:44:44,735 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:44:44,735 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:44:44,736 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:44:44,736 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:44:44,736 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:44:44,737 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:44:44,738 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:44:44,738 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:44:44,739 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:44:44,739 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:44:44,740 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:44:44,740 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1bedc761cea545b8144ad4138a379d7139cc98703c76e9b536a2e7389d5b6a10 [2023-11-26 11:44:45,010 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:44:45,031 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:44:45,034 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:44:45,035 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:44:45,035 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:44:45,037 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/termination-crafted/LexIndexValue-Pointer-2.c [2023-11-26 11:44:48,209 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:44:48,431 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:44:48,432 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/sv-benchmarks/c/termination-crafted/LexIndexValue-Pointer-2.c [2023-11-26 11:44:48,439 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/data/339b17637/d76fbed6238f4594a3960117084ca86e/FLAG9349ea85c [2023-11-26 11:44:48,455 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/data/339b17637/d76fbed6238f4594a3960117084ca86e [2023-11-26 11:44:48,457 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:44:48,459 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:44:48,461 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:44:48,461 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:44:48,467 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:44:48,467 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,469 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@362fb19a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48, skipping insertion in model container [2023-11-26 11:44:48,469 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,489 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:44:48,649 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:44:48,661 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:44:48,675 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:44:48,690 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:44:48,690 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48 WrapperNode [2023-11-26 11:44:48,690 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:44:48,692 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:44:48,692 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:44:48,692 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:44:48,699 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,706 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,727 INFO L138 Inliner]: procedures = 10, calls = 8, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 49 [2023-11-26 11:44:48,728 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:44:48,729 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:44:48,729 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:44:48,730 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:44:48,741 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,742 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,754 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,776 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2023-11-26 11:44:48,777 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,777 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,790 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,796 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,802 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,805 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,806 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:44:48,809 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:44:48,810 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:44:48,810 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:44:48,811 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (1/1) ... [2023-11-26 11:44:48,818 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:48,832 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:48,852 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:48,878 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:44:48,899 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 11:44:48,899 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 11:44:48,899 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:44:48,900 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:44:48,900 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 11:44:48,901 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 11:44:48,981 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:44:48,984 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:44:49,174 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:44:49,183 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:44:49,183 INFO L309 CfgBuilder]: Removed 2 assume(true) statements. [2023-11-26 11:44:49,185 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:44:49 BoogieIcfgContainer [2023-11-26 11:44:49,185 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:44:49,186 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:44:49,186 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:44:49,190 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:44:49,191 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:44:49,191 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:44:48" (1/3) ... [2023-11-26 11:44:49,192 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3434c36 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:44:49, skipping insertion in model container [2023-11-26 11:44:49,192 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:44:49,193 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:48" (2/3) ... [2023-11-26 11:44:49,193 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3434c36 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:44:49, skipping insertion in model container [2023-11-26 11:44:49,193 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:44:49,194 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:44:49" (3/3) ... [2023-11-26 11:44:49,195 INFO L332 chiAutomizerObserver]: Analyzing ICFG LexIndexValue-Pointer-2.c [2023-11-26 11:44:49,266 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:44:49,267 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:44:49,267 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:44:49,267 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:44:49,268 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:44:49,268 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:44:49,268 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:44:49,269 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:44:49,302 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:49,320 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:44:49,321 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:49,321 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:49,326 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:49,328 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:44:49,328 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:44:49,329 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:49,331 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:44:49,331 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:49,331 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:49,332 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:49,332 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:44:49,356 INFO L748 eck$LassoCheckResult]: Stem: 11#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 9#L18-3true [2023-11-26 11:44:49,356 INFO L750 eck$LassoCheckResult]: Loop: 9#L18-3true assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7#L18-2true main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9#L18-3true [2023-11-26 11:44:49,362 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:49,363 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-26 11:44:49,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:49,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335294626] [2023-11-26 11:44:49,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:49,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:49,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:49,504 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:49,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:49,542 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:49,545 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:49,546 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-26 11:44:49,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:49,546 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1615777881] [2023-11-26 11:44:49,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:49,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:49,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:49,570 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:49,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:49,582 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:49,584 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:49,584 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-26 11:44:49,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:49,585 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670346797] [2023-11-26 11:44:49,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:49,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:49,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:49,615 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:49,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:49,653 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:49,966 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 11:44:49,967 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 11:44:49,967 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 11:44:49,967 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 11:44:49,968 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 11:44:49,968 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:49,968 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 11:44:49,968 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 11:44:49,968 INFO L133 ssoRankerPreferences]: Filename of dumped script: LexIndexValue-Pointer-2.c_Iteration1_Lasso [2023-11-26 11:44:49,968 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 11:44:49,969 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 11:44:50,001 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,014 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,021 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,026 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,030 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,033 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,039 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,046 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,049 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,054 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,057 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,063 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,226 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,229 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:44:50,483 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 11:44:50,488 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 11:44:50,490 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,490 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,493 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,505 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,519 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,519 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:44:50,520 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,520 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,520 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,522 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-26 11:44:50,523 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:44:50,524 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:44:50,542 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:44:50,552 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-26 11:44:50,553 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,553 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,554 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,563 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,575 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-26 11:44:50,576 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,576 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,576 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,576 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,580 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:44:50,581 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:44:50,593 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:44:50,602 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2023-11-26 11:44:50,602 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,602 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,604 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,615 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,627 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,627 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:44:50,628 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,628 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,628 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,629 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:44:50,629 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:44:50,631 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-26 11:44:50,635 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:44:50,644 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2023-11-26 11:44:50,645 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,646 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,647 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,654 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-26 11:44:50,654 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,667 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,667 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:44:50,667 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,668 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,668 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,669 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:44:50,669 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:44:50,674 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:44:50,683 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-26 11:44:50,683 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,684 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,685 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,695 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,708 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,708 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:44:50,708 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,708 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,709 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,710 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:44:50,710 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:44:50,711 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-26 11:44:50,729 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:44:50,734 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2023-11-26 11:44:50,738 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,738 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,740 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,747 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,747 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-26 11:44:50,757 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,757 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:44:50,758 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,758 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,758 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,759 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:44:50,759 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:44:50,760 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:44:50,768 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2023-11-26 11:44:50,768 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,769 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,770 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,772 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-26 11:44:50,772 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,783 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,783 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:44:50,783 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,783 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,783 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,784 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:44:50,784 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:44:50,786 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:44:50,789 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2023-11-26 11:44:50,789 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,790 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,791 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,793 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-26 11:44:50,794 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,804 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,804 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:44:50,804 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,805 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,805 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,805 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:44:50,805 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:44:50,807 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:44:50,815 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2023-11-26 11:44:50,815 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,815 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,816 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,818 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-26 11:44:50,819 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,829 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,829 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:44:50,829 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,829 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,829 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,830 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:44:50,830 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:44:50,831 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:44:50,835 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2023-11-26 11:44:50,836 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,836 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,837 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,842 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-26 11:44:50,843 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,852 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,853 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:44:50,853 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,853 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,853 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,854 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:44:50,854 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:44:50,859 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:44:50,870 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2023-11-26 11:44:50,871 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,871 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,872 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,873 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2023-11-26 11:44:50,874 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,884 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,885 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:44:50,885 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,885 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,885 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,886 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:44:50,886 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:44:50,888 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:44:50,891 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2023-11-26 11:44:50,891 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,891 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,892 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,894 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2023-11-26 11:44:50,895 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:44:50,905 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:44:50,905 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:44:50,906 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:44:50,906 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:44:50,914 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:44:50,914 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:44:50,949 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 11:44:50,991 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2023-11-26 11:44:50,991 INFO L444 ModelExtractionUtils]: 2 out of 16 variables were initially zero. Simplification set additionally 11 variables to zero. [2023-11-26 11:44:50,993 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:50,993 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:51,017 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:51,024 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 11:44:51,034 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2023-11-26 11:44:51,045 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-26 11:44:51,045 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 11:44:51,046 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~p~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 2095*v_rep(select #length ULTIMATE.start_main_~p~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2023-11-26 11:44:51,049 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2023-11-26 11:44:51,061 INFO L156 tatePredicateManager]: 2 out of 3 supporting invariants were superfluous and have been removed [2023-11-26 11:44:51,071 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~p~0!base] could not be translated [2023-11-26 11:44:51,103 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:51,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:51,123 INFO L262 TraceCheckSpWp]: Trace formula consists of 23 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 11:44:51,126 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:51,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:51,142 WARN L260 TraceCheckSpWp]: Trace formula consists of 15 conjuncts, 8 conjunts are in the unsatisfiable core [2023-11-26 11:44:51,143 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:51,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:51,243 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 11:44:51,246 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:51,320 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 25 states and 37 transitions. Complement of second has 8 states. [2023-11-26 11:44:51,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 11:44:51,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:51,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 18 transitions. [2023-11-26 11:44:51,328 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-26 11:44:51,329 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:44:51,329 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-26 11:44:51,329 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:44:51,329 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-26 11:44:51,330 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:44:51,330 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 37 transitions. [2023-11-26 11:44:51,333 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:51,336 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 10 states and 14 transitions. [2023-11-26 11:44:51,337 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-26 11:44:51,338 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-26 11:44:51,338 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 14 transitions. [2023-11-26 11:44:51,339 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:51,339 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 14 transitions. [2023-11-26 11:44:51,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 14 transitions. [2023-11-26 11:44:51,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2023-11-26 11:44:51,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.4) internal successors, (14), 9 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:51,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 14 transitions. [2023-11-26 11:44:51,361 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 14 transitions. [2023-11-26 11:44:51,361 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 14 transitions. [2023-11-26 11:44:51,361 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:44:51,361 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 14 transitions. [2023-11-26 11:44:51,362 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:51,362 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:51,362 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:51,362 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-26 11:44:51,362 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:44:51,363 INFO L748 eck$LassoCheckResult]: Stem: 102#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 103#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 100#L18-3 assume !(main_~i~0#1 < 1048); 99#L18-4 havoc main_~i~0#1;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 98#L23-2 [2023-11-26 11:44:51,363 INFO L750 eck$LassoCheckResult]: Loop: 98#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 94#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 95#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1; 101#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 98#L23-2 [2023-11-26 11:44:51,363 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:51,363 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2023-11-26 11:44:51,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:51,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [318084832] [2023-11-26 11:44:51,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:51,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:51,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:51,418 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:51,418 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:51,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [318084832] [2023-11-26 11:44:51,419 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [318084832] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:51,419 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:51,419 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:44:51,419 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [651333924] [2023-11-26 11:44:51,420 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:51,422 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:44:51,423 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:51,423 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 1 times [2023-11-26 11:44:51,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:51,423 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2130306114] [2023-11-26 11:44:51,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:51,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:51,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:51,431 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:51,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:51,438 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:51,562 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:51,564 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 11:44:51,565 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 11:44:51,566 INFO L87 Difference]: Start difference. First operand 10 states and 14 transitions. cyclomatic complexity: 6 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:51,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:51,580 INFO L93 Difference]: Finished difference Result 11 states and 14 transitions. [2023-11-26 11:44:51,580 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 14 transitions. [2023-11-26 11:44:51,582 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:51,583 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 14 transitions. [2023-11-26 11:44:51,584 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-26 11:44:51,584 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-26 11:44:51,584 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 14 transitions. [2023-11-26 11:44:51,584 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:51,584 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 14 transitions. [2023-11-26 11:44:51,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 14 transitions. [2023-11-26 11:44:51,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 10. [2023-11-26 11:44:51,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:51,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 13 transitions. [2023-11-26 11:44:51,587 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2023-11-26 11:44:51,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 11:44:51,589 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2023-11-26 11:44:51,589 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:44:51,589 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 13 transitions. [2023-11-26 11:44:51,590 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:51,591 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:51,591 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:51,591 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2023-11-26 11:44:51,591 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:44:51,592 INFO L748 eck$LassoCheckResult]: Stem: 129#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 130#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 126#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 123#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 124#L18-3 assume !(main_~i~0#1 < 1048); 127#L18-4 havoc main_~i~0#1;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 125#L23-2 [2023-11-26 11:44:51,592 INFO L750 eck$LassoCheckResult]: Loop: 125#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 121#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 122#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1; 128#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 125#L23-2 [2023-11-26 11:44:51,592 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:51,592 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2023-11-26 11:44:51,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:51,597 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2078733532] [2023-11-26 11:44:51,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:51,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:51,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:51,708 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:51,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:51,708 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2078733532] [2023-11-26 11:44:51,709 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2078733532] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:44:51,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1510331209] [2023-11-26 11:44:51,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:51,709 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:51,709 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:51,714 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:51,744 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2023-11-26 11:44:51,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:51,768 INFO L262 TraceCheckSpWp]: Trace formula consists of 39 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:44:51,768 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:51,781 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:51,781 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:44:51,799 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:51,800 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1510331209] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:44:51,800 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:44:51,800 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-26 11:44:51,800 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [778600684] [2023-11-26 11:44:51,800 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:44:51,801 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:44:51,801 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:51,801 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 2 times [2023-11-26 11:44:51,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:51,802 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853759436] [2023-11-26 11:44:51,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:51,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:51,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:51,808 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:51,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:51,813 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:51,924 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:51,924 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:44:51,925 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:44:51,925 INFO L87 Difference]: Start difference. First operand 10 states and 13 transitions. cyclomatic complexity: 5 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:51,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:51,952 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2023-11-26 11:44:51,952 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 19 transitions. [2023-11-26 11:44:51,953 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:51,954 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 19 transitions. [2023-11-26 11:44:51,954 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-26 11:44:51,954 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-26 11:44:51,954 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 19 transitions. [2023-11-26 11:44:51,954 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:51,954 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 19 transitions. [2023-11-26 11:44:51,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 19 transitions. [2023-11-26 11:44:51,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2023-11-26 11:44:51,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.1875) internal successors, (19), 15 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:51,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 19 transitions. [2023-11-26 11:44:51,956 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 19 transitions. [2023-11-26 11:44:51,957 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:44:51,958 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 19 transitions. [2023-11-26 11:44:51,958 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:44:51,958 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 19 transitions. [2023-11-26 11:44:51,959 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:51,959 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:51,959 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:51,959 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2023-11-26 11:44:51,959 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:44:51,960 INFO L748 eck$LassoCheckResult]: Stem: 196#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 197#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 192#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 193#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 194#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 189#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 190#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 202#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 201#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 200#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 199#L18-3 assume !(main_~i~0#1 < 1048); 195#L18-4 havoc main_~i~0#1;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 191#L23-2 [2023-11-26 11:44:51,960 INFO L750 eck$LassoCheckResult]: Loop: 191#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 187#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 188#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1; 198#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 191#L23-2 [2023-11-26 11:44:51,960 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:51,960 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2023-11-26 11:44:51,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:51,961 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191676789] [2023-11-26 11:44:51,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:51,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:51,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:52,109 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:52,110 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:52,110 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191676789] [2023-11-26 11:44:52,110 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [191676789] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:44:52,110 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1601381797] [2023-11-26 11:44:52,111 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 11:44:52,111 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:52,111 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:52,122 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:52,145 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2023-11-26 11:44:52,193 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 11:44:52,193 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:44:52,194 INFO L262 TraceCheckSpWp]: Trace formula consists of 72 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 11:44:52,197 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:52,232 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:52,233 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:44:52,322 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:52,322 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1601381797] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:44:52,323 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:44:52,323 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-26 11:44:52,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1645679561] [2023-11-26 11:44:52,323 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:44:52,324 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:44:52,324 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:52,324 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 3 times [2023-11-26 11:44:52,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:52,325 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1037442391] [2023-11-26 11:44:52,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:52,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:52,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:52,330 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:52,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:52,335 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:52,442 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:52,443 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-26 11:44:52,443 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2023-11-26 11:44:52,444 INFO L87 Difference]: Start difference. First operand 16 states and 19 transitions. cyclomatic complexity: 5 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:52,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:52,498 INFO L93 Difference]: Finished difference Result 28 states and 31 transitions. [2023-11-26 11:44:52,498 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 31 transitions. [2023-11-26 11:44:52,507 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:52,508 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 31 transitions. [2023-11-26 11:44:52,508 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-26 11:44:52,508 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-26 11:44:52,508 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 31 transitions. [2023-11-26 11:44:52,509 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:52,509 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 31 transitions. [2023-11-26 11:44:52,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 31 transitions. [2023-11-26 11:44:52,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2023-11-26 11:44:52,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1071428571428572) internal successors, (31), 27 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:52,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 31 transitions. [2023-11-26 11:44:52,515 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 31 transitions. [2023-11-26 11:44:52,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-26 11:44:52,516 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 31 transitions. [2023-11-26 11:44:52,517 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 11:44:52,517 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 31 transitions. [2023-11-26 11:44:52,518 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:52,518 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:52,518 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:52,519 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2023-11-26 11:44:52,519 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:44:52,520 INFO L748 eck$LassoCheckResult]: Stem: 322#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 323#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 318#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 319#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 320#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 315#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 316#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 340#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 339#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 338#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 337#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 336#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 335#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 334#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 333#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 332#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 331#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 330#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 329#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 328#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 327#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 326#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 325#L18-3 assume !(main_~i~0#1 < 1048); 321#L18-4 havoc main_~i~0#1;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 317#L23-2 [2023-11-26 11:44:52,520 INFO L750 eck$LassoCheckResult]: Loop: 317#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 313#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 314#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1; 324#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 317#L23-2 [2023-11-26 11:44:52,520 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:52,520 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2023-11-26 11:44:52,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:52,521 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048971355] [2023-11-26 11:44:52,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:52,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:52,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:52,847 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2023-11-26 11:44:52,859 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:52,859 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:52,859 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1048971355] [2023-11-26 11:44:52,860 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1048971355] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:44:52,860 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1822873842] [2023-11-26 11:44:52,860 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 11:44:52,860 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:52,860 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:52,861 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:52,890 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2023-11-26 11:44:53,028 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2023-11-26 11:44:53,028 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:44:53,030 INFO L262 TraceCheckSpWp]: Trace formula consists of 138 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-26 11:44:53,032 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:53,097 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:53,097 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:44:53,377 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:53,377 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1822873842] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:44:53,377 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:44:53,377 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2023-11-26 11:44:53,377 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1194620658] [2023-11-26 11:44:53,377 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:44:53,378 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:44:53,378 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:53,378 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 4 times [2023-11-26 11:44:53,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:53,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565003531] [2023-11-26 11:44:53,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:53,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:53,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:53,383 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:53,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:53,387 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:53,493 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:53,494 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-26 11:44:53,495 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2023-11-26 11:44:53,495 INFO L87 Difference]: Start difference. First operand 28 states and 31 transitions. cyclomatic complexity: 5 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:53,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:53,598 INFO L93 Difference]: Finished difference Result 52 states and 55 transitions. [2023-11-26 11:44:53,598 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 55 transitions. [2023-11-26 11:44:53,600 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:53,601 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 52 states and 55 transitions. [2023-11-26 11:44:53,601 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-26 11:44:53,601 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-26 11:44:53,601 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 55 transitions. [2023-11-26 11:44:53,602 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:53,602 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 55 transitions. [2023-11-26 11:44:53,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 55 transitions. [2023-11-26 11:44:53,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2023-11-26 11:44:53,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0576923076923077) internal successors, (55), 51 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:53,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 55 transitions. [2023-11-26 11:44:53,607 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 55 transitions. [2023-11-26 11:44:53,607 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2023-11-26 11:44:53,608 INFO L428 stractBuchiCegarLoop]: Abstraction has 52 states and 55 transitions. [2023-11-26 11:44:53,608 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 11:44:53,609 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 55 transitions. [2023-11-26 11:44:53,610 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:53,610 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:53,610 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:53,612 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2023-11-26 11:44:53,612 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:44:53,613 INFO L748 eck$LassoCheckResult]: Stem: 569#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 570#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 564#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 565#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 566#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 561#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 562#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 610#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 609#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 608#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 607#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 606#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 605#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 604#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 603#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 602#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 601#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 600#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 599#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 598#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 597#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 596#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 595#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 594#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 593#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 592#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 591#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 590#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 589#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 588#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 587#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 586#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 585#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 584#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 583#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 582#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 581#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 580#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 579#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 578#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 577#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 576#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 575#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 574#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 573#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 572#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 571#L18-3 assume !(main_~i~0#1 < 1048); 567#L18-4 havoc main_~i~0#1;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 563#L23-2 [2023-11-26 11:44:53,613 INFO L750 eck$LassoCheckResult]: Loop: 563#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 559#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 560#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1; 568#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 563#L23-2 [2023-11-26 11:44:53,613 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:53,613 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2023-11-26 11:44:53,614 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:53,614 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722286914] [2023-11-26 11:44:53,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:53,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:53,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:54,413 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:54,413 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:54,413 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [722286914] [2023-11-26 11:44:54,413 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [722286914] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:44:54,414 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [381059363] [2023-11-26 11:44:54,414 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-26 11:44:54,414 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:54,414 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:54,421 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:54,424 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2023-11-26 11:44:54,557 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-26 11:44:54,558 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:44:54,560 INFO L262 TraceCheckSpWp]: Trace formula consists of 270 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-26 11:44:54,564 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:54,672 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:54,672 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:44:55,633 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:55,634 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [381059363] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:44:55,634 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:44:55,634 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2023-11-26 11:44:55,634 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [485496587] [2023-11-26 11:44:55,634 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:44:55,635 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:44:55,635 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:55,635 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 5 times [2023-11-26 11:44:55,636 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:55,636 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1739514234] [2023-11-26 11:44:55,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:55,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:55,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:55,641 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:55,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:55,646 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:55,747 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:55,748 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2023-11-26 11:44:55,749 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2023-11-26 11:44:55,750 INFO L87 Difference]: Start difference. First operand 52 states and 55 transitions. cyclomatic complexity: 5 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:55,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:55,958 INFO L93 Difference]: Finished difference Result 100 states and 103 transitions. [2023-11-26 11:44:55,958 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 103 transitions. [2023-11-26 11:44:55,961 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:55,963 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 103 transitions. [2023-11-26 11:44:55,963 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-26 11:44:55,963 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-26 11:44:55,963 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 103 transitions. [2023-11-26 11:44:55,964 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:55,964 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 103 transitions. [2023-11-26 11:44:55,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 103 transitions. [2023-11-26 11:44:55,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2023-11-26 11:44:55,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.03) internal successors, (103), 99 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:55,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 103 transitions. [2023-11-26 11:44:55,972 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 103 transitions. [2023-11-26 11:44:55,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-26 11:44:55,973 INFO L428 stractBuchiCegarLoop]: Abstraction has 100 states and 103 transitions. [2023-11-26 11:44:55,973 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 11:44:55,974 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 103 transitions. [2023-11-26 11:44:55,975 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:44:55,975 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:55,975 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:55,979 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2023-11-26 11:44:55,979 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:44:55,980 INFO L748 eck$LassoCheckResult]: Stem: 1055#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1056#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 1050#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1051#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1052#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1047#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1048#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1144#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1143#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1142#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1141#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1140#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1139#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1138#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1137#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1136#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1135#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1134#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1133#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1132#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1131#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1130#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1129#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1128#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1127#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1126#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1125#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1124#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1123#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1122#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1121#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1120#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1119#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1118#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1117#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1116#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1115#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1114#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1113#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1112#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1111#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1110#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1109#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1108#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1107#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1106#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1105#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1104#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1103#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1102#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1101#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1100#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1099#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1098#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1097#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1096#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1095#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1094#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1093#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1092#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1091#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1090#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1089#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1088#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1087#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1086#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1085#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1084#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1083#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1082#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1081#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1080#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1079#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1078#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1077#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1076#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1075#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1074#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1073#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1072#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1071#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1070#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1069#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1068#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1067#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1066#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1065#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1064#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1063#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1062#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1061#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1060#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1059#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1058#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1057#L18-3 assume !(main_~i~0#1 < 1048); 1053#L18-4 havoc main_~i~0#1;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 1049#L23-2 [2023-11-26 11:44:55,980 INFO L750 eck$LassoCheckResult]: Loop: 1049#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 1045#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 1046#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1; 1054#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 1049#L23-2 [2023-11-26 11:44:55,981 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:55,981 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2023-11-26 11:44:55,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:55,981 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1546697937] [2023-11-26 11:44:55,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:55,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:56,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:58,742 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:58,742 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:58,742 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1546697937] [2023-11-26 11:44:58,742 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1546697937] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:44:58,742 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [149280252] [2023-11-26 11:44:58,742 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-26 11:44:58,742 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:58,743 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:58,750 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:58,779 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2023-11-26 11:45:03,280 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2023-11-26 11:45:03,280 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:45:03,287 INFO L262 TraceCheckSpWp]: Trace formula consists of 534 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-26 11:45:03,294 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:45:03,486 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:03,486 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:45:06,899 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:06,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [149280252] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:45:06,899 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:45:06,899 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2023-11-26 11:45:06,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755757224] [2023-11-26 11:45:06,900 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:45:06,902 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:45:06,903 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:06,903 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 6 times [2023-11-26 11:45:06,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:06,904 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100299290] [2023-11-26 11:45:06,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:06,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:06,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:06,915 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:06,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:06,933 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:07,030 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:45:07,031 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2023-11-26 11:45:07,035 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2023-11-26 11:45:07,036 INFO L87 Difference]: Start difference. First operand 100 states and 103 transitions. cyclomatic complexity: 5 Second operand has 97 states, 97 states have (on average 1.9896907216494846) internal successors, (193), 97 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:07,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:45:07,521 INFO L93 Difference]: Finished difference Result 196 states and 199 transitions. [2023-11-26 11:45:07,521 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 196 states and 199 transitions. [2023-11-26 11:45:07,527 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:45:07,533 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 196 states to 196 states and 199 transitions. [2023-11-26 11:45:07,533 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-26 11:45:07,534 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-26 11:45:07,534 INFO L73 IsDeterministic]: Start isDeterministic. Operand 196 states and 199 transitions. [2023-11-26 11:45:07,540 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:45:07,541 INFO L218 hiAutomatonCegarLoop]: Abstraction has 196 states and 199 transitions. [2023-11-26 11:45:07,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states and 199 transitions. [2023-11-26 11:45:07,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2023-11-26 11:45:07,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0153061224489797) internal successors, (199), 195 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:07,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 199 transitions. [2023-11-26 11:45:07,561 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 199 transitions. [2023-11-26 11:45:07,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2023-11-26 11:45:07,564 INFO L428 stractBuchiCegarLoop]: Abstraction has 196 states and 199 transitions. [2023-11-26 11:45:07,564 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 11:45:07,564 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 199 transitions. [2023-11-26 11:45:07,567 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:45:07,567 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:07,567 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:07,583 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2023-11-26 11:45:07,583 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:45:07,584 INFO L748 eck$LassoCheckResult]: Stem: 2020#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2021#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 2016#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2017#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2018#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2013#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2014#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2206#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2205#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2204#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2203#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2202#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2201#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2200#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2199#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2198#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2197#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2196#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2195#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2194#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2193#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2192#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2191#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2190#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2189#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2188#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2187#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2186#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2185#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2184#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2183#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2182#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2181#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2180#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2179#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2178#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2177#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2176#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2175#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2174#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2173#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2172#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2171#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2170#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2169#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2168#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2167#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2166#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2165#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2164#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2163#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2162#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2161#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2160#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2159#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2158#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2157#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2156#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2155#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2154#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2153#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2152#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2151#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2150#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2149#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2148#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2147#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2146#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2145#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2144#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2143#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2142#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2141#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2140#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2139#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2138#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2137#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2136#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2135#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2134#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2133#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2132#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2131#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2130#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2129#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2128#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2127#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2126#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2125#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2124#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2123#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2122#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2121#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2120#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2119#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2118#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2117#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2116#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2115#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2114#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2113#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2112#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2111#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2110#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2109#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2108#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2107#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2106#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2105#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2104#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2103#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2102#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2101#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2100#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2099#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2098#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2097#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2096#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2095#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2094#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2093#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2092#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2091#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2090#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2089#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2088#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2087#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2086#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2085#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2084#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2083#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2082#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2081#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2080#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2079#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2078#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2077#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2076#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2075#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2074#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2073#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2072#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2071#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2070#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2069#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2068#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2067#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2066#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2065#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2064#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2063#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2062#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2061#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2060#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2059#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2058#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2057#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2056#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2055#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2054#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2053#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2052#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2051#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2050#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2049#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2048#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2047#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2046#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2045#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2044#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2043#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2042#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2041#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2040#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2039#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2038#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2037#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2036#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2035#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2034#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2033#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2032#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2031#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2030#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2029#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2028#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2027#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2026#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2025#L18-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet3#1;call write~int#0(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2024#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2023#L18-3 assume !(main_~i~0#1 < 1048); 2019#L18-4 havoc main_~i~0#1;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 2015#L23-2 [2023-11-26 11:45:07,585 INFO L750 eck$LassoCheckResult]: Loop: 2015#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 2011#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 2012#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1; 2022#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 2015#L23-2 [2023-11-26 11:45:07,585 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:07,585 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2023-11-26 11:45:07,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:07,586 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498993724] [2023-11-26 11:45:07,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:07,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:07,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:15,474 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:15,474 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:15,474 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [498993724] [2023-11-26 11:45:15,475 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [498993724] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:45:15,475 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1553373900] [2023-11-26 11:45:15,475 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-26 11:45:15,475 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:45:15,475 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:15,486 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:45:15,492 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_04f961b0-d941-4110-9622-c67ae2ee1a2a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process