./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/array-examples/data_structures_set_multi_proc_trivial_ground.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/array-examples/data_structures_set_multi_proc_trivial_ground.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0286582125bb2879636b8cf3b934bed172850a3a3b0d880c07306d10439134a7 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 10:48:26,458 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 10:48:26,599 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 10:48:26,611 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 10:48:26,613 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 10:48:26,661 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 10:48:26,663 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 10:48:26,664 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 10:48:26,665 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 10:48:26,671 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 10:48:26,672 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 10:48:26,673 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 10:48:26,673 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 10:48:26,676 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 10:48:26,677 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 10:48:26,677 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 10:48:26,678 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 10:48:26,678 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 10:48:26,679 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 10:48:26,680 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 10:48:26,680 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 10:48:26,681 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 10:48:26,681 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 10:48:26,682 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 10:48:26,682 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 10:48:26,683 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 10:48:26,683 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 10:48:26,684 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 10:48:26,685 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 10:48:26,685 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 10:48:26,687 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 10:48:26,687 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 10:48:26,687 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 10:48:26,688 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 10:48:26,688 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 10:48:26,689 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 10:48:26,689 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 10:48:26,690 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 10:48:26,690 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0286582125bb2879636b8cf3b934bed172850a3a3b0d880c07306d10439134a7 [2023-11-26 10:48:27,063 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 10:48:27,106 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 10:48:27,109 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 10:48:27,111 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 10:48:27,111 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 10:48:27,113 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/array-examples/data_structures_set_multi_proc_trivial_ground.i [2023-11-26 10:48:30,264 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 10:48:30,538 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 10:48:30,538 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/sv-benchmarks/c/array-examples/data_structures_set_multi_proc_trivial_ground.i [2023-11-26 10:48:30,549 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/data/da5c275f3/23597a944b02448083f7c016016071aa/FLAGd6ed4e717 [2023-11-26 10:48:30,567 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/data/da5c275f3/23597a944b02448083f7c016016071aa [2023-11-26 10:48:30,573 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 10:48:30,576 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 10:48:30,579 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 10:48:30,580 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 10:48:30,585 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 10:48:30,586 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:30,587 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@72799771 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30, skipping insertion in model container [2023-11-26 10:48:30,588 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:30,617 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 10:48:30,885 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 10:48:30,901 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 10:48:30,930 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 10:48:30,949 INFO L206 MainTranslator]: Completed translation [2023-11-26 10:48:30,950 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30 WrapperNode [2023-11-26 10:48:30,950 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 10:48:30,951 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 10:48:30,952 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 10:48:30,952 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 10:48:30,961 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:30,984 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:31,018 INFO L138 Inliner]: procedures = 18, calls = 30, calls flagged for inlining = 8, calls inlined = 10, statements flattened = 179 [2023-11-26 10:48:31,018 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 10:48:31,019 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 10:48:31,020 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 10:48:31,020 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 10:48:31,034 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:31,034 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:31,039 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:31,060 INFO L175 MemorySlicer]: Split 14 memory accesses to 3 slices as follows [2, 3, 9]. 64 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 3 writes are split as follows [0, 1, 2]. [2023-11-26 10:48:31,061 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:31,061 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:31,071 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:31,087 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:31,089 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:31,090 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:31,094 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 10:48:31,095 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 10:48:31,095 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 10:48:31,095 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 10:48:31,096 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (1/1) ... [2023-11-26 10:48:31,111 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:31,126 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:31,155 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:31,183 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 10:48:31,207 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 10:48:31,208 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 10:48:31,208 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 10:48:31,208 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 10:48:31,208 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 10:48:31,209 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 10:48:31,209 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 10:48:31,209 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 10:48:31,209 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 10:48:31,209 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 10:48:31,210 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 10:48:31,210 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 10:48:31,210 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 10:48:31,210 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 10:48:31,341 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 10:48:31,344 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 10:48:31,659 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 10:48:31,674 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 10:48:31,674 INFO L309 CfgBuilder]: Removed 10 assume(true) statements. [2023-11-26 10:48:31,676 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:48:31 BoogieIcfgContainer [2023-11-26 10:48:31,676 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 10:48:31,677 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 10:48:31,678 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 10:48:31,682 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 10:48:31,682 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:48:31,683 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 10:48:30" (1/3) ... [2023-11-26 10:48:31,684 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2ed991b9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:48:31, skipping insertion in model container [2023-11-26 10:48:31,684 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:48:31,684 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:30" (2/3) ... [2023-11-26 10:48:31,684 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2ed991b9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:48:31, skipping insertion in model container [2023-11-26 10:48:31,685 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:48:31,685 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:48:31" (3/3) ... [2023-11-26 10:48:31,686 INFO L332 chiAutomizerObserver]: Analyzing ICFG data_structures_set_multi_proc_trivial_ground.i [2023-11-26 10:48:31,757 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 10:48:31,757 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 10:48:31,757 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 10:48:31,757 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 10:48:31,758 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 10:48:31,758 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 10:48:31,758 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 10:48:31,758 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 10:48:31,765 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 51 states, 50 states have (on average 1.56) internal successors, (78), 50 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:31,790 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 41 [2023-11-26 10:48:31,792 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:31,792 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:31,799 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:31,799 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 10:48:31,799 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 10:48:31,800 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 51 states, 50 states have (on average 1.56) internal successors, (78), 50 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:31,805 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 41 [2023-11-26 10:48:31,805 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:31,805 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:31,806 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:31,806 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 10:48:31,814 INFO L748 eck$LassoCheckResult]: Stem: 23#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2); 26#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~post3#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~post6#1, main_#t~post5#1, main_#t~nondet10#1, main_#t~post9#1, main_#t~mem12#1, main_#t~ret13#1, main_#t~mem14#1, main_#t~ret15#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post17#1, main_#t~post16#1, main_#t~post11#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post21#1, main_#t~post20#1, main_~n~0#1, main_~#set~0#1.base, main_~#set~0#1.offset, main_~x~0#1, main_~y~0#1, main_~#values~0#1.base, main_~#values~0#1.offset, main_~v~0#1;main_~n~0#1 := 0;call main_~#set~0#1.base, main_~#set~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~x~0#1;havoc main_~y~0#1;main_~x~0#1 := 0; 50#L33-3true [2023-11-26 10:48:31,815 INFO L750 eck$LassoCheckResult]: Loop: 50#L33-3true assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 15#L33-2true main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 50#L33-3true [2023-11-26 10:48:31,821 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:31,821 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-26 10:48:31,829 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:31,829 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [426322957] [2023-11-26 10:48:31,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:31,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:31,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:31,928 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:31,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:31,957 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:31,959 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:31,960 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-26 10:48:31,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:31,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520675502] [2023-11-26 10:48:31,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:31,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:31,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:31,973 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:31,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:31,983 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:31,984 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:31,985 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-26 10:48:31,985 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:31,985 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1551104758] [2023-11-26 10:48:31,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:31,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:32,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:32,011 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:32,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:32,041 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:32,460 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 10:48:32,461 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 10:48:32,461 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 10:48:32,461 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 10:48:32,461 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 10:48:32,462 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:32,462 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 10:48:32,462 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 10:48:32,462 INFO L133 ssoRankerPreferences]: Filename of dumped script: data_structures_set_multi_proc_trivial_ground.i_Iteration1_Lasso [2023-11-26 10:48:32,462 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 10:48:32,463 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 10:48:32,485 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,496 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,501 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,506 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,510 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,769 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,773 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,777 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,781 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,786 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,790 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,793 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,798 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,802 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,806 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,810 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,825 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,831 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,835 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,838 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,841 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,845 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,849 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,852 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,855 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,859 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,865 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,868 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:32,872 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:33,219 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 10:48:33,224 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 10:48:33,226 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,226 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,232 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,244 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,257 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-26 10:48:33,257 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,258 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:48:33,259 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,259 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,259 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,262 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:48:33,262 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:48:33,276 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:33,286 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,287 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,287 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,289 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,293 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,304 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-26 10:48:33,306 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,306 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:48:33,306 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,307 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,307 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,308 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:48:33,308 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:48:33,310 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:33,314 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,315 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,315 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,324 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,331 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,346 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,346 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:48:33,346 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,346 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,346 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,348 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-26 10:48:33,348 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:48:33,348 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:48:33,352 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:33,356 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,356 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,357 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,358 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,361 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-26 10:48:33,362 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,375 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,375 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:48:33,375 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,376 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,376 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,377 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:48:33,377 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:48:33,387 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:33,392 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,393 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,393 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,395 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,405 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,413 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-26 10:48:33,417 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,418 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,418 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,418 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,423 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:48:33,423 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:48:33,444 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:33,453 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,453 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,453 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,455 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,460 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-26 10:48:33,461 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,474 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,474 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,474 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,474 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,478 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:48:33,478 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:48:33,496 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:33,504 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,505 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,505 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,506 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-26 10:48:33,516 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,529 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,529 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,529 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,530 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,534 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:48:33,534 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:48:33,547 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:33,552 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,552 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,552 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,555 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,569 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-26 10:48:33,569 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,584 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,585 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,585 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,585 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,589 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:48:33,589 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:48:33,601 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:33,610 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,611 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,611 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,612 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,625 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,639 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-26 10:48:33,639 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,640 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:48:33,640 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,640 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,640 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,641 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:48:33,641 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:48:33,656 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:33,668 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,668 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,668 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,669 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,679 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,695 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-26 10:48:33,696 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,696 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,696 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,696 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,701 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:48:33,701 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:48:33,713 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:33,720 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,720 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,720 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,721 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,725 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2023-11-26 10:48:33,725 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,740 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,741 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,741 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,741 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,744 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:48:33,744 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:48:33,764 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:33,773 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,774 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,774 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,775 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,786 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:33,800 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2023-11-26 10:48:33,801 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:33,801 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:33,802 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:33,802 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:33,808 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 10:48:33,808 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 10:48:33,832 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 10:48:33,869 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2023-11-26 10:48:33,869 INFO L444 ModelExtractionUtils]: 1 out of 13 variables were initially zero. Simplification set additionally 9 variables to zero. [2023-11-26 10:48:33,871 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:33,871 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:33,918 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:33,919 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2023-11-26 10:48:33,920 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 10:48:33,952 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-26 10:48:33,952 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 10:48:33,953 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~x~0#1, v_rep(select #length ULTIMATE.start_main_~#set~0#1.base)_1) = -8*ULTIMATE.start_main_~x~0#1 + 199999*v_rep(select #length ULTIMATE.start_main_~#set~0#1.base)_1 Supporting invariants [] [2023-11-26 10:48:33,966 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:33,984 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2023-11-26 10:48:33,995 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#set~0!base] could not be translated [2023-11-26 10:48:34,015 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:34,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:34,043 INFO L262 TraceCheckSpWp]: Trace formula consists of 33 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 10:48:34,044 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:34,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:34,064 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 10:48:34,065 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:34,116 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:34,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:34,181 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 10:48:34,183 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 51 states, 50 states have (on average 1.56) internal successors, (78), 50 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:34,259 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 51 states, 50 states have (on average 1.56) internal successors, (78), 50 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 101 states and 157 transitions. Complement of second has 8 states. [2023-11-26 10:48:34,263 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 10:48:34,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:34,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 78 transitions. [2023-11-26 10:48:34,281 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 78 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-26 10:48:34,281 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:48:34,282 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 78 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-26 10:48:34,282 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:48:34,282 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 78 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-26 10:48:34,282 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:48:34,284 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 157 transitions. [2023-11-26 10:48:34,301 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 39 [2023-11-26 10:48:34,306 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 48 states and 74 transitions. [2023-11-26 10:48:34,307 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 45 [2023-11-26 10:48:34,313 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2023-11-26 10:48:34,314 INFO L73 IsDeterministic]: Start isDeterministic. Operand 48 states and 74 transitions. [2023-11-26 10:48:34,314 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:34,315 INFO L218 hiAutomatonCegarLoop]: Abstraction has 48 states and 74 transitions. [2023-11-26 10:48:34,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states and 74 transitions. [2023-11-26 10:48:34,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2023-11-26 10:48:34,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 48 states have (on average 1.5416666666666667) internal successors, (74), 47 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:34,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 74 transitions. [2023-11-26 10:48:34,362 INFO L240 hiAutomatonCegarLoop]: Abstraction has 48 states and 74 transitions. [2023-11-26 10:48:34,362 INFO L428 stractBuchiCegarLoop]: Abstraction has 48 states and 74 transitions. [2023-11-26 10:48:34,363 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 10:48:34,363 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 48 states and 74 transitions. [2023-11-26 10:48:34,371 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 39 [2023-11-26 10:48:34,371 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:34,371 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:34,372 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-26 10:48:34,372 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:48:34,372 INFO L748 eck$LassoCheckResult]: Stem: 254#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2); 220#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~post3#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~post6#1, main_#t~post5#1, main_#t~nondet10#1, main_#t~post9#1, main_#t~mem12#1, main_#t~ret13#1, main_#t~mem14#1, main_#t~ret15#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post17#1, main_#t~post16#1, main_#t~post11#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post21#1, main_#t~post20#1, main_~n~0#1, main_~#set~0#1.base, main_~#set~0#1.offset, main_~x~0#1, main_~y~0#1, main_~#values~0#1.base, main_~#values~0#1.offset, main_~v~0#1;main_~n~0#1 := 0;call main_~#set~0#1.base, main_~#set~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~x~0#1;havoc main_~y~0#1;main_~x~0#1 := 0; 221#L33-3 assume !(main_~x~0#1 < 100000); 214#L33-4 main_~x~0#1 := 0; 215#L39-3 [2023-11-26 10:48:34,372 INFO L750 eck$LassoCheckResult]: Loop: 215#L39-3 assume !!(main_~x~0#1 < main_~n~0#1);main_~y~0#1 := 1 + main_~x~0#1; 230#L40-3 assume !true; 232#L39-2 main_#t~post5#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 215#L39-3 [2023-11-26 10:48:34,373 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:34,373 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2023-11-26 10:48:34,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:34,374 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [557770727] [2023-11-26 10:48:34,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:34,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:34,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:34,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:34,487 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:34,487 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [557770727] [2023-11-26 10:48:34,488 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [557770727] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:34,488 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:34,489 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 10:48:34,489 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2046612925] [2023-11-26 10:48:34,490 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:34,492 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:48:34,492 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:34,493 INFO L85 PathProgramCache]: Analyzing trace with hash 54521, now seen corresponding path program 1 times [2023-11-26 10:48:34,493 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:34,493 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [536456669] [2023-11-26 10:48:34,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:34,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:34,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:34,503 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:34,503 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:34,503 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [536456669] [2023-11-26 10:48:34,504 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [536456669] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:34,504 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:34,504 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 10:48:34,504 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [332889155] [2023-11-26 10:48:34,505 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:34,505 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:34,505 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:34,507 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 10:48:34,508 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 10:48:34,509 INFO L87 Difference]: Start difference. First operand 48 states and 74 transitions. cyclomatic complexity: 31 Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:34,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:34,518 INFO L93 Difference]: Finished difference Result 45 states and 57 transitions. [2023-11-26 10:48:34,518 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 57 transitions. [2023-11-26 10:48:34,519 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 30 [2023-11-26 10:48:34,520 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 39 states and 51 transitions. [2023-11-26 10:48:34,520 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 37 [2023-11-26 10:48:34,521 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 37 [2023-11-26 10:48:34,521 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 51 transitions. [2023-11-26 10:48:34,521 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:34,521 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39 states and 51 transitions. [2023-11-26 10:48:34,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 51 transitions. [2023-11-26 10:48:34,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2023-11-26 10:48:34,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.3076923076923077) internal successors, (51), 38 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:34,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 51 transitions. [2023-11-26 10:48:34,526 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39 states and 51 transitions. [2023-11-26 10:48:34,526 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 10:48:34,527 INFO L428 stractBuchiCegarLoop]: Abstraction has 39 states and 51 transitions. [2023-11-26 10:48:34,527 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 10:48:34,527 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 51 transitions. [2023-11-26 10:48:34,528 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 30 [2023-11-26 10:48:34,528 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:34,528 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:34,529 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-26 10:48:34,529 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 10:48:34,529 INFO L748 eck$LassoCheckResult]: Stem: 344#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2); 314#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~post3#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~post6#1, main_#t~post5#1, main_#t~nondet10#1, main_#t~post9#1, main_#t~mem12#1, main_#t~ret13#1, main_#t~mem14#1, main_#t~ret15#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post17#1, main_#t~post16#1, main_#t~post11#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post21#1, main_#t~post20#1, main_~n~0#1, main_~#set~0#1.base, main_~#set~0#1.offset, main_~x~0#1, main_~y~0#1, main_~#values~0#1.base, main_~#values~0#1.offset, main_~v~0#1;main_~n~0#1 := 0;call main_~#set~0#1.base, main_~#set~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~x~0#1;havoc main_~y~0#1;main_~x~0#1 := 0; 315#L33-3 assume !(main_~x~0#1 < 100000); 310#L33-4 main_~x~0#1 := 0; 311#L39-3 [2023-11-26 10:48:34,529 INFO L750 eck$LassoCheckResult]: Loop: 311#L39-3 assume !!(main_~x~0#1 < main_~n~0#1);main_~y~0#1 := 1 + main_~x~0#1; 322#L40-3 assume !(main_~y~0#1 < main_~n~0#1); 324#L39-2 main_#t~post5#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 311#L39-3 [2023-11-26 10:48:34,530 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:34,530 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 2 times [2023-11-26 10:48:34,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:34,530 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2137737764] [2023-11-26 10:48:34,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:34,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:34,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:34,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:34,568 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:34,569 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2137737764] [2023-11-26 10:48:34,569 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2137737764] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:34,569 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:34,569 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 10:48:34,570 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1442747156] [2023-11-26 10:48:34,570 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:34,570 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:48:34,571 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:34,571 INFO L85 PathProgramCache]: Analyzing trace with hash 53839, now seen corresponding path program 1 times [2023-11-26 10:48:34,571 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:34,571 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434490132] [2023-11-26 10:48:34,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:34,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:34,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:34,576 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:34,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:34,582 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:34,613 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 10:48:34,613 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 10:48:34,614 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 10:48:34,614 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 10:48:34,614 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 10:48:34,614 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:34,614 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 10:48:34,614 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 10:48:34,614 INFO L133 ssoRankerPreferences]: Filename of dumped script: data_structures_set_multi_proc_trivial_ground.i_Iteration3_Loop [2023-11-26 10:48:34,615 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 10:48:34,615 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 10:48:34,616 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:34,619 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:34,672 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 10:48:34,673 INFO L404 LassoAnalysis]: Checking for nontermination... [2023-11-26 10:48:34,675 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:34,675 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:34,677 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:34,687 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 10:48:34,687 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 10:48:34,700 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2023-11-26 10:48:34,721 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2023-11-26 10:48:34,721 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~post5#1=0} Honda state: {ULTIMATE.start_main_#t~post5#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2023-11-26 10:48:34,731 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:34,732 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:34,732 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:34,733 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:34,745 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 10:48:34,746 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 10:48:34,759 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2023-11-26 10:48:34,778 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:34,779 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:34,779 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:34,780 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:34,784 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2023-11-26 10:48:34,785 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2023-11-26 10:48:34,785 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 10:48:35,161 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2023-11-26 10:48:35,173 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:35,173 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 10:48:35,173 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 10:48:35,173 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 10:48:35,173 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 10:48:35,173 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 10:48:35,173 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:35,174 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 10:48:35,174 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 10:48:35,174 INFO L133 ssoRankerPreferences]: Filename of dumped script: data_structures_set_multi_proc_trivial_ground.i_Iteration3_Loop [2023-11-26 10:48:35,174 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 10:48:35,174 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 10:48:35,175 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:35,179 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 10:48:35,243 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 10:48:35,243 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 10:48:35,243 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:35,243 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:35,245 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:35,253 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:35,267 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2023-11-26 10:48:35,268 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:35,268 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:48:35,268 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:35,268 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:35,268 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:35,269 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:48:35,269 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:48:35,279 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 10:48:35,288 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:35,289 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:35,289 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:35,290 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:35,302 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 10:48:35,316 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2023-11-26 10:48:35,317 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 10:48:35,317 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 10:48:35,317 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 10:48:35,317 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 10:48:35,317 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 10:48:35,319 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 10:48:35,319 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 10:48:35,336 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 10:48:35,342 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2023-11-26 10:48:35,342 INFO L444 ModelExtractionUtils]: 1 out of 5 variables were initially zero. Simplification set additionally 1 variables to zero. [2023-11-26 10:48:35,343 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:35,343 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:35,344 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:35,354 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 10:48:35,354 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2023-11-26 10:48:35,354 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 10:48:35,355 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~x~0#1, ULTIMATE.start_main_~n~0#1) = -1*ULTIMATE.start_main_~x~0#1 + 1*ULTIMATE.start_main_~n~0#1 Supporting invariants [] [2023-11-26 10:48:35,365 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2023-11-26 10:48:35,365 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2023-11-26 10:48:35,366 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2023-11-26 10:48:35,388 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:35,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:35,412 INFO L262 TraceCheckSpWp]: Trace formula consists of 36 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 10:48:35,414 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:35,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:35,429 WARN L260 TraceCheckSpWp]: Trace formula consists of 8 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 10:48:35,432 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:35,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:35,463 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 10:48:35,463 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 39 states and 51 transitions. cyclomatic complexity: 17 Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:35,543 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 39 states and 51 transitions. cyclomatic complexity: 17. Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 70 states and 94 transitions. Complement of second has 7 states. [2023-11-26 10:48:35,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 10:48:35,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:35,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 30 transitions. [2023-11-26 10:48:35,548 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 30 transitions. Stem has 4 letters. Loop has 3 letters. [2023-11-26 10:48:35,552 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:48:35,552 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 30 transitions. Stem has 7 letters. Loop has 3 letters. [2023-11-26 10:48:35,552 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:48:35,553 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 30 transitions. Stem has 4 letters. Loop has 6 letters. [2023-11-26 10:48:35,553 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 10:48:35,553 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 94 transitions. [2023-11-26 10:48:35,563 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 31 [2023-11-26 10:48:35,565 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 55 states and 74 transitions. [2023-11-26 10:48:35,565 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 45 [2023-11-26 10:48:35,568 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 47 [2023-11-26 10:48:35,568 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 74 transitions. [2023-11-26 10:48:35,569 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:48:35,569 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 74 transitions. [2023-11-26 10:48:35,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 74 transitions. [2023-11-26 10:48:35,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 44. [2023-11-26 10:48:35,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 1.3409090909090908) internal successors, (59), 43 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:35,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 59 transitions. [2023-11-26 10:48:35,579 INFO L240 hiAutomatonCegarLoop]: Abstraction has 44 states and 59 transitions. [2023-11-26 10:48:35,579 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:35,580 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 10:48:35,580 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 10:48:35,580 INFO L87 Difference]: Start difference. First operand 44 states and 59 transitions. Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:35,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:35,661 INFO L93 Difference]: Finished difference Result 81 states and 104 transitions. [2023-11-26 10:48:35,661 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 81 states and 104 transitions. [2023-11-26 10:48:35,663 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 54 [2023-11-26 10:48:35,664 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 81 states to 81 states and 104 transitions. [2023-11-26 10:48:35,664 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 67 [2023-11-26 10:48:35,665 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 67 [2023-11-26 10:48:35,665 INFO L73 IsDeterministic]: Start isDeterministic. Operand 81 states and 104 transitions. [2023-11-26 10:48:35,665 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:48:35,665 INFO L218 hiAutomatonCegarLoop]: Abstraction has 81 states and 104 transitions. [2023-11-26 10:48:35,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states and 104 transitions. [2023-11-26 10:48:35,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 44. [2023-11-26 10:48:35,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 1.3181818181818181) internal successors, (58), 43 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:35,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 58 transitions. [2023-11-26 10:48:35,670 INFO L240 hiAutomatonCegarLoop]: Abstraction has 44 states and 58 transitions. [2023-11-26 10:48:35,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 10:48:35,671 INFO L428 stractBuchiCegarLoop]: Abstraction has 44 states and 58 transitions. [2023-11-26 10:48:35,671 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 10:48:35,671 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 44 states and 58 transitions. [2023-11-26 10:48:35,672 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 28 [2023-11-26 10:48:35,672 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:35,672 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:35,673 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:35,673 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 10:48:35,673 INFO L748 eck$LassoCheckResult]: Stem: 626#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2); 595#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~post3#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~post6#1, main_#t~post5#1, main_#t~nondet10#1, main_#t~post9#1, main_#t~mem12#1, main_#t~ret13#1, main_#t~mem14#1, main_#t~ret15#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post17#1, main_#t~post16#1, main_#t~post11#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post21#1, main_#t~post20#1, main_~n~0#1, main_~#set~0#1.base, main_~#set~0#1.offset, main_~x~0#1, main_~y~0#1, main_~#values~0#1.base, main_~#values~0#1.offset, main_~v~0#1;main_~n~0#1 := 0;call main_~#set~0#1.base, main_~#set~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~x~0#1;havoc main_~y~0#1;main_~x~0#1 := 0; 596#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 624#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 625#L33-3 assume !(main_~x~0#1 < 100000); 591#L33-4 main_~x~0#1 := 0; 592#L39-3 assume !!(main_~x~0#1 < main_~n~0#1);main_~y~0#1 := 1 + main_~x~0#1; 601#L40-3 [2023-11-26 10:48:35,673 INFO L750 eck$LassoCheckResult]: Loop: 601#L40-3 assume !!(main_~y~0#1 < main_~n~0#1);call main_#t~mem7#1 := read~int#2(main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);call main_#t~mem8#1 := read~int#2(main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~y~0#1, 4);assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if main_#t~mem7#1 != main_#t~mem8#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 602#L13 assume !(0 == __VERIFIER_assert_~cond#1); 587#L13-3 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true;havoc main_#t~mem7#1;havoc main_#t~mem8#1; 588#L40-2 main_#t~post6#1 := main_~y~0#1;main_~y~0#1 := 1 + main_#t~post6#1;havoc main_#t~post6#1; 601#L40-3 [2023-11-26 10:48:35,674 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:35,674 INFO L85 PathProgramCache]: Analyzing trace with hash 1809669547, now seen corresponding path program 1 times [2023-11-26 10:48:35,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:35,674 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [942011188] [2023-11-26 10:48:35,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:35,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:35,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:35,752 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:35,752 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:35,752 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [942011188] [2023-11-26 10:48:35,752 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [942011188] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:48:35,753 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [382504226] [2023-11-26 10:48:35,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:35,753 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:48:35,753 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:35,755 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:48:35,764 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2023-11-26 10:48:35,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:35,835 INFO L262 TraceCheckSpWp]: Trace formula consists of 50 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 10:48:35,836 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:35,862 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:35,862 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:48:35,893 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:35,894 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [382504226] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:48:35,894 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 10:48:35,894 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-26 10:48:35,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1026284573] [2023-11-26 10:48:35,895 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 10:48:35,895 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:48:35,895 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:35,896 INFO L85 PathProgramCache]: Analyzing trace with hash 1922577, now seen corresponding path program 1 times [2023-11-26 10:48:35,896 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:35,896 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130788237] [2023-11-26 10:48:35,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:35,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:35,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:35,910 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:35,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:35,920 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:36,025 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:36,025 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 10:48:36,026 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-26 10:48:36,026 INFO L87 Difference]: Start difference. First operand 44 states and 58 transitions. cyclomatic complexity: 20 Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:36,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:36,224 INFO L93 Difference]: Finished difference Result 197 states and 253 transitions. [2023-11-26 10:48:36,225 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 197 states and 253 transitions. [2023-11-26 10:48:36,227 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 132 [2023-11-26 10:48:36,232 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 197 states to 197 states and 253 transitions. [2023-11-26 10:48:36,232 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 160 [2023-11-26 10:48:36,232 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 160 [2023-11-26 10:48:36,233 INFO L73 IsDeterministic]: Start isDeterministic. Operand 197 states and 253 transitions. [2023-11-26 10:48:36,233 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 10:48:36,233 INFO L218 hiAutomatonCegarLoop]: Abstraction has 197 states and 253 transitions. [2023-11-26 10:48:36,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states and 253 transitions. [2023-11-26 10:48:36,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 50. [2023-11-26 10:48:36,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.28) internal successors, (64), 49 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:36,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 64 transitions. [2023-11-26 10:48:36,240 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 64 transitions. [2023-11-26 10:48:36,241 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 10:48:36,242 INFO L428 stractBuchiCegarLoop]: Abstraction has 50 states and 64 transitions. [2023-11-26 10:48:36,242 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 10:48:36,242 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 64 transitions. [2023-11-26 10:48:36,243 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 28 [2023-11-26 10:48:36,243 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:36,243 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:36,244 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1, 1] [2023-11-26 10:48:36,244 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 10:48:36,244 INFO L748 eck$LassoCheckResult]: Stem: 913#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2); 880#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~post3#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~post6#1, main_#t~post5#1, main_#t~nondet10#1, main_#t~post9#1, main_#t~mem12#1, main_#t~ret13#1, main_#t~mem14#1, main_#t~ret15#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post17#1, main_#t~post16#1, main_#t~post11#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post21#1, main_#t~post20#1, main_~n~0#1, main_~#set~0#1.base, main_~#set~0#1.offset, main_~x~0#1, main_~y~0#1, main_~#values~0#1.base, main_~#values~0#1.offset, main_~v~0#1;main_~n~0#1 := 0;call main_~#set~0#1.base, main_~#set~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~x~0#1;havoc main_~y~0#1;main_~x~0#1 := 0; 881#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 914#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 915#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 911#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 912#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 919#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 918#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 917#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 916#L33-3 assume !(main_~x~0#1 < 100000); 874#L33-4 main_~x~0#1 := 0; 875#L39-3 assume !!(main_~x~0#1 < main_~n~0#1);main_~y~0#1 := 1 + main_~x~0#1; 888#L40-3 [2023-11-26 10:48:36,244 INFO L750 eck$LassoCheckResult]: Loop: 888#L40-3 assume !!(main_~y~0#1 < main_~n~0#1);call main_#t~mem7#1 := read~int#2(main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);call main_#t~mem8#1 := read~int#2(main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~y~0#1, 4);assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if main_#t~mem7#1 != main_#t~mem8#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 889#L13 assume !(0 == __VERIFIER_assert_~cond#1); 876#L13-3 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true;havoc main_#t~mem7#1;havoc main_#t~mem8#1; 877#L40-2 main_#t~post6#1 := main_~y~0#1;main_~y~0#1 := 1 + main_#t~post6#1;havoc main_#t~post6#1; 888#L40-3 [2023-11-26 10:48:36,245 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:36,245 INFO L85 PathProgramCache]: Analyzing trace with hash 82232677, now seen corresponding path program 2 times [2023-11-26 10:48:36,245 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:36,245 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [507204436] [2023-11-26 10:48:36,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:36,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:36,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:36,420 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2023-11-26 10:48:36,426 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2023-11-26 10:48:36,426 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:36,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [507204436] [2023-11-26 10:48:36,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [507204436] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:36,427 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:36,427 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 10:48:36,427 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1505229392] [2023-11-26 10:48:36,427 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:36,429 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:48:36,430 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:36,431 INFO L85 PathProgramCache]: Analyzing trace with hash 1922577, now seen corresponding path program 2 times [2023-11-26 10:48:36,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:36,432 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [25980399] [2023-11-26 10:48:36,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:36,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:36,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:36,450 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:36,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:36,461 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:36,560 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:36,561 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 10:48:36,561 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2023-11-26 10:48:36,561 INFO L87 Difference]: Start difference. First operand 50 states and 64 transitions. cyclomatic complexity: 20 Second operand has 4 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:36,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:36,620 INFO L93 Difference]: Finished difference Result 53 states and 65 transitions. [2023-11-26 10:48:36,620 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 53 states and 65 transitions. [2023-11-26 10:48:36,621 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 34 [2023-11-26 10:48:36,622 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 53 states to 51 states and 63 transitions. [2023-11-26 10:48:36,622 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2023-11-26 10:48:36,624 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2023-11-26 10:48:36,624 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 63 transitions. [2023-11-26 10:48:36,625 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:36,626 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 63 transitions. [2023-11-26 10:48:36,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 63 transitions. [2023-11-26 10:48:36,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 50. [2023-11-26 10:48:36,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.24) internal successors, (62), 49 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:36,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 62 transitions. [2023-11-26 10:48:36,641 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 62 transitions. [2023-11-26 10:48:36,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 10:48:36,643 INFO L428 stractBuchiCegarLoop]: Abstraction has 50 states and 62 transitions. [2023-11-26 10:48:36,643 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 10:48:36,643 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 62 transitions. [2023-11-26 10:48:36,644 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 34 [2023-11-26 10:48:36,644 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:36,644 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:36,645 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:36,645 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 10:48:36,645 INFO L748 eck$LassoCheckResult]: Stem: 1015#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2); 985#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~post3#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~post6#1, main_#t~post5#1, main_#t~nondet10#1, main_#t~post9#1, main_#t~mem12#1, main_#t~ret13#1, main_#t~mem14#1, main_#t~ret15#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post17#1, main_#t~post16#1, main_#t~post11#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post21#1, main_#t~post20#1, main_~n~0#1, main_~#set~0#1.base, main_~#set~0#1.offset, main_~x~0#1, main_~y~0#1, main_~#values~0#1.base, main_~#values~0#1.offset, main_~v~0#1;main_~n~0#1 := 0;call main_~#set~0#1.base, main_~#set~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~x~0#1;havoc main_~y~0#1;main_~x~0#1 := 0; 986#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1012#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1013#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1016#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1022#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1021#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1020#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1018#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1017#L33-3 assume !(main_~x~0#1 < 100000); 983#L33-4 main_~x~0#1 := 0; 984#L39-3 assume !(main_~x~0#1 < main_~n~0#1); 1001#L39-4 call main_~#values~0#1.base, main_~#values~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~v~0#1;main_~v~0#1 := 0; 1002#L47-3 [2023-11-26 10:48:36,645 INFO L750 eck$LassoCheckResult]: Loop: 1002#L47-3 assume !!(main_~v~0#1 < 100000);havoc main_#t~nondet10#1;call write~int#1(main_#t~nondet10#1, main_~#values~0#1.base, main_~#values~0#1.offset + 4 * main_~v~0#1, 4);havoc main_#t~nondet10#1; 1003#L47-2 main_#t~post9#1 := main_~v~0#1;main_~v~0#1 := 1 + main_#t~post9#1;havoc main_#t~post9#1; 1002#L47-3 [2023-11-26 10:48:36,646 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:36,646 INFO L85 PathProgramCache]: Analyzing trace with hash -1745754313, now seen corresponding path program 1 times [2023-11-26 10:48:36,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:36,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1486475362] [2023-11-26 10:48:36,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:36,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:36,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:36,854 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:36,854 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:36,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1486475362] [2023-11-26 10:48:36,855 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1486475362] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:48:36,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [901526365] [2023-11-26 10:48:36,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:36,855 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:48:36,856 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:36,867 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:48:36,884 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2023-11-26 10:48:36,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:36,946 INFO L262 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 10:48:36,948 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:36,980 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:36,980 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:48:37,054 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:37,054 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [901526365] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:48:37,055 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 10:48:37,055 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-26 10:48:37,055 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [813551447] [2023-11-26 10:48:37,055 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 10:48:37,056 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:48:37,056 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:37,056 INFO L85 PathProgramCache]: Analyzing trace with hash 3075, now seen corresponding path program 1 times [2023-11-26 10:48:37,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:37,057 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [255833412] [2023-11-26 10:48:37,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:37,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:37,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:37,062 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:37,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:37,066 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:37,109 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:37,110 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-26 10:48:37,110 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2023-11-26 10:48:37,110 INFO L87 Difference]: Start difference. First operand 50 states and 62 transitions. cyclomatic complexity: 17 Second operand has 13 states, 13 states have (on average 2.076923076923077) internal successors, (27), 13 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:37,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:37,415 INFO L93 Difference]: Finished difference Result 292 states and 374 transitions. [2023-11-26 10:48:37,415 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 292 states and 374 transitions. [2023-11-26 10:48:37,419 INFO L131 ngComponentsAnalysis]: Automaton has 14 accepting balls. 234 [2023-11-26 10:48:37,422 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 292 states to 292 states and 374 transitions. [2023-11-26 10:48:37,422 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 272 [2023-11-26 10:48:37,423 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 272 [2023-11-26 10:48:37,423 INFO L73 IsDeterministic]: Start isDeterministic. Operand 292 states and 374 transitions. [2023-11-26 10:48:37,431 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:37,431 INFO L218 hiAutomatonCegarLoop]: Abstraction has 292 states and 374 transitions. [2023-11-26 10:48:37,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states and 374 transitions. [2023-11-26 10:48:37,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 62. [2023-11-26 10:48:37,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.1935483870967742) internal successors, (74), 61 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:37,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 74 transitions. [2023-11-26 10:48:37,443 INFO L240 hiAutomatonCegarLoop]: Abstraction has 62 states and 74 transitions. [2023-11-26 10:48:37,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-26 10:48:37,446 INFO L428 stractBuchiCegarLoop]: Abstraction has 62 states and 74 transitions. [2023-11-26 10:48:37,446 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 10:48:37,446 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 74 transitions. [2023-11-26 10:48:37,447 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 34 [2023-11-26 10:48:37,447 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:37,448 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:37,448 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:37,449 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 10:48:37,449 INFO L748 eck$LassoCheckResult]: Stem: 1453#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2); 1421#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~post3#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~post6#1, main_#t~post5#1, main_#t~nondet10#1, main_#t~post9#1, main_#t~mem12#1, main_#t~ret13#1, main_#t~mem14#1, main_#t~ret15#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post17#1, main_#t~post16#1, main_#t~post11#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post21#1, main_#t~post20#1, main_~n~0#1, main_~#set~0#1.base, main_~#set~0#1.offset, main_~x~0#1, main_~y~0#1, main_~#values~0#1.base, main_~#values~0#1.offset, main_~v~0#1;main_~n~0#1 := 0;call main_~#set~0#1.base, main_~#set~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~x~0#1;havoc main_~y~0#1;main_~x~0#1 := 0; 1422#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1455#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1456#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1450#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1451#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1472#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1471#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1470#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1469#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1468#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1467#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1466#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1465#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1464#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1463#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1462#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1461#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1460#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1459#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 1458#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1457#L33-3 assume !(main_~x~0#1 < 100000); 1419#L33-4 main_~x~0#1 := 0; 1420#L39-3 assume !(main_~x~0#1 < main_~n~0#1); 1437#L39-4 call main_~#values~0#1.base, main_~#values~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~v~0#1;main_~v~0#1 := 0; 1438#L47-3 [2023-11-26 10:48:37,449 INFO L750 eck$LassoCheckResult]: Loop: 1438#L47-3 assume !!(main_~v~0#1 < 100000);havoc main_#t~nondet10#1;call write~int#1(main_#t~nondet10#1, main_~#values~0#1.base, main_~#values~0#1.offset + 4 * main_~v~0#1, 4);havoc main_#t~nondet10#1; 1439#L47-2 main_#t~post9#1 := main_~v~0#1;main_~v~0#1 := 1 + main_#t~post9#1;havoc main_#t~post9#1; 1438#L47-3 [2023-11-26 10:48:37,449 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:37,449 INFO L85 PathProgramCache]: Analyzing trace with hash -95702845, now seen corresponding path program 2 times [2023-11-26 10:48:37,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:37,450 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1924173297] [2023-11-26 10:48:37,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:37,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:37,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:37,834 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:37,834 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:37,834 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1924173297] [2023-11-26 10:48:37,834 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1924173297] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:48:37,834 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [46214189] [2023-11-26 10:48:37,835 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 10:48:37,835 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:48:37,835 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:37,840 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:48:37,860 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2023-11-26 10:48:37,982 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 10:48:37,983 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:48:37,984 INFO L262 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-26 10:48:37,987 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:38,037 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:38,038 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:48:38,316 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:38,316 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [46214189] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:48:38,316 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 10:48:38,316 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2023-11-26 10:48:38,317 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1008582281] [2023-11-26 10:48:38,317 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 10:48:38,317 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:48:38,318 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:38,318 INFO L85 PathProgramCache]: Analyzing trace with hash 3075, now seen corresponding path program 2 times [2023-11-26 10:48:38,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:38,318 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1502042613] [2023-11-26 10:48:38,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:38,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:38,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:38,324 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:38,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:38,331 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:38,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:38,382 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-26 10:48:38,383 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2023-11-26 10:48:38,384 INFO L87 Difference]: Start difference. First operand 62 states and 74 transitions. cyclomatic complexity: 17 Second operand has 25 states, 25 states have (on average 2.04) internal successors, (51), 25 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:39,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:39,183 INFO L93 Difference]: Finished difference Result 592 states and 758 transitions. [2023-11-26 10:48:39,183 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 592 states and 758 transitions. [2023-11-26 10:48:39,191 INFO L131 ngComponentsAnalysis]: Automaton has 26 accepting balls. 474 [2023-11-26 10:48:39,197 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 592 states to 592 states and 758 transitions. [2023-11-26 10:48:39,198 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 548 [2023-11-26 10:48:39,198 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 548 [2023-11-26 10:48:39,198 INFO L73 IsDeterministic]: Start isDeterministic. Operand 592 states and 758 transitions. [2023-11-26 10:48:39,200 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:39,200 INFO L218 hiAutomatonCegarLoop]: Abstraction has 592 states and 758 transitions. [2023-11-26 10:48:39,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states and 758 transitions. [2023-11-26 10:48:39,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 86. [2023-11-26 10:48:39,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.1395348837209303) internal successors, (98), 85 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:39,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 98 transitions. [2023-11-26 10:48:39,216 INFO L240 hiAutomatonCegarLoop]: Abstraction has 86 states and 98 transitions. [2023-11-26 10:48:39,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2023-11-26 10:48:39,220 INFO L428 stractBuchiCegarLoop]: Abstraction has 86 states and 98 transitions. [2023-11-26 10:48:39,220 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 10:48:39,220 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 86 states and 98 transitions. [2023-11-26 10:48:39,221 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 34 [2023-11-26 10:48:39,221 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:39,221 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:39,224 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:39,224 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 10:48:39,225 INFO L748 eck$LassoCheckResult]: Stem: 2283#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2); 2255#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~post3#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~post6#1, main_#t~post5#1, main_#t~nondet10#1, main_#t~post9#1, main_#t~mem12#1, main_#t~ret13#1, main_#t~mem14#1, main_#t~ret15#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post17#1, main_#t~post16#1, main_#t~post11#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post21#1, main_#t~post20#1, main_~n~0#1, main_~#set~0#1.base, main_~#set~0#1.offset, main_~x~0#1, main_~y~0#1, main_~#values~0#1.base, main_~#values~0#1.offset, main_~v~0#1;main_~n~0#1 := 0;call main_~#set~0#1.base, main_~#set~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~x~0#1;havoc main_~y~0#1;main_~x~0#1 := 0; 2256#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2284#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2285#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2280#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2281#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2325#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2324#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2323#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2322#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2321#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2320#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2319#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2318#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2317#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2316#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2315#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2314#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2313#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2312#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2311#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2310#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2309#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2308#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2307#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2306#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2305#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2304#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2303#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2302#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2301#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2300#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2299#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2298#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2297#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2296#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2295#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2294#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2293#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2292#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2291#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2290#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2289#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2288#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 2287#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2286#L33-3 assume !(main_~x~0#1 < 100000); 2251#L33-4 main_~x~0#1 := 0; 2252#L39-3 assume !(main_~x~0#1 < main_~n~0#1); 2270#L39-4 call main_~#values~0#1.base, main_~#values~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~v~0#1;main_~v~0#1 := 0; 2271#L47-3 [2023-11-26 10:48:39,225 INFO L750 eck$LassoCheckResult]: Loop: 2271#L47-3 assume !!(main_~v~0#1 < 100000);havoc main_#t~nondet10#1;call write~int#1(main_#t~nondet10#1, main_~#values~0#1.base, main_~#values~0#1.offset + 4 * main_~v~0#1, 4);havoc main_#t~nondet10#1; 2272#L47-2 main_#t~post9#1 := main_~v~0#1;main_~v~0#1 := 1 + main_#t~post9#1;havoc main_#t~post9#1; 2271#L47-3 [2023-11-26 10:48:39,226 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:39,226 INFO L85 PathProgramCache]: Analyzing trace with hash 1293970907, now seen corresponding path program 3 times [2023-11-26 10:48:39,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:39,229 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [908118448] [2023-11-26 10:48:39,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:39,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:39,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:40,090 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:40,090 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:40,090 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [908118448] [2023-11-26 10:48:40,090 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [908118448] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:48:40,090 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1465955689] [2023-11-26 10:48:40,091 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 10:48:40,091 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:48:40,091 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:40,095 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:48:40,116 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2023-11-26 10:48:40,787 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 23 check-sat command(s) [2023-11-26 10:48:40,787 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:48:40,792 INFO L262 TraceCheckSpWp]: Trace formula consists of 293 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-26 10:48:40,796 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:40,899 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:40,899 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:48:41,912 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:41,912 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1465955689] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:48:41,912 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 10:48:41,913 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2023-11-26 10:48:41,913 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [130253174] [2023-11-26 10:48:41,913 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 10:48:41,914 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:48:41,914 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:41,914 INFO L85 PathProgramCache]: Analyzing trace with hash 3075, now seen corresponding path program 3 times [2023-11-26 10:48:41,914 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:41,915 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223974607] [2023-11-26 10:48:41,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:41,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:41,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:41,924 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:41,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:41,929 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:41,989 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:41,991 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2023-11-26 10:48:41,992 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2023-11-26 10:48:41,993 INFO L87 Difference]: Start difference. First operand 86 states and 98 transitions. cyclomatic complexity: 17 Second operand has 49 states, 49 states have (on average 2.020408163265306) internal successors, (99), 49 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:44,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:44,537 INFO L93 Difference]: Finished difference Result 1192 states and 1526 transitions. [2023-11-26 10:48:44,537 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1192 states and 1526 transitions. [2023-11-26 10:48:44,555 INFO L131 ngComponentsAnalysis]: Automaton has 50 accepting balls. 954 [2023-11-26 10:48:44,568 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1192 states to 1192 states and 1526 transitions. [2023-11-26 10:48:44,568 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1100 [2023-11-26 10:48:44,571 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1100 [2023-11-26 10:48:44,571 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1192 states and 1526 transitions. [2023-11-26 10:48:44,574 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:44,574 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1192 states and 1526 transitions. [2023-11-26 10:48:44,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1192 states and 1526 transitions. [2023-11-26 10:48:44,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1192 to 134. [2023-11-26 10:48:44,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 134 states have (on average 1.0895522388059702) internal successors, (146), 133 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:44,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 146 transitions. [2023-11-26 10:48:44,586 INFO L240 hiAutomatonCegarLoop]: Abstraction has 134 states and 146 transitions. [2023-11-26 10:48:44,587 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-26 10:48:44,587 INFO L428 stractBuchiCegarLoop]: Abstraction has 134 states and 146 transitions. [2023-11-26 10:48:44,588 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-26 10:48:44,588 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 134 states and 146 transitions. [2023-11-26 10:48:44,589 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 34 [2023-11-26 10:48:44,589 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:44,589 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:44,593 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:44,593 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 10:48:44,594 INFO L748 eck$LassoCheckResult]: Stem: 3909#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2); 3877#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~post3#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~post6#1, main_#t~post5#1, main_#t~nondet10#1, main_#t~post9#1, main_#t~mem12#1, main_#t~ret13#1, main_#t~mem14#1, main_#t~ret15#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post17#1, main_#t~post16#1, main_#t~post11#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post21#1, main_#t~post20#1, main_~n~0#1, main_~#set~0#1.base, main_~#set~0#1.offset, main_~x~0#1, main_~y~0#1, main_~#values~0#1.base, main_~#values~0#1.offset, main_~v~0#1;main_~n~0#1 := 0;call main_~#set~0#1.base, main_~#set~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~x~0#1;havoc main_~y~0#1;main_~x~0#1 := 0; 3878#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3911#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3912#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3906#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3907#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 4000#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3999#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3998#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3997#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3996#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3995#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3994#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3993#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3992#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3991#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3990#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3989#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3988#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3987#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3986#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3985#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3984#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3983#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3982#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3981#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3980#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3979#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3978#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3977#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3976#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3975#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3974#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3973#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3972#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3971#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3970#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3969#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3968#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3967#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3966#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3965#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3964#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3963#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3962#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3961#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3960#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3959#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3958#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3957#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3956#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3955#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3954#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3953#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3952#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3951#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3950#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3949#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3948#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3947#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3946#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3945#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3944#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3943#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3942#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3941#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3940#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3939#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3938#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3937#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3936#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3935#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3934#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3933#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3932#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3931#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3930#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3929#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3928#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3927#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3926#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3925#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3924#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3923#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3922#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3921#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3920#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3919#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3918#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3917#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3916#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3915#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 3914#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3913#L33-3 assume !(main_~x~0#1 < 100000); 3875#L33-4 main_~x~0#1 := 0; 3876#L39-3 assume !(main_~x~0#1 < main_~n~0#1); 3893#L39-4 call main_~#values~0#1.base, main_~#values~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~v~0#1;main_~v~0#1 := 0; 3894#L47-3 [2023-11-26 10:48:44,594 INFO L750 eck$LassoCheckResult]: Loop: 3894#L47-3 assume !!(main_~v~0#1 < 100000);havoc main_#t~nondet10#1;call write~int#1(main_#t~nondet10#1, main_~#values~0#1.base, main_~#values~0#1.offset + 4 * main_~v~0#1, 4);havoc main_#t~nondet10#1; 3895#L47-2 main_#t~post9#1 := main_~v~0#1;main_~v~0#1 := 1 + main_#t~post9#1;havoc main_#t~post9#1; 3894#L47-3 [2023-11-26 10:48:44,595 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:44,595 INFO L85 PathProgramCache]: Analyzing trace with hash -675114997, now seen corresponding path program 4 times [2023-11-26 10:48:44,596 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:44,596 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264681160] [2023-11-26 10:48:44,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:44,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:44,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:47,303 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:47,303 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:47,303 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264681160] [2023-11-26 10:48:47,303 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1264681160] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:48:47,303 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1260952735] [2023-11-26 10:48:47,304 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-26 10:48:47,304 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:48:47,304 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:47,312 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:48:47,323 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2023-11-26 10:48:47,544 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-26 10:48:47,544 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 10:48:47,548 INFO L262 TraceCheckSpWp]: Trace formula consists of 557 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-26 10:48:47,560 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:47,770 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:47,770 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 10:48:51,527 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:51,528 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1260952735] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 10:48:51,528 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 10:48:51,528 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2023-11-26 10:48:51,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1610357543] [2023-11-26 10:48:51,528 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 10:48:51,529 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 10:48:51,530 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:51,530 INFO L85 PathProgramCache]: Analyzing trace with hash 3075, now seen corresponding path program 4 times [2023-11-26 10:48:51,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:51,530 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151630380] [2023-11-26 10:48:51,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:51,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:51,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:51,536 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:51,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:51,540 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:51,590 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:51,592 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2023-11-26 10:48:51,597 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2023-11-26 10:48:51,597 INFO L87 Difference]: Start difference. First operand 134 states and 146 transitions. cyclomatic complexity: 17 Second operand has 97 states, 97 states have (on average 2.0103092783505154) internal successors, (195), 97 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:49:05,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:49:05,712 INFO L93 Difference]: Finished difference Result 2392 states and 3062 transitions. [2023-11-26 10:49:05,712 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2392 states and 3062 transitions. [2023-11-26 10:49:05,732 INFO L131 ngComponentsAnalysis]: Automaton has 98 accepting balls. 1914 [2023-11-26 10:49:05,750 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2392 states to 2392 states and 3062 transitions. [2023-11-26 10:49:05,750 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2204 [2023-11-26 10:49:05,753 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2204 [2023-11-26 10:49:05,753 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2392 states and 3062 transitions. [2023-11-26 10:49:05,756 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:49:05,756 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2392 states and 3062 transitions. [2023-11-26 10:49:05,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2392 states and 3062 transitions. [2023-11-26 10:49:05,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2392 to 230. [2023-11-26 10:49:05,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 230 states, 230 states have (on average 1.0521739130434782) internal successors, (242), 229 states have internal predecessors, (242), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:49:05,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 242 transitions. [2023-11-26 10:49:05,773 INFO L240 hiAutomatonCegarLoop]: Abstraction has 230 states and 242 transitions. [2023-11-26 10:49:05,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2023-11-26 10:49:05,774 INFO L428 stractBuchiCegarLoop]: Abstraction has 230 states and 242 transitions. [2023-11-26 10:49:05,774 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-26 10:49:05,774 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 230 states and 242 transitions. [2023-11-26 10:49:05,776 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 34 [2023-11-26 10:49:05,776 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:49:05,776 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:49:05,780 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1, 1, 1] [2023-11-26 10:49:05,780 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 10:49:05,781 INFO L748 eck$LassoCheckResult]: Stem: 7117#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2); 7085#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~post3#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~post6#1, main_#t~post5#1, main_#t~nondet10#1, main_#t~post9#1, main_#t~mem12#1, main_#t~ret13#1, main_#t~mem14#1, main_#t~ret15#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post17#1, main_#t~post16#1, main_#t~post11#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post21#1, main_#t~post20#1, main_~n~0#1, main_~#set~0#1.base, main_~#set~0#1.offset, main_~x~0#1, main_~y~0#1, main_~#values~0#1.base, main_~#values~0#1.offset, main_~v~0#1;main_~n~0#1 := 0;call main_~#set~0#1.base, main_~#set~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~x~0#1;havoc main_~y~0#1;main_~x~0#1 := 0; 7086#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7119#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7120#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7114#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7115#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7304#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7303#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7302#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7301#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7300#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7299#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7298#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7297#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7296#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7295#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7294#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7293#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7292#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7291#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7290#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7289#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7288#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7287#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7286#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7285#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7284#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7283#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7282#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7281#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7280#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7279#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7278#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7277#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7276#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7275#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7274#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7273#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7272#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7271#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7270#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7269#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7268#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7267#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7266#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7265#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7264#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7263#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7262#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7261#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7260#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7259#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7258#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7257#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7256#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7255#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7254#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7253#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7252#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7251#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7250#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7249#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7248#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7247#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7246#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7245#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7244#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7243#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7242#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7241#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7240#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7239#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7238#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7237#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7236#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7235#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7234#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7233#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7232#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7231#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7230#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7229#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7228#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7227#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7226#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7225#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7224#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7223#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7222#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7221#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7220#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7219#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7218#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7217#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7216#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7215#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7214#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7213#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7212#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7211#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7210#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7209#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7208#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7207#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7206#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7205#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7204#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7203#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7202#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7201#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7200#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7199#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7198#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7197#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7196#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7195#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7194#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7193#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7192#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7191#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7190#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7189#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7188#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7187#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7186#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7185#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7184#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7183#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7182#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7181#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7180#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7179#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7178#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7177#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7176#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7175#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7174#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7173#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7172#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7171#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7170#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7169#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7168#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7167#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7166#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7165#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7164#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7163#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7162#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7161#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7160#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7159#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7158#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7157#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7156#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7155#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7154#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7153#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7152#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7151#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7150#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7149#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7148#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7147#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7146#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7145#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7144#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7143#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7142#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7141#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7140#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7139#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7138#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7137#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7136#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7135#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7134#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7133#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7132#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7131#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7130#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7129#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7128#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7127#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7126#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7125#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7124#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7123#L33-3 assume !!(main_~x~0#1 < 100000);havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~#set~0#1.base, main_~#set~0#1.offset + 4 * main_~x~0#1, 4);havoc main_#t~nondet4#1; 7122#L33-2 main_#t~post3#1 := main_~x~0#1;main_~x~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7121#L33-3 assume !(main_~x~0#1 < 100000); 7083#L33-4 main_~x~0#1 := 0; 7084#L39-3 assume !(main_~x~0#1 < main_~n~0#1); 7101#L39-4 call main_~#values~0#1.base, main_~#values~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~v~0#1;main_~v~0#1 := 0; 7102#L47-3 [2023-11-26 10:49:05,781 INFO L750 eck$LassoCheckResult]: Loop: 7102#L47-3 assume !!(main_~v~0#1 < 100000);havoc main_#t~nondet10#1;call write~int#1(main_#t~nondet10#1, main_~#values~0#1.base, main_~#values~0#1.offset + 4 * main_~v~0#1, 4);havoc main_#t~nondet10#1; 7103#L47-2 main_#t~post9#1 := main_~v~0#1;main_~v~0#1 := 1 + main_#t~post9#1;havoc main_#t~post9#1; 7102#L47-3 [2023-11-26 10:49:05,781 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:49:05,782 INFO L85 PathProgramCache]: Analyzing trace with hash -1064733589, now seen corresponding path program 5 times [2023-11-26 10:49:05,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:49:05,782 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [615081345] [2023-11-26 10:49:05,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:05,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:49:05,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:49:13,689 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:49:13,689 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:49:13,689 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [615081345] [2023-11-26 10:49:13,689 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [615081345] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 10:49:13,689 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1555122738] [2023-11-26 10:49:13,690 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-26 10:49:13,690 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:49:13,690 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:49:13,692 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:49:13,699 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_24e5225e-b77b-42f1-a6a5-411417383fc9/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process