./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loops/eureka_05.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loops/eureka_05.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:54:05,803 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:54:05,888 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:54:05,894 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:54:05,894 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:54:05,923 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:54:05,924 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:54:05,924 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:54:05,925 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:54:05,926 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:54:05,927 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:54:05,927 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:54:05,928 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:54:05,929 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:54:05,929 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:54:05,930 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:54:05,931 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:54:05,931 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:54:05,932 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:54:05,932 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:54:05,933 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:54:05,934 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:54:05,935 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:54:05,935 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:54:05,936 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:54:05,937 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:54:05,937 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:54:05,938 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:54:05,938 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:54:05,939 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:54:05,939 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:54:05,940 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:54:05,940 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:54:05,941 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:54:05,941 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:54:05,942 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:54:05,942 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:54:05,943 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:54:05,943 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab [2023-11-26 11:54:06,220 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:54:06,254 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:54:06,257 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:54:06,258 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:54:06,259 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:54:06,261 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/loops/eureka_05.i [2023-11-26 11:54:09,436 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:54:09,741 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:54:09,741 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/sv-benchmarks/c/loops/eureka_05.i [2023-11-26 11:54:09,748 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/data/70a020e93/3b864327305c4c7b86004e5fafd5ca6f/FLAGd654c0e0f [2023-11-26 11:54:09,770 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/data/70a020e93/3b864327305c4c7b86004e5fafd5ca6f [2023-11-26 11:54:09,772 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:54:09,774 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:54:09,776 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:54:09,776 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:54:09,787 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:54:09,788 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:54:09" (1/1) ... [2023-11-26 11:54:09,789 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2e08a915 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:09, skipping insertion in model container [2023-11-26 11:54:09,789 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:54:09" (1/1) ... [2023-11-26 11:54:09,812 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:54:10,039 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:54:10,057 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:54:10,087 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:54:10,108 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:54:10,109 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10 WrapperNode [2023-11-26 11:54:10,109 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:54:10,110 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:54:10,110 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:54:10,110 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:54:10,119 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,126 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,155 INFO L138 Inliner]: procedures = 16, calls = 25, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 86 [2023-11-26 11:54:10,158 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:54:10,159 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:54:10,159 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:54:10,159 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:54:10,171 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,171 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,174 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,197 INFO L175 MemorySlicer]: Split 15 memory accesses to 3 slices as follows [2, 11, 2]. 73 percent of accesses are in the largest equivalence class. The 7 initializations are split as follows [2, 5, 0]. The 3 writes are split as follows [0, 2, 1]. [2023-11-26 11:54:10,202 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,203 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,217 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,222 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,224 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,226 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,229 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:54:10,230 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:54:10,230 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:54:10,230 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:54:10,231 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (1/1) ... [2023-11-26 11:54:10,250 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:10,263 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:10,276 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:10,297 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:54:10,321 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:54:10,322 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:54:10,322 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 11:54:10,322 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 11:54:10,322 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 11:54:10,322 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 11:54:10,323 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 11:54:10,323 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 11:54:10,323 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:54:10,323 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:54:10,323 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 11:54:10,323 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 11:54:10,324 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 11:54:10,324 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 11:54:10,459 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:54:10,461 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:54:10,649 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:54:10,667 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:54:10,667 INFO L309 CfgBuilder]: Removed 4 assume(true) statements. [2023-11-26 11:54:10,669 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:54:10 BoogieIcfgContainer [2023-11-26 11:54:10,670 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:54:10,671 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:54:10,672 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:54:10,676 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:54:10,678 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:54:10,678 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:54:09" (1/3) ... [2023-11-26 11:54:10,680 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@420e7bab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:54:10, skipping insertion in model container [2023-11-26 11:54:10,681 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:54:10,681 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:54:10" (2/3) ... [2023-11-26 11:54:10,683 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@420e7bab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:54:10, skipping insertion in model container [2023-11-26 11:54:10,684 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:54:10,685 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:54:10" (3/3) ... [2023-11-26 11:54:10,686 INFO L332 chiAutomizerObserver]: Analyzing ICFG eureka_05.i [2023-11-26 11:54:10,770 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:54:10,770 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:54:10,773 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:54:10,773 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:54:10,773 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:54:10,773 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:54:10,773 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:54:10,774 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:54:10,780 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 23 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:10,802 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2023-11-26 11:54:10,803 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:10,803 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:10,809 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:54:10,810 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:54:10,810 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:54:10,810 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 23 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:10,815 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2023-11-26 11:54:10,815 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:10,815 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:10,816 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:54:10,816 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:54:10,825 INFO L748 eck$LassoCheckResult]: Stem: 18#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 13#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 6#L44-3true [2023-11-26 11:54:10,826 INFO L750 eck$LassoCheckResult]: Loop: 6#L44-3true assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 19#L44-2true main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6#L44-3true [2023-11-26 11:54:10,832 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:10,833 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-26 11:54:10,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:10,845 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1439242850] [2023-11-26 11:54:10,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:10,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:10,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:10,990 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:11,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:11,051 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:11,055 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:11,056 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-26 11:54:11,056 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:11,057 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112513595] [2023-11-26 11:54:11,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:11,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:11,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:11,085 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:11,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:11,100 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:11,101 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:11,101 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-26 11:54:11,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:11,102 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [425145095] [2023-11-26 11:54:11,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:11,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:11,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:11,149 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:11,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:11,185 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:11,880 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 11:54:11,881 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 11:54:11,881 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 11:54:11,881 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 11:54:11,881 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 11:54:11,881 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:11,882 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 11:54:11,882 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 11:54:11,883 INFO L133 ssoRankerPreferences]: Filename of dumped script: eureka_05.i_Iteration1_Lasso [2023-11-26 11:54:11,883 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 11:54:11,883 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 11:54:11,904 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:54:11,933 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:54:11,983 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:54:11,987 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:54:11,991 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:54:12,247 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:54:12,251 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:54:12,256 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:54:12,261 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:54:12,264 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:54:12,606 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 11:54:12,611 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 11:54:12,612 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:12,613 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:12,616 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:12,636 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:12,650 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:12,650 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:12,651 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:12,651 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:12,652 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-26 11:54:12,657 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:12,657 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:12,674 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:12,690 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:12,690 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:12,691 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:12,692 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:12,710 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:12,723 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:12,723 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:12,723 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:12,723 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:12,726 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:12,726 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:12,729 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-26 11:54:12,734 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:12,742 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:12,742 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:12,743 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:12,744 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:12,748 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-26 11:54:12,750 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:12,763 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:12,763 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:12,763 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:12,763 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:12,768 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:12,769 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:12,790 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:12,800 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:12,801 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:12,801 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:12,802 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:12,811 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:12,824 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:12,824 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:12,824 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:12,824 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:12,825 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-26 11:54:12,831 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:12,832 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:12,850 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:12,861 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:12,861 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:12,861 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:12,864 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:12,868 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:12,868 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-26 11:54:12,880 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:12,881 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:12,881 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:12,881 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:12,884 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:12,884 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:12,895 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:12,903 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:12,903 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:12,904 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:12,905 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:12,908 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-26 11:54:12,909 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:12,921 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:12,922 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:12,922 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:12,922 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:12,925 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:12,926 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:12,942 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:12,947 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:12,948 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:12,948 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:12,950 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:12,963 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:12,975 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:12,976 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:12,976 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:12,976 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:12,980 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:12,980 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:12,981 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-26 11:54:12,998 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:13,006 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:13,007 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:13,007 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:13,008 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:13,014 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-26 11:54:13,014 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:13,027 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:13,027 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:13,027 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:13,027 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:13,029 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:13,030 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:13,041 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:13,049 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:13,049 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:13,049 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:13,051 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:13,063 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:13,075 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:13,075 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:54:13,076 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:13,076 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:13,076 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:13,077 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:54:13,077 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:54:13,079 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-26 11:54:13,094 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:13,102 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:13,102 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:13,102 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:13,103 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:13,107 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-26 11:54:13,108 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:13,121 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:13,121 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:13,121 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:13,121 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:13,124 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:13,125 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:13,136 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:13,140 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:13,140 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:13,141 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:13,142 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:13,150 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2023-11-26 11:54:13,150 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:13,162 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:13,163 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:13,163 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:13,163 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:13,170 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:13,170 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:13,198 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:13,202 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:13,202 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:13,202 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:13,204 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:13,215 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:13,222 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2023-11-26 11:54:13,227 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:13,228 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:13,228 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:13,228 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:13,231 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:13,231 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:13,250 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:13,258 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:13,259 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:13,259 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:13,260 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:13,263 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2023-11-26 11:54:13,265 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:13,276 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:13,276 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:13,276 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:13,276 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:13,279 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:13,280 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:13,288 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:13,298 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:13,298 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:13,298 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:13,299 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:13,310 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2023-11-26 11:54:13,310 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:13,323 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:13,323 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:13,323 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:13,323 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:13,326 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:13,326 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:13,337 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:13,348 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:13,349 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:13,349 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:13,350 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:13,359 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:13,372 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:13,372 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:13,372 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:13,372 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:13,376 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:13,377 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:13,377 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2023-11-26 11:54:13,388 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:54:13,396 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:13,397 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:13,397 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:13,399 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:13,411 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:54:13,423 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:54:13,423 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:54:13,423 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:54:13,423 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:54:13,426 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2023-11-26 11:54:13,428 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:54:13,429 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:54:13,458 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 11:54:13,517 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2023-11-26 11:54:13,517 INFO L444 ModelExtractionUtils]: 1 out of 13 variables were initially zero. Simplification set additionally 9 variables to zero. [2023-11-26 11:54:13,519 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:54:13,519 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:13,557 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:54:13,563 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 11:54:13,575 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2023-11-26 11:54:13,599 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-26 11:54:13,599 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 11:54:13,600 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1, v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1) = 8*ULTIMATE.start_main_~i~1#1 + 1*v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1 Supporting invariants [] [2023-11-26 11:54:13,609 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:13,626 INFO L156 tatePredicateManager]: 5 out of 5 supporting invariants were superfluous and have been removed [2023-11-26 11:54:13,633 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#array~1!base] could not be translated [2023-11-26 11:54:13,650 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:13,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:13,675 INFO L262 TraceCheckSpWp]: Trace formula consists of 51 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 11:54:13,676 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:13,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:13,692 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 11:54:13,692 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:13,726 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:54:13,777 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 11:54:13,780 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 23 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:13,867 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 23 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 52 states and 77 transitions. Complement of second has 8 states. [2023-11-26 11:54:13,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 11:54:13,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:13,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 45 transitions. [2023-11-26 11:54:13,879 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 45 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-26 11:54:13,881 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:54:13,881 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 45 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-26 11:54:13,881 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:54:13,881 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 45 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-26 11:54:13,882 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:54:13,883 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 77 transitions. [2023-11-26 11:54:13,894 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 13 [2023-11-26 11:54:13,898 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 20 states and 27 transitions. [2023-11-26 11:54:13,899 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2023-11-26 11:54:13,900 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2023-11-26 11:54:13,900 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 27 transitions. [2023-11-26 11:54:13,900 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:13,901 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20 states and 27 transitions. [2023-11-26 11:54:13,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 27 transitions. [2023-11-26 11:54:13,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2023-11-26 11:54:13,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.35) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:13,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 27 transitions. [2023-11-26 11:54:13,927 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20 states and 27 transitions. [2023-11-26 11:54:13,927 INFO L428 stractBuchiCegarLoop]: Abstraction has 20 states and 27 transitions. [2023-11-26 11:54:13,927 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:54:13,927 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 27 transitions. [2023-11-26 11:54:13,928 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 13 [2023-11-26 11:54:13,928 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:13,928 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:13,928 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-26 11:54:13,929 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:54:13,929 INFO L748 eck$LassoCheckResult]: Stem: 153#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 150#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 140#L44-3 assume !(main_~i~1#1 >= 0); 141#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 139#L30-3 [2023-11-26 11:54:13,929 INFO L750 eck$LassoCheckResult]: Loop: 139#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 151#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 152#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 138#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 139#L30-3 [2023-11-26 11:54:13,929 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:13,930 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2023-11-26 11:54:13,930 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:13,930 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [43434907] [2023-11-26 11:54:13,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:13,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:13,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:13,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:54:13,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:13,990 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [43434907] [2023-11-26 11:54:13,990 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [43434907] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:54:13,990 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:54:13,991 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:54:13,991 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [295333824] [2023-11-26 11:54:13,992 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:54:13,993 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:54:13,994 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:13,994 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 1 times [2023-11-26 11:54:13,994 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:13,994 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212039257] [2023-11-26 11:54:13,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:13,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:14,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:14,010 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:14,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:14,026 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:14,156 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:14,158 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 11:54:14,158 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 11:54:14,160 INFO L87 Difference]: Start difference. First operand 20 states and 27 transitions. cyclomatic complexity: 10 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:14,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:14,187 INFO L93 Difference]: Finished difference Result 20 states and 24 transitions. [2023-11-26 11:54:14,187 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 24 transitions. [2023-11-26 11:54:14,190 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:14,190 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 18 states and 22 transitions. [2023-11-26 11:54:14,191 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2023-11-26 11:54:14,191 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2023-11-26 11:54:14,191 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 22 transitions. [2023-11-26 11:54:14,191 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:14,191 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 22 transitions. [2023-11-26 11:54:14,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 22 transitions. [2023-11-26 11:54:14,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. [2023-11-26 11:54:14,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:14,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2023-11-26 11:54:14,193 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2023-11-26 11:54:14,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 11:54:14,195 INFO L428 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2023-11-26 11:54:14,195 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:54:14,195 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2023-11-26 11:54:14,196 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:14,196 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:14,196 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:14,196 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2023-11-26 11:54:14,197 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:54:14,197 INFO L748 eck$LassoCheckResult]: Stem: 196#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 193#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 182#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 183#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 184#L44-3 assume !(main_~i~1#1 >= 0); 185#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 181#L30-3 [2023-11-26 11:54:14,197 INFO L750 eck$LassoCheckResult]: Loop: 181#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 194#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 195#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 180#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 181#L30-3 [2023-11-26 11:54:14,197 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:14,197 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2023-11-26 11:54:14,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:14,198 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [573739518] [2023-11-26 11:54:14,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:14,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:14,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:14,266 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:54:14,267 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:14,267 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [573739518] [2023-11-26 11:54:14,267 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [573739518] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:14,268 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1445130820] [2023-11-26 11:54:14,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:14,268 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:14,268 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:14,269 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:14,309 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2023-11-26 11:54:14,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:14,347 INFO L262 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:54:14,348 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:14,356 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:54:14,356 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:14,376 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:54:14,376 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1445130820] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:14,376 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:14,377 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 6 [2023-11-26 11:54:14,377 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1928255284] [2023-11-26 11:54:14,377 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:14,377 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:54:14,378 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:14,378 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 2 times [2023-11-26 11:54:14,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:14,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630885009] [2023-11-26 11:54:14,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:14,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:14,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:14,389 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:14,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:14,399 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:14,525 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:14,525 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 11:54:14,526 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2023-11-26 11:54:14,526 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 7 Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:14,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:14,571 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2023-11-26 11:54:14,571 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 31 transitions. [2023-11-26 11:54:14,572 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:14,573 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 31 transitions. [2023-11-26 11:54:14,573 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2023-11-26 11:54:14,573 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2023-11-26 11:54:14,573 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 31 transitions. [2023-11-26 11:54:14,574 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:14,600 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2023-11-26 11:54:14,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 31 transitions. [2023-11-26 11:54:14,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 23. [2023-11-26 11:54:14,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.173913043478261) internal successors, (27), 22 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:14,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2023-11-26 11:54:14,612 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 27 transitions. [2023-11-26 11:54:14,613 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:54:14,614 INFO L428 stractBuchiCegarLoop]: Abstraction has 23 states and 27 transitions. [2023-11-26 11:54:14,615 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:54:14,615 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 27 transitions. [2023-11-26 11:54:14,617 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:14,618 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:14,618 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:14,619 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2023-11-26 11:54:14,619 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:54:14,619 INFO L748 eck$LassoCheckResult]: Stem: 280#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 277#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 265#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 266#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 267#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 268#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 285#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 284#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 283#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 282#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 281#L44-3 assume !(main_~i~1#1 >= 0); 269#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 264#L30-3 [2023-11-26 11:54:14,619 INFO L750 eck$LassoCheckResult]: Loop: 264#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 278#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 279#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 263#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 264#L30-3 [2023-11-26 11:54:14,620 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:14,620 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2023-11-26 11:54:14,620 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:14,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1522886758] [2023-11-26 11:54:14,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:14,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:14,633 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2023-11-26 11:54:14,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:14,751 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:54:14,751 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:14,752 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1522886758] [2023-11-26 11:54:14,752 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1522886758] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:14,752 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [40508188] [2023-11-26 11:54:14,752 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 11:54:14,752 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:14,753 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:14,754 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:14,786 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2023-11-26 11:54:14,837 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 11:54:14,837 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:54:14,838 INFO L262 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 11:54:14,840 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:14,868 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:54:14,869 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:14,928 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:54:14,930 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [40508188] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:14,930 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:14,931 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 7 [2023-11-26 11:54:14,931 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1775566302] [2023-11-26 11:54:14,931 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:14,932 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:54:14,932 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:14,933 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 3 times [2023-11-26 11:54:14,933 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:14,933 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954978354] [2023-11-26 11:54:14,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:14,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:14,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:14,950 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:14,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:14,969 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:15,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:15,119 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:54:15,120 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:54:15,120 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:15,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:15,202 INFO L93 Difference]: Finished difference Result 41 states and 45 transitions. [2023-11-26 11:54:15,202 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 45 transitions. [2023-11-26 11:54:15,208 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:15,210 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 41 states and 45 transitions. [2023-11-26 11:54:15,210 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 31 [2023-11-26 11:54:15,210 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2023-11-26 11:54:15,210 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 45 transitions. [2023-11-26 11:54:15,211 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:15,211 INFO L218 hiAutomatonCegarLoop]: Abstraction has 41 states and 45 transitions. [2023-11-26 11:54:15,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 45 transitions. [2023-11-26 11:54:15,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 25. [2023-11-26 11:54:15,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.16) internal successors, (29), 24 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:15,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2023-11-26 11:54:15,216 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25 states and 29 transitions. [2023-11-26 11:54:15,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 11:54:15,218 INFO L428 stractBuchiCegarLoop]: Abstraction has 25 states and 29 transitions. [2023-11-26 11:54:15,219 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 11:54:15,219 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 29 transitions. [2023-11-26 11:54:15,223 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:15,223 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:15,223 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:15,224 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1] [2023-11-26 11:54:15,224 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:54:15,224 INFO L748 eck$LassoCheckResult]: Stem: 420#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 417#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 405#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 406#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 407#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 408#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 427#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 426#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 425#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 424#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 423#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 422#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 421#L44-3 assume !(main_~i~1#1 >= 0); 409#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 404#L30-3 [2023-11-26 11:54:15,225 INFO L750 eck$LassoCheckResult]: Loop: 404#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 418#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 419#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 403#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 404#L30-3 [2023-11-26 11:54:15,225 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:15,225 INFO L85 PathProgramCache]: Analyzing trace with hash -1745699051, now seen corresponding path program 3 times [2023-11-26 11:54:15,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:15,225 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778348912] [2023-11-26 11:54:15,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:15,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:15,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:15,271 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:15,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:15,291 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:15,292 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:15,292 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 4 times [2023-11-26 11:54:15,292 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:15,292 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885932558] [2023-11-26 11:54:15,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:15,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:15,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:15,311 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:15,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:15,320 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:15,323 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:15,324 INFO L85 PathProgramCache]: Analyzing trace with hash -743535747, now seen corresponding path program 1 times [2023-11-26 11:54:15,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:15,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [555336202] [2023-11-26 11:54:15,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:15,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:15,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:15,427 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2023-11-26 11:54:15,428 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:15,428 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [555336202] [2023-11-26 11:54:15,428 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [555336202] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:54:15,428 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:54:15,428 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 11:54:15,428 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1304915754] [2023-11-26 11:54:15,429 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:54:15,568 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:15,569 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:54:15,569 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:54:15,569 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. cyclomatic complexity: 7 Second operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:15,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:15,626 INFO L93 Difference]: Finished difference Result 34 states and 41 transitions. [2023-11-26 11:54:15,627 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 41 transitions. [2023-11-26 11:54:15,627 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2023-11-26 11:54:15,628 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 41 transitions. [2023-11-26 11:54:15,628 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2023-11-26 11:54:15,628 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2023-11-26 11:54:15,628 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 41 transitions. [2023-11-26 11:54:15,629 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:15,629 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 41 transitions. [2023-11-26 11:54:15,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 41 transitions. [2023-11-26 11:54:15,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2023-11-26 11:54:15,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 26 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:15,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 31 transitions. [2023-11-26 11:54:15,631 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2023-11-26 11:54:15,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:54:15,636 INFO L428 stractBuchiCegarLoop]: Abstraction has 27 states and 31 transitions. [2023-11-26 11:54:15,636 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 11:54:15,636 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 31 transitions. [2023-11-26 11:54:15,636 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:15,637 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:15,637 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:15,638 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1] [2023-11-26 11:54:15,638 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:54:15,638 INFO L748 eck$LassoCheckResult]: Stem: 492#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 489#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 476#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 477#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 478#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 479#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 500#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 499#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 498#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 497#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 496#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 495#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 494#L44-3 assume !(main_~i~1#1 >= 0); 480#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 481#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 491#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 486#L33 [2023-11-26 11:54:15,638 INFO L750 eck$LassoCheckResult]: Loop: 486#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 487#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 490#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 486#L33 [2023-11-26 11:54:15,639 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:15,639 INFO L85 PathProgramCache]: Analyzing trace with hash 1715425501, now seen corresponding path program 1 times [2023-11-26 11:54:15,639 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:15,639 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [415841994] [2023-11-26 11:54:15,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:15,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:15,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:15,665 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:15,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:15,683 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:15,683 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:15,684 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 1 times [2023-11-26 11:54:15,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:15,684 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [423551873] [2023-11-26 11:54:15,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:15,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:15,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:15,689 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:15,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:15,694 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:15,695 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:15,695 INFO L85 PathProgramCache]: Analyzing trace with hash -1574719937, now seen corresponding path program 1 times [2023-11-26 11:54:15,695 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:15,695 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [904678048] [2023-11-26 11:54:15,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:15,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:15,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:16,174 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2023-11-26 11:54:16,174 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:16,175 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [904678048] [2023-11-26 11:54:16,176 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [904678048] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:16,176 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1657334168] [2023-11-26 11:54:16,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:16,176 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:16,177 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:16,182 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:16,202 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2023-11-26 11:54:16,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:16,274 INFO L262 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 23 conjunts are in the unsatisfiable core [2023-11-26 11:54:16,276 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:16,565 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-26 11:54:16,566 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 13 [2023-11-26 11:54:16,584 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 21 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2023-11-26 11:54:16,584 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:16,689 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2023-11-26 11:54:16,689 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1657334168] provided 1 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:16,689 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2023-11-26 11:54:16,689 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 8] total 17 [2023-11-26 11:54:16,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2113719441] [2023-11-26 11:54:16,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:54:16,789 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:16,790 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 11:54:16,790 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=241, Unknown=0, NotChecked=0, Total=306 [2023-11-26 11:54:16,790 INFO L87 Difference]: Start difference. First operand 27 states and 31 transitions. cyclomatic complexity: 7 Second operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:16,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:16,907 INFO L93 Difference]: Finished difference Result 34 states and 40 transitions. [2023-11-26 11:54:16,907 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 40 transitions. [2023-11-26 11:54:16,907 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2023-11-26 11:54:16,908 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 40 transitions. [2023-11-26 11:54:16,908 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2023-11-26 11:54:16,908 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2023-11-26 11:54:16,908 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 40 transitions. [2023-11-26 11:54:16,909 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:16,909 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 40 transitions. [2023-11-26 11:54:16,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 40 transitions. [2023-11-26 11:54:16,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 28. [2023-11-26 11:54:16,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1428571428571428) internal successors, (32), 27 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:16,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2023-11-26 11:54:16,911 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 32 transitions. [2023-11-26 11:54:16,912 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 11:54:16,913 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 32 transitions. [2023-11-26 11:54:16,913 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 11:54:16,913 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 32 transitions. [2023-11-26 11:54:16,914 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:16,914 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:16,914 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:16,915 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:54:16,915 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:54:16,915 INFO L748 eck$LassoCheckResult]: Stem: 690#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 687#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 674#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 675#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 676#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 677#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 691#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 698#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 697#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 696#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 695#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 694#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 693#L44-3 assume !(main_~i~1#1 >= 0); 678#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 679#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 689#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 684#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 685#L32-2 [2023-11-26 11:54:16,915 INFO L750 eck$LassoCheckResult]: Loop: 685#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 688#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 699#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 685#L32-2 [2023-11-26 11:54:16,916 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:16,916 INFO L85 PathProgramCache]: Analyzing trace with hash 1638583016, now seen corresponding path program 1 times [2023-11-26 11:54:16,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:16,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1227637292] [2023-11-26 11:54:16,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:16,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:16,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:16,933 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:16,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:16,947 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:16,948 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:16,948 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 2 times [2023-11-26 11:54:16,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:16,948 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [380699286] [2023-11-26 11:54:16,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:16,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:16,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:16,954 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:16,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:16,960 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:16,960 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:16,960 INFO L85 PathProgramCache]: Analyzing trace with hash -1571618174, now seen corresponding path program 1 times [2023-11-26 11:54:16,961 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:16,961 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [447125392] [2023-11-26 11:54:16,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:16,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:16,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:17,291 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2023-11-26 11:54:17,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:17,291 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [447125392] [2023-11-26 11:54:17,291 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [447125392] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:17,292 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1834144993] [2023-11-26 11:54:17,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:17,292 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:17,292 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:17,296 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:17,306 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2023-11-26 11:54:17,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:17,382 INFO L262 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 23 conjunts are in the unsatisfiable core [2023-11-26 11:54:17,384 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:17,717 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-26 11:54:17,719 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 13 [2023-11-26 11:54:17,741 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2023-11-26 11:54:17,741 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:17,912 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2023-11-26 11:54:17,913 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1834144993] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:17,913 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:17,913 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 5] total 19 [2023-11-26 11:54:17,913 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [263980278] [2023-11-26 11:54:17,913 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:17,993 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:17,994 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2023-11-26 11:54:17,994 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420 [2023-11-26 11:54:17,994 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. cyclomatic complexity: 7 Second operand has 21 states, 20 states have (on average 2.0) internal successors, (40), 20 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:18,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:18,577 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2023-11-26 11:54:18,577 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2023-11-26 11:54:18,578 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 23 [2023-11-26 11:54:18,579 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2023-11-26 11:54:18,579 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2023-11-26 11:54:18,579 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2023-11-26 11:54:18,579 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2023-11-26 11:54:18,580 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:18,580 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2023-11-26 11:54:18,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2023-11-26 11:54:18,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 31. [2023-11-26 11:54:18,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 30 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:18,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 36 transitions. [2023-11-26 11:54:18,583 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 36 transitions. [2023-11-26 11:54:18,586 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2023-11-26 11:54:18,587 INFO L428 stractBuchiCegarLoop]: Abstraction has 31 states and 36 transitions. [2023-11-26 11:54:18,588 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 11:54:18,588 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 36 transitions. [2023-11-26 11:54:18,588 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:18,588 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:18,588 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:18,589 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:54:18,589 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:54:18,590 INFO L748 eck$LassoCheckResult]: Stem: 932#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 928#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 915#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 916#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 917#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 918#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 940#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 939#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 938#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 937#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 936#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 935#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 934#L44-3 assume !(main_~i~1#1 >= 0); 919#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 920#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 930#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 931#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 943#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 942#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 933#L32-4 [2023-11-26 11:54:18,590 INFO L750 eck$LassoCheckResult]: Loop: 933#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 913#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 914#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 929#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 933#L32-4 [2023-11-26 11:54:18,590 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:18,590 INFO L85 PathProgramCache]: Analyzing trace with hash -1574718017, now seen corresponding path program 1 times [2023-11-26 11:54:18,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:18,591 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [952042597] [2023-11-26 11:54:18,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:18,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:18,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:18,684 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2023-11-26 11:54:18,684 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:18,685 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [952042597] [2023-11-26 11:54:18,685 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [952042597] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:18,685 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1938468725] [2023-11-26 11:54:18,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:18,685 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:18,685 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:18,690 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:18,714 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2023-11-26 11:54:18,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:18,775 INFO L262 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 5 conjunts are in the unsatisfiable core [2023-11-26 11:54:18,777 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:18,840 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2023-11-26 11:54:18,840 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:18,894 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2023-11-26 11:54:18,894 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1938468725] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:18,894 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:18,895 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 11 [2023-11-26 11:54:18,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2100125797] [2023-11-26 11:54:18,895 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:18,895 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:54:18,896 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:18,896 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 5 times [2023-11-26 11:54:18,896 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:18,896 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1838045600] [2023-11-26 11:54:18,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:18,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:18,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:18,901 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:18,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:18,905 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:19,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:19,018 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-26 11:54:19,018 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2023-11-26 11:54:19,019 INFO L87 Difference]: Start difference. First operand 31 states and 36 transitions. cyclomatic complexity: 8 Second operand has 13 states, 12 states have (on average 2.3333333333333335) internal successors, (28), 12 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:19,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:19,188 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2023-11-26 11:54:19,188 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2023-11-26 11:54:19,189 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 16 [2023-11-26 11:54:19,189 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2023-11-26 11:54:19,190 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2023-11-26 11:54:19,190 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2023-11-26 11:54:19,190 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2023-11-26 11:54:19,190 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:19,190 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2023-11-26 11:54:19,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2023-11-26 11:54:19,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 46. [2023-11-26 11:54:19,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.173913043478261) internal successors, (54), 45 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:19,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 54 transitions. [2023-11-26 11:54:19,194 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 54 transitions. [2023-11-26 11:54:19,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-26 11:54:19,195 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 54 transitions. [2023-11-26 11:54:19,195 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-26 11:54:19,195 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 54 transitions. [2023-11-26 11:54:19,196 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2023-11-26 11:54:19,196 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:19,196 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:19,197 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 1, 1, 1, 1, 1] [2023-11-26 11:54:19,197 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:54:19,197 INFO L748 eck$LassoCheckResult]: Stem: 1153#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1150#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1137#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1138#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1139#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1140#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1165#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1164#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1163#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1162#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1161#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1158#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1157#L44-3 assume !(main_~i~1#1 >= 0); 1141#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1142#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1179#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1178#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1177#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1176#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1175#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1174#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1173#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1172#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1171#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1170#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1168#L33 [2023-11-26 11:54:19,197 INFO L750 eck$LassoCheckResult]: Loop: 1168#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1169#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1167#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1168#L33 [2023-11-26 11:54:19,198 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:19,198 INFO L85 PathProgramCache]: Analyzing trace with hash 649240641, now seen corresponding path program 1 times [2023-11-26 11:54:19,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:19,198 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646244873] [2023-11-26 11:54:19,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:19,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:19,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:19,215 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:19,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:19,230 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:19,231 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:19,231 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 3 times [2023-11-26 11:54:19,231 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:19,231 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1200706803] [2023-11-26 11:54:19,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:19,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:19,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:19,235 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:19,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:19,238 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:19,239 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:19,239 INFO L85 PathProgramCache]: Analyzing trace with hash 1290237019, now seen corresponding path program 2 times [2023-11-26 11:54:19,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:19,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [583377297] [2023-11-26 11:54:19,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:19,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:19,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:19,367 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2023-11-26 11:54:19,367 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:19,367 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [583377297] [2023-11-26 11:54:19,367 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [583377297] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:54:19,367 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:54:19,367 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 11:54:19,367 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [421395541] [2023-11-26 11:54:19,368 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:54:19,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:19,468 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-26 11:54:19,468 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2023-11-26 11:54:19,468 INFO L87 Difference]: Start difference. First operand 46 states and 54 transitions. cyclomatic complexity: 12 Second operand has 9 states, 8 states have (on average 2.5) internal successors, (20), 8 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:19,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:19,582 INFO L93 Difference]: Finished difference Result 46 states and 53 transitions. [2023-11-26 11:54:19,582 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 53 transitions. [2023-11-26 11:54:19,583 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:19,584 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 46 states and 53 transitions. [2023-11-26 11:54:19,584 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2023-11-26 11:54:19,584 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2023-11-26 11:54:19,584 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 53 transitions. [2023-11-26 11:54:19,584 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:19,585 INFO L218 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2023-11-26 11:54:19,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 53 transitions. [2023-11-26 11:54:19,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2023-11-26 11:54:19,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.1521739130434783) internal successors, (53), 45 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:19,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 53 transitions. [2023-11-26 11:54:19,588 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2023-11-26 11:54:19,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2023-11-26 11:54:19,589 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 53 transitions. [2023-11-26 11:54:19,589 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-26 11:54:19,589 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 53 transitions. [2023-11-26 11:54:19,590 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:19,590 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:19,590 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:19,591 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:54:19,591 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:54:19,591 INFO L748 eck$LassoCheckResult]: Stem: 1271#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1268#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1255#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1256#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1257#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1258#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1285#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1284#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1282#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1280#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1278#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1274#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1273#L44-3 assume !(main_~i~1#1 >= 0); 1259#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1260#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1270#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1265#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1266#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1269#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1298#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1297#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1296#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1295#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1294#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1293#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1292#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1291#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1290#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1272#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1253#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1254#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1289#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1288#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1287#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1286#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1281#L33 [2023-11-26 11:54:19,591 INFO L750 eck$LassoCheckResult]: Loop: 1281#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1283#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1276#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1281#L33 [2023-11-26 11:54:19,592 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:19,592 INFO L85 PathProgramCache]: Analyzing trace with hash -264183975, now seen corresponding path program 1 times [2023-11-26 11:54:19,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:19,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [866129562] [2023-11-26 11:54:19,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:19,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:19,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:19,616 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:19,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:19,639 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:19,639 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:19,639 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 4 times [2023-11-26 11:54:19,639 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:19,640 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1303336475] [2023-11-26 11:54:19,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:19,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:19,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:19,643 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:19,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:19,647 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:19,647 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:19,647 INFO L85 PathProgramCache]: Analyzing trace with hash -1924678077, now seen corresponding path program 1 times [2023-11-26 11:54:19,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:19,648 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808505765] [2023-11-26 11:54:19,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:19,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:19,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:20,450 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2023-11-26 11:54:20,450 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:20,450 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808505765] [2023-11-26 11:54:20,450 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [808505765] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:20,451 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [922259029] [2023-11-26 11:54:20,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:20,451 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:20,451 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:20,458 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:20,481 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2023-11-26 11:54:20,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:20,568 INFO L262 TraceCheckSpWp]: Trace formula consists of 233 conjuncts, 40 conjunts are in the unsatisfiable core [2023-11-26 11:54:20,575 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:21,330 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-26 11:54:21,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 41 treesize of output 24 [2023-11-26 11:54:21,524 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-26 11:54:21,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 13 [2023-11-26 11:54:21,565 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 66 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2023-11-26 11:54:21,565 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:22,488 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 25 proven. 32 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2023-11-26 11:54:22,488 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [922259029] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:22,488 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:22,488 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 16, 13] total 37 [2023-11-26 11:54:22,489 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [944802138] [2023-11-26 11:54:22,489 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:22,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:22,592 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2023-11-26 11:54:22,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=1266, Unknown=0, NotChecked=0, Total=1406 [2023-11-26 11:54:22,594 INFO L87 Difference]: Start difference. First operand 46 states and 53 transitions. cyclomatic complexity: 10 Second operand has 38 states, 38 states have (on average 2.1315789473684212) internal successors, (81), 37 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:24,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:24,804 INFO L93 Difference]: Finished difference Result 70 states and 79 transitions. [2023-11-26 11:54:24,804 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 79 transitions. [2023-11-26 11:54:24,805 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 19 [2023-11-26 11:54:24,806 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 70 states and 79 transitions. [2023-11-26 11:54:24,806 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 60 [2023-11-26 11:54:24,806 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 60 [2023-11-26 11:54:24,806 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 79 transitions. [2023-11-26 11:54:24,807 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:24,807 INFO L218 hiAutomatonCegarLoop]: Abstraction has 70 states and 79 transitions. [2023-11-26 11:54:24,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 79 transitions. [2023-11-26 11:54:24,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 47. [2023-11-26 11:54:24,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 1.1063829787234043) internal successors, (52), 46 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:24,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 52 transitions. [2023-11-26 11:54:24,811 INFO L240 hiAutomatonCegarLoop]: Abstraction has 47 states and 52 transitions. [2023-11-26 11:54:24,811 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2023-11-26 11:54:24,812 INFO L428 stractBuchiCegarLoop]: Abstraction has 47 states and 52 transitions. [2023-11-26 11:54:24,812 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-26 11:54:24,812 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 52 transitions. [2023-11-26 11:54:24,813 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:24,813 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:24,813 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:24,814 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:54:24,814 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:54:24,814 INFO L748 eck$LassoCheckResult]: Stem: 1708#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1705#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1692#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1693#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1694#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1695#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1721#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1720#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1719#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1718#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1716#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1712#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1711#L44-3 assume !(main_~i~1#1 >= 0); 1696#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1697#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1734#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1733#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1732#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1731#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1730#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1729#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1728#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1727#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1726#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1725#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1724#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1723#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1722#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1709#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1690#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1691#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1710#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1736#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1706#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1707#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1702#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1703#L32-2 [2023-11-26 11:54:24,815 INFO L750 eck$LassoCheckResult]: Loop: 1703#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1714#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1735#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1703#L32-2 [2023-11-26 11:54:24,815 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:24,815 INFO L85 PathProgramCache]: Analyzing trace with hash 400231404, now seen corresponding path program 2 times [2023-11-26 11:54:24,815 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:24,815 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [972789362] [2023-11-26 11:54:24,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:24,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:24,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:24,839 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:24,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:24,861 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:24,861 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:24,862 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 5 times [2023-11-26 11:54:24,862 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:24,862 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630615631] [2023-11-26 11:54:24,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:24,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:24,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:24,866 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:24,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:24,870 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:24,871 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:24,871 INFO L85 PathProgramCache]: Analyzing trace with hash 464581374, now seen corresponding path program 2 times [2023-11-26 11:54:24,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:24,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1946741603] [2023-11-26 11:54:24,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:24,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:24,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:25,562 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2023-11-26 11:54:25,563 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:25,563 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1946741603] [2023-11-26 11:54:25,563 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1946741603] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:25,563 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1817448049] [2023-11-26 11:54:25,563 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 11:54:25,564 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:25,564 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:25,570 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:25,572 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2023-11-26 11:54:25,691 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 11:54:25,692 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:54:25,693 INFO L262 TraceCheckSpWp]: Trace formula consists of 234 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-26 11:54:25,696 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:26,051 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-26 11:54:26,053 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-26 11:54:26,065 INFO L349 Elim1Store]: treesize reduction 19, result has 36.7 percent of original size [2023-11-26 11:54:26,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 43 treesize of output 32 [2023-11-26 11:54:26,310 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2023-11-26 11:54:26,310 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:39,047 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2023-11-26 11:54:39,047 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1817448049] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:39,047 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:39,048 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 26 [2023-11-26 11:54:39,048 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502895961] [2023-11-26 11:54:39,048 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:39,230 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:39,231 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2023-11-26 11:54:39,231 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=667, Unknown=1, NotChecked=0, Total=756 [2023-11-26 11:54:39,232 INFO L87 Difference]: Start difference. First operand 47 states and 52 transitions. cyclomatic complexity: 8 Second operand has 28 states, 27 states have (on average 2.4074074074074074) internal successors, (65), 27 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:41,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:41,214 INFO L93 Difference]: Finished difference Result 92 states and 106 transitions. [2023-11-26 11:54:41,214 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 92 states and 106 transitions. [2023-11-26 11:54:41,215 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 31 [2023-11-26 11:54:41,216 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 92 states to 92 states and 106 transitions. [2023-11-26 11:54:41,216 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 82 [2023-11-26 11:54:41,217 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 82 [2023-11-26 11:54:41,217 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 106 transitions. [2023-11-26 11:54:41,217 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:41,218 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 106 transitions. [2023-11-26 11:54:41,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 106 transitions. [2023-11-26 11:54:41,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 59. [2023-11-26 11:54:41,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 1.1016949152542372) internal successors, (65), 58 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:41,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 65 transitions. [2023-11-26 11:54:41,223 INFO L240 hiAutomatonCegarLoop]: Abstraction has 59 states and 65 transitions. [2023-11-26 11:54:41,226 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2023-11-26 11:54:41,227 INFO L428 stractBuchiCegarLoop]: Abstraction has 59 states and 65 transitions. [2023-11-26 11:54:41,227 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2023-11-26 11:54:41,227 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59 states and 65 transitions. [2023-11-26 11:54:41,227 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:41,228 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:41,228 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:41,229 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:54:41,229 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:54:41,229 INFO L748 eck$LassoCheckResult]: Stem: 2139#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2135#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2122#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2123#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2124#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2125#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2148#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2147#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2146#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2145#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2144#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2143#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2142#L44-3 assume !(main_~i~1#1 >= 0); 2126#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2127#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2166#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2165#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2164#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2163#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2162#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2161#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2160#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2159#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2158#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2157#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2155#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2156#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2178#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2177#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2176#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2175#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2174#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2173#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2172#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2138#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2132#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2133#L32-2 [2023-11-26 11:54:41,229 INFO L750 eck$LassoCheckResult]: Loop: 2133#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2150#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2167#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2133#L32-2 [2023-11-26 11:54:41,229 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:41,230 INFO L85 PathProgramCache]: Analyzing trace with hash -300833174, now seen corresponding path program 3 times [2023-11-26 11:54:41,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:41,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796077438] [2023-11-26 11:54:41,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:41,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:41,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:42,227 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 27 proven. 15 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2023-11-26 11:54:42,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:42,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1796077438] [2023-11-26 11:54:42,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1796077438] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:42,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1178275037] [2023-11-26 11:54:42,229 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 11:54:42,229 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:42,229 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:42,237 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:42,239 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2023-11-26 11:54:42,342 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2023-11-26 11:54:42,343 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:54:42,344 INFO L262 TraceCheckSpWp]: Trace formula consists of 170 conjuncts, 25 conjunts are in the unsatisfiable core [2023-11-26 11:54:42,347 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:43,236 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-26 11:54:43,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 46 treesize of output 56 [2023-11-26 11:54:43,872 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 23 proven. 15 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2023-11-26 11:54:43,872 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:44,849 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 25 proven. 13 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2023-11-26 11:54:44,849 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1178275037] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:44,849 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:44,849 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 27 [2023-11-26 11:54:44,849 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1174949437] [2023-11-26 11:54:44,850 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:44,850 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:54:44,850 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:44,850 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 6 times [2023-11-26 11:54:44,851 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:44,851 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385352698] [2023-11-26 11:54:44,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:44,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:44,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:44,856 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:44,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:44,861 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:45,030 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:45,030 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2023-11-26 11:54:45,031 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=663, Unknown=0, NotChecked=0, Total=756 [2023-11-26 11:54:45,031 INFO L87 Difference]: Start difference. First operand 59 states and 65 transitions. cyclomatic complexity: 9 Second operand has 28 states, 28 states have (on average 2.0357142857142856) internal successors, (57), 27 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:46,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:46,473 INFO L93 Difference]: Finished difference Result 50 states and 55 transitions. [2023-11-26 11:54:46,474 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 50 states and 55 transitions. [2023-11-26 11:54:46,474 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:46,475 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 50 states to 50 states and 55 transitions. [2023-11-26 11:54:46,475 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 40 [2023-11-26 11:54:46,475 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 40 [2023-11-26 11:54:46,475 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 55 transitions. [2023-11-26 11:54:46,476 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:46,476 INFO L218 hiAutomatonCegarLoop]: Abstraction has 50 states and 55 transitions. [2023-11-26 11:54:46,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 55 transitions. [2023-11-26 11:54:46,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2023-11-26 11:54:46,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.1) internal successors, (55), 49 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:46,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 55 transitions. [2023-11-26 11:54:46,479 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 55 transitions. [2023-11-26 11:54:46,485 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2023-11-26 11:54:46,486 INFO L428 stractBuchiCegarLoop]: Abstraction has 50 states and 55 transitions. [2023-11-26 11:54:46,486 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2023-11-26 11:54:46,486 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 55 transitions. [2023-11-26 11:54:46,488 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:46,488 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:46,488 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:46,489 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 5, 5, 2, 2, 1, 1, 1, 1, 1, 1] [2023-11-26 11:54:46,489 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:54:46,489 INFO L748 eck$LassoCheckResult]: Stem: 2513#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2509#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2496#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2497#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2498#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2499#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2528#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2526#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2525#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2523#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2521#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2517#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2516#L44-3 assume !(main_~i~1#1 >= 0); 2500#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2501#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2540#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2539#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2538#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2537#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2536#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2535#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2534#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2533#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2532#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2531#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2530#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2529#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2527#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2514#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2494#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2495#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2515#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2541#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2510#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2511#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2512#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2543#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2524#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2522#L32-4 [2023-11-26 11:54:46,489 INFO L750 eck$LassoCheckResult]: Loop: 2522#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2520#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2518#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2519#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2522#L32-4 [2023-11-26 11:54:46,489 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:46,490 INFO L85 PathProgramCache]: Analyzing trace with hash -1924676157, now seen corresponding path program 3 times [2023-11-26 11:54:46,490 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:46,490 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1189941812] [2023-11-26 11:54:46,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:46,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:46,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:46,708 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2023-11-26 11:54:46,709 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:46,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1189941812] [2023-11-26 11:54:46,709 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1189941812] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:46,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1021739915] [2023-11-26 11:54:46,709 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 11:54:46,709 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:46,709 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:46,714 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:46,738 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2023-11-26 11:54:46,815 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2023-11-26 11:54:46,815 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:54:46,816 INFO L262 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 7 conjunts are in the unsatisfiable core [2023-11-26 11:54:46,818 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:47,197 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2023-11-26 11:54:47,197 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:47,400 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2023-11-26 11:54:47,400 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1021739915] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:47,400 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:47,400 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2023-11-26 11:54:47,400 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [55395152] [2023-11-26 11:54:47,401 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:47,401 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:54:47,401 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:47,402 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 6 times [2023-11-26 11:54:47,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:47,402 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813807819] [2023-11-26 11:54:47,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:47,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:47,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:47,413 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:47,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:47,418 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:47,622 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:47,623 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2023-11-26 11:54:47,623 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2023-11-26 11:54:47,623 INFO L87 Difference]: Start difference. First operand 50 states and 55 transitions. cyclomatic complexity: 8 Second operand has 14 states, 13 states have (on average 3.4615384615384617) internal successors, (45), 13 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:47,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:47,963 INFO L93 Difference]: Finished difference Result 56 states and 62 transitions. [2023-11-26 11:54:47,963 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 62 transitions. [2023-11-26 11:54:47,964 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2023-11-26 11:54:47,964 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 56 states and 62 transitions. [2023-11-26 11:54:47,964 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2023-11-26 11:54:47,965 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2023-11-26 11:54:47,965 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 62 transitions. [2023-11-26 11:54:47,965 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:47,965 INFO L218 hiAutomatonCegarLoop]: Abstraction has 56 states and 62 transitions. [2023-11-26 11:54:47,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 62 transitions. [2023-11-26 11:54:47,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 50. [2023-11-26 11:54:47,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.08) internal successors, (54), 49 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:47,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2023-11-26 11:54:47,969 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 54 transitions. [2023-11-26 11:54:47,974 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2023-11-26 11:54:47,975 INFO L428 stractBuchiCegarLoop]: Abstraction has 50 states and 54 transitions. [2023-11-26 11:54:47,975 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2023-11-26 11:54:47,976 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 54 transitions. [2023-11-26 11:54:47,977 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2023-11-26 11:54:47,977 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:47,977 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:47,980 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:54:47,980 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 11:54:47,981 INFO L748 eck$LassoCheckResult]: Stem: 2876#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2872#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2859#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2860#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2861#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2862#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2888#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2887#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2886#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2885#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2884#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2881#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2880#L44-3 assume !(main_~i~1#1 >= 0); 2863#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2864#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2902#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2901#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2900#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2899#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2898#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2897#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2896#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2895#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2894#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2893#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2892#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2891#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2890#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2889#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2857#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2858#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2879#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2906#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2873#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2874#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2904#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2905#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2875#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2869#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2870#L32-2 [2023-11-26 11:54:47,981 INFO L750 eck$LassoCheckResult]: Loop: 2870#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2883#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2903#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2870#L32-2 [2023-11-26 11:54:47,981 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:47,981 INFO L85 PathProgramCache]: Analyzing trace with hash 464581376, now seen corresponding path program 4 times [2023-11-26 11:54:47,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:47,981 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173015894] [2023-11-26 11:54:47,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:47,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:48,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:48,026 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:48,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:48,061 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:48,062 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:48,062 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 7 times [2023-11-26 11:54:48,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:48,062 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1429899364] [2023-11-26 11:54:48,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:48,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:48,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:48,066 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:48,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:48,071 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:48,072 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:48,072 INFO L85 PathProgramCache]: Analyzing trace with hash 1959183210, now seen corresponding path program 4 times [2023-11-26 11:54:48,072 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:48,072 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [161285832] [2023-11-26 11:54:48,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:48,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:48,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:48,339 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 19 proven. 45 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2023-11-26 11:54:48,339 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:48,339 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [161285832] [2023-11-26 11:54:48,339 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [161285832] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:48,339 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [174327883] [2023-11-26 11:54:48,339 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-26 11:54:48,339 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:48,340 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:48,346 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:48,366 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2023-11-26 11:54:48,452 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-26 11:54:48,452 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:54:48,454 INFO L262 TraceCheckSpWp]: Trace formula consists of 199 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-26 11:54:48,456 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:48,759 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 20 proven. 66 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2023-11-26 11:54:48,759 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:49,111 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 20 proven. 66 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2023-11-26 11:54:49,112 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [174327883] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:49,112 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:49,112 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 13, 13] total 15 [2023-11-26 11:54:49,112 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1988871035] [2023-11-26 11:54:49,112 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:49,261 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:49,261 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2023-11-26 11:54:49,262 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2023-11-26 11:54:49,262 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. cyclomatic complexity: 7 Second operand has 15 states, 15 states have (on average 3.1333333333333333) internal successors, (47), 15 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:49,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:49,931 INFO L93 Difference]: Finished difference Result 71 states and 81 transitions. [2023-11-26 11:54:49,932 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 71 states and 81 transitions. [2023-11-26 11:54:49,932 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2023-11-26 11:54:49,934 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 71 states to 71 states and 81 transitions. [2023-11-26 11:54:49,934 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 61 [2023-11-26 11:54:49,935 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 61 [2023-11-26 11:54:49,935 INFO L73 IsDeterministic]: Start isDeterministic. Operand 71 states and 81 transitions. [2023-11-26 11:54:49,935 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:49,935 INFO L218 hiAutomatonCegarLoop]: Abstraction has 71 states and 81 transitions. [2023-11-26 11:54:49,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states and 81 transitions. [2023-11-26 11:54:49,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 66. [2023-11-26 11:54:49,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 1.1515151515151516) internal successors, (76), 65 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:49,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 76 transitions. [2023-11-26 11:54:49,940 INFO L240 hiAutomatonCegarLoop]: Abstraction has 66 states and 76 transitions. [2023-11-26 11:54:49,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2023-11-26 11:54:49,946 INFO L428 stractBuchiCegarLoop]: Abstraction has 66 states and 76 transitions. [2023-11-26 11:54:49,946 INFO L335 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2023-11-26 11:54:49,946 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66 states and 76 transitions. [2023-11-26 11:54:49,948 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2023-11-26 11:54:49,948 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:49,948 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:49,950 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 7, 5, 5, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2023-11-26 11:54:49,950 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:54:49,953 INFO L748 eck$LassoCheckResult]: Stem: 3295#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3291#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3278#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3279#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3280#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3281#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3296#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3305#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3304#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3303#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3302#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3301#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3300#L44-3 assume !(main_~i~1#1 >= 0); 3282#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3283#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3321#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3320#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3319#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3318#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3317#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3316#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3315#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3314#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3313#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3312#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3311#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3310#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3309#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3308#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3276#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3277#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3299#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3327#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3323#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3324#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3325#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3326#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3294#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3288#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3289#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3338#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3297#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3298#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3307#L30-3 assume !(SelectionSort_~lh~0#1 < ~n~0); 3290#L26 havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;assume { :end_inline_SelectionSort } true;main_~i~1#1 := 0; 3287#L49-3 [2023-11-26 11:54:49,953 INFO L750 eck$LassoCheckResult]: Loop: 3287#L49-3 assume !!(main_~i~1#1 < 5);call main_#t~mem9#1 := read~int#2(main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4);assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if main_#t~mem9#1 == main_~i~1#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 3284#L15 assume !(0 == __VERIFIER_assert_~cond#1); 3285#L15-2 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true;havoc main_#t~mem9#1; 3286#L49-2 main_#t~post8#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post8#1;havoc main_#t~post8#1; 3287#L49-3 [2023-11-26 11:54:49,954 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:49,954 INFO L85 PathProgramCache]: Analyzing trace with hash 1714859028, now seen corresponding path program 1 times [2023-11-26 11:54:49,954 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:49,954 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [440578422] [2023-11-26 11:54:49,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:49,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:49,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:50,124 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2023-11-26 11:54:50,125 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:50,125 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [440578422] [2023-11-26 11:54:50,125 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [440578422] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:50,125 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [886720255] [2023-11-26 11:54:50,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:50,125 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:50,126 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:50,130 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:50,158 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2023-11-26 11:54:50,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:50,256 INFO L262 TraceCheckSpWp]: Trace formula consists of 254 conjuncts, 5 conjunts are in the unsatisfiable core [2023-11-26 11:54:50,258 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:50,663 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2023-11-26 11:54:50,663 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:50,936 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2023-11-26 11:54:50,936 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [886720255] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:50,936 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:50,936 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 11 [2023-11-26 11:54:50,937 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634091440] [2023-11-26 11:54:50,937 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:50,937 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:54:50,937 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:50,937 INFO L85 PathProgramCache]: Analyzing trace with hash 2692209, now seen corresponding path program 1 times [2023-11-26 11:54:50,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:50,938 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255342462] [2023-11-26 11:54:50,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:50,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:50,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:50,943 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:50,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:50,947 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:51,065 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:51,065 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2023-11-26 11:54:51,066 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2023-11-26 11:54:51,066 INFO L87 Difference]: Start difference. First operand 66 states and 76 transitions. cyclomatic complexity: 13 Second operand has 12 states, 12 states have (on average 4.916666666666667) internal successors, (59), 11 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:51,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:51,235 INFO L93 Difference]: Finished difference Result 73 states and 81 transitions. [2023-11-26 11:54:51,235 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 73 states and 81 transitions. [2023-11-26 11:54:51,236 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2023-11-26 11:54:51,237 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 73 states to 73 states and 81 transitions. [2023-11-26 11:54:51,237 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 63 [2023-11-26 11:54:51,237 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2023-11-26 11:54:51,237 INFO L73 IsDeterministic]: Start isDeterministic. Operand 73 states and 81 transitions. [2023-11-26 11:54:51,238 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:51,238 INFO L218 hiAutomatonCegarLoop]: Abstraction has 73 states and 81 transitions. [2023-11-26 11:54:51,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states and 81 transitions. [2023-11-26 11:54:51,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2023-11-26 11:54:51,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 73 states have (on average 1.1095890410958904) internal successors, (81), 72 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:51,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 81 transitions. [2023-11-26 11:54:51,241 INFO L240 hiAutomatonCegarLoop]: Abstraction has 73 states and 81 transitions. [2023-11-26 11:54:51,242 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 11:54:51,243 INFO L428 stractBuchiCegarLoop]: Abstraction has 73 states and 81 transitions. [2023-11-26 11:54:51,243 INFO L335 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2023-11-26 11:54:51,243 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 81 transitions. [2023-11-26 11:54:51,244 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2023-11-26 11:54:51,244 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:51,244 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:51,245 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 7, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1] [2023-11-26 11:54:51,245 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:54:51,245 INFO L748 eck$LassoCheckResult]: Stem: 3716#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3713#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3700#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3701#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3702#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3703#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3730#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3728#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3726#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3725#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3723#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3719#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3718#L44-3 assume !(main_~i~1#1 >= 0); 3704#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3705#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3715#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3710#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3711#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3714#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3769#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3767#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3765#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3763#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3761#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3759#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3757#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3755#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3753#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3717#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3698#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3699#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3770#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3768#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3766#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3764#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3762#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3760#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3758#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3756#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3754#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3748#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3749#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3752#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3750#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3743#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3741#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3739#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3737#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3732#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3731#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3729#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3727#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3721#L32-3 [2023-11-26 11:54:51,246 INFO L750 eck$LassoCheckResult]: Loop: 3721#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3724#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3722#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3720#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3721#L32-3 [2023-11-26 11:54:51,246 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:51,246 INFO L85 PathProgramCache]: Analyzing trace with hash 1550869743, now seen corresponding path program 5 times [2023-11-26 11:54:51,247 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:51,247 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191108887] [2023-11-26 11:54:51,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:51,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:51,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:51,444 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2023-11-26 11:54:51,445 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:51,445 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1191108887] [2023-11-26 11:54:51,445 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1191108887] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:51,445 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [349903665] [2023-11-26 11:54:51,445 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-26 11:54:51,445 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:51,445 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:51,453 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:51,470 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2023-11-26 11:54:51,617 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2023-11-26 11:54:51,618 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:54:51,620 INFO L262 TraceCheckSpWp]: Trace formula consists of 210 conjuncts, 7 conjunts are in the unsatisfiable core [2023-11-26 11:54:51,621 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:51,752 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 82 proven. 11 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2023-11-26 11:54:51,752 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:51,962 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 82 proven. 11 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2023-11-26 11:54:51,962 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [349903665] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:51,963 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:51,963 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8, 8] total 13 [2023-11-26 11:54:51,963 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1434190749] [2023-11-26 11:54:51,963 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:51,963 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:54:51,964 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:51,964 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 7 times [2023-11-26 11:54:51,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:51,964 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [804558074] [2023-11-26 11:54:51,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:51,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:51,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:51,978 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:51,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:51,983 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:52,190 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:52,190 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-26 11:54:52,190 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2023-11-26 11:54:52,191 INFO L87 Difference]: Start difference. First operand 73 states and 81 transitions. cyclomatic complexity: 11 Second operand has 13 states, 13 states have (on average 4.538461538461538) internal successors, (59), 13 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:52,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:52,836 INFO L93 Difference]: Finished difference Result 70 states and 75 transitions. [2023-11-26 11:54:52,837 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 75 transitions. [2023-11-26 11:54:52,838 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2023-11-26 11:54:52,838 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 70 states and 75 transitions. [2023-11-26 11:54:52,839 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 60 [2023-11-26 11:54:52,839 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 60 [2023-11-26 11:54:52,839 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 75 transitions. [2023-11-26 11:54:52,839 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:52,840 INFO L218 hiAutomatonCegarLoop]: Abstraction has 70 states and 75 transitions. [2023-11-26 11:54:52,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 75 transitions. [2023-11-26 11:54:52,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2023-11-26 11:54:52,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 70 states have (on average 1.0714285714285714) internal successors, (75), 69 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:52,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 75 transitions. [2023-11-26 11:54:52,848 INFO L240 hiAutomatonCegarLoop]: Abstraction has 70 states and 75 transitions. [2023-11-26 11:54:52,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2023-11-26 11:54:52,852 INFO L428 stractBuchiCegarLoop]: Abstraction has 70 states and 75 transitions. [2023-11-26 11:54:52,855 INFO L335 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2023-11-26 11:54:52,855 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 70 states and 75 transitions. [2023-11-26 11:54:52,855 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2023-11-26 11:54:52,856 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:52,856 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:52,857 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1] [2023-11-26 11:54:52,857 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:54:52,857 INFO L748 eck$LassoCheckResult]: Stem: 4219#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4216#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4203#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4204#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4205#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4206#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4233#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4231#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4229#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4228#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4226#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4222#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4221#L44-3 assume !(main_~i~1#1 >= 0); 4207#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4208#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4218#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4213#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4214#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4217#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4269#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4267#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4265#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4263#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4261#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4259#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4257#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4255#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4251#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4220#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4201#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4202#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4270#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4268#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4266#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4264#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4262#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4260#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4258#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4256#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4254#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4253#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4252#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4250#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4249#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4248#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4247#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4246#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4245#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4244#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4243#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4242#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4241#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4240#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4239#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4238#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4237#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4236#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4235#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4234#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4232#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4230#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4224#L32-3 [2023-11-26 11:54:52,857 INFO L750 eck$LassoCheckResult]: Loop: 4224#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4227#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4225#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4223#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4224#L32-3 [2023-11-26 11:54:52,857 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:52,858 INFO L85 PathProgramCache]: Analyzing trace with hash 673243683, now seen corresponding path program 6 times [2023-11-26 11:54:52,858 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:52,858 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1318634177] [2023-11-26 11:54:52,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:52,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:52,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:52,906 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:52,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:52,950 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:52,951 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:52,951 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 8 times [2023-11-26 11:54:52,951 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:52,951 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869913143] [2023-11-26 11:54:52,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:52,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:52,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:52,956 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:52,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:52,959 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:52,960 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:52,960 INFO L85 PathProgramCache]: Analyzing trace with hash -1965333829, now seen corresponding path program 7 times [2023-11-26 11:54:52,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:52,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [427086003] [2023-11-26 11:54:52,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:52,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:52,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:53,253 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 79 proven. 111 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2023-11-26 11:54:53,253 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:53,253 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [427086003] [2023-11-26 11:54:53,253 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [427086003] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:53,253 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [763344304] [2023-11-26 11:54:53,254 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-26 11:54:53,254 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:53,254 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:53,261 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:53,280 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6d48ee81-5c43-4008-9d87-20a6254199a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2023-11-26 11:54:53,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:53,423 INFO L262 TraceCheckSpWp]: Trace formula consists of 364 conjuncts, 8 conjunts are in the unsatisfiable core [2023-11-26 11:54:53,426 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:54:54,084 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 190 proven. 0 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2023-11-26 11:54:54,084 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:54:54,084 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [763344304] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:54:54,084 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2023-11-26 11:54:54,084 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [7] total 13 [2023-11-26 11:54:54,085 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [29267778] [2023-11-26 11:54:54,085 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:54:54,263 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:54,264 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-26 11:54:54,264 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=135, Unknown=0, NotChecked=0, Total=210 [2023-11-26 11:54:54,264 INFO L87 Difference]: Start difference. First operand 70 states and 75 transitions. cyclomatic complexity: 8 Second operand has 9 states, 8 states have (on average 4.875) internal successors, (39), 8 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:54,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:54,384 INFO L93 Difference]: Finished difference Result 70 states and 74 transitions. [2023-11-26 11:54:54,386 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 74 transitions. [2023-11-26 11:54:54,387 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:54:54,387 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 70 states and 74 transitions. [2023-11-26 11:54:54,388 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 60 [2023-11-26 11:54:54,388 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 60 [2023-11-26 11:54:54,388 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 74 transitions. [2023-11-26 11:54:54,388 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:54,388 INFO L218 hiAutomatonCegarLoop]: Abstraction has 70 states and 74 transitions. [2023-11-26 11:54:54,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 74 transitions. [2023-11-26 11:54:54,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2023-11-26 11:54:54,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 69 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:54,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 74 transitions. [2023-11-26 11:54:54,391 INFO L240 hiAutomatonCegarLoop]: Abstraction has 70 states and 74 transitions. [2023-11-26 11:54:54,401 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2023-11-26 11:54:54,401 INFO L428 stractBuchiCegarLoop]: Abstraction has 70 states and 74 transitions. [2023-11-26 11:54:54,402 INFO L335 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2023-11-26 11:54:54,402 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 70 states and 74 transitions. [2023-11-26 11:54:54,403 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-26 11:54:54,403 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:54,403 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:54,404 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2023-11-26 11:54:54,405 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-26 11:54:54,405 INFO L748 eck$LassoCheckResult]: Stem: 4571#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(20, 3);~#array~0.base, ~#array~0.offset := 3, 0;call write~init~int#1(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int#1(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4568#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4555#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4556#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4557#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4558#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4585#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4583#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4581#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4579#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4577#L44-3 assume !!(main_~i~1#1 >= 0);call write~int#2(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4574#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4573#L44-3 assume !(main_~i~1#1 >= 0); 4559#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4560#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4570#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4565#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4566#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4569#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4621#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4619#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4617#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4615#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4613#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4611#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4609#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4607#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4603#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4572#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4553#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4554#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4622#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4620#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4618#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4616#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4614#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4612#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4610#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4608#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4606#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4605#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4604#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4602#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4601#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4600#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4599#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4598#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4597#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4596#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4595#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4594#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4593#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4592#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4591#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4590#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4589#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4588#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4587#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4586#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4584#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4582#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4580#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4578#L32-4 call SelectionSort_#t~mem5#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int#1(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int#1(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int#1(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4576#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4575#L30-3 assume !(SelectionSort_~lh~0#1 < ~n~0); 4567#L26 havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;assume { :end_inline_SelectionSort } true;main_~i~1#1 := 0; 4564#L49-3 [2023-11-26 11:54:54,406 INFO L750 eck$LassoCheckResult]: Loop: 4564#L49-3 assume !!(main_~i~1#1 < 5);call main_#t~mem9#1 := read~int#2(main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4);assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if main_#t~mem9#1 == main_~i~1#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 4561#L15 assume !(0 == __VERIFIER_assert_~cond#1); 4562#L15-2 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true;havoc main_#t~mem9#1; 4563#L49-2 main_#t~post8#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post8#1;havoc main_#t~post8#1; 4564#L49-3 [2023-11-26 11:54:54,406 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:54,406 INFO L85 PathProgramCache]: Analyzing trace with hash -795806568, now seen corresponding path program 2 times [2023-11-26 11:54:54,406 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:54,407 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813725163] [2023-11-26 11:54:54,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:54,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:54,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:54,451 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:54,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:54,498 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:54,499 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:54,499 INFO L85 PathProgramCache]: Analyzing trace with hash 2692209, now seen corresponding path program 2 times [2023-11-26 11:54:54,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:54,500 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [889567873] [2023-11-26 11:54:54,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:54,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:54,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:54,504 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:54,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:54,508 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:54,508 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:54,509 INFO L85 PathProgramCache]: Analyzing trace with hash 2138039688, now seen corresponding path program 1 times [2023-11-26 11:54:54,509 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:54,509 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [276170375] [2023-11-26 11:54:54,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:54,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:54,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:54,623 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:54,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:54,665 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace