./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.5.1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.5.1.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2c3b1a53bc376cbb6283db57f6430d0a17b3acc99aa70ab198c7c36e6e59ecc9 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 12:01:01,172 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 12:01:01,314 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 12:01:01,321 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 12:01:01,322 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 12:01:01,364 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 12:01:01,365 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 12:01:01,365 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 12:01:01,366 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 12:01:01,372 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 12:01:01,373 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 12:01:01,374 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 12:01:01,374 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 12:01:01,376 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 12:01:01,377 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 12:01:01,377 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 12:01:01,378 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 12:01:01,378 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 12:01:01,379 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 12:01:01,379 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 12:01:01,380 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 12:01:01,380 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 12:01:01,381 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 12:01:01,381 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 12:01:01,382 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 12:01:01,382 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 12:01:01,382 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 12:01:01,383 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 12:01:01,383 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 12:01:01,384 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 12:01:01,385 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 12:01:01,386 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 12:01:01,386 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 12:01:01,386 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 12:01:01,386 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 12:01:01,387 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 12:01:01,387 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 12:01:01,388 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 12:01:01,388 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2c3b1a53bc376cbb6283db57f6430d0a17b3acc99aa70ab198c7c36e6e59ecc9 [2023-11-26 12:01:01,725 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 12:01:01,759 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 12:01:01,762 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 12:01:01,764 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 12:01:01,765 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 12:01:01,766 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.5.1.ufo.BOUNDED-10.pals.c [2023-11-26 12:01:04,968 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 12:01:05,253 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 12:01:05,254 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/sv-benchmarks/c/seq-mthreaded/pals_lcr.5.1.ufo.BOUNDED-10.pals.c [2023-11-26 12:01:05,266 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/data/dbb880a61/1b900520937c4703ad8ae05cb795ace4/FLAG5d092032b [2023-11-26 12:01:05,282 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/data/dbb880a61/1b900520937c4703ad8ae05cb795ace4 [2023-11-26 12:01:05,285 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 12:01:05,287 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 12:01:05,288 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 12:01:05,289 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 12:01:05,295 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 12:01:05,296 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,297 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1e41b5a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05, skipping insertion in model container [2023-11-26 12:01:05,297 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,342 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 12:01:05,654 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:01:05,684 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 12:01:05,768 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:01:05,789 INFO L206 MainTranslator]: Completed translation [2023-11-26 12:01:05,789 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05 WrapperNode [2023-11-26 12:01:05,790 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 12:01:05,791 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 12:01:05,791 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 12:01:05,791 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 12:01:05,800 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,810 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,869 INFO L138 Inliner]: procedures = 24, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 317 [2023-11-26 12:01:05,870 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 12:01:05,871 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 12:01:05,871 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 12:01:05,871 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 12:01:05,886 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,888 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,897 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,923 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2023-11-26 12:01:05,923 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,924 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,948 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,956 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,960 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,973 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,977 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 12:01:05,978 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 12:01:05,978 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 12:01:05,979 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 12:01:05,979 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (1/1) ... [2023-11-26 12:01:05,996 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:06,016 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:06,033 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:06,058 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d1cf22e-620d-424f-8492-7a85b1ed041b/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 12:01:06,084 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 12:01:06,085 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 12:01:06,085 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 12:01:06,085 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 12:01:06,245 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 12:01:06,247 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 12:01:06,762 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 12:01:06,774 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 12:01:06,775 INFO L309 CfgBuilder]: Removed 1 assume(true) statements. [2023-11-26 12:01:06,777 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:01:06 BoogieIcfgContainer [2023-11-26 12:01:06,777 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 12:01:06,778 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 12:01:06,779 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 12:01:06,783 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 12:01:06,784 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:01:06,784 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 12:01:05" (1/3) ... [2023-11-26 12:01:06,786 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7b896dff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:01:06, skipping insertion in model container [2023-11-26 12:01:06,786 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:01:06,786 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:05" (2/3) ... [2023-11-26 12:01:06,786 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7b896dff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:01:06, skipping insertion in model container [2023-11-26 12:01:06,787 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:01:06,787 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:01:06" (3/3) ... [2023-11-26 12:01:06,788 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.5.1.ufo.BOUNDED-10.pals.c [2023-11-26 12:01:06,941 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 12:01:06,941 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 12:01:06,942 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 12:01:06,943 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 12:01:06,943 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 12:01:06,943 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 12:01:06,943 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 12:01:06,944 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 12:01:06,951 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 83 states, 82 states have (on average 1.7317073170731707) internal successors, (142), 82 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:06,990 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 42 [2023-11-26 12:01:06,990 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:06,990 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:06,999 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:06,999 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:06,999 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 12:01:07,000 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 83 states, 82 states have (on average 1.7317073170731707) internal successors, (142), 82 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:07,007 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 42 [2023-11-26 12:01:07,007 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:07,007 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:07,009 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:07,009 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:07,019 INFO L748 eck$LassoCheckResult]: Stem: 37#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0; 48#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 3#L198true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 27#L198-1true init_#res#1 := init_~tmp~0#1; 25#init_returnLabel#1true main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 53#L22true assume !(0 == assume_abort_if_not_~cond#1); 35#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 13#L395-2true [2023-11-26 12:01:07,020 INFO L750 eck$LassoCheckResult]: Loop: 13#L395-2true assume !!(main_~i2~0#1 < 10);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 5#L71true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 71#L71-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 51#L99true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 56#L99-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 15#L124true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 77#L124-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 28#L149true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 61#L149-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 73#L174true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 55#L174-2true havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 11#L331true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1);check_~tmp~1#1 := 0; 32#L331-1true check_#res#1 := check_~tmp~1#1; 17#check_returnLabel#1true main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 45#L425true assume !(0 == assert_~arg#1 % 256); 43#L420true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1; 13#L395-2true [2023-11-26 12:01:07,027 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:07,027 INFO L85 PathProgramCache]: Analyzing trace with hash 1978587388, now seen corresponding path program 1 times [2023-11-26 12:01:07,045 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:07,046 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1013607362] [2023-11-26 12:01:07,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:07,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:07,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:07,359 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:07,360 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:07,360 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1013607362] [2023-11-26 12:01:07,360 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1013607362] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:01:07,361 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:01:07,361 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 12:01:07,362 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828448430] [2023-11-26 12:01:07,363 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:01:07,366 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:01:07,367 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:07,367 INFO L85 PathProgramCache]: Analyzing trace with hash 908352884, now seen corresponding path program 1 times [2023-11-26 12:01:07,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:07,368 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930244130] [2023-11-26 12:01:07,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:07,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:07,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:07,866 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:07,866 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:07,867 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930244130] [2023-11-26 12:01:07,867 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1930244130] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:01:07,868 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:01:07,868 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 12:01:07,868 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1644357064] [2023-11-26 12:01:07,868 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:01:07,870 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:01:07,871 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:07,923 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 12:01:07,924 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-11-26 12:01:07,927 INFO L87 Difference]: Start difference. First operand has 83 states, 82 states have (on average 1.7317073170731707) internal successors, (142), 82 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:08,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:08,087 INFO L93 Difference]: Finished difference Result 85 states and 140 transitions. [2023-11-26 12:01:08,088 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 140 transitions. [2023-11-26 12:01:08,094 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2023-11-26 12:01:08,104 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 77 states and 102 transitions. [2023-11-26 12:01:08,109 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2023-11-26 12:01:08,111 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2023-11-26 12:01:08,112 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 102 transitions. [2023-11-26 12:01:08,113 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:01:08,113 INFO L218 hiAutomatonCegarLoop]: Abstraction has 77 states and 102 transitions. [2023-11-26 12:01:08,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 102 transitions. [2023-11-26 12:01:08,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2023-11-26 12:01:08,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.3246753246753247) internal successors, (102), 76 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:08,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 102 transitions. [2023-11-26 12:01:08,163 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 102 transitions. [2023-11-26 12:01:08,165 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 12:01:08,169 INFO L428 stractBuchiCegarLoop]: Abstraction has 77 states and 102 transitions. [2023-11-26 12:01:08,170 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 12:01:08,170 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 102 transitions. [2023-11-26 12:01:08,177 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2023-11-26 12:01:08,177 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:08,177 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:08,182 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:08,183 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:08,187 INFO L748 eck$LassoCheckResult]: Stem: 240#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0; 241#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 186#L198 assume 0 == ~r1~0; 187#L199 assume ~id1~0 >= 0; 243#L200 assume 0 == ~st1~0; 244#L201 assume ~send1~0 == ~id1~0; 219#L202 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 220#L203 assume ~id2~0 >= 0; 236#L204 assume 0 == ~st2~0; 198#L205 assume ~send2~0 == ~id2~0; 199#L206 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 188#L207 assume ~id3~0 >= 0; 189#L208 assume 0 == ~st3~0; 247#L209 assume ~send3~0 == ~id3~0; 200#L210 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 201#L211 assume ~id4~0 >= 0; 193#L212 assume 0 == ~st4~0; 194#L213 assume ~send4~0 == ~id4~0; 259#L214 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 260#L215 assume ~id5~0 >= 0; 246#L216 assume 0 == ~st5~0; 226#L217 assume ~send5~0 == ~id5~0; 227#L218 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 248#L219 assume ~id1~0 != ~id2~0; 262#L220 assume ~id1~0 != ~id3~0; 216#L221 assume ~id1~0 != ~id4~0; 214#L222 assume ~id1~0 != ~id5~0; 215#L223 assume ~id2~0 != ~id3~0; 209#L224 assume ~id2~0 != ~id4~0; 210#L225 assume ~id2~0 != ~id5~0; 206#L226 assume ~id3~0 != ~id4~0; 207#L227 assume ~id3~0 != ~id5~0; 221#L228 assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1; 222#L198-1 init_#res#1 := init_~tmp~0#1; 228#init_returnLabel#1 main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 229#L22 assume !(0 == assume_abort_if_not_~cond#1); 238#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 208#L395-2 [2023-11-26 12:01:08,187 INFO L750 eck$LassoCheckResult]: Loop: 208#L395-2 assume !!(main_~i2~0#1 < 10);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 190#L71 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 192#L71-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 249#L99 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 225#L99-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 211#L124 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 213#L124-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 232#L149 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 202#L149-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 255#L174 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 252#L174-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 203#L331 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1);check_~tmp~1#1 := 0; 205#L331-1 check_#res#1 := check_~tmp~1#1; 217#check_returnLabel#1 main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 218#L425 assume !(0 == assert_~arg#1 % 256); 245#L420 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1; 208#L395-2 [2023-11-26 12:01:08,189 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:08,189 INFO L85 PathProgramCache]: Analyzing trace with hash -1992034189, now seen corresponding path program 1 times [2023-11-26 12:01:08,189 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:08,189 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1769189783] [2023-11-26 12:01:08,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:08,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:08,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,240 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:08,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,362 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:08,363 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:08,363 INFO L85 PathProgramCache]: Analyzing trace with hash 908352884, now seen corresponding path program 2 times [2023-11-26 12:01:08,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:08,365 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1675938467] [2023-11-26 12:01:08,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:08,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:08,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:08,687 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:08,687 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:08,687 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1675938467] [2023-11-26 12:01:08,688 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1675938467] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:01:08,688 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:01:08,688 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 12:01:08,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367233064] [2023-11-26 12:01:08,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:01:08,690 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:01:08,691 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:08,691 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 12:01:08,692 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-11-26 12:01:08,692 INFO L87 Difference]: Start difference. First operand 77 states and 102 transitions. cyclomatic complexity: 26 Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:08,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:08,768 INFO L93 Difference]: Finished difference Result 80 states and 104 transitions. [2023-11-26 12:01:08,769 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 80 states and 104 transitions. [2023-11-26 12:01:08,771 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2023-11-26 12:01:08,772 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 80 states to 77 states and 99 transitions. [2023-11-26 12:01:08,772 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2023-11-26 12:01:08,773 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2023-11-26 12:01:08,773 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 99 transitions. [2023-11-26 12:01:08,773 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:01:08,774 INFO L218 hiAutomatonCegarLoop]: Abstraction has 77 states and 99 transitions. [2023-11-26 12:01:08,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 99 transitions. [2023-11-26 12:01:08,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2023-11-26 12:01:08,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.2857142857142858) internal successors, (99), 76 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:08,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 99 transitions. [2023-11-26 12:01:08,791 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 99 transitions. [2023-11-26 12:01:08,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 12:01:08,792 INFO L428 stractBuchiCegarLoop]: Abstraction has 77 states and 99 transitions. [2023-11-26 12:01:08,792 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 12:01:08,793 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 99 transitions. [2023-11-26 12:01:08,794 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2023-11-26 12:01:08,794 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:08,794 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:08,796 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:08,796 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:08,796 INFO L748 eck$LassoCheckResult]: Stem: 409#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0; 410#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 355#L198 assume 0 == ~r1~0; 356#L199 assume ~id1~0 >= 0; 412#L200 assume 0 == ~st1~0; 413#L201 assume ~send1~0 == ~id1~0; 387#L202 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 388#L203 assume ~id2~0 >= 0; 402#L204 assume 0 == ~st2~0; 364#L205 assume ~send2~0 == ~id2~0; 365#L206 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 357#L207 assume ~id3~0 >= 0; 358#L208 assume 0 == ~st3~0; 416#L209 assume ~send3~0 == ~id3~0; 369#L210 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 370#L211 assume ~id4~0 >= 0; 359#L212 assume 0 == ~st4~0; 360#L213 assume ~send4~0 == ~id4~0; 428#L214 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 429#L215 assume ~id5~0 >= 0; 415#L216 assume 0 == ~st5~0; 392#L217 assume ~send5~0 == ~id5~0; 393#L218 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 417#L219 assume ~id1~0 != ~id2~0; 431#L220 assume ~id1~0 != ~id3~0; 384#L221 assume ~id1~0 != ~id4~0; 382#L222 assume ~id1~0 != ~id5~0; 383#L223 assume ~id2~0 != ~id3~0; 377#L224 assume ~id2~0 != ~id4~0; 378#L225 assume ~id2~0 != ~id5~0; 374#L226 assume ~id3~0 != ~id4~0; 375#L227 assume ~id3~0 != ~id5~0; 389#L228 assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1; 390#L198-1 init_#res#1 := init_~tmp~0#1; 396#init_returnLabel#1 main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 397#L22 assume !(0 == assume_abort_if_not_~cond#1); 407#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 376#L395-2 [2023-11-26 12:01:08,796 INFO L750 eck$LassoCheckResult]: Loop: 376#L395-2 assume !!(main_~i2~0#1 < 10);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 361#L71 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 363#L71-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 418#L99 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 395#L99-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 379#L124 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 381#L124-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 400#L149 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 371#L149-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 424#L174 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 421#L174-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 372#L331 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1; 373#L332 assume ~r1~0 >= 5; 399#$Ultimate##169 assume ~r1~0 < 5;check_~tmp~1#1 := 1; 405#L331-1 check_#res#1 := check_~tmp~1#1; 385#check_returnLabel#1 main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 386#L425 assume !(0 == assert_~arg#1 % 256); 414#L420 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1; 376#L395-2 [2023-11-26 12:01:08,797 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:08,797 INFO L85 PathProgramCache]: Analyzing trace with hash -1992034189, now seen corresponding path program 2 times [2023-11-26 12:01:08,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:08,798 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1978313098] [2023-11-26 12:01:08,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:08,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:08,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,818 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:08,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,873 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:08,874 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:08,874 INFO L85 PathProgramCache]: Analyzing trace with hash -367120764, now seen corresponding path program 1 times [2023-11-26 12:01:08,874 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:08,876 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1741117698] [2023-11-26 12:01:08,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:08,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:08,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:08,928 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:08,928 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:08,929 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1741117698] [2023-11-26 12:01:08,929 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1741117698] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:01:08,929 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:01:08,929 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 12:01:08,930 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2131812897] [2023-11-26 12:01:08,930 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:01:08,930 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:01:08,931 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:08,932 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 12:01:08,932 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 12:01:08,932 INFO L87 Difference]: Start difference. First operand 77 states and 99 transitions. cyclomatic complexity: 23 Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:08,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:08,965 INFO L93 Difference]: Finished difference Result 111 states and 150 transitions. [2023-11-26 12:01:08,966 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 111 states and 150 transitions. [2023-11-26 12:01:08,968 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 74 [2023-11-26 12:01:08,970 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 111 states to 111 states and 150 transitions. [2023-11-26 12:01:08,970 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 111 [2023-11-26 12:01:08,971 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 111 [2023-11-26 12:01:08,971 INFO L73 IsDeterministic]: Start isDeterministic. Operand 111 states and 150 transitions. [2023-11-26 12:01:08,972 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:01:08,972 INFO L218 hiAutomatonCegarLoop]: Abstraction has 111 states and 150 transitions. [2023-11-26 12:01:08,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states and 150 transitions. [2023-11-26 12:01:08,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2023-11-26 12:01:08,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 111 states have (on average 1.3513513513513513) internal successors, (150), 110 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:08,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 150 transitions. [2023-11-26 12:01:08,981 INFO L240 hiAutomatonCegarLoop]: Abstraction has 111 states and 150 transitions. [2023-11-26 12:01:08,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 12:01:08,982 INFO L428 stractBuchiCegarLoop]: Abstraction has 111 states and 150 transitions. [2023-11-26 12:01:08,983 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 12:01:08,983 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 111 states and 150 transitions. [2023-11-26 12:01:08,984 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 74 [2023-11-26 12:01:08,985 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:08,985 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:08,986 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:08,987 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:08,987 INFO L748 eck$LassoCheckResult]: Stem: 606#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0; 607#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 549#L198 assume 0 == ~r1~0; 550#L199 assume ~id1~0 >= 0; 609#L200 assume 0 == ~st1~0; 610#L201 assume ~send1~0 == ~id1~0; 581#L202 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 582#L203 assume ~id2~0 >= 0; 600#L204 assume 0 == ~st2~0; 561#L205 assume ~send2~0 == ~id2~0; 562#L206 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 551#L207 assume ~id3~0 >= 0; 552#L208 assume 0 == ~st3~0; 613#L209 assume ~send3~0 == ~id3~0; 563#L210 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 564#L211 assume ~id4~0 >= 0; 556#L212 assume 0 == ~st4~0; 557#L213 assume ~send4~0 == ~id4~0; 625#L214 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 626#L215 assume ~id5~0 >= 0; 612#L216 assume 0 == ~st5~0; 588#L217 assume ~send5~0 == ~id5~0; 589#L218 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 614#L219 assume ~id1~0 != ~id2~0; 628#L220 assume ~id1~0 != ~id3~0; 580#L221 assume ~id1~0 != ~id4~0; 576#L222 assume ~id1~0 != ~id5~0; 577#L223 assume ~id2~0 != ~id3~0; 571#L224 assume ~id2~0 != ~id4~0; 572#L225 assume ~id2~0 != ~id5~0; 568#L226 assume ~id3~0 != ~id4~0; 569#L227 assume ~id3~0 != ~id5~0; 583#L228 assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1; 584#L198-1 init_#res#1 := init_~tmp~0#1; 590#init_returnLabel#1 main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 591#L22 assume !(0 == assume_abort_if_not_~cond#1); 604#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 605#L395-2 [2023-11-26 12:01:08,988 INFO L750 eck$LassoCheckResult]: Loop: 605#L395-2 assume !!(main_~i2~0#1 < 10);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 655#L71 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 602#L71-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 650#L99 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 649#L99-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 645#L124 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 641#L124-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 639#L149 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 637#L149-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 633#L174 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 631#L174-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 630#L331 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1; 629#L332 assume !(~r1~0 >= 5); 592#L335 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0; 593#$Ultimate##169 assume ~r1~0 < 5;check_~tmp~1#1 := 1; 659#L331-1 check_#res#1 := check_~tmp~1#1; 658#check_returnLabel#1 main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 657#L425 assume !(0 == assert_~arg#1 % 256); 656#L420 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1; 605#L395-2 [2023-11-26 12:01:08,988 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:08,988 INFO L85 PathProgramCache]: Analyzing trace with hash -1992034189, now seen corresponding path program 3 times [2023-11-26 12:01:08,989 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:08,989 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1684644656] [2023-11-26 12:01:08,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:08,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:09,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:09,007 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:09,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:09,029 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:09,030 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:09,030 INFO L85 PathProgramCache]: Analyzing trace with hash -1144239062, now seen corresponding path program 1 times [2023-11-26 12:01:09,030 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:09,030 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873748448] [2023-11-26 12:01:09,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:09,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:09,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:09,061 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:09,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:09,132 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:09,133 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:09,133 INFO L85 PathProgramCache]: Analyzing trace with hash -1687762312, now seen corresponding path program 1 times [2023-11-26 12:01:09,133 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:09,134 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1302622007] [2023-11-26 12:01:09,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:09,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:09,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:09,180 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:09,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:09,227 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:15,484 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:01:15,485 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:01:15,485 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:01:15,486 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:01:15,487 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 12:01:15,487 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:15,487 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:01:15,487 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:01:15,487 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.5.1.ufo.BOUNDED-10.pals.c_Iteration4_Loop [2023-11-26 12:01:15,487 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:01:15,488 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:01:15,568 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:15,578 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:15,584 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:15,590 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:15,593 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:15,596 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:15,599 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:15,602 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:15,604 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,337 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,342 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,350 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,354 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,357 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,360 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,367 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,374 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,377 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,384 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,388 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,392 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:21,981 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 34