./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 65159196aa732cf84d788dcb31500c216d665703806e14a7c6f7047ab62d591b --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:45:10,025 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:45:10,115 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:45:10,121 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:45:10,122 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:45:10,153 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:45:10,154 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:45:10,154 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:45:10,155 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:45:10,156 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:45:10,157 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:45:10,158 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:45:10,159 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:45:10,159 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:45:10,160 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:45:10,161 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:45:10,161 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:45:10,162 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:45:10,162 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:45:10,163 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:45:10,164 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:45:10,165 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:45:10,165 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:45:10,166 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:45:10,166 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:45:10,167 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:45:10,168 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:45:10,168 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:45:10,169 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:45:10,170 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:45:10,170 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:45:10,171 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:45:10,171 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:45:10,172 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:45:10,173 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:45:10,173 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:45:10,174 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:45:10,175 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:45:10,175 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 65159196aa732cf84d788dcb31500c216d665703806e14a7c6f7047ab62d591b [2023-11-26 11:45:10,484 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:45:10,517 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:45:10,521 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:45:10,523 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:45:10,524 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:45:10,526 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c [2023-11-26 11:45:13,645 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:45:13,894 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:45:13,895 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c [2023-11-26 11:45:13,919 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/data/1673be003/f8149249344044e0a55fd5b6d655f7d9/FLAG14fafe81c [2023-11-26 11:45:13,935 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/data/1673be003/f8149249344044e0a55fd5b6d655f7d9 [2023-11-26 11:45:13,938 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:45:13,939 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:45:13,941 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:45:13,942 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:45:13,947 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:45:13,948 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:45:13" (1/1) ... [2023-11-26 11:45:13,950 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f431da and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:13, skipping insertion in model container [2023-11-26 11:45:13,950 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:45:13" (1/1) ... [2023-11-26 11:45:14,010 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:45:14,246 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:45:14,259 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:45:14,335 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:45:14,370 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:45:14,371 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14 WrapperNode [2023-11-26 11:45:14,371 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:45:14,372 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:45:14,372 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:45:14,372 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:45:14,380 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,395 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,437 INFO L138 Inliner]: procedures = 25, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 372 [2023-11-26 11:45:14,438 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:45:14,438 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:45:14,439 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:45:14,439 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:45:14,452 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,452 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,456 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,485 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2023-11-26 11:45:14,485 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,486 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,496 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,518 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,521 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,523 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,536 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:45:14,537 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:45:14,537 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:45:14,537 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:45:14,538 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (1/1) ... [2023-11-26 11:45:14,548 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:14,561 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:45:14,576 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:45:14,599 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d6097133-ff0e-4cd7-8a92-297b1350fd32/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:45:14,629 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:45:14,630 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:45:14,630 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:45:14,631 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:45:14,796 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:45:14,799 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:45:15,503 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:45:15,523 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:45:15,524 INFO L309 CfgBuilder]: Removed 1 assume(true) statements. [2023-11-26 11:45:15,526 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:45:15 BoogieIcfgContainer [2023-11-26 11:45:15,526 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:45:15,531 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:45:15,531 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:45:15,535 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:45:15,535 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:45:15,536 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:45:13" (1/3) ... [2023-11-26 11:45:15,537 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@501758de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:45:15, skipping insertion in model container [2023-11-26 11:45:15,537 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:45:15,537 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:45:14" (2/3) ... [2023-11-26 11:45:15,538 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@501758de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:45:15, skipping insertion in model container [2023-11-26 11:45:15,538 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:45:15,538 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:45:15" (3/3) ... [2023-11-26 11:45:15,540 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.6.ufo.BOUNDED-12.pals.c [2023-11-26 11:45:15,608 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:45:15,608 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:45:15,608 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:45:15,608 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:45:15,608 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:45:15,609 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:45:15,609 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:45:15,609 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:45:15,616 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 98 states, 97 states have (on average 1.7525773195876289) internal successors, (170), 97 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:15,646 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 48 [2023-11-26 11:45:15,646 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:15,646 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:15,655 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:45:15,656 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:45:15,656 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:45:15,657 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 98 states, 97 states have (on average 1.7525773195876289) internal successors, (170), 97 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:15,666 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 48 [2023-11-26 11:45:15,666 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:15,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:15,667 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:45:15,668 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:45:15,678 INFO L748 eck$LassoCheckResult]: Stem: 31#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 35#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 64#L228true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 43#L228-1true init_#res#1 := init_~tmp~0#1; 66#init_returnLabel#1true main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 38#L22true assume !(0 == assume_abort_if_not_~cond#1); 69#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 74#L467-2true [2023-11-26 11:45:15,679 INFO L750 eck$LassoCheckResult]: Loop: 74#L467-2true assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 19#L78true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 39#L78-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 17#L104true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 95#L104-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 81#L129true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 10#L129-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 68#L154true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 96#L154-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 85#L179true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 21#L179-2true havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 78#L204true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 70#L204-2true havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 87#L397true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 75#L397-1true check_#res#1 := check_~tmp~1#1; 15#check_returnLabel#1true main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 83#L500true assume !(0 == assert_~arg#1 % 256); 22#L495true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 74#L467-2true [2023-11-26 11:45:15,686 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:15,686 INFO L85 PathProgramCache]: Analyzing trace with hash 2030119858, now seen corresponding path program 1 times [2023-11-26 11:45:15,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:15,699 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1525955926] [2023-11-26 11:45:15,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:15,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:15,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:16,136 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:16,137 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:16,137 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1525955926] [2023-11-26 11:45:16,138 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1525955926] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:45:16,138 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:45:16,139 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:45:16,141 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [42686297] [2023-11-26 11:45:16,141 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:45:16,147 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:45:16,148 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:16,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415403, now seen corresponding path program 1 times [2023-11-26 11:45:16,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:16,149 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87721769] [2023-11-26 11:45:16,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:16,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:16,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:16,692 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:16,692 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:16,693 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [87721769] [2023-11-26 11:45:16,693 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [87721769] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:45:16,694 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:45:16,694 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:45:16,694 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446932634] [2023-11-26 11:45:16,694 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:45:16,696 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:45:16,698 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:45:16,737 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:45:16,738 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:45:16,740 INFO L87 Difference]: Start difference. First operand has 98 states, 97 states have (on average 1.7525773195876289) internal successors, (170), 97 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:16,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:45:16,865 INFO L93 Difference]: Finished difference Result 100 states and 168 transitions. [2023-11-26 11:45:16,866 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 168 transitions. [2023-11-26 11:45:16,871 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2023-11-26 11:45:16,876 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 92 states and 121 transitions. [2023-11-26 11:45:16,877 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2023-11-26 11:45:16,878 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2023-11-26 11:45:16,879 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 121 transitions. [2023-11-26 11:45:16,880 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:45:16,880 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2023-11-26 11:45:16,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 121 transitions. [2023-11-26 11:45:16,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2023-11-26 11:45:16,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.315217391304348) internal successors, (121), 91 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:16,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 121 transitions. [2023-11-26 11:45:16,917 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2023-11-26 11:45:16,918 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:45:16,922 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 121 transitions. [2023-11-26 11:45:16,923 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:45:16,923 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 121 transitions. [2023-11-26 11:45:16,925 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2023-11-26 11:45:16,926 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:16,926 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:16,928 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:45:16,928 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:45:16,930 INFO L748 eck$LassoCheckResult]: Stem: 288#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 289#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 261#L228 assume 0 == ~r1~0; 262#L229 assume ~id1~0 >= 0; 232#L230 assume 0 == ~st1~0; 233#L231 assume ~send1~0 == ~id1~0; 246#L232 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 306#L233 assume ~id2~0 >= 0; 222#L234 assume 0 == ~st2~0; 223#L235 assume ~send2~0 == ~id2~0; 297#L236 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 292#L237 assume ~id3~0 >= 0; 278#L238 assume 0 == ~st3~0; 279#L239 assume ~send3~0 == ~id3~0; 276#L240 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 277#L241 assume ~id4~0 >= 0; 281#L242 assume 0 == ~st4~0; 240#L243 assume ~send4~0 == ~id4~0; 234#L244 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 235#L245 assume ~id5~0 >= 0; 280#L246 assume 0 == ~st5~0; 294#L247 assume ~send5~0 == ~id5~0; 295#L248 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 224#L249 assume ~id6~0 >= 0; 225#L250 assume 0 == ~st6~0; 247#L251 assume ~send6~0 == ~id6~0; 248#L252 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 252#L253 assume ~id1~0 != ~id2~0; 253#L254 assume ~id1~0 != ~id3~0; 254#L255 assume ~id1~0 != ~id4~0; 255#L256 assume ~id1~0 != ~id5~0; 301#L257 assume ~id1~0 != ~id6~0; 290#L258 assume ~id2~0 != ~id3~0; 216#L259 assume ~id2~0 != ~id4~0; 217#L260 assume ~id2~0 != ~id5~0; 307#L261 assume ~id2~0 != ~id6~0; 303#L262 assume ~id3~0 != ~id4~0; 304#L263 assume ~id3~0 != ~id5~0; 305#L264 assume ~id3~0 != ~id6~0; 220#L265 assume ~id4~0 != ~id5~0; 221#L266 assume ~id4~0 != ~id6~0; 241#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 275#L228-1 init_#res#1 := init_~tmp~0#1; 272#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 273#L22 assume !(0 == assume_abort_if_not_~cond#1); 285#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 271#L467-2 [2023-11-26 11:45:16,930 INFO L750 eck$LassoCheckResult]: Loop: 271#L467-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 265#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 239#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 258#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 260#L104-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 298#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 242#L129-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 243#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 251#L154-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 302#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 268#L179-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 269#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 286#L204-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 287#L397 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 237#L397-1 check_#res#1 := check_~tmp~1#1; 256#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 257#L500 assume !(0 == assert_~arg#1 % 256); 270#L495 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 271#L467-2 [2023-11-26 11:45:16,931 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:16,931 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 1 times [2023-11-26 11:45:16,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:16,931 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935980225] [2023-11-26 11:45:16,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:16,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:16,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:16,964 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:16,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:17,025 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:17,026 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:17,026 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415403, now seen corresponding path program 2 times [2023-11-26 11:45:17,027 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:17,027 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429818559] [2023-11-26 11:45:17,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:17,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:17,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:17,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:17,378 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:17,378 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [429818559] [2023-11-26 11:45:17,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [429818559] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:45:17,379 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:45:17,379 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:45:17,379 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [790681090] [2023-11-26 11:45:17,380 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:45:17,381 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:45:17,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:45:17,382 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:45:17,382 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:45:17,383 INFO L87 Difference]: Start difference. First operand 92 states and 121 transitions. cyclomatic complexity: 30 Second operand has 5 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:17,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:45:17,446 INFO L93 Difference]: Finished difference Result 95 states and 123 transitions. [2023-11-26 11:45:17,446 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 123 transitions. [2023-11-26 11:45:17,455 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2023-11-26 11:45:17,459 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 92 states and 118 transitions. [2023-11-26 11:45:17,460 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2023-11-26 11:45:17,461 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2023-11-26 11:45:17,461 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 118 transitions. [2023-11-26 11:45:17,462 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:45:17,463 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2023-11-26 11:45:17,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 118 transitions. [2023-11-26 11:45:17,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2023-11-26 11:45:17,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.2826086956521738) internal successors, (118), 91 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:17,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 118 transitions. [2023-11-26 11:45:17,474 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2023-11-26 11:45:17,475 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:45:17,481 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 118 transitions. [2023-11-26 11:45:17,481 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:45:17,482 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 118 transitions. [2023-11-26 11:45:17,487 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2023-11-26 11:45:17,487 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:17,488 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:17,492 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:45:17,493 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:45:17,493 INFO L748 eck$LassoCheckResult]: Stem: 487#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 488#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 460#L228 assume 0 == ~r1~0; 461#L229 assume ~id1~0 >= 0; 431#L230 assume 0 == ~st1~0; 432#L231 assume ~send1~0 == ~id1~0; 445#L232 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 505#L233 assume ~id2~0 >= 0; 421#L234 assume 0 == ~st2~0; 422#L235 assume ~send2~0 == ~id2~0; 496#L236 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 491#L237 assume ~id3~0 >= 0; 477#L238 assume 0 == ~st3~0; 478#L239 assume ~send3~0 == ~id3~0; 475#L240 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 476#L241 assume ~id4~0 >= 0; 483#L242 assume 0 == ~st4~0; 438#L243 assume ~send4~0 == ~id4~0; 435#L244 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 436#L245 assume ~id5~0 >= 0; 479#L246 assume 0 == ~st5~0; 493#L247 assume ~send5~0 == ~id5~0; 494#L248 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 426#L249 assume ~id6~0 >= 0; 427#L250 assume 0 == ~st6~0; 446#L251 assume ~send6~0 == ~id6~0; 447#L252 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 453#L253 assume ~id1~0 != ~id2~0; 454#L254 assume ~id1~0 != ~id3~0; 455#L255 assume ~id1~0 != ~id4~0; 456#L256 assume ~id1~0 != ~id5~0; 500#L257 assume ~id1~0 != ~id6~0; 489#L258 assume ~id2~0 != ~id3~0; 415#L259 assume ~id2~0 != ~id4~0; 416#L260 assume ~id2~0 != ~id5~0; 506#L261 assume ~id2~0 != ~id6~0; 502#L262 assume ~id3~0 != ~id4~0; 503#L263 assume ~id3~0 != ~id5~0; 504#L264 assume ~id3~0 != ~id6~0; 419#L265 assume ~id4~0 != ~id5~0; 420#L266 assume ~id4~0 != ~id6~0; 439#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 474#L228-1 init_#res#1 := init_~tmp~0#1; 471#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 472#L22 assume !(0 == assume_abort_if_not_~cond#1); 484#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 470#L467-2 [2023-11-26 11:45:17,493 INFO L750 eck$LassoCheckResult]: Loop: 470#L467-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 466#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 437#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 457#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 459#L104-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 497#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 441#L129-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 442#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 450#L154-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 501#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 464#L179-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 465#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 485#L204-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 486#L397 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 499#L398 assume ~r1~0 >= 6; 434#$Ultimate##208 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 443#L397-1 check_#res#1 := check_~tmp~1#1; 451#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 452#L500 assume !(0 == assert_~arg#1 % 256); 469#L495 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 470#L467-2 [2023-11-26 11:45:17,494 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:17,494 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 2 times [2023-11-26 11:45:17,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:17,495 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1637750577] [2023-11-26 11:45:17,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:17,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:17,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:17,542 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:17,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:17,583 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:17,583 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:17,584 INFO L85 PathProgramCache]: Analyzing trace with hash -204006085, now seen corresponding path program 1 times [2023-11-26 11:45:17,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:17,584 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589785326] [2023-11-26 11:45:17,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:17,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:17,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:45:17,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:45:17,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:45:17,626 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589785326] [2023-11-26 11:45:17,626 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589785326] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:45:17,627 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:45:17,627 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:45:17,627 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [748525917] [2023-11-26 11:45:17,628 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:45:17,628 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:45:17,628 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:45:17,629 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 11:45:17,629 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 11:45:17,629 INFO L87 Difference]: Start difference. First operand 92 states and 118 transitions. cyclomatic complexity: 27 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:17,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:45:17,656 INFO L93 Difference]: Finished difference Result 132 states and 179 transitions. [2023-11-26 11:45:17,656 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 132 states and 179 transitions. [2023-11-26 11:45:17,658 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2023-11-26 11:45:17,664 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 132 states to 132 states and 179 transitions. [2023-11-26 11:45:17,665 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 132 [2023-11-26 11:45:17,667 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 132 [2023-11-26 11:45:17,667 INFO L73 IsDeterministic]: Start isDeterministic. Operand 132 states and 179 transitions. [2023-11-26 11:45:17,673 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:45:17,674 INFO L218 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2023-11-26 11:45:17,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states and 179 transitions. [2023-11-26 11:45:17,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2023-11-26 11:45:17,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 132 states have (on average 1.356060606060606) internal successors, (179), 131 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:45:17,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 179 transitions. [2023-11-26 11:45:17,691 INFO L240 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2023-11-26 11:45:17,692 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 11:45:17,693 INFO L428 stractBuchiCegarLoop]: Abstraction has 132 states and 179 transitions. [2023-11-26 11:45:17,693 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:45:17,693 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 132 states and 179 transitions. [2023-11-26 11:45:17,694 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2023-11-26 11:45:17,695 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:45:17,695 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:45:17,697 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:45:17,697 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:45:17,697 INFO L748 eck$LassoCheckResult]: Stem: 717#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 718#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 690#L228 assume 0 == ~r1~0; 691#L229 assume ~id1~0 >= 0; 661#L230 assume 0 == ~st1~0; 662#L231 assume ~send1~0 == ~id1~0; 673#L232 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 739#L233 assume ~id2~0 >= 0; 651#L234 assume 0 == ~st2~0; 652#L235 assume ~send2~0 == ~id2~0; 728#L236 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 721#L237 assume ~id3~0 >= 0; 707#L238 assume 0 == ~st3~0; 708#L239 assume ~send3~0 == ~id3~0; 705#L240 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 706#L241 assume ~id4~0 >= 0; 710#L242 assume 0 == ~st4~0; 668#L243 assume ~send4~0 == ~id4~0; 663#L244 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 664#L245 assume ~id5~0 >= 0; 709#L246 assume 0 == ~st5~0; 724#L247 assume ~send5~0 == ~id5~0; 725#L248 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 653#L249 assume ~id6~0 >= 0; 654#L250 assume 0 == ~st6~0; 676#L251 assume ~send6~0 == ~id6~0; 677#L252 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 681#L253 assume ~id1~0 != ~id2~0; 682#L254 assume ~id1~0 != ~id3~0; 683#L255 assume ~id1~0 != ~id4~0; 684#L256 assume ~id1~0 != ~id5~0; 732#L257 assume ~id1~0 != ~id6~0; 719#L258 assume ~id2~0 != ~id3~0; 645#L259 assume ~id2~0 != ~id4~0; 646#L260 assume ~id2~0 != ~id5~0; 740#L261 assume ~id2~0 != ~id6~0; 736#L262 assume ~id3~0 != ~id4~0; 737#L263 assume ~id3~0 != ~id5~0; 738#L264 assume ~id3~0 != ~id6~0; 649#L265 assume ~id4~0 != ~id5~0; 650#L266 assume ~id4~0 != ~id6~0; 669#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 704#L228-1 init_#res#1 := init_~tmp~0#1; 701#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 702#L22 assume !(0 == assume_abort_if_not_~cond#1); 714#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 700#L467-2 [2023-11-26 11:45:17,697 INFO L750 eck$LassoCheckResult]: Loop: 700#L467-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 694#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 667#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 687#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 689#L104-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 729#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 670#L129-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 671#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 680#L154-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 741#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 697#L179-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 698#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 715#L204-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 716#L397 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 735#L398 assume !(~r1~0 >= 6); 665#L401 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0; 666#$Ultimate##208 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 723#L397-1 check_#res#1 := check_~tmp~1#1; 685#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 686#L500 assume !(0 == assert_~arg#1 % 256); 699#L495 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 700#L467-2 [2023-11-26 11:45:17,698 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:17,698 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 3 times [2023-11-26 11:45:17,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:17,699 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1142385361] [2023-11-26 11:45:17,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:17,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:17,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:17,719 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:17,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:17,752 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:17,753 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:17,753 INFO L85 PathProgramCache]: Analyzing trace with hash -382651229, now seen corresponding path program 1 times [2023-11-26 11:45:17,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:17,754 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [433518563] [2023-11-26 11:45:17,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:17,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:17,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:17,822 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:17,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:17,883 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:17,886 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:45:17,886 INFO L85 PathProgramCache]: Analyzing trace with hash -706871615, now seen corresponding path program 1 times [2023-11-26 11:45:17,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:45:17,887 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [966340027] [2023-11-26 11:45:17,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:45:17,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:45:17,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:17,967 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:45:18,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:45:18,036 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:45:24,647 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 11:45:24,648 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 11:45:24,648 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 11:45:24,648 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 11:45:24,648 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 11:45:24,648 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:45:24,648 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 11:45:24,649 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 11:45:24,649 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.6.ufo.BOUNDED-12.pals.c_Iteration4_Loop [2023-11-26 11:45:24,649 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 11:45:24,649 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 11:45:24,689 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,701 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,706 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,709 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,712 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,715 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,718 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,720 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,722 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,727 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,729 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,731 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,736 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,739 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:24,741 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:28,002 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:28,006 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:28,016 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:28,023 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:28,026 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:28,037 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:28,040 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:28,048 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:45:31,157 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 36