./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 71881827e42af7e93d8d7789f21cf70c42c80b5b7128690239afcf02ba9daf37 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:50:58,239 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:50:58,358 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:50:58,363 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:50:58,364 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:50:58,411 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:50:58,413 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:50:58,414 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:50:58,415 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:50:58,420 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:50:58,421 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:50:58,421 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:50:58,422 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:50:58,424 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:50:58,425 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:50:58,425 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:50:58,425 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:50:58,426 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:50:58,426 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:50:58,427 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:50:58,427 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:50:58,428 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:50:58,428 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:50:58,429 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:50:58,429 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:50:58,430 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:50:58,430 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:50:58,430 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:50:58,431 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:50:58,431 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:50:58,433 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:50:58,433 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:50:58,433 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:50:58,433 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:50:58,434 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:50:58,434 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:50:58,434 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:50:58,435 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:50:58,435 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 71881827e42af7e93d8d7789f21cf70c42c80b5b7128690239afcf02ba9daf37 [2023-11-26 11:50:58,766 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:50:58,799 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:50:58,802 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:50:58,804 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:50:58,805 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:50:58,806 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c [2023-11-26 11:51:02,011 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:51:02,351 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:51:02,352 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c [2023-11-26 11:51:02,370 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/data/bf79ca70b/7ff366b5747441b995e9173f63663e5b/FLAGa3b0acb1f [2023-11-26 11:51:02,386 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/data/bf79ca70b/7ff366b5747441b995e9173f63663e5b [2023-11-26 11:51:02,389 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:51:02,391 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:51:02,403 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:51:02,403 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:51:02,409 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:51:02,410 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:02,412 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7632f85c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02, skipping insertion in model container [2023-11-26 11:51:02,412 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:02,455 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:51:02,722 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:51:02,745 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:51:02,882 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:51:02,903 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:51:02,903 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02 WrapperNode [2023-11-26 11:51:02,904 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:51:02,905 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:51:02,905 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:51:02,905 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:51:02,913 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:02,926 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:02,973 INFO L138 Inliner]: procedures = 26, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 371 [2023-11-26 11:51:02,973 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:51:02,974 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:51:02,974 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:51:02,975 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:51:02,987 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:02,988 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:02,993 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:03,010 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2023-11-26 11:51:03,011 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:03,011 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:03,022 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:03,029 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:03,032 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:03,035 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:03,040 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:51:03,041 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:51:03,041 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:51:03,042 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:51:03,043 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (1/1) ... [2023-11-26 11:51:03,050 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:51:03,067 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:51:03,085 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:51:03,126 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_288c2f2d-d2f4-4f34-9e2e-847f7cc37ab9/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:51:03,153 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:51:03,153 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:51:03,153 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:51:03,153 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:51:03,263 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:51:03,265 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:51:03,865 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:51:03,881 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:51:03,881 INFO L309 CfgBuilder]: Removed 1 assume(true) statements. [2023-11-26 11:51:03,883 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:51:03 BoogieIcfgContainer [2023-11-26 11:51:03,883 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:51:03,885 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:51:03,885 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:51:03,889 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:51:03,889 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:51:03,890 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:51:02" (1/3) ... [2023-11-26 11:51:03,891 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@632accda and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:51:03, skipping insertion in model container [2023-11-26 11:51:03,891 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:51:03,891 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:51:02" (2/3) ... [2023-11-26 11:51:03,892 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@632accda and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:51:03, skipping insertion in model container [2023-11-26 11:51:03,892 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:51:03,892 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:51:03" (3/3) ... [2023-11-26 11:51:03,893 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.6.ufo.UNBOUNDED.pals.c [2023-11-26 11:51:03,952 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:51:03,952 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:51:03,953 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:51:03,953 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:51:03,953 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:51:03,953 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:51:03,953 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:51:03,954 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:51:03,960 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 100 states, 99 states have (on average 1.7474747474747474) internal successors, (173), 99 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:51:03,987 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 50 [2023-11-26 11:51:03,987 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:51:03,987 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:51:03,996 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:51:03,996 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:51:03,996 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:51:03,997 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 100 states, 99 states have (on average 1.7474747474747474) internal successors, (173), 99 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:51:04,006 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 50 [2023-11-26 11:51:04,006 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:51:04,006 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:51:04,008 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:51:04,008 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:51:04,018 INFO L748 eck$LassoCheckResult]: Stem: 29#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 35#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 69#L231true assume !(0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296));init_~tmp~0#1 := 0; 39#L231-1true init_#res#1 := init_~tmp~0#1; 78#init_returnLabel#1true main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 37#L22true assume !(0 == assume_abort_if_not_~cond#1); 80#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 32#L470-2true [2023-11-26 11:51:04,019 INFO L750 eck$LassoCheckResult]: Loop: 32#L470-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 20#L78true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 38#L78-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 95#L107true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 56#L107-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 96#L132true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 71#L132-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 5#L157true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 40#L157-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 82#L182true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 18#L182-2true havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 65#L207true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 76#L207-2true havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 66#L400true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 60#L400-1true check_#res#1 := check_~tmp~1#1; 14#check_returnLabel#1true main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 36#L502true assume !(0 == assert_~arg#1 % 256); 91#L497true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 32#L470-2true [2023-11-26 11:51:04,026 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:51:04,026 INFO L85 PathProgramCache]: Analyzing trace with hash 2030119858, now seen corresponding path program 1 times [2023-11-26 11:51:04,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:51:04,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [355360639] [2023-11-26 11:51:04,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:51:04,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:51:04,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:51:04,397 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:51:04,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:51:04,398 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [355360639] [2023-11-26 11:51:04,399 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [355360639] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:51:04,399 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:51:04,399 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:51:04,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [198930264] [2023-11-26 11:51:04,401 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:51:04,406 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:51:04,407 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:51:04,407 INFO L85 PathProgramCache]: Analyzing trace with hash 1350434034, now seen corresponding path program 1 times [2023-11-26 11:51:04,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:51:04,407 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741373570] [2023-11-26 11:51:04,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:51:04,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:51:04,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:51:04,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:51:04,847 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:51:04,848 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [741373570] [2023-11-26 11:51:04,848 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [741373570] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:51:04,848 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:51:04,848 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:51:04,849 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [931022311] [2023-11-26 11:51:04,849 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:51:04,850 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:51:04,851 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:51:04,884 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:51:04,885 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:51:04,887 INFO L87 Difference]: Start difference. First operand has 100 states, 99 states have (on average 1.7474747474747474) internal successors, (173), 99 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:51:05,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:51:05,005 INFO L93 Difference]: Finished difference Result 98 states and 167 transitions. [2023-11-26 11:51:05,007 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 98 states and 167 transitions. [2023-11-26 11:51:05,012 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 48 [2023-11-26 11:51:05,018 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 98 states to 94 states and 124 transitions. [2023-11-26 11:51:05,019 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 94 [2023-11-26 11:51:05,020 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 94 [2023-11-26 11:51:05,021 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 124 transitions. [2023-11-26 11:51:05,022 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:51:05,022 INFO L218 hiAutomatonCegarLoop]: Abstraction has 94 states and 124 transitions. [2023-11-26 11:51:05,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 124 transitions. [2023-11-26 11:51:05,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2023-11-26 11:51:05,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 94 states have (on average 1.3191489361702127) internal successors, (124), 93 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:51:05,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 124 transitions. [2023-11-26 11:51:05,064 INFO L240 hiAutomatonCegarLoop]: Abstraction has 94 states and 124 transitions. [2023-11-26 11:51:05,065 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:51:05,070 INFO L428 stractBuchiCegarLoop]: Abstraction has 94 states and 124 transitions. [2023-11-26 11:51:05,070 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:51:05,070 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 94 states and 124 transitions. [2023-11-26 11:51:05,073 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 48 [2023-11-26 11:51:05,073 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:51:05,073 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:51:05,075 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:51:05,075 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:51:05,077 INFO L748 eck$LassoCheckResult]: Stem: 289#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 290#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 253#L231 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 254#L232 assume ~id1~0 >= 0; 308#L233 assume 0 == ~st1~0; 228#L234 assume ~send1~0 == ~id1~0; 229#L235 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 302#L236 assume ~id2~0 >= 0; 293#L237 assume 0 == ~st2~0; 281#L238 assume ~send2~0 == ~id2~0; 282#L239 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 279#L240 assume ~id3~0 >= 0; 280#L241 assume 0 == ~st3~0; 284#L242 assume ~send3~0 == ~id3~0; 248#L243 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 240#L244 assume ~id4~0 >= 0; 241#L245 assume 0 == ~st4~0; 283#L246 assume ~send4~0 == ~id4~0; 298#L247 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 299#L248 assume ~id5~0 >= 0; 230#L249 assume 0 == ~st5~0; 231#L250 assume ~send5~0 == ~id5~0; 257#L251 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 258#L252 assume ~id6~0 >= 0; 261#L253 assume 0 == ~st6~0; 262#L254 assume ~send6~0 == ~id6~0; 263#L255 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 264#L256 assume ~id1~0 != ~id2~0; 303#L257 assume ~id1~0 != ~id3~0; 291#L258 assume ~id1~0 != ~id4~0; 216#L259 assume ~id1~0 != ~id5~0; 217#L260 assume ~id1~0 != ~id6~0; 309#L261 assume ~id2~0 != ~id3~0; 304#L262 assume ~id2~0 != ~id4~0; 305#L263 assume ~id2~0 != ~id5~0; 307#L264 assume ~id2~0 != ~id6~0; 226#L265 assume ~id3~0 != ~id4~0; 227#L266 assume ~id3~0 != ~id5~0; 249#L267 assume ~id3~0 != ~id6~0; 271#L268 assume ~id4~0 != ~id5~0; 272#L269 assume ~id4~0 != ~id6~0; 244#L270 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 245#L231-1 init_#res#1 := init_~tmp~0#1; 277#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 278#L22 assume !(0 == assume_abort_if_not_~cond#1); 285#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 286#L470-2 [2023-11-26 11:51:05,077 INFO L750 eck$LassoCheckResult]: Loop: 286#L470-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 274#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 275#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 301#L107 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 266#L107-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 306#L132 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 256#L132-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 235#L157 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 236#L157-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 292#L182 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 273#L182-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 232#L207 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 234#L207-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 238#L400 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 224#L400-1 check_#res#1 := check_~tmp~1#1; 225#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 265#L502 assume !(0 == assert_~arg#1 % 256); 300#L497 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 286#L470-2 [2023-11-26 11:51:05,078 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:51:05,078 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 1 times [2023-11-26 11:51:05,078 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:51:05,078 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [125353419] [2023-11-26 11:51:05,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:51:05,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:51:05,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:51:05,109 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:51:05,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:51:05,177 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:51:05,180 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:51:05,180 INFO L85 PathProgramCache]: Analyzing trace with hash 1350434034, now seen corresponding path program 2 times [2023-11-26 11:51:05,181 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:51:05,182 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1617769596] [2023-11-26 11:51:05,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:51:05,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:51:05,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:51:05,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:51:05,462 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:51:05,463 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1617769596] [2023-11-26 11:51:05,463 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1617769596] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:51:05,463 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:51:05,463 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:51:05,464 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072622582] [2023-11-26 11:51:05,464 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:51:05,464 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:51:05,464 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:51:05,465 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:51:05,465 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:51:05,465 INFO L87 Difference]: Start difference. First operand 94 states and 124 transitions. cyclomatic complexity: 31 Second operand has 5 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:51:05,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:51:05,510 INFO L93 Difference]: Finished difference Result 97 states and 126 transitions. [2023-11-26 11:51:05,510 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 97 states and 126 transitions. [2023-11-26 11:51:05,513 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 48 [2023-11-26 11:51:05,515 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 97 states to 94 states and 121 transitions. [2023-11-26 11:51:05,515 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 94 [2023-11-26 11:51:05,515 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 94 [2023-11-26 11:51:05,516 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 121 transitions. [2023-11-26 11:51:05,516 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:51:05,517 INFO L218 hiAutomatonCegarLoop]: Abstraction has 94 states and 121 transitions. [2023-11-26 11:51:05,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 121 transitions. [2023-11-26 11:51:05,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2023-11-26 11:51:05,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 94 states have (on average 1.2872340425531914) internal successors, (121), 93 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:51:05,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 121 transitions. [2023-11-26 11:51:05,524 INFO L240 hiAutomatonCegarLoop]: Abstraction has 94 states and 121 transitions. [2023-11-26 11:51:05,525 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:51:05,526 INFO L428 stractBuchiCegarLoop]: Abstraction has 94 states and 121 transitions. [2023-11-26 11:51:05,526 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:51:05,526 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 94 states and 121 transitions. [2023-11-26 11:51:05,528 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 48 [2023-11-26 11:51:05,528 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:51:05,528 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:51:05,530 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:51:05,530 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:51:05,531 INFO L748 eck$LassoCheckResult]: Stem: 492#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 493#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 456#L231 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 457#L232 assume ~id1~0 >= 0; 511#L233 assume 0 == ~st1~0; 431#L234 assume ~send1~0 == ~id1~0; 432#L235 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 504#L236 assume ~id2~0 >= 0; 496#L237 assume 0 == ~st2~0; 484#L238 assume ~send2~0 == ~id2~0; 485#L239 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 482#L240 assume ~id3~0 >= 0; 483#L241 assume 0 == ~st3~0; 487#L242 assume ~send3~0 == ~id3~0; 451#L243 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 445#L244 assume ~id4~0 >= 0; 446#L245 assume 0 == ~st4~0; 486#L246 assume ~send4~0 == ~id4~0; 501#L247 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 502#L248 assume ~id5~0 >= 0; 436#L249 assume 0 == ~st5~0; 437#L250 assume ~send5~0 == ~id5~0; 460#L251 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 461#L252 assume ~id6~0 >= 0; 465#L253 assume 0 == ~st6~0; 466#L254 assume ~send6~0 == ~id6~0; 467#L255 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 468#L256 assume ~id1~0 != ~id2~0; 506#L257 assume ~id1~0 != ~id3~0; 494#L258 assume ~id1~0 != ~id4~0; 421#L259 assume ~id1~0 != ~id5~0; 422#L260 assume ~id1~0 != ~id6~0; 512#L261 assume ~id2~0 != ~id3~0; 507#L262 assume ~id2~0 != ~id4~0; 508#L263 assume ~id2~0 != ~id5~0; 510#L264 assume ~id2~0 != ~id6~0; 429#L265 assume ~id3~0 != ~id4~0; 430#L266 assume ~id3~0 != ~id5~0; 452#L267 assume ~id3~0 != ~id6~0; 475#L268 assume ~id4~0 != ~id5~0; 476#L269 assume ~id4~0 != ~id6~0; 449#L270 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 450#L231-1 init_#res#1 := init_~tmp~0#1; 480#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 481#L22 assume !(0 == assume_abort_if_not_~cond#1); 488#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 489#L470-2 [2023-11-26 11:51:05,531 INFO L750 eck$LassoCheckResult]: Loop: 489#L470-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 477#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 478#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 505#L107 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 470#L107-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 509#L132 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 459#L132-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 438#L157 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 439#L157-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 495#L182 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 474#L182-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 433#L207 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 435#L207-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 441#L400 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 442#L401 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 6; 444#$Ultimate##211 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 6;check_~tmp~1#1 := 1; 419#L400-1 check_#res#1 := check_~tmp~1#1; 420#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 464#L502 assume !(0 == assert_~arg#1 % 256); 503#L497 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 489#L470-2 [2023-11-26 11:51:05,532 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:51:05,532 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 2 times [2023-11-26 11:51:05,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:51:05,532 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976126862] [2023-11-26 11:51:05,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:51:05,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:51:05,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:51:05,555 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:51:05,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:51:05,590 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:51:05,591 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:51:05,592 INFO L85 PathProgramCache]: Analyzing trace with hash -728895134, now seen corresponding path program 1 times [2023-11-26 11:51:05,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:51:05,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593177253] [2023-11-26 11:51:05,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:51:05,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:51:05,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:51:05,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:51:05,650 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:51:05,650 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593177253] [2023-11-26 11:51:05,650 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1593177253] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:51:05,650 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:51:05,651 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:51:05,651 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1636040998] [2023-11-26 11:51:05,651 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:51:05,652 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:51:05,652 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:51:05,652 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 11:51:05,653 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 11:51:05,653 INFO L87 Difference]: Start difference. First operand 94 states and 121 transitions. cyclomatic complexity: 28 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:51:05,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:51:05,688 INFO L93 Difference]: Finished difference Result 136 states and 185 transitions. [2023-11-26 11:51:05,688 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 136 states and 185 transitions. [2023-11-26 11:51:05,690 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 90 [2023-11-26 11:51:05,692 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 136 states to 136 states and 185 transitions. [2023-11-26 11:51:05,692 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 136 [2023-11-26 11:51:05,693 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 136 [2023-11-26 11:51:05,693 INFO L73 IsDeterministic]: Start isDeterministic. Operand 136 states and 185 transitions. [2023-11-26 11:51:05,695 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:51:05,695 INFO L218 hiAutomatonCegarLoop]: Abstraction has 136 states and 185 transitions. [2023-11-26 11:51:05,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states and 185 transitions. [2023-11-26 11:51:05,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 134. [2023-11-26 11:51:05,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 134 states have (on average 1.3582089552238805) internal successors, (182), 133 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:51:05,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 182 transitions. [2023-11-26 11:51:05,705 INFO L240 hiAutomatonCegarLoop]: Abstraction has 134 states and 182 transitions. [2023-11-26 11:51:05,705 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 11:51:05,706 INFO L428 stractBuchiCegarLoop]: Abstraction has 134 states and 182 transitions. [2023-11-26 11:51:05,707 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:51:05,707 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 134 states and 182 transitions. [2023-11-26 11:51:05,708 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 88 [2023-11-26 11:51:05,708 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:51:05,709 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:51:05,711 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:51:05,711 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:51:05,711 INFO L748 eck$LassoCheckResult]: Stem: 725#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 726#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 691#L231 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 692#L232 assume ~id1~0 >= 0; 750#L233 assume 0 == ~st1~0; 667#L234 assume ~send1~0 == ~id1~0; 668#L235 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 739#L236 assume ~id2~0 >= 0; 731#L237 assume 0 == ~st2~0; 719#L238 assume ~send2~0 == ~id2~0; 720#L239 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 717#L240 assume ~id3~0 >= 0; 718#L241 assume 0 == ~st3~0; 722#L242 assume ~send3~0 == ~id3~0; 686#L243 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 679#L244 assume ~id4~0 >= 0; 680#L245 assume 0 == ~st4~0; 721#L246 assume ~send4~0 == ~id4~0; 736#L247 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 737#L248 assume ~id5~0 >= 0; 669#L249 assume 0 == ~st5~0; 670#L250 assume ~send5~0 == ~id5~0; 695#L251 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 696#L252 assume ~id6~0 >= 0; 699#L253 assume 0 == ~st6~0; 700#L254 assume ~send6~0 == ~id6~0; 701#L255 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 702#L256 assume ~id1~0 != ~id2~0; 744#L257 assume ~id1~0 != ~id3~0; 729#L258 assume ~id1~0 != ~id4~0; 655#L259 assume ~id1~0 != ~id5~0; 656#L260 assume ~id1~0 != ~id6~0; 751#L261 assume ~id2~0 != ~id3~0; 746#L262 assume ~id2~0 != ~id4~0; 747#L263 assume ~id2~0 != ~id5~0; 749#L264 assume ~id2~0 != ~id6~0; 665#L265 assume ~id3~0 != ~id4~0; 666#L266 assume ~id3~0 != ~id5~0; 687#L267 assume ~id3~0 != ~id6~0; 709#L268 assume ~id4~0 != ~id5~0; 710#L269 assume ~id4~0 != ~id6~0; 682#L270 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 683#L231-1 init_#res#1 := init_~tmp~0#1; 715#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 716#L22 assume !(0 == assume_abort_if_not_~cond#1); 723#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 724#L470-2 [2023-11-26 11:51:05,712 INFO L750 eck$LassoCheckResult]: Loop: 724#L470-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 712#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 713#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 740#L107 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 704#L107-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 748#L132 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 694#L132-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 674#L157 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 675#L157-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 762#L182 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 758#L182-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 756#L207 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 754#L207-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 753#L400 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 752#L401 assume !((if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 6); 742#L404 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0; 743#$Ultimate##211 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 6;check_~tmp~1#1 := 1; 663#L400-1 check_#res#1 := check_~tmp~1#1; 664#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 703#L502 assume !(0 == assert_~arg#1 % 256); 738#L497 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 724#L470-2 [2023-11-26 11:51:05,712 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:51:05,713 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 3 times [2023-11-26 11:51:05,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:51:05,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1148243129] [2023-11-26 11:51:05,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:51:05,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:51:05,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:51:05,733 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:51:05,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:51:05,761 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:51:05,762 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:51:05,762 INFO L85 PathProgramCache]: Analyzing trace with hash 525657443, now seen corresponding path program 1 times [2023-11-26 11:51:05,763 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:51:05,763 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695875081] [2023-11-26 11:51:05,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:51:05,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:51:05,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:51:05,804 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:51:05,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:51:05,857 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:51:05,858 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:51:05,862 INFO L85 PathProgramCache]: Analyzing trace with hash 201437057, now seen corresponding path program 1 times [2023-11-26 11:51:05,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:51:05,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533623041] [2023-11-26 11:51:05,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:51:05,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:51:05,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:51:05,925 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:51:05,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:51:05,983 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:51:12,564 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 11:51:12,565 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 11:51:12,565 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 11:51:12,565 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 11:51:12,565 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 11:51:12,565 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:51:12,566 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 11:51:12,566 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 11:51:12,566 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.6.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2023-11-26 11:51:12,566 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 11:51:12,566 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 11:51:12,630 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,643 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,649 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,653 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,659 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,662 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,666 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,669 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,672 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,679 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,681 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,683 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,686 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:12,689 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:15,968 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:15,970 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:15,976 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:15,981 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:15,984 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:15,989 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:15,994 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:51:19,177 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 36