./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e82362cf624f0e845caa7a60d1834859999824a1181a9b545ac94ec06fd3aa08 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 12:04:32,187 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 12:04:32,305 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 12:04:32,320 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 12:04:32,321 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 12:04:32,372 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 12:04:32,373 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 12:04:32,373 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 12:04:32,374 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 12:04:32,379 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 12:04:32,380 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 12:04:32,381 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 12:04:32,381 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 12:04:32,384 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 12:04:32,384 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 12:04:32,385 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 12:04:32,385 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 12:04:32,385 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 12:04:32,387 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 12:04:32,388 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 12:04:32,388 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 12:04:32,389 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 12:04:32,389 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 12:04:32,390 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 12:04:32,390 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 12:04:32,391 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 12:04:32,391 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 12:04:32,392 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 12:04:32,392 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 12:04:32,392 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 12:04:32,394 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 12:04:32,394 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 12:04:32,395 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 12:04:32,395 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 12:04:32,395 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 12:04:32,395 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 12:04:32,396 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 12:04:32,396 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 12:04:32,397 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e82362cf624f0e845caa7a60d1834859999824a1181a9b545ac94ec06fd3aa08 [2023-11-26 12:04:32,689 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 12:04:32,721 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 12:04:32,724 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 12:04:32,725 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 12:04:32,726 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 12:04:32,728 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c [2023-11-26 12:04:35,866 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 12:04:36,124 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 12:04:36,124 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c [2023-11-26 12:04:36,139 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/data/560766ece/0d7ed342c3ec4205bc38bcb0cb950ce2/FLAGc85c83f36 [2023-11-26 12:04:36,158 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/data/560766ece/0d7ed342c3ec4205bc38bcb0cb950ce2 [2023-11-26 12:04:36,161 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 12:04:36,163 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 12:04:36,165 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 12:04:36,166 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 12:04:36,173 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 12:04:36,174 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:36,175 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6f63c222 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36, skipping insertion in model container [2023-11-26 12:04:36,176 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:36,243 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 12:04:36,629 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:04:36,650 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 12:04:36,743 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:04:36,789 INFO L206 MainTranslator]: Completed translation [2023-11-26 12:04:36,790 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36 WrapperNode [2023-11-26 12:04:36,790 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 12:04:36,792 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 12:04:36,792 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 12:04:36,792 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 12:04:36,802 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:36,817 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:36,871 INFO L138 Inliner]: procedures = 28, calls = 20, calls flagged for inlining = 15, calls inlined = 15, statements flattened = 497 [2023-11-26 12:04:36,872 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 12:04:36,873 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 12:04:36,873 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 12:04:36,874 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 12:04:36,888 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:36,889 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:36,900 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:36,963 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2023-11-26 12:04:36,963 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:36,963 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:36,994 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:37,003 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:37,016 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:37,026 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:37,035 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 12:04:37,038 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 12:04:37,038 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 12:04:37,039 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 12:04:37,040 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (1/1) ... [2023-11-26 12:04:37,048 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:37,085 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:04:37,107 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:04:37,134 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bd37d09-bc66-47c9-b978-5d3185ed4cfe/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 12:04:37,170 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 12:04:37,170 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 12:04:37,170 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 12:04:37,170 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 12:04:37,417 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 12:04:37,421 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 12:04:38,220 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 12:04:38,244 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 12:04:38,245 INFO L309 CfgBuilder]: Removed 1 assume(true) statements. [2023-11-26 12:04:38,248 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:04:38 BoogieIcfgContainer [2023-11-26 12:04:38,248 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 12:04:38,251 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 12:04:38,251 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 12:04:38,256 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 12:04:38,257 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:04:38,257 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 12:04:36" (1/3) ... [2023-11-26 12:04:38,260 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@11114855 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:04:38, skipping insertion in model container [2023-11-26 12:04:38,260 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:04:38,262 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:04:36" (2/3) ... [2023-11-26 12:04:38,264 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@11114855 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:04:38, skipping insertion in model container [2023-11-26 12:04:38,264 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:04:38,264 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:04:38" (3/3) ... [2023-11-26 12:04:38,266 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.8.ufo.UNBOUNDED.pals.c [2023-11-26 12:04:38,363 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 12:04:38,364 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 12:04:38,365 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 12:04:38,366 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 12:04:38,366 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 12:04:38,366 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 12:04:38,366 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 12:04:38,367 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 12:04:38,376 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 133 states, 132 states have (on average 1.7803030303030303) internal successors, (235), 132 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:38,431 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2023-11-26 12:04:38,431 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:38,432 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:38,446 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:04:38,447 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:04:38,447 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 12:04:38,451 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 133 states, 132 states have (on average 1.7803030303030303) internal successors, (235), 132 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:38,471 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2023-11-26 12:04:38,474 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:38,474 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:38,477 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:04:38,478 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:04:38,490 INFO L748 eck$LassoCheckResult]: Stem: 29#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 42#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 30#L298true assume !(0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296));init_~tmp~0#1 := 0; 47#L298-1true init_#res#1 := init_~tmp~0#1; 96#init_returnLabel#1true main_#t~ret37#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 44#L22true assume !(0 == assume_abort_if_not_~cond#1); 101#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 88#L633-2true [2023-11-26 12:04:38,502 INFO L750 eck$LassoCheckResult]: Loop: 88#L633-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 114#L92true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 61#L92-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 23#L121true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 7#L121-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 89#L146true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 116#L146-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 112#L171true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 78#L171-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 63#L196true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 124#L196-2true havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 83#L221true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 59#L221-2true havoc node6_~m6~0#1;assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 64#L246true assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 14#L246-2true havoc node7_~m7~0#1;assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 33#L271true assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 79#L271-2true havoc node8_~m8~0#1;assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 32#L551true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 20#L551-1true check_#res#1 := check_~tmp~1#1; 17#check_returnLabel#1true main_#t~ret38#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 119#L671true assume !(0 == assert_~arg#1 % 256); 13#L666true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 88#L633-2true [2023-11-26 12:04:38,509 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:38,509 INFO L85 PathProgramCache]: Analyzing trace with hash -2144605008, now seen corresponding path program 1 times [2023-11-26 12:04:38,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:38,527 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1524755402] [2023-11-26 12:04:38,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:38,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:38,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:39,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:04:39,061 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:04:39,062 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1524755402] [2023-11-26 12:04:39,063 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1524755402] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:04:39,063 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:04:39,063 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 12:04:39,065 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2137925229] [2023-11-26 12:04:39,066 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:04:39,072 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:04:39,073 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:39,073 INFO L85 PathProgramCache]: Analyzing trace with hash 37408224, now seen corresponding path program 1 times [2023-11-26 12:04:39,073 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:39,074 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [960368827] [2023-11-26 12:04:39,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:39,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:39,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:39,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:04:39,731 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:04:39,731 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [960368827] [2023-11-26 12:04:39,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [960368827] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:04:39,733 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:04:39,733 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 12:04:39,733 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005780651] [2023-11-26 12:04:39,734 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:04:39,737 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:04:39,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:04:39,793 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 12:04:39,794 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-11-26 12:04:39,797 INFO L87 Difference]: Start difference. First operand has 133 states, 132 states have (on average 1.7803030303030303) internal successors, (235), 132 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:40,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:04:40,045 INFO L93 Difference]: Finished difference Result 131 states and 229 transitions. [2023-11-26 12:04:40,047 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 131 states and 229 transitions. [2023-11-26 12:04:40,052 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2023-11-26 12:04:40,062 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 131 states to 127 states and 165 transitions. [2023-11-26 12:04:40,063 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2023-11-26 12:04:40,064 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2023-11-26 12:04:40,066 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 165 transitions. [2023-11-26 12:04:40,067 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:04:40,067 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 165 transitions. [2023-11-26 12:04:40,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 165 transitions. [2023-11-26 12:04:40,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2023-11-26 12:04:40,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.2992125984251968) internal successors, (165), 126 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:40,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 165 transitions. [2023-11-26 12:04:40,106 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 165 transitions. [2023-11-26 12:04:40,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 12:04:40,120 INFO L428 stractBuchiCegarLoop]: Abstraction has 127 states and 165 transitions. [2023-11-26 12:04:40,120 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 12:04:40,121 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 165 transitions. [2023-11-26 12:04:40,128 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2023-11-26 12:04:40,128 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:40,128 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:40,132 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:04:40,132 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:04:40,133 INFO L748 eck$LassoCheckResult]: Stem: 324#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 325#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 326#L298 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 327#L299 assume ~id1~0 >= 0; 343#L300 assume 0 == ~st1~0; 377#L301 assume ~send1~0 == ~id1~0; 388#L302 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 389#L303 assume ~id2~0 >= 0; 401#L304 assume 0 == ~st2~0; 371#L305 assume ~send2~0 == ~id2~0; 372#L306 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 382#L307 assume ~id3~0 >= 0; 298#L308 assume 0 == ~st3~0; 299#L309 assume ~send3~0 == ~id3~0; 380#L310 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 358#L311 assume ~id4~0 >= 0; 359#L312 assume 0 == ~st4~0; 316#L313 assume ~send4~0 == ~id4~0; 317#L314 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 351#L315 assume ~id5~0 >= 0; 352#L316 assume 0 == ~st5~0; 287#L317 assume ~send5~0 == ~id5~0; 288#L318 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 408#L319 assume ~id6~0 >= 0; 387#L320 assume 0 == ~st6~0; 375#L321 assume ~send6~0 == ~id6~0; 376#L322 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 282#L323 assume ~id7~0 >= 0; 283#L324 assume 0 == ~st7~0; 309#L325 assume ~send7~0 == ~id7~0; 323#L326 assume 0 == (if ~mode7~0 % 256 % 4294967296 <= 2147483647 then ~mode7~0 % 256 % 4294967296 else ~mode7~0 % 256 % 4294967296 - 4294967296); 312#L327 assume ~id8~0 >= 0; 313#L328 assume 0 == ~st8~0; 335#L329 assume ~send8~0 == ~id8~0; 336#L330 assume 0 == (if ~mode8~0 % 256 % 4294967296 <= 2147483647 then ~mode8~0 % 256 % 4294967296 else ~mode8~0 % 256 % 4294967296 - 4294967296); 296#L331 assume ~id1~0 != ~id2~0; 297#L332 assume ~id1~0 != ~id3~0; 320#L333 assume ~id1~0 != ~id4~0; 334#L334 assume ~id1~0 != ~id5~0; 314#L335 assume ~id1~0 != ~id6~0; 315#L336 assume ~id1~0 != ~id7~0; 381#L337 assume ~id1~0 != ~id8~0; 362#L338 assume ~id2~0 != ~id3~0; 363#L339 assume ~id2~0 != ~id4~0; 403#L340 assume ~id2~0 != ~id5~0; 398#L341 assume ~id2~0 != ~id6~0; 337#L342 assume ~id2~0 != ~id7~0; 338#L343 assume ~id2~0 != ~id8~0; 328#L344 assume ~id3~0 != ~id4~0; 329#L345 assume ~id3~0 != ~id5~0; 353#L346 assume ~id3~0 != ~id6~0; 354#L347 assume ~id3~0 != ~id7~0; 407#L348 assume ~id3~0 != ~id8~0; 392#L349 assume ~id4~0 != ~id5~0; 393#L350 assume ~id4~0 != ~id6~0; 378#L351 assume ~id4~0 != ~id7~0; 379#L352 assume ~id4~0 != ~id8~0; 400#L353 assume ~id5~0 != ~id6~0; 368#L354 assume ~id5~0 != ~id7~0; 339#L355 assume ~id5~0 != ~id8~0; 340#L356 assume ~id6~0 != ~id7~0; 365#L357 assume ~id6~0 != ~id8~0; 303#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 304#L298-1 init_#res#1 := init_~tmp~0#1; 355#init_returnLabel#1 main_#t~ret37#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 349#L22 assume !(0 == assume_abort_if_not_~cond#1); 350#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 306#L633-2 [2023-11-26 12:04:40,133 INFO L750 eck$LassoCheckResult]: Loop: 306#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 394#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 357#L92-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 318#L121 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 292#L121-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 293#L146 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 396#L146-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 405#L171 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 386#L171-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 373#L196 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 374#L196-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 391#L221 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 369#L221-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 370#L246 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 307#L246-2 havoc node7_~m7~0#1;assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 308#L271 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 333#L271-2 havoc node8_~m8~0#1;assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 330#L551 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 301#L551-1 check_#res#1 := check_~tmp~1#1; 310#check_returnLabel#1 main_#t~ret38#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 311#L671 assume !(0 == assert_~arg#1 % 256); 305#L666 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 306#L633-2 [2023-11-26 12:04:40,134 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:40,135 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 1 times [2023-11-26 12:04:40,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:40,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287006974] [2023-11-26 12:04:40,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:40,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:40,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:40,287 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:40,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:40,435 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:40,436 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:40,437 INFO L85 PathProgramCache]: Analyzing trace with hash 37408224, now seen corresponding path program 2 times [2023-11-26 12:04:40,437 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:40,437 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [367198267] [2023-11-26 12:04:40,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:40,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:40,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:40,750 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:04:40,750 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:04:40,751 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [367198267] [2023-11-26 12:04:40,751 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [367198267] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:04:40,752 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:04:40,752 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 12:04:40,753 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1544732360] [2023-11-26 12:04:40,755 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:04:40,755 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:04:40,756 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:04:40,757 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 12:04:40,757 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-11-26 12:04:40,758 INFO L87 Difference]: Start difference. First operand 127 states and 165 transitions. cyclomatic complexity: 39 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:40,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:04:40,842 INFO L93 Difference]: Finished difference Result 130 states and 167 transitions. [2023-11-26 12:04:40,843 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 130 states and 167 transitions. [2023-11-26 12:04:40,847 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2023-11-26 12:04:40,851 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 130 states to 127 states and 162 transitions. [2023-11-26 12:04:40,851 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2023-11-26 12:04:40,853 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2023-11-26 12:04:40,854 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 162 transitions. [2023-11-26 12:04:40,857 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:04:40,857 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 162 transitions. [2023-11-26 12:04:40,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 162 transitions. [2023-11-26 12:04:40,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2023-11-26 12:04:40,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.2755905511811023) internal successors, (162), 126 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:40,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 162 transitions. [2023-11-26 12:04:40,875 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 162 transitions. [2023-11-26 12:04:40,876 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 12:04:40,877 INFO L428 stractBuchiCegarLoop]: Abstraction has 127 states and 162 transitions. [2023-11-26 12:04:40,878 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 12:04:40,879 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 162 transitions. [2023-11-26 12:04:40,880 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2023-11-26 12:04:40,881 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:40,881 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:40,884 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:04:40,884 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:04:40,885 INFO L748 eck$LassoCheckResult]: Stem: 593#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 594#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 595#L298 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 596#L299 assume ~id1~0 >= 0; 612#L300 assume 0 == ~st1~0; 646#L301 assume ~send1~0 == ~id1~0; 657#L302 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 658#L303 assume ~id2~0 >= 0; 670#L304 assume 0 == ~st2~0; 640#L305 assume ~send2~0 == ~id2~0; 641#L306 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 651#L307 assume ~id3~0 >= 0; 567#L308 assume 0 == ~st3~0; 568#L309 assume ~send3~0 == ~id3~0; 649#L310 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 627#L311 assume ~id4~0 >= 0; 628#L312 assume 0 == ~st4~0; 585#L313 assume ~send4~0 == ~id4~0; 586#L314 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 620#L315 assume ~id5~0 >= 0; 621#L316 assume 0 == ~st5~0; 556#L317 assume ~send5~0 == ~id5~0; 557#L318 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 677#L319 assume ~id6~0 >= 0; 656#L320 assume 0 == ~st6~0; 644#L321 assume ~send6~0 == ~id6~0; 645#L322 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 551#L323 assume ~id7~0 >= 0; 552#L324 assume 0 == ~st7~0; 578#L325 assume ~send7~0 == ~id7~0; 592#L326 assume 0 == (if ~mode7~0 % 256 % 4294967296 <= 2147483647 then ~mode7~0 % 256 % 4294967296 else ~mode7~0 % 256 % 4294967296 - 4294967296); 581#L327 assume ~id8~0 >= 0; 582#L328 assume 0 == ~st8~0; 604#L329 assume ~send8~0 == ~id8~0; 605#L330 assume 0 == (if ~mode8~0 % 256 % 4294967296 <= 2147483647 then ~mode8~0 % 256 % 4294967296 else ~mode8~0 % 256 % 4294967296 - 4294967296); 565#L331 assume ~id1~0 != ~id2~0; 566#L332 assume ~id1~0 != ~id3~0; 591#L333 assume ~id1~0 != ~id4~0; 603#L334 assume ~id1~0 != ~id5~0; 583#L335 assume ~id1~0 != ~id6~0; 584#L336 assume ~id1~0 != ~id7~0; 650#L337 assume ~id1~0 != ~id8~0; 631#L338 assume ~id2~0 != ~id3~0; 632#L339 assume ~id2~0 != ~id4~0; 672#L340 assume ~id2~0 != ~id5~0; 667#L341 assume ~id2~0 != ~id6~0; 606#L342 assume ~id2~0 != ~id7~0; 607#L343 assume ~id2~0 != ~id8~0; 597#L344 assume ~id3~0 != ~id4~0; 598#L345 assume ~id3~0 != ~id5~0; 622#L346 assume ~id3~0 != ~id6~0; 623#L347 assume ~id3~0 != ~id7~0; 676#L348 assume ~id3~0 != ~id8~0; 661#L349 assume ~id4~0 != ~id5~0; 662#L350 assume ~id4~0 != ~id6~0; 647#L351 assume ~id4~0 != ~id7~0; 648#L352 assume ~id4~0 != ~id8~0; 669#L353 assume ~id5~0 != ~id6~0; 637#L354 assume ~id5~0 != ~id7~0; 608#L355 assume ~id5~0 != ~id8~0; 609#L356 assume ~id6~0 != ~id7~0; 634#L357 assume ~id6~0 != ~id8~0; 572#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 573#L298-1 init_#res#1 := init_~tmp~0#1; 624#init_returnLabel#1 main_#t~ret37#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 618#L22 assume !(0 == assume_abort_if_not_~cond#1); 619#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 575#L633-2 [2023-11-26 12:04:40,885 INFO L750 eck$LassoCheckResult]: Loop: 575#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 663#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 626#L92-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 587#L121 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 561#L121-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 562#L146 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 665#L146-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 674#L171 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 655#L171-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 642#L196 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 643#L196-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 659#L221 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 638#L221-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 639#L246 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 576#L246-2 havoc node7_~m7~0#1;assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 577#L271 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 602#L271-2 havoc node8_~m8~0#1;assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 599#L551 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 600#L552 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 8; 569#$Ultimate##298 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 8;check_~tmp~1#1 := 1; 570#L551-1 check_#res#1 := check_~tmp~1#1; 579#check_returnLabel#1 main_#t~ret38#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 580#L671 assume !(0 == assert_~arg#1 % 256); 574#L666 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 575#L633-2 [2023-11-26 12:04:40,886 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:40,886 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 2 times [2023-11-26 12:04:40,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:40,887 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64687803] [2023-11-26 12:04:40,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:40,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:40,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:40,930 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:40,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:40,990 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:40,990 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:40,991 INFO L85 PathProgramCache]: Analyzing trace with hash 173692176, now seen corresponding path program 1 times [2023-11-26 12:04:40,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:40,991 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335474349] [2023-11-26 12:04:40,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:40,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:41,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:04:41,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:04:41,047 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:04:41,047 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [335474349] [2023-11-26 12:04:41,047 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [335474349] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:04:41,048 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:04:41,048 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 12:04:41,048 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [176475566] [2023-11-26 12:04:41,048 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:04:41,049 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:04:41,049 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:04:41,050 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 12:04:41,050 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 12:04:41,050 INFO L87 Difference]: Start difference. First operand 127 states and 162 transitions. cyclomatic complexity: 36 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:41,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:04:41,095 INFO L93 Difference]: Finished difference Result 181 states and 246 transitions. [2023-11-26 12:04:41,096 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 181 states and 246 transitions. [2023-11-26 12:04:41,098 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 114 [2023-11-26 12:04:41,100 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 181 states to 181 states and 246 transitions. [2023-11-26 12:04:41,101 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 181 [2023-11-26 12:04:41,102 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 181 [2023-11-26 12:04:41,102 INFO L73 IsDeterministic]: Start isDeterministic. Operand 181 states and 246 transitions. [2023-11-26 12:04:41,103 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:04:41,103 INFO L218 hiAutomatonCegarLoop]: Abstraction has 181 states and 246 transitions. [2023-11-26 12:04:41,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states and 246 transitions. [2023-11-26 12:04:41,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 179. [2023-11-26 12:04:41,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 179 states have (on average 1.3575418994413408) internal successors, (243), 178 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:04:41,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 243 transitions. [2023-11-26 12:04:41,115 INFO L240 hiAutomatonCegarLoop]: Abstraction has 179 states and 243 transitions. [2023-11-26 12:04:41,116 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 12:04:41,117 INFO L428 stractBuchiCegarLoop]: Abstraction has 179 states and 243 transitions. [2023-11-26 12:04:41,117 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 12:04:41,117 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 179 states and 243 transitions. [2023-11-26 12:04:41,119 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 112 [2023-11-26 12:04:41,119 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:04:41,119 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:04:41,121 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:04:41,121 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:04:41,122 INFO L748 eck$LassoCheckResult]: Stem: 907#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 908#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 909#L298 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 910#L299 assume ~id1~0 >= 0; 926#L300 assume 0 == ~st1~0; 960#L301 assume ~send1~0 == ~id1~0; 971#L302 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 972#L303 assume ~id2~0 >= 0; 986#L304 assume 0 == ~st2~0; 954#L305 assume ~send2~0 == ~id2~0; 955#L306 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 965#L307 assume ~id3~0 >= 0; 881#L308 assume 0 == ~st3~0; 882#L309 assume ~send3~0 == ~id3~0; 963#L310 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 940#L311 assume ~id4~0 >= 0; 941#L312 assume 0 == ~st4~0; 899#L313 assume ~send4~0 == ~id4~0; 900#L314 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 933#L315 assume ~id5~0 >= 0; 934#L316 assume 0 == ~st5~0; 870#L317 assume ~send5~0 == ~id5~0; 871#L318 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 992#L319 assume ~id6~0 >= 0; 970#L320 assume 0 == ~st6~0; 958#L321 assume ~send6~0 == ~id6~0; 959#L322 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 868#L323 assume ~id7~0 >= 0; 869#L324 assume 0 == ~st7~0; 891#L325 assume ~send7~0 == ~id7~0; 906#L326 assume 0 == (if ~mode7~0 % 256 % 4294967296 <= 2147483647 then ~mode7~0 % 256 % 4294967296 else ~mode7~0 % 256 % 4294967296 - 4294967296); 894#L327 assume ~id8~0 >= 0; 895#L328 assume 0 == ~st8~0; 918#L329 assume ~send8~0 == ~id8~0; 919#L330 assume 0 == (if ~mode8~0 % 256 % 4294967296 <= 2147483647 then ~mode8~0 % 256 % 4294967296 else ~mode8~0 % 256 % 4294967296 - 4294967296); 879#L331 assume ~id1~0 != ~id2~0; 880#L332 assume ~id1~0 != ~id3~0; 905#L333 assume ~id1~0 != ~id4~0; 917#L334 assume ~id1~0 != ~id5~0; 897#L335 assume ~id1~0 != ~id6~0; 898#L336 assume ~id1~0 != ~id7~0; 964#L337 assume ~id1~0 != ~id8~0; 944#L338 assume ~id2~0 != ~id3~0; 945#L339 assume ~id2~0 != ~id4~0; 987#L340 assume ~id2~0 != ~id5~0; 981#L341 assume ~id2~0 != ~id6~0; 920#L342 assume ~id2~0 != ~id7~0; 921#L343 assume ~id2~0 != ~id8~0; 911#L344 assume ~id3~0 != ~id4~0; 912#L345 assume ~id3~0 != ~id5~0; 935#L346 assume ~id3~0 != ~id6~0; 936#L347 assume ~id3~0 != ~id7~0; 991#L348 assume ~id3~0 != ~id8~0; 975#L349 assume ~id4~0 != ~id5~0; 976#L350 assume ~id4~0 != ~id6~0; 961#L351 assume ~id4~0 != ~id7~0; 962#L352 assume ~id4~0 != ~id8~0; 983#L353 assume ~id5~0 != ~id6~0; 950#L354 assume ~id5~0 != ~id7~0; 924#L355 assume ~id5~0 != ~id8~0; 925#L356 assume ~id6~0 != ~id7~0; 947#L357 assume ~id6~0 != ~id8~0; 885#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 886#L298-1 init_#res#1 := init_~tmp~0#1; 937#init_returnLabel#1 main_#t~ret37#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 931#L22 assume !(0 == assume_abort_if_not_~cond#1); 932#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 984#L633-2 [2023-11-26 12:04:41,122 INFO L750 eck$LassoCheckResult]: Loop: 984#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 1039#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 939#L92-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 1035#L121 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 1031#L121-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 1029#L146 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 1025#L146-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 1023#L171 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 1019#L171-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 1017#L196 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 1013#L196-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 1011#L221 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 1007#L221-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 1005#L246 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 1001#L246-2 havoc node7_~m7~0#1;assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 999#L271 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 997#L271-2 havoc node8_~m8~0#1;assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 996#L551 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 995#L552 assume !((if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 8); 993#L555 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0; 994#$Ultimate##298 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 8;check_~tmp~1#1 := 1; 1043#L551-1 check_#res#1 := check_~tmp~1#1; 1042#check_returnLabel#1 main_#t~ret38#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 1041#L671 assume !(0 == assert_~arg#1 % 256); 1040#L666 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 984#L633-2 [2023-11-26 12:04:41,123 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:41,123 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 3 times [2023-11-26 12:04:41,123 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:41,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478012786] [2023-11-26 12:04:41,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:41,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:41,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:41,166 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:41,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:41,210 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:41,211 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:41,211 INFO L85 PathProgramCache]: Analyzing trace with hash -1558906841, now seen corresponding path program 1 times [2023-11-26 12:04:41,211 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:41,211 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087716328] [2023-11-26 12:04:41,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:41,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:41,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:41,262 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:41,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:41,345 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:41,346 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:04:41,346 INFO L85 PathProgramCache]: Analyzing trace with hash -612396440, now seen corresponding path program 1 times [2023-11-26 12:04:41,346 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:04:41,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487771457] [2023-11-26 12:04:41,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:04:41,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:04:41,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:41,428 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:04:41,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:04:41,526 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:04:52,307 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:04:52,309 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:04:52,310 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:04:52,310 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:04:52,310 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 12:04:52,310 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:04:52,311 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:04:52,311 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:04:52,311 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.8.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2023-11-26 12:04:52,311 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:04:52,311 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:04:52,390 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,409 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,412 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,418 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,426 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,428 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,431 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,434 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,437 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,440 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,443 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,450 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,453 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,457 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,461 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,468 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,473 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,475 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,479 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,483 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:52,486 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,402 WARN L293 SmtUtils]: Spent 5.88s on a formula simplification. DAG size of input: 349 DAG size of output: 195 (called from [L 270] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.mapelimination.MapEliminator.setFormulaAndSimplify) [2023-11-26 12:04:58,402 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,408 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,412 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,418 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,421 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,426 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,429 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,431 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,436 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,440 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,443 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,446 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,454 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,461 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,464 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,471 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,477 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,480 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,484 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:04:58,489 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:05:03,858 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 46