./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/array-examples/standard_vararg_ground.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/array-examples/standard_vararg_ground.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 28ac72543f751666908cbd68a77fa11ffe4dd886016c3996df45b97bb42d5078 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:53:22,060 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:53:22,203 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:53:22,210 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:53:22,211 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:53:22,252 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:53:22,254 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:53:22,254 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:53:22,256 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:53:22,262 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:53:22,262 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:53:22,263 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:53:22,264 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:53:22,266 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:53:22,266 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:53:22,267 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:53:22,268 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:53:22,268 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:53:22,268 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:53:22,269 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:53:22,269 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:53:22,270 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:53:22,271 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:53:22,271 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:53:22,272 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:53:22,272 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:53:22,272 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:53:22,273 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:53:22,273 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:53:22,274 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:53:22,275 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:53:22,276 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:53:22,276 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:53:22,276 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:53:22,276 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:53:22,277 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:53:22,277 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:53:22,278 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:53:22,278 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 28ac72543f751666908cbd68a77fa11ffe4dd886016c3996df45b97bb42d5078 [2023-11-26 11:53:22,584 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:53:22,610 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:53:22,613 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:53:22,614 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:53:22,615 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:53:22,617 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/array-examples/standard_vararg_ground.i [2023-11-26 11:53:25,744 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:53:25,931 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:53:25,932 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/sv-benchmarks/c/array-examples/standard_vararg_ground.i [2023-11-26 11:53:25,940 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/data/c12970196/cec5ce008dee4a4ca2a20f3a0dd6e995/FLAG124bbac9e [2023-11-26 11:53:25,982 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/data/c12970196/cec5ce008dee4a4ca2a20f3a0dd6e995 [2023-11-26 11:53:25,988 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:53:25,992 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:53:25,995 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:53:25,996 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:53:26,001 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:53:26,003 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:53:25" (1/1) ... [2023-11-26 11:53:26,004 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@210dd0d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26, skipping insertion in model container [2023-11-26 11:53:26,004 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:53:25" (1/1) ... [2023-11-26 11:53:26,034 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:53:26,206 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:53:26,218 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:53:26,233 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:53:26,245 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:53:26,245 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26 WrapperNode [2023-11-26 11:53:26,245 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:53:26,246 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:53:26,247 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:53:26,247 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:53:26,254 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,260 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,277 INFO L138 Inliner]: procedures = 16, calls = 14, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 58 [2023-11-26 11:53:26,277 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:53:26,278 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:53:26,278 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:53:26,278 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:53:26,287 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,288 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,290 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,303 INFO L175 MemorySlicer]: Split 5 memory accesses to 2 slices as follows [2, 3]. 60 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 1 writes are split as follows [0, 1]. [2023-11-26 11:53:26,303 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,304 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,309 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,313 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,314 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,315 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,317 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:53:26,318 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:53:26,319 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:53:26,319 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:53:26,320 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (1/1) ... [2023-11-26 11:53:26,339 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:26,355 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:26,367 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:53:26,397 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:53:26,423 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:53:26,424 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:53:26,424 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 11:53:26,424 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 11:53:26,425 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 11:53:26,425 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 11:53:26,425 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:53:26,425 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:53:26,426 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 11:53:26,426 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 11:53:26,426 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 11:53:26,522 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:53:26,535 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:53:26,767 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:53:26,777 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:53:26,777 INFO L309 CfgBuilder]: Removed 3 assume(true) statements. [2023-11-26 11:53:26,779 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:53:26 BoogieIcfgContainer [2023-11-26 11:53:26,779 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:53:26,780 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:53:26,780 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:53:26,786 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:53:26,787 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:53:26,787 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:53:25" (1/3) ... [2023-11-26 11:53:26,788 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6393e078 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:53:26, skipping insertion in model container [2023-11-26 11:53:26,788 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:53:26,789 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:53:26" (2/3) ... [2023-11-26 11:53:26,791 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6393e078 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:53:26, skipping insertion in model container [2023-11-26 11:53:26,792 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:53:26,792 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:53:26" (3/3) ... [2023-11-26 11:53:26,793 INFO L332 chiAutomizerObserver]: Analyzing ICFG standard_vararg_ground.i [2023-11-26 11:53:26,875 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:53:26,876 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:53:26,876 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:53:26,876 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:53:26,876 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:53:26,878 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:53:26,879 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:53:26,879 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:53:26,884 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 19 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:26,906 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 11 [2023-11-26 11:53:26,906 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:53:26,907 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:53:26,910 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:53:26,911 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:53:26,911 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:53:26,911 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 19 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:26,913 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 11 [2023-11-26 11:53:26,914 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:53:26,914 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:53:26,914 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:53:26,914 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:53:26,920 INFO L748 eck$LassoCheckResult]: Stem: 17#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 8#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 14#L20-3true [2023-11-26 11:53:26,920 INFO L750 eck$LassoCheckResult]: Loop: 14#L20-3true assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 15#L20-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 14#L20-3true [2023-11-26 11:53:26,925 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:26,925 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-26 11:53:26,935 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:26,936 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293372084] [2023-11-26 11:53:26,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:26,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:27,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:27,026 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:53:27,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:27,062 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:53:27,065 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:27,065 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-26 11:53:27,065 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:27,066 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [585581629] [2023-11-26 11:53:27,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:27,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:27,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:27,091 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:53:27,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:27,116 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:53:27,124 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:27,129 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-26 11:53:27,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:27,130 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1691914119] [2023-11-26 11:53:27,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:27,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:27,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:27,178 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:53:27,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:27,204 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:53:27,665 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 11:53:27,666 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 11:53:27,666 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 11:53:27,667 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 11:53:27,667 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 11:53:27,667 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:27,667 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 11:53:27,667 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 11:53:27,667 INFO L133 ssoRankerPreferences]: Filename of dumped script: standard_vararg_ground.i_Iteration1_Lasso [2023-11-26 11:53:27,668 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 11:53:27,669 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 11:53:27,694 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:53:27,720 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:53:27,723 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:53:27,726 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:53:27,729 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:53:27,732 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:53:27,736 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:53:27,739 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:53:27,924 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:53:27,927 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:53:27,930 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:53:28,186 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 11:53:28,191 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 11:53:28,193 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:28,193 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:28,199 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:53:28,212 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:53:28,224 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-26 11:53:28,225 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:53:28,226 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:53:28,226 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:53:28,226 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:53:28,231 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:53:28,232 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:53:28,248 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:53:28,264 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-26 11:53:28,264 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:28,264 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:28,266 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:53:28,270 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-26 11:53:28,276 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:53:28,286 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:53:28,286 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:53:28,286 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:53:28,287 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:53:28,291 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:53:28,292 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:53:28,319 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:53:28,327 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2023-11-26 11:53:28,327 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:28,327 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:28,329 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:53:28,333 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:53:28,333 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-26 11:53:28,345 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:53:28,346 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:53:28,346 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:53:28,346 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:53:28,347 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:53:28,347 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:53:28,348 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:53:28,357 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:53:28,364 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2023-11-26 11:53:28,364 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:28,364 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:28,365 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:53:28,368 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-26 11:53:28,369 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:53:28,386 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:53:28,386 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:53:28,386 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:53:28,386 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:53:28,386 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:53:28,387 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:53:28,388 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:53:28,394 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:53:28,404 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-26 11:53:28,404 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:28,405 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:28,406 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:53:28,413 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-26 11:53:28,414 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:53:28,426 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:53:28,426 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:53:28,426 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:53:28,426 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:53:28,427 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:53:28,427 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:53:28,428 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:53:28,437 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:53:28,447 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2023-11-26 11:53:28,448 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:28,448 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:28,449 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:53:28,456 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-26 11:53:28,457 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:53:28,477 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:53:28,477 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:53:28,477 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:53:28,477 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:53:28,477 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:53:28,480 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:53:28,481 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:53:28,499 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:53:28,504 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2023-11-26 11:53:28,504 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:28,505 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:28,506 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:53:28,512 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-26 11:53:28,513 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:53:28,525 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:53:28,526 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:53:28,526 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:53:28,526 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:53:28,583 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:53:28,583 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:53:28,607 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:53:28,622 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2023-11-26 11:53:28,622 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:28,622 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:28,646 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:53:28,650 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-26 11:53:28,651 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:53:28,664 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:53:28,665 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 11:53:28,665 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:53:28,665 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:53:28,665 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:53:28,666 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 11:53:28,666 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 11:53:28,691 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 11:53:28,700 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2023-11-26 11:53:28,700 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:28,701 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:28,702 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:53:28,717 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 11:53:28,730 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 11:53:28,730 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 11:53:28,730 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 11:53:28,730 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 11:53:28,731 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-26 11:53:28,738 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 11:53:28,738 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 11:53:28,759 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 11:53:28,797 INFO L443 ModelExtractionUtils]: Simplification made 14 calls to the SMT solver. [2023-11-26 11:53:28,797 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2023-11-26 11:53:28,799 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:53:28,799 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:28,826 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:53:28,830 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-26 11:53:28,830 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 11:53:28,849 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-26 11:53:28,849 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 11:53:28,850 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#aa~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 199999*v_rep(select #length ULTIMATE.start_main_~#aa~0#1.base)_1 Supporting invariants [] [2023-11-26 11:53:28,858 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2023-11-26 11:53:28,886 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2023-11-26 11:53:28,895 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#aa~0!base] could not be translated [2023-11-26 11:53:28,916 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:28,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:53:28,935 INFO L262 TraceCheckSpWp]: Trace formula consists of 33 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 11:53:28,936 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:53:28,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:53:28,954 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 11:53:28,956 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:53:29,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:29,056 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 11:53:29,059 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 19 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:29,130 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 19 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 37 states and 53 transitions. Complement of second has 8 states. [2023-11-26 11:53:29,133 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 11:53:29,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:29,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 26 transitions. [2023-11-26 11:53:29,143 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 26 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-26 11:53:29,143 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:53:29,144 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 26 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-26 11:53:29,144 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:53:29,144 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 26 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-26 11:53:29,144 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 11:53:29,145 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37 states and 53 transitions. [2023-11-26 11:53:29,148 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 11:53:29,152 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37 states to 16 states and 22 transitions. [2023-11-26 11:53:29,153 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2023-11-26 11:53:29,153 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2023-11-26 11:53:29,154 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 22 transitions. [2023-11-26 11:53:29,154 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:53:29,154 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2023-11-26 11:53:29,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 22 transitions. [2023-11-26 11:53:29,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2023-11-26 11:53:29,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.375) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:29,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 22 transitions. [2023-11-26 11:53:29,177 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2023-11-26 11:53:29,177 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 22 transitions. [2023-11-26 11:53:29,177 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:53:29,177 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 22 transitions. [2023-11-26 11:53:29,178 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-26 11:53:29,178 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:53:29,179 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:53:29,179 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-26 11:53:29,179 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:53:29,179 INFO L748 eck$LassoCheckResult]: Stem: 126#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 117#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 118#L20-3 assume !(main_~i~0#1 < 100000); 119#L20-4 havoc main_~i~0#1; 113#L25-3 [2023-11-26 11:53:29,180 INFO L750 eck$LassoCheckResult]: Loop: 113#L25-3 call main_#t~mem3#1 := read~int#1(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 114#L25-1 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 113#L25-3 [2023-11-26 11:53:29,180 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:29,180 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2023-11-26 11:53:29,180 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:29,181 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311791242] [2023-11-26 11:53:29,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:29,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:29,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:53:29,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:29,244 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:53:29,244 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [311791242] [2023-11-26 11:53:29,245 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [311791242] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:53:29,245 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:53:29,245 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:53:29,246 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076941892] [2023-11-26 11:53:29,246 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:53:29,249 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:53:29,250 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:29,250 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 1 times [2023-11-26 11:53:29,250 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:29,250 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [240328820] [2023-11-26 11:53:29,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:29,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:29,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:29,258 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:53:29,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:29,264 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:53:29,310 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:53:29,312 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 11:53:29,313 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 11:53:29,314 INFO L87 Difference]: Start difference. First operand 16 states and 22 transitions. cyclomatic complexity: 9 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:29,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:53:29,333 INFO L93 Difference]: Finished difference Result 16 states and 18 transitions. [2023-11-26 11:53:29,333 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 18 transitions. [2023-11-26 11:53:29,334 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:53:29,335 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 14 states and 16 transitions. [2023-11-26 11:53:29,335 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2023-11-26 11:53:29,335 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2023-11-26 11:53:29,335 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 16 transitions. [2023-11-26 11:53:29,335 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:53:29,336 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 16 transitions. [2023-11-26 11:53:29,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 16 transitions. [2023-11-26 11:53:29,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 13. [2023-11-26 11:53:29,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.1538461538461537) internal successors, (15), 12 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:29,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 15 transitions. [2023-11-26 11:53:29,338 INFO L240 hiAutomatonCegarLoop]: Abstraction has 13 states and 15 transitions. [2023-11-26 11:53:29,339 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 11:53:29,340 INFO L428 stractBuchiCegarLoop]: Abstraction has 13 states and 15 transitions. [2023-11-26 11:53:29,340 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:53:29,340 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13 states and 15 transitions. [2023-11-26 11:53:29,341 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:53:29,341 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:53:29,341 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:53:29,341 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2023-11-26 11:53:29,341 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:53:29,342 INFO L748 eck$LassoCheckResult]: Stem: 159#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 160#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 152#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 153#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 154#L20-3 assume !(main_~i~0#1 < 100000); 155#L20-4 havoc main_~i~0#1; 156#L25-3 [2023-11-26 11:53:29,342 INFO L750 eck$LassoCheckResult]: Loop: 156#L25-3 call main_#t~mem3#1 := read~int#1(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 157#L25-1 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 156#L25-3 [2023-11-26 11:53:29,342 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:29,343 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2023-11-26 11:53:29,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:29,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1731298936] [2023-11-26 11:53:29,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:29,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:29,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:53:29,407 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:29,407 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:53:29,408 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1731298936] [2023-11-26 11:53:29,408 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1731298936] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:53:29,408 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1115075398] [2023-11-26 11:53:29,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:29,409 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:53:29,409 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:29,410 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:53:29,439 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2023-11-26 11:53:29,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:53:29,478 INFO L262 TraceCheckSpWp]: Trace formula consists of 46 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:53:29,479 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:53:29,496 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:29,496 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:53:29,522 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:29,522 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1115075398] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:53:29,524 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:53:29,525 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-26 11:53:29,525 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2132347680] [2023-11-26 11:53:29,525 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:53:29,526 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:53:29,526 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:29,526 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 2 times [2023-11-26 11:53:29,527 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:29,527 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404443043] [2023-11-26 11:53:29,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:29,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:29,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:29,539 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:53:29,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:29,553 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:53:29,610 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:53:29,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:53:29,612 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:53:29,612 INFO L87 Difference]: Start difference. First operand 13 states and 15 transitions. cyclomatic complexity: 5 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:29,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:53:29,652 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2023-11-26 11:53:29,652 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 21 transitions. [2023-11-26 11:53:29,657 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:53:29,664 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 19 states and 21 transitions. [2023-11-26 11:53:29,665 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2023-11-26 11:53:29,665 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2023-11-26 11:53:29,665 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 21 transitions. [2023-11-26 11:53:29,665 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:53:29,666 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 21 transitions. [2023-11-26 11:53:29,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 21 transitions. [2023-11-26 11:53:29,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2023-11-26 11:53:29,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.105263157894737) internal successors, (21), 18 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:29,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2023-11-26 11:53:29,670 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 21 transitions. [2023-11-26 11:53:29,671 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:53:29,673 INFO L428 stractBuchiCegarLoop]: Abstraction has 19 states and 21 transitions. [2023-11-26 11:53:29,674 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:53:29,674 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 21 transitions. [2023-11-26 11:53:29,676 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:53:29,676 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:53:29,676 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:53:29,677 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2023-11-26 11:53:29,677 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:53:29,677 INFO L748 eck$LassoCheckResult]: Stem: 231#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 232#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 224#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 225#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 226#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 227#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 239#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 238#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 237#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 236#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 235#L20-3 assume !(main_~i~0#1 < 100000); 234#L20-4 havoc main_~i~0#1; 228#L25-3 [2023-11-26 11:53:29,678 INFO L750 eck$LassoCheckResult]: Loop: 228#L25-3 call main_#t~mem3#1 := read~int#1(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 229#L25-1 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 228#L25-3 [2023-11-26 11:53:29,679 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:29,682 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2023-11-26 11:53:29,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:29,684 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577332064] [2023-11-26 11:53:29,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:29,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:29,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:53:29,924 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:29,924 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:53:29,925 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [577332064] [2023-11-26 11:53:29,933 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [577332064] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:53:29,933 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2063539790] [2023-11-26 11:53:29,933 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 11:53:29,934 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:53:29,934 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:29,937 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:53:29,942 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2023-11-26 11:53:30,022 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 11:53:30,023 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:53:30,024 INFO L262 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 11:53:30,026 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:53:30,071 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:30,071 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:53:30,163 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:30,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2063539790] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:53:30,164 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:53:30,164 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-26 11:53:30,165 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [192379273] [2023-11-26 11:53:30,165 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:53:30,165 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:53:30,166 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:30,166 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 3 times [2023-11-26 11:53:30,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:30,166 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016053508] [2023-11-26 11:53:30,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:30,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:30,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:30,172 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:53:30,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:30,176 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:53:30,216 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:53:30,217 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-26 11:53:30,217 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2023-11-26 11:53:30,217 INFO L87 Difference]: Start difference. First operand 19 states and 21 transitions. cyclomatic complexity: 5 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:30,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:53:30,271 INFO L93 Difference]: Finished difference Result 31 states and 33 transitions. [2023-11-26 11:53:30,272 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 33 transitions. [2023-11-26 11:53:30,273 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:53:30,274 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 31 states and 33 transitions. [2023-11-26 11:53:30,274 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2023-11-26 11:53:30,274 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2023-11-26 11:53:30,274 INFO L73 IsDeterministic]: Start isDeterministic. Operand 31 states and 33 transitions. [2023-11-26 11:53:30,274 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:53:30,275 INFO L218 hiAutomatonCegarLoop]: Abstraction has 31 states and 33 transitions. [2023-11-26 11:53:30,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states and 33 transitions. [2023-11-26 11:53:30,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2023-11-26 11:53:30,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.064516129032258) internal successors, (33), 30 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:30,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2023-11-26 11:53:30,278 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 33 transitions. [2023-11-26 11:53:30,279 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-26 11:53:30,280 INFO L428 stractBuchiCegarLoop]: Abstraction has 31 states and 33 transitions. [2023-11-26 11:53:30,280 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 11:53:30,280 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 33 transitions. [2023-11-26 11:53:30,281 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:53:30,281 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:53:30,281 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:53:30,282 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2023-11-26 11:53:30,282 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:53:30,283 INFO L748 eck$LassoCheckResult]: Stem: 364#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 365#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 356#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 357#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 358#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 359#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 360#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 383#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 382#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 381#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 380#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 379#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 378#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 377#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 376#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 375#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 374#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 373#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 372#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 371#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 370#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 369#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 368#L20-3 assume !(main_~i~0#1 < 100000); 367#L20-4 havoc main_~i~0#1; 361#L25-3 [2023-11-26 11:53:30,283 INFO L750 eck$LassoCheckResult]: Loop: 361#L25-3 call main_#t~mem3#1 := read~int#1(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 362#L25-1 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 361#L25-3 [2023-11-26 11:53:30,283 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:30,283 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2023-11-26 11:53:30,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:30,284 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [934580104] [2023-11-26 11:53:30,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:30,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:30,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:53:30,616 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2023-11-26 11:53:30,661 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:30,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:53:30,661 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [934580104] [2023-11-26 11:53:30,662 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [934580104] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:53:30,662 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1826278498] [2023-11-26 11:53:30,662 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-26 11:53:30,662 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:53:30,663 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:30,664 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:53:30,687 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2023-11-26 11:53:30,832 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2023-11-26 11:53:30,832 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:53:30,833 INFO L262 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-26 11:53:30,836 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:53:30,907 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:30,907 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:53:31,200 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:31,200 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1826278498] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:53:31,200 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:53:31,200 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2023-11-26 11:53:31,201 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367092171] [2023-11-26 11:53:31,201 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:53:31,201 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:53:31,202 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:31,202 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 4 times [2023-11-26 11:53:31,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:31,202 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [55617627] [2023-11-26 11:53:31,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:31,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:31,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:31,207 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:53:31,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:31,214 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:53:31,252 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:53:31,253 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-26 11:53:31,254 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2023-11-26 11:53:31,255 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. cyclomatic complexity: 5 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:31,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:53:31,372 INFO L93 Difference]: Finished difference Result 55 states and 57 transitions. [2023-11-26 11:53:31,372 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 57 transitions. [2023-11-26 11:53:31,378 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:53:31,380 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 55 states and 57 transitions. [2023-11-26 11:53:31,380 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2023-11-26 11:53:31,380 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2023-11-26 11:53:31,380 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 57 transitions. [2023-11-26 11:53:31,381 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:53:31,381 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 57 transitions. [2023-11-26 11:53:31,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 57 transitions. [2023-11-26 11:53:31,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2023-11-26 11:53:31,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 1.0363636363636364) internal successors, (57), 54 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:31,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 57 transitions. [2023-11-26 11:53:31,398 INFO L240 hiAutomatonCegarLoop]: Abstraction has 55 states and 57 transitions. [2023-11-26 11:53:31,399 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2023-11-26 11:53:31,401 INFO L428 stractBuchiCegarLoop]: Abstraction has 55 states and 57 transitions. [2023-11-26 11:53:31,402 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 11:53:31,402 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 55 states and 57 transitions. [2023-11-26 11:53:31,404 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:53:31,405 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:53:31,405 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:53:31,406 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2023-11-26 11:53:31,407 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:53:31,407 INFO L748 eck$LassoCheckResult]: Stem: 616#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 617#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 608#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 609#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 610#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 611#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 612#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 659#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 658#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 657#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 656#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 655#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 654#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 653#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 652#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 651#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 650#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 649#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 648#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 647#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 646#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 645#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 644#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 643#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 642#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 641#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 640#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 639#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 638#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 637#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 636#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 635#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 634#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 633#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 632#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 631#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 630#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 629#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 628#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 627#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 626#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 625#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 624#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 623#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 622#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 621#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 620#L20-3 assume !(main_~i~0#1 < 100000); 619#L20-4 havoc main_~i~0#1; 613#L25-3 [2023-11-26 11:53:31,407 INFO L750 eck$LassoCheckResult]: Loop: 613#L25-3 call main_#t~mem3#1 := read~int#1(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 614#L25-1 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 613#L25-3 [2023-11-26 11:53:31,407 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:31,407 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2023-11-26 11:53:31,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:31,408 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [820554617] [2023-11-26 11:53:31,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:31,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:31,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:53:32,291 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:32,292 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:53:32,292 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [820554617] [2023-11-26 11:53:32,292 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [820554617] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:53:32,292 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [281699628] [2023-11-26 11:53:32,293 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-26 11:53:32,293 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:53:32,293 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:32,296 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:53:32,319 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2023-11-26 11:53:32,435 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-26 11:53:32,436 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:53:32,438 INFO L262 TraceCheckSpWp]: Trace formula consists of 277 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-26 11:53:32,444 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:53:32,574 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:32,575 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:53:33,688 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:33,688 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [281699628] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:53:33,688 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:53:33,688 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2023-11-26 11:53:33,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [204862941] [2023-11-26 11:53:33,689 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:53:33,689 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:53:33,690 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:33,690 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 5 times [2023-11-26 11:53:33,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:33,690 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372285613] [2023-11-26 11:53:33,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:33,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:33,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:33,696 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:53:33,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:53:33,700 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:53:33,752 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:53:33,754 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2023-11-26 11:53:33,755 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2023-11-26 11:53:33,756 INFO L87 Difference]: Start difference. First operand 55 states and 57 transitions. cyclomatic complexity: 5 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:34,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:53:34,040 INFO L93 Difference]: Finished difference Result 103 states and 105 transitions. [2023-11-26 11:53:34,040 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 103 states and 105 transitions. [2023-11-26 11:53:34,045 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:53:34,049 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 103 states to 103 states and 105 transitions. [2023-11-26 11:53:34,049 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2023-11-26 11:53:34,049 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2023-11-26 11:53:34,050 INFO L73 IsDeterministic]: Start isDeterministic. Operand 103 states and 105 transitions. [2023-11-26 11:53:34,051 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:53:34,052 INFO L218 hiAutomatonCegarLoop]: Abstraction has 103 states and 105 transitions. [2023-11-26 11:53:34,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states and 105 transitions. [2023-11-26 11:53:34,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2023-11-26 11:53:34,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 103 states, 103 states have (on average 1.0194174757281553) internal successors, (105), 102 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:53:34,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 105 transitions. [2023-11-26 11:53:34,067 INFO L240 hiAutomatonCegarLoop]: Abstraction has 103 states and 105 transitions. [2023-11-26 11:53:34,067 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-26 11:53:34,069 INFO L428 stractBuchiCegarLoop]: Abstraction has 103 states and 105 transitions. [2023-11-26 11:53:34,070 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 11:53:34,070 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 103 states and 105 transitions. [2023-11-26 11:53:34,073 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:53:34,074 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:53:34,074 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:53:34,080 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2023-11-26 11:53:34,081 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:53:34,082 INFO L748 eck$LassoCheckResult]: Stem: 1109#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 1110#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 1100#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1101#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1102#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1103#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1104#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1199#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1198#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1197#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1196#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1195#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1194#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1193#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1192#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1191#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1190#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1189#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1188#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1187#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1186#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1185#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1184#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1183#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1182#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1181#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1180#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1179#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1178#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1177#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1176#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1175#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1174#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1173#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1172#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1171#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1170#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1169#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1168#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1167#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1166#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1165#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1164#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1163#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1162#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1161#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1160#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1159#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1158#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1157#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1156#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1155#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1154#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1153#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1152#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1151#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1150#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1149#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1148#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1147#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1146#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1145#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1144#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1143#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1142#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1141#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1140#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1139#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1138#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1137#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1136#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1135#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1134#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1133#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1132#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1131#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1130#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1129#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1128#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1127#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1126#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1125#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1124#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1123#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1122#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1121#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1120#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1119#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1118#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1117#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1116#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1115#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1114#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1113#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1112#L20-3 assume !(main_~i~0#1 < 100000); 1111#L20-4 havoc main_~i~0#1; 1105#L25-3 [2023-11-26 11:53:34,087 INFO L750 eck$LassoCheckResult]: Loop: 1105#L25-3 call main_#t~mem3#1 := read~int#1(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 1106#L25-1 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1105#L25-3 [2023-11-26 11:53:34,087 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:53:34,088 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2023-11-26 11:53:34,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:53:34,090 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1759440752] [2023-11-26 11:53:34,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:53:34,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:53:34,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:53:36,971 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:36,971 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:53:36,971 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1759440752] [2023-11-26 11:53:36,971 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1759440752] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:53:36,971 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [272557353] [2023-11-26 11:53:36,972 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-26 11:53:36,972 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:53:36,972 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:53:36,976 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:53:36,981 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2023-11-26 11:53:57,644 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2023-11-26 11:53:57,644 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 11:53:57,667 INFO L262 TraceCheckSpWp]: Trace formula consists of 541 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-26 11:53:57,675 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:53:57,914 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:53:57,914 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 11:54:01,852 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:54:01,853 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [272557353] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 11:54:01,853 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 11:54:01,853 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2023-11-26 11:54:01,854 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1575176150] [2023-11-26 11:54:01,854 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 11:54:01,858 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:54:01,859 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:01,859 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 6 times [2023-11-26 11:54:01,859 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:01,860 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1657459163] [2023-11-26 11:54:01,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:01,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:01,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:01,866 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:54:01,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:54:01,871 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:54:01,918 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:54:01,920 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2023-11-26 11:54:01,924 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2023-11-26 11:54:01,925 INFO L87 Difference]: Start difference. First operand 103 states and 105 transitions. cyclomatic complexity: 5 Second operand has 97 states, 97 states have (on average 1.9896907216494846) internal successors, (193), 97 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:02,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:54:02,437 INFO L93 Difference]: Finished difference Result 199 states and 201 transitions. [2023-11-26 11:54:02,437 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 199 states and 201 transitions. [2023-11-26 11:54:02,440 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:54:02,445 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 199 states to 199 states and 201 transitions. [2023-11-26 11:54:02,445 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2023-11-26 11:54:02,446 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2023-11-26 11:54:02,446 INFO L73 IsDeterministic]: Start isDeterministic. Operand 199 states and 201 transitions. [2023-11-26 11:54:02,453 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:54:02,453 INFO L218 hiAutomatonCegarLoop]: Abstraction has 199 states and 201 transitions. [2023-11-26 11:54:02,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states and 201 transitions. [2023-11-26 11:54:02,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 199. [2023-11-26 11:54:02,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 199 states, 199 states have (on average 1.0100502512562815) internal successors, (201), 198 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:54:02,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 201 transitions. [2023-11-26 11:54:02,476 INFO L240 hiAutomatonCegarLoop]: Abstraction has 199 states and 201 transitions. [2023-11-26 11:54:02,477 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2023-11-26 11:54:02,479 INFO L428 stractBuchiCegarLoop]: Abstraction has 199 states and 201 transitions. [2023-11-26 11:54:02,479 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 11:54:02,479 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 199 states and 201 transitions. [2023-11-26 11:54:02,481 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-26 11:54:02,481 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:54:02,481 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:54:02,493 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2023-11-26 11:54:02,498 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 11:54:02,499 INFO L748 eck$LassoCheckResult]: Stem: 2081#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(25, 2); 2082#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~post4#1, main_#t~mem3#1, main_#t~mem6#1, main_#t~post5#1, main_~#aa~0#1.base, main_~#aa~0#1.offset, main_~a~0#1, main_~x~0#1;call main_~#aa~0#1.base, main_~#aa~0#1.offset := #Ultimate.allocOnStack(400000);main_~a~0#1 := 0;main_~i~0#1 := 0; 2072#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2073#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2074#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2075#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2076#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2267#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2266#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2265#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2264#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2263#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2262#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2261#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2260#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2259#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2258#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2257#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2256#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2255#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2254#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2253#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2252#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2251#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2250#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2249#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2248#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2247#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2246#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2245#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2244#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2243#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2242#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2241#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2240#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2239#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2238#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2237#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2236#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2235#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2234#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2233#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2232#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2231#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2230#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2229#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2228#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2227#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2226#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2225#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2224#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2223#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2222#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2221#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2220#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2219#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2218#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2217#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2216#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2215#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2214#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2213#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2212#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2211#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2210#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2209#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2208#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2207#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2206#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2205#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2204#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2203#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2202#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2201#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2200#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2199#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2198#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2197#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2196#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2195#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2194#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2193#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2192#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2191#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2190#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2189#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2188#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2187#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2186#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2185#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2184#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2183#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2182#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2181#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2180#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2179#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2178#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2177#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2176#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2175#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2174#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2173#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2172#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2171#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2170#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2169#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2168#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2167#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2166#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2165#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2164#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2163#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2162#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2161#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2160#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2159#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2158#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2157#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2156#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2155#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2154#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2153#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2152#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2151#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2150#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2149#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2148#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2147#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2146#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2145#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2144#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2143#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2142#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2141#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2140#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2139#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2138#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2137#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2136#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2135#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2134#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2133#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2132#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2131#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2130#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2129#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2128#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2127#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2126#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2125#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2124#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2123#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2122#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2121#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2120#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2119#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2118#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2117#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2116#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2115#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2114#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2113#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2112#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2111#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2110#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2109#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2108#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2107#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2106#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2105#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2104#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2103#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2102#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2101#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2100#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2099#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2098#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2097#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2096#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2095#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2094#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2093#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2092#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2091#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2090#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2089#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2088#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2087#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2086#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1;call write~int#1(main_#t~nondet2#1, main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2085#L20-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2084#L20-3 assume !(main_~i~0#1 < 100000); 2083#L20-4 havoc main_~i~0#1; 2077#L25-3 [2023-11-26 11:54:02,503 INFO L750 eck$LassoCheckResult]: Loop: 2077#L25-3 call main_#t~mem3#1 := read~int#1(main_~#aa~0#1.base, main_~#aa~0#1.offset + 4 * main_~a~0#1, 4); 2078#L25-1 assume !!(main_#t~mem3#1 >= 0);havoc main_#t~mem3#1;main_#t~post4#1 := main_~a~0#1;main_~a~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2077#L25-3 [2023-11-26 11:54:02,504 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:54:02,504 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2023-11-26 11:54:02,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:54:02,504 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933361450] [2023-11-26 11:54:02,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:54:02,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:54:02,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:54:11,222 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:54:11,223 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:54:11,223 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933361450] [2023-11-26 11:54:11,223 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [933361450] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 11:54:11,223 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [342655898] [2023-11-26 11:54:11,224 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-26 11:54:11,224 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:54:11,224 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:54:11,233 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:54:11,234 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3ddb0a99-2c80-4d5f-9a50-d5eaec3b6d9a/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process