./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3012c2825f53c0db53d950c12df6540de859b34b2bef033c36a98846352dedd3 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 10:41:36,930 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 10:41:37,055 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 10:41:37,063 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 10:41:37,064 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 10:41:37,114 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 10:41:37,114 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 10:41:37,115 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 10:41:37,116 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 10:41:37,121 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 10:41:37,123 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 10:41:37,124 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 10:41:37,124 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 10:41:37,127 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 10:41:37,127 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 10:41:37,129 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 10:41:37,129 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 10:41:37,130 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 10:41:37,130 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 10:41:37,131 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 10:41:37,131 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 10:41:37,132 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 10:41:37,132 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 10:41:37,133 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 10:41:37,133 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 10:41:37,134 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 10:41:37,134 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 10:41:37,135 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 10:41:37,135 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 10:41:37,136 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 10:41:37,137 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 10:41:37,137 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 10:41:37,138 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 10:41:37,138 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 10:41:37,138 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 10:41:37,138 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 10:41:37,139 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 10:41:37,139 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 10:41:37,140 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3012c2825f53c0db53d950c12df6540de859b34b2bef033c36a98846352dedd3 [2023-11-26 10:41:37,451 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 10:41:37,479 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 10:41:37,483 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 10:41:37,484 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 10:41:37,485 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 10:41:37,487 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i [2023-11-26 10:41:40,661 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 10:41:41,107 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 10:41:41,109 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i [2023-11-26 10:41:41,142 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/data/da16e57b8/d4f98c0a37b4430c97a9933cf73abc32/FLAG777bd2bc2 [2023-11-26 10:41:41,161 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/data/da16e57b8/d4f98c0a37b4430c97a9933cf73abc32 [2023-11-26 10:41:41,167 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 10:41:41,172 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 10:41:41,176 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 10:41:41,176 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 10:41:41,183 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 10:41:41,184 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:41:41" (1/1) ... [2023-11-26 10:41:41,185 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2840c678 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:41, skipping insertion in model container [2023-11-26 10:41:41,185 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:41:41" (1/1) ... [2023-11-26 10:41:41,281 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 10:41:42,288 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 10:41:42,304 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 10:41:42,440 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 10:41:42,516 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-26 10:41:42,524 INFO L206 MainTranslator]: Completed translation [2023-11-26 10:41:42,525 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42 WrapperNode [2023-11-26 10:41:42,526 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 10:41:42,527 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 10:41:42,528 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 10:41:42,528 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 10:41:42,537 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:42,612 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:42,708 INFO L138 Inliner]: procedures = 282, calls = 298, calls flagged for inlining = 23, calls inlined = 33, statements flattened = 1512 [2023-11-26 10:41:42,709 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 10:41:42,709 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 10:41:42,710 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 10:41:42,710 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 10:41:42,722 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:42,722 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:42,746 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:42,848 INFO L175 MemorySlicer]: Split 270 memory accesses to 5 slices as follows [2, 8, 5, 34, 221]. 82 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0, 0, 0]. The 59 writes are split as follows [0, 4, 1, 4, 50]. [2023-11-26 10:41:42,848 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:42,849 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:42,914 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:42,945 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:42,966 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:42,976 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:43,002 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 10:41:43,008 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 10:41:43,008 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 10:41:43,008 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 10:41:43,009 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (1/1) ... [2023-11-26 10:41:43,016 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:41:43,027 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:41:43,045 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:41:43,074 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 10:41:43,097 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 10:41:43,097 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 10:41:43,097 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 10:41:43,097 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-26 10:41:43,097 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#4 [2023-11-26 10:41:43,098 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 10:41:43,098 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 10:41:43,098 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 10:41:43,098 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-26 10:41:43,098 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#4 [2023-11-26 10:41:43,099 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 10:41:43,099 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-26 10:41:43,099 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 10:41:43,099 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 10:41:43,101 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 10:41:43,102 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-26 10:41:43,102 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#4 [2023-11-26 10:41:43,102 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 10:41:43,102 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 10:41:43,102 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 10:41:43,103 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 10:41:43,103 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-26 10:41:43,103 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#4 [2023-11-26 10:41:43,103 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 10:41:43,104 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 10:41:43,104 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 10:41:43,104 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-26 10:41:43,104 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#4 [2023-11-26 10:41:43,104 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 10:41:43,105 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 10:41:43,105 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 10:41:43,105 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 10:41:43,105 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 10:41:43,105 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-26 10:41:43,105 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#4 [2023-11-26 10:41:43,106 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 10:41:43,106 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 10:41:43,106 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 10:41:43,106 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-26 10:41:43,106 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#4 [2023-11-26 10:41:43,106 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 10:41:43,107 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 10:41:43,447 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 10:41:43,450 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 10:41:43,455 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:41:43,510 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:41:43,529 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:41:43,547 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:41:43,564 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:41:45,346 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 10:41:45,365 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 10:41:45,365 INFO L309 CfgBuilder]: Removed 63 assume(true) statements. [2023-11-26 10:41:45,367 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:41:45 BoogieIcfgContainer [2023-11-26 10:41:45,367 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 10:41:45,368 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 10:41:45,369 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 10:41:45,372 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 10:41:45,373 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:41:45,374 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 10:41:41" (1/3) ... [2023-11-26 10:41:45,374 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6679105d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:41:45, skipping insertion in model container [2023-11-26 10:41:45,375 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:41:45,375 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:41:42" (2/3) ... [2023-11-26 10:41:45,375 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6679105d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:41:45, skipping insertion in model container [2023-11-26 10:41:45,375 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:41:45,376 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:41:45" (3/3) ... [2023-11-26 10:41:45,377 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_JEN_test6-1.i [2023-11-26 10:41:45,441 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 10:41:45,441 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 10:41:45,441 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 10:41:45,442 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 10:41:45,442 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 10:41:45,442 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 10:41:45,442 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 10:41:45,442 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 10:41:45,449 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:41:45,499 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 390 [2023-11-26 10:41:45,499 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:41:45,499 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:41:45,506 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:41:45,507 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:41:45,507 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 10:41:45,508 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:41:45,522 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 390 [2023-11-26 10:41:45,523 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:41:45,523 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:41:45,523 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:41:45,523 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:41:45,531 INFO L748 eck$LassoCheckResult]: Stem: 120#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 334#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8#L989-4true [2023-11-26 10:41:45,532 INFO L750 eck$LassoCheckResult]: Loop: 8#L989-4true call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 209#L989-1true assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 4#real_malloc_returnLabel#1true main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 9#L991true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 79#L991-2true call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 240#L996-263true assume !true; 391#L989-3true call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 8#L989-4true [2023-11-26 10:41:45,538 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:45,538 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 1 times [2023-11-26 10:41:45,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:45,549 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1664583895] [2023-11-26 10:41:45,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:45,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:45,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:45,695 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:41:45,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:45,802 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:41:45,811 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:45,812 INFO L85 PathProgramCache]: Analyzing trace with hash 1419562106, now seen corresponding path program 1 times [2023-11-26 10:41:45,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:45,812 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560842511] [2023-11-26 10:41:45,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:45,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:45,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:41:45,870 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:41:45,871 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1560842511] [2023-11-26 10:41:45,871 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-26 10:41:45,872 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1537022482] [2023-11-26 10:41:45,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:45,872 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:41:45,873 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:41:45,876 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:41:45,919 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-26 10:41:46,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:41:46,077 INFO L262 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-26 10:41:46,078 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:41:46,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:41:46,097 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:41:46,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1537022482] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:41:46,099 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:41:46,099 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 10:41:46,100 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [326620190] [2023-11-26 10:41:46,101 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:41:46,105 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:41:46,106 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:41:46,148 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 10:41:46,149 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 10:41:46,152 INFO L87 Difference]: Start difference. First operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:41:46,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:41:46,198 INFO L93 Difference]: Finished difference Result 397 states and 573 transitions. [2023-11-26 10:41:46,200 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 397 states and 573 transitions. [2023-11-26 10:41:46,213 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 367 [2023-11-26 10:41:46,227 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 397 states to 374 states and 550 transitions. [2023-11-26 10:41:46,228 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 374 [2023-11-26 10:41:46,231 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 374 [2023-11-26 10:41:46,232 INFO L73 IsDeterministic]: Start isDeterministic. Operand 374 states and 550 transitions. [2023-11-26 10:41:46,236 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:41:46,237 INFO L218 hiAutomatonCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 10:41:46,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states and 550 transitions. [2023-11-26 10:41:46,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 374. [2023-11-26 10:41:46,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 374 states, 370 states have (on average 1.4702702702702704) internal successors, (544), 369 states have internal predecessors, (544), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:41:46,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 550 transitions. [2023-11-26 10:41:46,294 INFO L240 hiAutomatonCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 10:41:46,295 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 10:41:46,299 INFO L428 stractBuchiCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 10:41:46,299 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 10:41:46,300 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 374 states and 550 transitions. [2023-11-26 10:41:46,303 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 367 [2023-11-26 10:41:46,303 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:41:46,304 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:41:46,306 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:41:46,306 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:41:46,306 INFO L748 eck$LassoCheckResult]: Stem: 1150#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 1151#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 859#L989-4 [2023-11-26 10:41:46,309 INFO L750 eck$LassoCheckResult]: Loop: 859#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 849#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 843#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 844#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 860#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 963#L996-263 havoc main_~_ha_hashv~0#1; 964#L996-176 goto; 1175#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 889#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 890#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 1104#L996-73 assume main_#t~switch68#1;call main_#t~mem69#1 := read~int#4(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem69#1 % 256 % 4294967296);havoc main_#t~mem69#1; 1105#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 857#L996-76 assume main_#t~switch68#1;call main_#t~mem70#1 := read~int#4(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem70#1 % 256 % 4294967296);havoc main_#t~mem70#1; 858#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 941#L996-79 assume main_#t~switch68#1;call main_#t~mem71#1 := read~int#4(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem71#1 % 256 % 4294967296);havoc main_#t~mem71#1; 942#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 965#L996-82 assume main_#t~switch68#1;call main_#t~mem72#1 := read~int#4(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem72#1 % 256 % 4294967296);havoc main_#t~mem72#1; 933#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 906#L996-85 assume !main_#t~switch68#1; 907#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 934#L996-88 assume main_#t~switch68#1;call main_#t~mem74#1 := read~int#4(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem74#1 % 256 % 4294967296);havoc main_#t~mem74#1; 951#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 1081#L996-91 assume main_#t~switch68#1;call main_#t~mem75#1 := read~int#4(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem75#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem75#1 % 256 % 4294967296 else main_#t~mem75#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem75#1; 1082#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 1193#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 995#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 996#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 1206#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 1089#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 1087#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 904#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 905#L996-105 havoc main_#t~switch68#1; 1071#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 978#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 928#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 929#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1012#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1080#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1132#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1179#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 920#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1007#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 969#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1068#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1069#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1113#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 908#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 909#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1048#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1159#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 838#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 973#L996-170 goto; 974#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 955#L996-173 goto; 956#L996-175 goto; 1166#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1167#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 1173#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 1187#L996-189 goto; 994#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 1106#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 1031#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 1032#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 1060#L996-198 goto; 1158#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 937#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 938#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 902#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 903#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 1135#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1177#L996-254 goto; 1209#L996-256 havoc main_~_ha_bkt~0#1; 1210#L996-257 goto; 1202#L996-259 goto; 876#L996-261 havoc main_~_ha_hashv~0#1; 877#L996-262 goto; 984#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 859#L989-4 [2023-11-26 10:41:46,310 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:46,310 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 2 times [2023-11-26 10:41:46,310 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:46,311 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700158699] [2023-11-26 10:41:46,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:46,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:46,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:46,347 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:41:46,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:46,413 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:41:46,414 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:46,415 INFO L85 PathProgramCache]: Analyzing trace with hash 997853422, now seen corresponding path program 1 times [2023-11-26 10:41:46,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:46,416 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2049164284] [2023-11-26 10:41:46,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:46,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:46,521 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:41:46,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2106899587] [2023-11-26 10:41:46,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:46,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:41:46,524 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:41:46,551 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:41:46,559 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-26 10:41:46,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:41:46,943 INFO L262 TraceCheckSpWp]: Trace formula consists of 553 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 10:41:46,947 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:41:47,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:41:47,012 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:41:47,012 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:41:47,012 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2049164284] [2023-11-26 10:41:47,012 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:41:47,013 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2106899587] [2023-11-26 10:41:47,013 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2106899587] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:41:47,013 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:41:47,013 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 10:41:47,014 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [918185377] [2023-11-26 10:41:47,014 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:41:47,015 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:41:47,015 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:41:47,015 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 10:41:47,016 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 10:41:47,016 INFO L87 Difference]: Start difference. First operand 374 states and 550 transitions. cyclomatic complexity: 179 Second operand has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:41:47,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:41:47,162 INFO L93 Difference]: Finished difference Result 395 states and 571 transitions. [2023-11-26 10:41:47,162 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 395 states and 571 transitions. [2023-11-26 10:41:47,167 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 388 [2023-11-26 10:41:47,174 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 395 states to 395 states and 571 transitions. [2023-11-26 10:41:47,174 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 395 [2023-11-26 10:41:47,178 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 395 [2023-11-26 10:41:47,178 INFO L73 IsDeterministic]: Start isDeterministic. Operand 395 states and 571 transitions. [2023-11-26 10:41:47,181 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:41:47,183 INFO L218 hiAutomatonCegarLoop]: Abstraction has 395 states and 571 transitions. [2023-11-26 10:41:47,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states and 571 transitions. [2023-11-26 10:41:47,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 394. [2023-11-26 10:41:47,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 390 states have (on average 1.4461538461538461) internal successors, (564), 389 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:41:47,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 570 transitions. [2023-11-26 10:41:47,219 INFO L240 hiAutomatonCegarLoop]: Abstraction has 394 states and 570 transitions. [2023-11-26 10:41:47,220 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 10:41:47,223 INFO L428 stractBuchiCegarLoop]: Abstraction has 394 states and 570 transitions. [2023-11-26 10:41:47,223 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 10:41:47,223 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 394 states and 570 transitions. [2023-11-26 10:41:47,226 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 387 [2023-11-26 10:41:47,226 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:41:47,227 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:41:47,229 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:41:47,229 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:41:47,230 INFO L748 eck$LassoCheckResult]: Stem: 2157#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 2158#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1862#L989-4 [2023-11-26 10:41:47,230 INFO L750 eck$LassoCheckResult]: Loop: 1862#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1852#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 1846#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 1847#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1863#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 1963#L996-263 havoc main_~_ha_hashv~0#1; 1964#L996-176 goto; 2183#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1892#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1893#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 2109#L996-73 assume main_#t~switch68#1;call main_#t~mem69#1 := read~int#4(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem69#1 % 256 % 4294967296);havoc main_#t~mem69#1; 2110#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 1860#L996-76 assume main_#t~switch68#1;call main_#t~mem70#1 := read~int#4(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem70#1 % 256 % 4294967296);havoc main_#t~mem70#1; 1861#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 1943#L996-79 assume main_#t~switch68#1;call main_#t~mem71#1 := read~int#4(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem71#1 % 256 % 4294967296);havoc main_#t~mem71#1; 1944#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 1969#L996-82 assume main_#t~switch68#1;call main_#t~mem72#1 := read~int#4(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem72#1 % 256 % 4294967296);havoc main_#t~mem72#1; 1970#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 1909#L996-85 assume main_#t~switch68#1;call main_#t~mem73#1 := read~int#4(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem73#1 % 256 % 4294967296);havoc main_#t~mem73#1; 1910#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 1938#L996-88 assume main_#t~switch68#1;call main_#t~mem74#1 := read~int#4(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem74#1 % 256 % 4294967296);havoc main_#t~mem74#1; 1955#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 2086#L996-91 assume main_#t~switch68#1;call main_#t~mem75#1 := read~int#4(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem75#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem75#1 % 256 % 4294967296 else main_#t~mem75#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem75#1; 2087#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 2203#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 2204#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 2217#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 2218#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 2096#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 2097#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 1907#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 1908#L996-105 havoc main_#t~switch68#1; 2076#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1986#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1931#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1932#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2020#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2085#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2140#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2189#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1923#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2012#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1974#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2073#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2074#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2121#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1911#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1912#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2053#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2170#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1841#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 1978#L996-170 goto; 1979#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1959#L996-173 goto; 1960#L996-175 goto; 2176#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2177#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 2184#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 2197#L996-189 goto; 1999#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 2114#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 2036#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 2037#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 2065#L996-198 goto; 2168#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1941#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 1942#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 1905#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 1906#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 2143#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2187#L996-254 goto; 2221#L996-256 havoc main_~_ha_bkt~0#1; 2222#L996-257 goto; 2213#L996-259 goto; 1879#L996-261 havoc main_~_ha_hashv~0#1; 1880#L996-262 goto; 1989#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 1862#L989-4 [2023-11-26 10:41:47,231 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:47,231 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 3 times [2023-11-26 10:41:47,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:47,232 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1735923319] [2023-11-26 10:41:47,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:47,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:47,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:47,252 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:41:47,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:47,272 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:41:47,273 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:47,273 INFO L85 PathProgramCache]: Analyzing trace with hash 437153644, now seen corresponding path program 1 times [2023-11-26 10:41:47,273 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:47,274 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294066241] [2023-11-26 10:41:47,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:47,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:47,356 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:41:47,357 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [305589069] [2023-11-26 10:41:47,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:47,358 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:41:47,358 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:41:47,362 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:41:47,380 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-26 10:41:47,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:41:47,759 INFO L262 TraceCheckSpWp]: Trace formula consists of 559 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 10:41:47,764 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:41:47,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:41:47,794 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:41:47,795 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:41:47,795 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294066241] [2023-11-26 10:41:47,795 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:41:47,795 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [305589069] [2023-11-26 10:41:47,795 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [305589069] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:41:47,796 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:41:47,796 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 10:41:47,796 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1331464401] [2023-11-26 10:41:47,796 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:41:47,797 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:41:47,797 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:41:47,798 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 10:41:47,798 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 10:41:47,798 INFO L87 Difference]: Start difference. First operand 394 states and 570 transitions. cyclomatic complexity: 179 Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:41:47,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:41:47,919 INFO L93 Difference]: Finished difference Result 381 states and 550 transitions. [2023-11-26 10:41:47,919 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 381 states and 550 transitions. [2023-11-26 10:41:47,923 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 374 [2023-11-26 10:41:47,928 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 381 states to 381 states and 550 transitions. [2023-11-26 10:41:47,929 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 381 [2023-11-26 10:41:47,931 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 381 [2023-11-26 10:41:47,931 INFO L73 IsDeterministic]: Start isDeterministic. Operand 381 states and 550 transitions. [2023-11-26 10:41:47,938 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:41:47,938 INFO L218 hiAutomatonCegarLoop]: Abstraction has 381 states and 550 transitions. [2023-11-26 10:41:47,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states and 550 transitions. [2023-11-26 10:41:47,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 380. [2023-11-26 10:41:47,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 376 states have (on average 1.4441489361702127) internal successors, (543), 375 states have internal predecessors, (543), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:41:47,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 549 transitions. [2023-11-26 10:41:47,974 INFO L240 hiAutomatonCegarLoop]: Abstraction has 380 states and 549 transitions. [2023-11-26 10:41:47,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 10:41:47,981 INFO L428 stractBuchiCegarLoop]: Abstraction has 380 states and 549 transitions. [2023-11-26 10:41:47,982 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 10:41:47,982 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 380 states and 549 transitions. [2023-11-26 10:41:47,985 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 373 [2023-11-26 10:41:47,985 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:41:47,986 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:41:47,988 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:41:47,989 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:41:47,989 INFO L748 eck$LassoCheckResult]: Stem: 3163#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 3164#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2874#L989-4 [2023-11-26 10:41:47,989 INFO L750 eck$LassoCheckResult]: Loop: 2874#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2864#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 2858#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 2859#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2875#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 2978#L996-263 havoc main_~_ha_hashv~0#1; 2979#L996-176 goto; 3190#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2904#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2905#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 3118#L996-73 assume !main_#t~switch68#1; 3119#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 2872#L996-76 assume !main_#t~switch68#1; 2873#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 2956#L996-79 assume !main_#t~switch68#1; 2957#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 2985#L996-82 assume !main_#t~switch68#1; 2948#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 2921#L996-85 assume !main_#t~switch68#1; 2922#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 2949#L996-88 assume !main_#t~switch68#1; 2966#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 3096#L996-91 assume !main_#t~switch68#1; 3097#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 3208#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 3010#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 3011#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 3222#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 3104#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 3102#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 2919#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 2920#L996-105 havoc main_#t~switch68#1; 3086#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2993#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2943#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2944#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3027#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3095#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3146#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3194#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2934#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3022#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2983#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3083#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3084#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3128#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2923#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2924#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3063#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3174#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2853#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 2988#L996-170 goto; 2989#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2970#L996-173 goto; 2971#L996-175 goto; 3181#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3182#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 3188#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 3202#L996-189 goto; 3009#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 3121#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 3046#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 3047#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 3075#L996-198 goto; 3173#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2952#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 2953#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 2917#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 2918#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 3150#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3192#L996-254 goto; 3225#L996-256 havoc main_~_ha_bkt~0#1; 3226#L996-257 goto; 3218#L996-259 goto; 2891#L996-261 havoc main_~_ha_hashv~0#1; 2892#L996-262 goto; 2999#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 2874#L989-4 [2023-11-26 10:41:47,990 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:47,990 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 4 times [2023-11-26 10:41:47,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:47,991 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38800426] [2023-11-26 10:41:47,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:47,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:48,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:48,017 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:41:48,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:48,056 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:41:48,057 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:48,057 INFO L85 PathProgramCache]: Analyzing trace with hash -2007566726, now seen corresponding path program 1 times [2023-11-26 10:41:48,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:48,058 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [483069594] [2023-11-26 10:41:48,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:48,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:48,121 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:41:48,122 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1653247469] [2023-11-26 10:41:48,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:48,122 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:41:48,122 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:41:48,128 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:41:48,156 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-26 10:41:48,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:41:48,542 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 10:41:48,546 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:41:48,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:41:48,664 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:41:48,665 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:41:48,665 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [483069594] [2023-11-26 10:41:48,665 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:41:48,666 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1653247469] [2023-11-26 10:41:48,666 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1653247469] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:41:48,666 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:41:48,666 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-26 10:41:48,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1738689050] [2023-11-26 10:41:48,667 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:41:48,667 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:41:48,667 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:41:48,668 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2023-11-26 10:41:48,668 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2023-11-26 10:41:48,668 INFO L87 Difference]: Start difference. First operand 380 states and 549 transitions. cyclomatic complexity: 172 Second operand has 8 states, 8 states have (on average 9.625) internal successors, (77), 8 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:41:49,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:41:49,231 INFO L93 Difference]: Finished difference Result 429 states and 611 transitions. [2023-11-26 10:41:49,232 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 429 states and 611 transitions. [2023-11-26 10:41:49,236 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 422 [2023-11-26 10:41:49,241 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 429 states to 429 states and 611 transitions. [2023-11-26 10:41:49,242 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 429 [2023-11-26 10:41:49,242 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 429 [2023-11-26 10:41:49,243 INFO L73 IsDeterministic]: Start isDeterministic. Operand 429 states and 611 transitions. [2023-11-26 10:41:49,243 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:41:49,244 INFO L218 hiAutomatonCegarLoop]: Abstraction has 429 states and 611 transitions. [2023-11-26 10:41:49,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states and 611 transitions. [2023-11-26 10:41:49,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 420. [2023-11-26 10:41:49,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 420 states, 416 states have (on average 1.4206730769230769) internal successors, (591), 415 states have internal predecessors, (591), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:41:49,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 597 transitions. [2023-11-26 10:41:49,259 INFO L240 hiAutomatonCegarLoop]: Abstraction has 420 states and 597 transitions. [2023-11-26 10:41:49,259 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 10:41:49,260 INFO L428 stractBuchiCegarLoop]: Abstraction has 420 states and 597 transitions. [2023-11-26 10:41:49,261 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 10:41:49,261 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 420 states and 597 transitions. [2023-11-26 10:41:49,263 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 413 [2023-11-26 10:41:49,263 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:41:49,264 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:41:49,265 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:41:49,265 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:41:49,268 INFO L748 eck$LassoCheckResult]: Stem: 4219#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 4220#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3922#L989-4 [2023-11-26 10:41:49,270 INFO L750 eck$LassoCheckResult]: Loop: 3922#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3912#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 3906#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 3907#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3923#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 4025#L996-263 havoc main_~_ha_hashv~0#1; 4026#L996-176 goto; 4247#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4293#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4319#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 4318#L996-73 assume !main_#t~switch68#1; 4284#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 4285#L996-76 assume !main_#t~switch68#1; 4258#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 4259#L996-79 assume !main_#t~switch68#1; 4206#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 4207#L996-82 assume !main_#t~switch68#1; 3996#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 3997#L996-85 assume !main_#t~switch68#1; 3998#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 3999#L996-88 assume !main_#t~switch68#1; 4235#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 4236#L996-91 assume !main_#t~switch68#1; 4294#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 4271#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 4272#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 4314#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 4311#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 4308#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 4305#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 4301#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 4138#L996-105 havoc main_#t~switch68#1; 4139#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4180#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4299#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4298#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 4148#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4149#L996-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 4223#L996-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet82#1 := main_~_ha_hashv~0#1; 4202#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4253#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3983#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4074#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4036#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4135#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4136#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4183#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3971#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3972#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4115#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4232#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3901#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 4040#L996-170 goto; 4041#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4021#L996-173 goto; 4022#L996-175 goto; 4240#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4241#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 4248#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 4264#L996-189 goto; 4061#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 4175#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 4098#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 4099#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 4127#L996-198 goto; 4230#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4002#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 4003#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 3965#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 3966#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 4205#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4251#L996-254 goto; 4291#L996-256 havoc main_~_ha_bkt~0#1; 4292#L996-257 goto; 4281#L996-259 goto; 3939#L996-261 havoc main_~_ha_hashv~0#1; 3940#L996-262 goto; 4051#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 3922#L989-4 [2023-11-26 10:41:49,271 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:49,271 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 5 times [2023-11-26 10:41:49,271 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:49,271 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1439392891] [2023-11-26 10:41:49,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:49,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:49,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:49,288 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:41:49,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:49,305 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:41:49,306 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:49,306 INFO L85 PathProgramCache]: Analyzing trace with hash -597899092, now seen corresponding path program 1 times [2023-11-26 10:41:49,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:49,307 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718491455] [2023-11-26 10:41:49,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:49,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:49,357 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:41:49,358 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1184908827] [2023-11-26 10:41:49,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:49,358 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:41:49,358 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:41:49,366 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:41:49,391 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-26 10:41:49,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:41:49,870 INFO L262 TraceCheckSpWp]: Trace formula consists of 518 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 10:41:49,874 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:41:50,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:41:50,019 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:41:50,019 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:41:50,020 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1718491455] [2023-11-26 10:41:50,021 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:41:50,021 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1184908827] [2023-11-26 10:41:50,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1184908827] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:41:50,022 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:41:50,022 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 10:41:50,022 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038131544] [2023-11-26 10:41:50,023 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:41:50,024 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:41:50,024 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:41:50,025 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 10:41:50,029 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 10:41:50,029 INFO L87 Difference]: Start difference. First operand 420 states and 597 transitions. cyclomatic complexity: 180 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:41:50,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:41:50,835 INFO L93 Difference]: Finished difference Result 438 states and 624 transitions. [2023-11-26 10:41:50,835 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 438 states and 624 transitions. [2023-11-26 10:41:50,839 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 431 [2023-11-26 10:41:50,844 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 438 states to 438 states and 624 transitions. [2023-11-26 10:41:50,844 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 438 [2023-11-26 10:41:50,845 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 438 [2023-11-26 10:41:50,845 INFO L73 IsDeterministic]: Start isDeterministic. Operand 438 states and 624 transitions. [2023-11-26 10:41:50,846 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:41:50,846 INFO L218 hiAutomatonCegarLoop]: Abstraction has 438 states and 624 transitions. [2023-11-26 10:41:50,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 438 states and 624 transitions. [2023-11-26 10:41:50,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 438 to 430. [2023-11-26 10:41:50,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 426 states have (on average 1.4248826291079812) internal successors, (607), 425 states have internal predecessors, (607), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:41:50,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 613 transitions. [2023-11-26 10:41:50,858 INFO L240 hiAutomatonCegarLoop]: Abstraction has 430 states and 613 transitions. [2023-11-26 10:41:50,859 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 10:41:50,860 INFO L428 stractBuchiCegarLoop]: Abstraction has 430 states and 613 transitions. [2023-11-26 10:41:50,860 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 10:41:50,860 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 430 states and 613 transitions. [2023-11-26 10:41:50,892 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 423 [2023-11-26 10:41:50,892 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:41:50,892 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:41:50,893 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:41:50,893 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:41:50,895 INFO L748 eck$LassoCheckResult]: Stem: 5320#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 5321#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5027#L989-4 [2023-11-26 10:41:50,895 INFO L750 eck$LassoCheckResult]: Loop: 5027#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5017#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 5011#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 5012#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5028#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 5128#L996-263 havoc main_~_ha_hashv~0#1; 5129#L996-176 goto; 5346#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5057#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5058#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 5273#L996-73 assume !main_#t~switch68#1; 5274#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 5025#L996-76 assume !main_#t~switch68#1; 5026#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 5107#L996-79 assume !main_#t~switch68#1; 5108#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 5134#L996-82 assume !main_#t~switch68#1; 5101#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 5074#L996-85 assume !main_#t~switch68#1; 5075#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 5102#L996-88 assume !main_#t~switch68#1; 5120#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 5252#L996-91 assume !main_#t~switch68#1; 5253#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 5369#L996-94 assume !main_#t~switch68#1; 5370#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 5418#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 5383#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 5261#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 5259#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 5072#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 5073#L996-105 havoc main_#t~switch68#1; 5241#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5150#L996-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 5152#L996-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 5365#L996-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet80#1 := 0; 5096#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5097#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 5185#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5394#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 5305#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5358#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5088#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5177#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5138#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5238#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5239#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5286#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5076#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5077#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5218#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5333#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5006#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 5142#L996-170 goto; 5143#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5124#L996-173 goto; 5125#L996-175 goto; 5339#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5340#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 5347#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 5363#L996-189 goto; 5164#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 5277#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 5201#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 5202#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 5230#L996-198 goto; 5331#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5105#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 5106#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 5070#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 5071#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 5308#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5350#L996-254 goto; 5386#L996-256 havoc main_~_ha_bkt~0#1; 5387#L996-257 goto; 5379#L996-259 goto; 5044#L996-261 havoc main_~_ha_hashv~0#1; 5045#L996-262 goto; 5154#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 5027#L989-4 [2023-11-26 10:41:50,896 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:50,897 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 6 times [2023-11-26 10:41:50,897 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:50,897 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1996560414] [2023-11-26 10:41:50,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:50,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:50,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:50,931 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:41:50,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:50,955 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:41:50,956 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:50,956 INFO L85 PathProgramCache]: Analyzing trace with hash 1209671895, now seen corresponding path program 1 times [2023-11-26 10:41:50,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:50,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941311358] [2023-11-26 10:41:50,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:50,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:51,036 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:41:51,036 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1727040169] [2023-11-26 10:41:51,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:51,037 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:41:51,037 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:41:51,044 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:41:51,071 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-26 10:41:51,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:41:51,406 INFO L262 TraceCheckSpWp]: Trace formula consists of 513 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 10:41:51,409 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:41:51,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:41:51,461 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:41:51,461 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:41:51,461 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1941311358] [2023-11-26 10:41:51,461 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:41:51,461 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1727040169] [2023-11-26 10:41:51,462 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1727040169] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:41:51,462 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:41:51,462 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 10:41:51,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [581282751] [2023-11-26 10:41:51,462 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:41:51,463 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:41:51,463 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:41:51,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 10:41:51,464 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-26 10:41:51,464 INFO L87 Difference]: Start difference. First operand 430 states and 613 transitions. cyclomatic complexity: 186 Second operand has 5 states, 5 states have (on average 15.8) internal successors, (79), 5 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:41:51,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:41:51,617 INFO L93 Difference]: Finished difference Result 499 states and 725 transitions. [2023-11-26 10:41:51,618 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 499 states and 725 transitions. [2023-11-26 10:41:51,622 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 492 [2023-11-26 10:41:51,627 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 499 states to 499 states and 725 transitions. [2023-11-26 10:41:51,627 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 499 [2023-11-26 10:41:51,628 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 499 [2023-11-26 10:41:51,628 INFO L73 IsDeterministic]: Start isDeterministic. Operand 499 states and 725 transitions. [2023-11-26 10:41:51,629 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:41:51,630 INFO L218 hiAutomatonCegarLoop]: Abstraction has 499 states and 725 transitions. [2023-11-26 10:41:51,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states and 725 transitions. [2023-11-26 10:41:51,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 430. [2023-11-26 10:41:51,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 426 states have (on average 1.4178403755868545) internal successors, (604), 425 states have internal predecessors, (604), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:41:51,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 610 transitions. [2023-11-26 10:41:51,646 INFO L240 hiAutomatonCegarLoop]: Abstraction has 430 states and 610 transitions. [2023-11-26 10:41:51,646 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 10:41:51,648 INFO L428 stractBuchiCegarLoop]: Abstraction has 430 states and 610 transitions. [2023-11-26 10:41:51,648 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 10:41:51,648 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 430 states and 610 transitions. [2023-11-26 10:41:51,651 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 423 [2023-11-26 10:41:51,651 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:41:51,651 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:41:51,652 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:41:51,652 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:41:51,652 INFO L748 eck$LassoCheckResult]: Stem: 6489#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 6490#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6198#L989-4 [2023-11-26 10:41:51,654 INFO L750 eck$LassoCheckResult]: Loop: 6198#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6188#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 6182#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 6183#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6199#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 6299#L996-263 havoc main_~_ha_hashv~0#1; 6300#L996-176 goto; 6515#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6228#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6229#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 6443#L996-73 assume !main_#t~switch68#1; 6444#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 6196#L996-76 assume !main_#t~switch68#1; 6197#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 6278#L996-79 assume !main_#t~switch68#1; 6279#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 6305#L996-82 assume !main_#t~switch68#1; 6272#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 6245#L996-85 assume !main_#t~switch68#1; 6246#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 6273#L996-88 assume !main_#t~switch68#1; 6291#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 6422#L996-91 assume !main_#t~switch68#1; 6423#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 6536#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 6537#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 6605#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 6604#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 6603#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 6602#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 6601#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 6244#L996-105 havoc main_#t~switch68#1; 6570#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6321#L996-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 6322#L996-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 6532#L996-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet80#1 := 0; 6540#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6571#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 6551#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6558#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 6474#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6557#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6259#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6347#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6309#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6408#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6409#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6455#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6247#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6248#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6388#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6502#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6177#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 6313#L996-170 goto; 6314#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6295#L996-173 goto; 6296#L996-175 goto; 6508#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6509#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 6516#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 6530#L996-189 goto; 6332#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 6447#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 6371#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 6372#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 6402#L996-198 goto; 6500#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6276#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 6277#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 6241#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 6242#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 6477#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6519#L996-254 goto; 6555#L996-256 havoc main_~_ha_bkt~0#1; 6556#L996-257 goto; 6547#L996-259 goto; 6215#L996-261 havoc main_~_ha_hashv~0#1; 6216#L996-262 goto; 6324#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 6198#L989-4 [2023-11-26 10:41:51,655 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:51,656 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 7 times [2023-11-26 10:41:51,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:51,656 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [40379633] [2023-11-26 10:41:51,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:51,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:51,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:51,679 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:41:51,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:51,704 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:41:51,705 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:51,706 INFO L85 PathProgramCache]: Analyzing trace with hash -177113515, now seen corresponding path program 1 times [2023-11-26 10:41:51,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:51,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [324811934] [2023-11-26 10:41:51,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:51,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:51,770 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:41:51,771 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [783356431] [2023-11-26 10:41:51,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:51,771 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:41:51,771 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:41:51,776 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:41:51,807 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-26 10:41:52,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:41:52,298 INFO L262 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 19 conjunts are in the unsatisfiable core [2023-11-26 10:41:52,301 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:41:52,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:41:52,427 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:41:52,428 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:41:52,429 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [324811934] [2023-11-26 10:41:52,429 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:41:52,435 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [783356431] [2023-11-26 10:41:52,435 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [783356431] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:41:52,437 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:41:52,438 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 10:41:52,438 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2043456564] [2023-11-26 10:41:52,438 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:41:52,439 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:41:52,439 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:41:52,439 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 10:41:52,439 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2023-11-26 10:41:52,440 INFO L87 Difference]: Start difference. First operand 430 states and 610 transitions. cyclomatic complexity: 183 Second operand has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 7 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:41:52,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:41:52,849 INFO L93 Difference]: Finished difference Result 440 states and 622 transitions. [2023-11-26 10:41:52,849 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 440 states and 622 transitions. [2023-11-26 10:41:52,853 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 433 [2023-11-26 10:41:52,858 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 440 states to 440 states and 622 transitions. [2023-11-26 10:41:52,858 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 440 [2023-11-26 10:41:52,859 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 440 [2023-11-26 10:41:52,859 INFO L73 IsDeterministic]: Start isDeterministic. Operand 440 states and 622 transitions. [2023-11-26 10:41:52,860 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:41:52,860 INFO L218 hiAutomatonCegarLoop]: Abstraction has 440 states and 622 transitions. [2023-11-26 10:41:52,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 440 states and 622 transitions. [2023-11-26 10:41:52,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 440 to 433. [2023-11-26 10:41:52,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 433 states, 429 states have (on average 1.4172494172494172) internal successors, (608), 428 states have internal predecessors, (608), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:41:52,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 433 states to 433 states and 614 transitions. [2023-11-26 10:41:52,872 INFO L240 hiAutomatonCegarLoop]: Abstraction has 433 states and 614 transitions. [2023-11-26 10:41:52,873 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 10:41:52,874 INFO L428 stractBuchiCegarLoop]: Abstraction has 433 states and 614 transitions. [2023-11-26 10:41:52,874 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 10:41:52,875 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 433 states and 614 transitions. [2023-11-26 10:41:52,878 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 426 [2023-11-26 10:41:52,878 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:41:52,879 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:41:52,882 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:41:52,882 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:41:52,882 INFO L748 eck$LassoCheckResult]: Stem: 7609#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 7610#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7312#L989-4 [2023-11-26 10:41:52,883 INFO L750 eck$LassoCheckResult]: Loop: 7312#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7302#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 7296#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 7297#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7313#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 7414#L996-263 havoc main_~_ha_hashv~0#1; 7415#L996-176 goto; 7636#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7342#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7343#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 7720#L996-73 assume !main_#t~switch68#1; 7674#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 7310#L996-76 assume !main_#t~switch68#1; 7311#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 7392#L996-79 assume !main_#t~switch68#1; 7393#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 7716#L996-82 assume !main_#t~switch68#1; 7715#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 7714#L996-85 assume !main_#t~switch68#1; 7713#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 7405#L996-88 assume !main_#t~switch68#1; 7406#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 7712#L996-91 assume !main_#t~switch68#1; 7682#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 7660#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 7451#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 7452#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 7677#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 7548#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 7549#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 7701#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 7358#L996-105 havoc main_#t~switch68#1; 7528#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7688#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 7384#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7385#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 7537#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7538#L996-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 7613#L996-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet82#1 := main_~_ha_hashv~0#1; 7649#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7642#L996-128 assume !(0 == main_~_hj_i~0#1 % 4294967296); 7372#L996-130 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~nondet83#1 := main_~_hj_i~0#1; 7373#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7463#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7424#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7525#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7526#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7573#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7361#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7362#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7505#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7624#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7295#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 7430#L996-170 goto; 7431#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7410#L996-173 goto; 7411#L996-175 goto; 7629#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7630#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 7637#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 7653#L996-189 goto; 7450#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 7565#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 7486#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 7487#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 7517#L996-198 goto; 7619#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7390#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 7391#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 7353#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 7354#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 7594#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7639#L996-254 goto; 7678#L996-256 havoc main_~_ha_bkt~0#1; 7679#L996-257 goto; 7671#L996-259 goto; 7329#L996-261 havoc main_~_ha_hashv~0#1; 7330#L996-262 goto; 7439#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 7312#L989-4 [2023-11-26 10:41:52,883 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:52,883 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 8 times [2023-11-26 10:41:52,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:52,884 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795463176] [2023-11-26 10:41:52,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:52,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:52,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:52,902 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:41:52,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:41:52,920 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:41:52,920 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:41:52,920 INFO L85 PathProgramCache]: Analyzing trace with hash -746569233, now seen corresponding path program 1 times [2023-11-26 10:41:52,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:41:52,921 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2048080954] [2023-11-26 10:41:52,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:52,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:41:52,980 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:41:52,980 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [768325690] [2023-11-26 10:41:52,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:41:52,981 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:41:52,981 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:41:52,988 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:41:53,000 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-26 10:41:54,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:41:54,696 INFO L262 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-26 10:41:54,699 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:41:55,190 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:41:55,190 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:41:55,191 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:41:55,191 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2048080954] [2023-11-26 10:41:55,191 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:41:55,191 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [768325690] [2023-11-26 10:41:55,191 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [768325690] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:41:55,191 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:41:55,192 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2023-11-26 10:41:55,192 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1266438674] [2023-11-26 10:41:55,192 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:41:55,192 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:41:55,193 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:41:55,193 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2023-11-26 10:41:55,193 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2023-11-26 10:41:55,194 INFO L87 Difference]: Start difference. First operand 433 states and 614 transitions. cyclomatic complexity: 184 Second operand has 10 states, 10 states have (on average 7.9) internal successors, (79), 10 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:41:59,043 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.01s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 10:42:11,419 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.03s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-26 10:42:17,320 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 3.29s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-26 10:42:17,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:42:17,679 INFO L93 Difference]: Finished difference Result 447 states and 633 transitions. [2023-11-26 10:42:17,680 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 447 states and 633 transitions. [2023-11-26 10:42:17,683 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 440 [2023-11-26 10:42:17,687 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 447 states to 447 states and 633 transitions. [2023-11-26 10:42:17,688 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 447 [2023-11-26 10:42:17,688 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 447 [2023-11-26 10:42:17,689 INFO L73 IsDeterministic]: Start isDeterministic. Operand 447 states and 633 transitions. [2023-11-26 10:42:17,689 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:42:17,690 INFO L218 hiAutomatonCegarLoop]: Abstraction has 447 states and 633 transitions. [2023-11-26 10:42:17,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 447 states and 633 transitions. [2023-11-26 10:42:17,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 447 to 444. [2023-11-26 10:42:17,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 444 states, 440 states have (on average 1.415909090909091) internal successors, (623), 439 states have internal predecessors, (623), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:42:17,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 444 states and 629 transitions. [2023-11-26 10:42:17,702 INFO L240 hiAutomatonCegarLoop]: Abstraction has 444 states and 629 transitions. [2023-11-26 10:42:17,702 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2023-11-26 10:42:17,703 INFO L428 stractBuchiCegarLoop]: Abstraction has 444 states and 629 transitions. [2023-11-26 10:42:17,703 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-26 10:42:17,703 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 444 states and 629 transitions. [2023-11-26 10:42:17,705 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 437 [2023-11-26 10:42:17,705 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:42:17,706 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:42:17,706 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:42:17,707 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:42:17,707 INFO L748 eck$LassoCheckResult]: Stem: 8737#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 8738#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8443#L989-4 [2023-11-26 10:42:17,707 INFO L750 eck$LassoCheckResult]: Loop: 8443#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8433#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 8427#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 8428#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 8444#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 8546#L996-263 havoc main_~_ha_hashv~0#1; 8547#L996-176 goto; 8765#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 8811#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8844#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 8843#L996-73 assume !main_#t~switch68#1; 8802#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 8803#L996-76 assume !main_#t~switch68#1; 8841#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 8525#L996-79 assume !main_#t~switch68#1; 8526#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 8553#L996-82 assume !main_#t~switch68#1; 8517#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 8490#L996-85 assume !main_#t~switch68#1; 8491#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 8518#L996-88 assume !main_#t~switch68#1; 8752#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 8666#L996-91 assume !main_#t~switch68#1; 8667#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 8787#L996-94 assume !main_#t~switch68#1; 8580#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 8581#L996-97 assume !main_#t~switch68#1; 8806#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 8676#L996-100 assume !main_#t~switch68#1; 8674#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 8488#L996-103 assume !main_#t~switch68#1; 8489#L996-105 havoc main_#t~switch68#1; 8656#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8563#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 8512#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8513#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 8597#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8665#L996-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 8736#L996-123 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 8718#L996-125 assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet82#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296; 8719#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8769#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 8504#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8592#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8551#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8650#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 8651#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8699#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8492#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8493#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8630#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8748#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8422#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 8558#L996-170 goto; 8559#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8540#L996-173 goto; 8541#L996-175 goto; 8756#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8757#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 8763#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 8779#L996-189 goto; 8579#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 8693#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 8614#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 8615#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 8645#L996-198 goto; 8746#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8521#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 8522#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 8484#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 8485#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 8721#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 8767#L996-254 goto; 8809#L996-256 havoc main_~_ha_bkt~0#1; 8810#L996-257 goto; 8799#L996-259 goto; 8460#L996-261 havoc main_~_ha_hashv~0#1; 8461#L996-262 goto; 8569#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 8443#L989-4 [2023-11-26 10:42:17,708 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:42:17,708 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 9 times [2023-11-26 10:42:17,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:42:17,709 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662306757] [2023-11-26 10:42:17,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:42:17,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:42:17,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:42:17,723 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:42:17,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:42:17,738 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:42:17,739 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:42:17,739 INFO L85 PathProgramCache]: Analyzing trace with hash 1579831259, now seen corresponding path program 1 times [2023-11-26 10:42:17,739 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:42:17,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1156236417] [2023-11-26 10:42:17,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:42:17,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:42:17,793 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:42:17,793 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [546316278] [2023-11-26 10:42:17,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:42:17,793 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:42:17,794 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:42:17,799 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:42:17,832 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-26 10:42:18,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:42:18,192 INFO L262 TraceCheckSpWp]: Trace formula consists of 493 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 10:42:18,194 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:42:18,231 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:42:18,232 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:42:18,232 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:42:18,232 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1156236417] [2023-11-26 10:42:18,232 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:42:18,233 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [546316278] [2023-11-26 10:42:18,233 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [546316278] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:42:18,233 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:42:18,233 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 10:42:18,237 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [632096482] [2023-11-26 10:42:18,237 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:42:18,238 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:42:18,238 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:42:18,238 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 10:42:18,238 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 10:42:18,239 INFO L87 Difference]: Start difference. First operand 444 states and 629 transitions. cyclomatic complexity: 188 Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:42:18,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:42:18,304 INFO L93 Difference]: Finished difference Result 358 states and 501 transitions. [2023-11-26 10:42:18,304 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 358 states and 501 transitions. [2023-11-26 10:42:18,307 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 351 [2023-11-26 10:42:18,310 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 358 states to 358 states and 501 transitions. [2023-11-26 10:42:18,311 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 358 [2023-11-26 10:42:18,311 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 358 [2023-11-26 10:42:18,311 INFO L73 IsDeterministic]: Start isDeterministic. Operand 358 states and 501 transitions. [2023-11-26 10:42:18,312 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:42:18,312 INFO L218 hiAutomatonCegarLoop]: Abstraction has 358 states and 501 transitions. [2023-11-26 10:42:18,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 358 states and 501 transitions. [2023-11-26 10:42:18,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 358 to 358. [2023-11-26 10:42:18,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 358 states, 354 states have (on average 1.3983050847457628) internal successors, (495), 353 states have internal predecessors, (495), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:42:18,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 358 states to 358 states and 501 transitions. [2023-11-26 10:42:18,322 INFO L240 hiAutomatonCegarLoop]: Abstraction has 358 states and 501 transitions. [2023-11-26 10:42:18,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 10:42:18,324 INFO L428 stractBuchiCegarLoop]: Abstraction has 358 states and 501 transitions. [2023-11-26 10:42:18,324 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-26 10:42:18,324 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 358 states and 501 transitions. [2023-11-26 10:42:18,327 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 351 [2023-11-26 10:42:18,327 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:42:18,327 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:42:18,328 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:42:18,328 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:42:18,328 INFO L748 eck$LassoCheckResult]: Stem: 9746#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 9747#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9482#L989-4 [2023-11-26 10:42:18,328 INFO L750 eck$LassoCheckResult]: Loop: 9482#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9478#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 9472#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 9473#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9483#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 9575#L996-263 havoc main_~_ha_hashv~0#1; 9576#L996-176 goto; 9772#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9509#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9510#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 9708#L996-73 assume !main_#t~switch68#1; 9709#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 9480#L996-76 assume !main_#t~switch68#1; 9481#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 9558#L996-79 assume !main_#t~switch68#1; 9559#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 9582#L996-82 assume !main_#t~switch68#1; 9552#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 9525#L996-85 assume !main_#t~switch68#1; 9526#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 9553#L996-88 assume !main_#t~switch68#1; 9565#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 9687#L996-91 assume !main_#t~switch68#1; 9688#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 9792#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 9609#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 9610#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 9805#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 9695#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 9693#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 9523#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 9524#L996-105 havoc main_#t~switch68#1; 9680#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9595#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 9547#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9548#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 9626#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9686#L996-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 9745#L996-123 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 9733#L996-125 assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet82#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296; 9734#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9782#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 9707#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9812#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 9580#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9674#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9675#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9717#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 9527#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9528#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9654#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9757#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 9467#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 9587#L996-170 goto; 9588#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 9569#L996-173 goto; 9570#L996-175 goto; 9764#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9765#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 9770#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 9785#L996-189 goto; 9608#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 9711#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 9642#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 9643#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 9669#L996-198 goto; 9755#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9554#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 9555#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 9521#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 9522#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 9737#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9774#L996-254 goto; 9808#L996-256 havoc main_~_ha_bkt~0#1; 9809#L996-257 goto; 9800#L996-259 goto; 9496#L996-261 havoc main_~_ha_hashv~0#1; 9497#L996-262 goto; 9598#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 9482#L989-4 [2023-11-26 10:42:18,329 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:42:18,329 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 10 times [2023-11-26 10:42:18,329 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:42:18,330 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865949757] [2023-11-26 10:42:18,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:42:18,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:42:18,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:42:18,343 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:42:18,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:42:18,360 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:42:18,361 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:42:18,361 INFO L85 PathProgramCache]: Analyzing trace with hash 1793250003, now seen corresponding path program 1 times [2023-11-26 10:42:18,362 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:42:18,362 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986298266] [2023-11-26 10:42:18,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:42:18,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:42:18,410 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:42:18,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2123925210] [2023-11-26 10:42:18,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:42:18,411 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:42:18,411 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:42:18,418 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:42:18,434 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2023-11-26 10:42:19,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:42:19,668 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 10:42:19,670 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:42:19,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:42:19,849 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:42:19,849 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:42:19,849 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1986298266] [2023-11-26 10:42:19,849 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:42:19,850 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2123925210] [2023-11-26 10:42:19,850 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2123925210] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:42:19,850 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:42:19,850 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 10:42:19,850 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1610221461] [2023-11-26 10:42:19,851 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:42:19,851 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:42:19,851 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:42:19,851 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 10:42:19,852 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 10:42:19,852 INFO L87 Difference]: Start difference. First operand 358 states and 501 transitions. cyclomatic complexity: 146 Second operand has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:42:20,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:42:20,179 INFO L93 Difference]: Finished difference Result 360 states and 502 transitions. [2023-11-26 10:42:20,179 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 360 states and 502 transitions. [2023-11-26 10:42:20,181 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 353 [2023-11-26 10:42:20,186 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 360 states to 360 states and 502 transitions. [2023-11-26 10:42:20,186 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 360 [2023-11-26 10:42:20,186 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 360 [2023-11-26 10:42:20,187 INFO L73 IsDeterministic]: Start isDeterministic. Operand 360 states and 502 transitions. [2023-11-26 10:42:20,187 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:42:20,187 INFO L218 hiAutomatonCegarLoop]: Abstraction has 360 states and 502 transitions. [2023-11-26 10:42:20,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 360 states and 502 transitions. [2023-11-26 10:42:20,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 360 to 359. [2023-11-26 10:42:20,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 359 states, 355 states have (on average 1.3943661971830985) internal successors, (495), 354 states have internal predecessors, (495), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 10:42:20,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 359 states to 359 states and 501 transitions. [2023-11-26 10:42:20,198 INFO L240 hiAutomatonCegarLoop]: Abstraction has 359 states and 501 transitions. [2023-11-26 10:42:20,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 10:42:20,199 INFO L428 stractBuchiCegarLoop]: Abstraction has 359 states and 501 transitions. [2023-11-26 10:42:20,199 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-26 10:42:20,199 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 359 states and 501 transitions. [2023-11-26 10:42:20,201 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 352 [2023-11-26 10:42:20,201 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:42:20,201 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:42:20,202 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:42:20,202 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:42:20,202 INFO L748 eck$LassoCheckResult]: Stem: 10706#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 10707#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10443#L989-4 [2023-11-26 10:42:20,203 INFO L750 eck$LassoCheckResult]: Loop: 10443#L989-4 call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10439#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 10433#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 10434#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 10444#L991-2 call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#4(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 10536#L996-263 havoc main_~_ha_hashv~0#1; 10537#L996-176 goto; 10733#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 10470#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 10471#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 10668#L996-73 assume !main_#t~switch68#1; 10669#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 10441#L996-76 assume !main_#t~switch68#1; 10442#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 10519#L996-79 assume !main_#t~switch68#1; 10520#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 10543#L996-82 assume !main_#t~switch68#1; 10513#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 10486#L996-85 assume !main_#t~switch68#1; 10487#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 10514#L996-88 assume !main_#t~switch68#1; 10526#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 10648#L996-91 assume !main_#t~switch68#1; 10649#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 10750#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#4(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 10570#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 10571#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#4(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 10763#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 10656#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#4(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 10654#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 10484#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#4(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 10485#L996-105 havoc main_#t~switch68#1; 10640#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10556#L996-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 10557#L996-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 10748#L996-111 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet80#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 10754#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10781#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 10780#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10777#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 10696#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10741#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 10671#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10769#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 10541#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10637#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 10638#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10678#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 10488#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10489#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 10614#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10718#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 10428#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 10548#L996-170 goto; 10549#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 10530#L996-173 goto; 10531#L996-175 goto; 10725#L996-260 call write~int#4(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#4(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 10726#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 10731#L996-190 call write~$Pointer$#4(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#4(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#4(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#4(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#4(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 10742#L996-189 goto; 10569#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#4(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#4(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 10672#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#4(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 10602#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 10603#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 10629#L996-198 goto; 10716#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#4(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#4(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#4(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#4(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 10515#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#4(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 10516#L996-203 call write~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#4(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#4(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 10480#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#4(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#4(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 10481#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 10698#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 10735#L996-254 goto; 10766#L996-256 havoc main_~_ha_bkt~0#1; 10767#L996-257 goto; 10758#L996-259 goto; 10457#L996-261 havoc main_~_ha_hashv~0#1; 10458#L996-262 goto; 10559#L989-3 call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#3(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 10443#L989-4 [2023-11-26 10:42:20,203 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:42:20,203 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 11 times [2023-11-26 10:42:20,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:42:20,206 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79400003] [2023-11-26 10:42:20,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:42:20,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:42:20,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:42:20,225 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:42:20,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:42:20,271 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:42:20,271 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:42:20,271 INFO L85 PathProgramCache]: Analyzing trace with hash 2068465939, now seen corresponding path program 1 times [2023-11-26 10:42:20,272 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:42:20,272 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1314341020] [2023-11-26 10:42:20,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:42:20,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:42:20,337 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:42:20,339 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1878209087] [2023-11-26 10:42:20,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:42:20,340 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:42:20,340 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:42:20,347 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:42:20,352 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_12cd3d9c-448b-466d-9702-115d7f48d108/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2023-11-26 10:42:20,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:42:20,898 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 18 conjunts are in the unsatisfiable core [2023-11-26 10:42:20,900 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:42:26,957 WARN L293 SmtUtils]: Spent 5.80s on a formula simplification. DAG size of input: 18 DAG size of output: 1 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)