./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash dd1724e619d2e8fc18a4dc8aa6c726656a51fc7e14f993d511c4c773ed4748f3 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:56:49,660 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:56:49,737 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:56:49,746 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:56:49,747 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:56:49,788 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:56:49,789 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:56:49,790 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:56:49,791 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:56:49,796 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:56:49,797 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:56:49,798 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:56:49,798 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:56:49,801 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:56:49,801 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:56:49,802 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:56:49,802 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:56:49,802 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:56:49,804 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:56:49,805 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:56:49,805 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:56:49,806 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:56:49,806 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:56:49,807 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:56:49,807 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:56:49,808 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:56:49,808 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:56:49,808 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:56:49,809 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:56:49,809 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:56:49,811 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:56:49,811 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:56:49,811 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:56:49,812 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:56:49,812 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:56:49,812 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:56:49,812 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:56:49,813 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:56:49,813 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> dd1724e619d2e8fc18a4dc8aa6c726656a51fc7e14f993d511c4c773ed4748f3 [2023-11-26 11:56:50,160 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:56:50,199 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:56:50,203 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:56:50,204 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:56:50,205 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:56:50,207 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c [2023-11-26 11:56:53,415 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:56:53,800 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:56:53,803 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c [2023-11-26 11:56:53,822 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/data/68d2cd137/1ac283cf0106430599ceec0320761f14/FLAGb041e36ba [2023-11-26 11:56:53,843 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/data/68d2cd137/1ac283cf0106430599ceec0320761f14 [2023-11-26 11:56:53,848 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:56:53,850 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:56:53,854 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:56:53,854 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:56:53,860 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:56:53,861 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:56:53" (1/1) ... [2023-11-26 11:56:53,862 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6782529d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:53, skipping insertion in model container [2023-11-26 11:56:53,862 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:56:53" (1/1) ... [2023-11-26 11:56:53,930 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:56:54,227 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:56:54,249 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:56:54,334 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:56:54,372 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:56:54,373 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54 WrapperNode [2023-11-26 11:56:54,373 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:56:54,374 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:56:54,374 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:56:54,374 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:56:54,381 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,392 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,438 INFO L138 Inliner]: procedures = 26, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 423 [2023-11-26 11:56:54,439 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:56:54,440 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:56:54,440 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:56:54,440 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:56:54,453 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,453 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,459 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,479 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2023-11-26 11:56:54,480 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,480 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,494 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,503 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,506 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,510 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,517 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:56:54,518 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:56:54,518 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:56:54,518 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:56:54,519 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (1/1) ... [2023-11-26 11:56:54,531 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:56:54,549 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:56:54,570 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:56:54,601 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73a67095-8b4b-46b4-b8ee-0a1cc2680dad/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:56:54,639 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:56:54,641 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:56:54,641 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:56:54,641 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:56:54,792 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:56:54,794 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:56:55,514 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:56:55,532 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:56:55,532 INFO L309 CfgBuilder]: Removed 1 assume(true) statements. [2023-11-26 11:56:55,535 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:56:55 BoogieIcfgContainer [2023-11-26 11:56:55,535 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:56:55,537 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:56:55,537 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:56:55,542 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:56:55,543 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:56:55,544 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:56:53" (1/3) ... [2023-11-26 11:56:55,545 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1bd6e102 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:56:55, skipping insertion in model container [2023-11-26 11:56:55,545 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:56:55,546 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:56:54" (2/3) ... [2023-11-26 11:56:55,546 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1bd6e102 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:56:55, skipping insertion in model container [2023-11-26 11:56:55,546 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:56:55,547 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:56:55" (3/3) ... [2023-11-26 11:56:55,548 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c [2023-11-26 11:56:55,614 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:56:55,614 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:56:55,614 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:56:55,615 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:56:55,615 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:56:55,615 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:56:55,615 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:56:55,615 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:56:55,620 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 123 states, 122 states have (on average 1.7459016393442623) internal successors, (213), 122 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:56:55,649 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 72 [2023-11-26 11:56:55,649 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:56:55,649 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:56:55,659 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:56:55,659 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:56:55,660 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:56:55,661 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 123 states, 122 states have (on average 1.7459016393442623) internal successors, (213), 122 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:56:55,672 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 72 [2023-11-26 11:56:55,672 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:56:55,672 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:56:55,674 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:56:55,675 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:56:55,686 INFO L748 eck$LassoCheckResult]: Stem: 27#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0; 37#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~alive1~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~mode2~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~alive2~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~mode3~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~alive3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~mode4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~alive4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~alive5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~mode6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~alive6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 108#L293true assume !(0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296));init_~tmp~0#1 := 0; 94#L293-1true init_#res#1 := init_~tmp~0#1; 85#init_returnLabel#1true main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 39#L22true assume 0 == assume_abort_if_not_~cond#1;assume false; 91#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 49#L534-2true [2023-11-26 11:56:55,688 INFO L750 eck$LassoCheckResult]: Loop: 49#L534-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 107#L84true assume !(0 != ~mode1~0 % 256); 112#L107true assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 38#L110-2true ~mode1~0 := 1; 23#L84-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 77#L124true assume !(0 != ~mode2~0 % 256); 41#L141true assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 66#L144-2true ~mode2~0 := 1; 54#L124-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 16#L158true assume !(0 != ~mode3~0 % 256); 4#L175true assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 9#L178-2true ~mode3~0 := 1; 14#L158-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 89#L192true assume !(0 != ~mode4~0 % 256); 99#L209true assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 119#L212-2true ~mode4~0 := 1; 87#L192-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 12#L226true assume !(0 != ~mode5~0 % 256); 75#L243true assume 0 != ~alive5~0 % 256;~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256); 15#L246-2true ~mode5~0 := 1; 36#L226-2true havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 59#L260true assume !(0 != ~mode6~0 % 256); 116#L277true assume 0 != ~alive6~0 % 256;~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256); 97#L280-2true ~mode6~0 := 1; 88#L260-2true havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 118#L466true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 69#L466-1true check_#res#1 := check_~tmp~1#1; 18#check_returnLabel#1true main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 101#L566true assume !(0 == assert_~arg#1 % 256); 65#L561true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 49#L534-2true [2023-11-26 11:56:55,695 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:56:55,696 INFO L85 PathProgramCache]: Analyzing trace with hash 2035845626, now seen corresponding path program 1 times [2023-11-26 11:56:55,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:56:55,709 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1244900532] [2023-11-26 11:56:55,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:56:55,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:56:55,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:56:55,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:56:55,950 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:56:55,950 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1244900532] [2023-11-26 11:56:55,951 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1244900532] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:56:55,951 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:56:55,952 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 11:56:55,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [63764663] [2023-11-26 11:56:55,954 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:56:55,960 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:56:55,963 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:56:55,963 INFO L85 PathProgramCache]: Analyzing trace with hash -603430016, now seen corresponding path program 1 times [2023-11-26 11:56:55,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:56:55,964 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312695409] [2023-11-26 11:56:55,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:56:55,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:56:56,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:56:56,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:56:56,604 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:56:56,604 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312695409] [2023-11-26 11:56:56,605 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [312695409] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:56:56,605 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:56:56,605 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:56:56,605 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [832374106] [2023-11-26 11:56:56,606 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:56:56,607 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:56:56,609 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:56:56,655 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 11:56:56,656 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 11:56:56,661 INFO L87 Difference]: Start difference. First operand has 123 states, 122 states have (on average 1.7459016393442623) internal successors, (213), 122 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:56:56,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:56:56,687 INFO L93 Difference]: Finished difference Result 118 states and 205 transitions. [2023-11-26 11:56:56,688 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 118 states and 205 transitions. [2023-11-26 11:56:56,695 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2023-11-26 11:56:56,706 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 118 states to 117 states and 204 transitions. [2023-11-26 11:56:56,708 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117 [2023-11-26 11:56:56,710 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117 [2023-11-26 11:56:56,713 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 204 transitions. [2023-11-26 11:56:56,714 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:56:56,715 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 204 transitions. [2023-11-26 11:56:56,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 204 transitions. [2023-11-26 11:56:56,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2023-11-26 11:56:56,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 117 states have (on average 1.7435897435897436) internal successors, (204), 116 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:56:56,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 204 transitions. [2023-11-26 11:56:56,764 INFO L240 hiAutomatonCegarLoop]: Abstraction has 117 states and 204 transitions. [2023-11-26 11:56:56,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 11:56:56,775 INFO L428 stractBuchiCegarLoop]: Abstraction has 117 states and 204 transitions. [2023-11-26 11:56:56,775 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:56:56,776 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 117 states and 204 transitions. [2023-11-26 11:56:56,784 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2023-11-26 11:56:56,784 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:56:56,785 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:56:56,789 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:56:56,789 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:56:56,789 INFO L748 eck$LassoCheckResult]: Stem: 296#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0; 297#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~alive1~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~mode2~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~alive2~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~mode3~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~alive3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~mode4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~alive4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~alive5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~mode6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~alive6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 309#L293 assume !(0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296));init_~tmp~0#1 := 0; 258#L293-1 init_#res#1 := init_~tmp~0#1; 355#init_returnLabel#1 main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 311#L22 assume !(0 == assume_abort_if_not_~cond#1); 312#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 324#L534-2 [2023-11-26 11:56:56,790 INFO L750 eck$LassoCheckResult]: Loop: 324#L534-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 325#L84 assume !(0 != ~mode1~0 % 256); 366#L107 assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 310#L110-2 ~mode1~0 := 1; 292#L84-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 293#L124 assume !(0 != ~mode2~0 % 256); 315#L141 assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 265#L144-2 ~mode2~0 := 1; 331#L124-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 280#L158 assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 274#L161 assume !(node3_~m3~0#1 != ~nomsg~0); 276#L161-1 ~mode3~0 := 0; 266#L158-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 277#L192 assume !(0 != ~mode4~0 % 256); 358#L209 assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 346#L212-2 ~mode4~0 := 1; 319#L192-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 271#L226 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 272#L229 assume !(node5_~m5~0#1 != ~nomsg~0); 326#L229-1 ~mode5~0 := 0; 279#L226-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 308#L260 assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 337#L263 assume !(node6_~m6~0#1 != ~nomsg~0); 287#L263-1 ~mode6~0 := 0; 356#L260-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 357#L466 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 343#L466-1 check_#res#1 := check_~tmp~1#1; 282#check_returnLabel#1 main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 283#L566 assume !(0 == assert_~arg#1 % 256); 341#L561 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 324#L534-2 [2023-11-26 11:56:56,790 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:56:56,790 INFO L85 PathProgramCache]: Analyzing trace with hash 2035845688, now seen corresponding path program 1 times [2023-11-26 11:56:56,790 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:56:56,791 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095477797] [2023-11-26 11:56:56,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:56:56,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:56:56,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:56:56,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:56:56,907 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:56:56,907 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2095477797] [2023-11-26 11:56:56,907 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2095477797] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:56:56,908 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:56:56,908 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:56:56,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [912694218] [2023-11-26 11:56:56,909 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:56:56,909 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 11:56:56,910 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:56:56,910 INFO L85 PathProgramCache]: Analyzing trace with hash -1587377091, now seen corresponding path program 1 times [2023-11-26 11:56:56,910 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:56:56,911 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1202051221] [2023-11-26 11:56:56,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:56:56,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:56:56,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:56:57,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:56:57,125 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:56:57,125 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1202051221] [2023-11-26 11:56:57,126 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1202051221] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:56:57,126 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:56:57,126 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:56:57,126 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1843585224] [2023-11-26 11:56:57,127 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:56:57,127 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:56:57,128 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:56:57,128 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:56:57,129 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:56:57,129 INFO L87 Difference]: Start difference. First operand 117 states and 204 transitions. cyclomatic complexity: 88 Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:56:57,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:56:57,282 INFO L93 Difference]: Finished difference Result 120 states and 206 transitions. [2023-11-26 11:56:57,282 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 120 states and 206 transitions. [2023-11-26 11:56:57,290 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2023-11-26 11:56:57,293 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 120 states to 117 states and 163 transitions. [2023-11-26 11:56:57,294 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117 [2023-11-26 11:56:57,295 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117 [2023-11-26 11:56:57,295 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 163 transitions. [2023-11-26 11:56:57,297 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:56:57,297 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 163 transitions. [2023-11-26 11:56:57,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 163 transitions. [2023-11-26 11:56:57,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2023-11-26 11:56:57,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 117 states have (on average 1.393162393162393) internal successors, (163), 116 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:56:57,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 163 transitions. [2023-11-26 11:56:57,308 INFO L240 hiAutomatonCegarLoop]: Abstraction has 117 states and 163 transitions. [2023-11-26 11:56:57,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:56:57,315 INFO L428 stractBuchiCegarLoop]: Abstraction has 117 states and 163 transitions. [2023-11-26 11:56:57,315 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:56:57,315 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 117 states and 163 transitions. [2023-11-26 11:56:57,321 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2023-11-26 11:56:57,322 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:56:57,323 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:56:57,325 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:56:57,327 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:56:57,329 INFO L748 eck$LassoCheckResult]: Stem: 547#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0; 548#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~alive1~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~mode2~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~alive2~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~mode3~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~alive3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~mode4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~alive4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~alive5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~mode6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~alive6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 560#L293 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 616#L294 assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) + (if ~alive6~0 % 256 % 4294967296 <= 2147483647 then ~alive6~0 % 256 % 4294967296 else ~alive6~0 % 256 % 4294967296 - 4294967296) >= 1; 513#L295 assume ~id1~0 >= 0; 514#L296 assume 0 == ~st1~0; 551#L297 assume ~send1~0 == ~id1~0; 549#L298 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 550#L299 assume ~id2~0 >= 0; 558#L300 assume 0 == ~st2~0; 591#L301 assume ~send2~0 == ~id2~0; 605#L302 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 606#L303 assume ~id3~0 >= 0; 614#L304 assume 0 == ~st3~0; 578#L305 assume ~send3~0 == ~id3~0; 579#L306 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 602#L307 assume ~id4~0 >= 0; 520#L308 assume 0 == ~st4~0; 521#L309 assume ~send4~0 == ~id4~0; 596#L310 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 567#L311 assume ~id5~0 >= 0; 568#L312 assume 0 == ~st5~0; 541#L313 assume ~send5~0 == ~id5~0; 542#L314 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 564#L315 assume ~id6~0 >= 0; 565#L316 assume 0 == ~st6~0; 511#L317 assume ~send6~0 == ~id6~0; 512#L318 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 619#L319 assume ~id1~0 != ~id2~0; 604#L320 assume ~id1~0 != ~id3~0; 587#L321 assume ~id1~0 != ~id4~0; 588#L322 assume ~id1~0 != ~id5~0; 504#L323 assume ~id1~0 != ~id6~0; 505#L324 assume ~id2~0 != ~id3~0; 532#L325 assume ~id2~0 != ~id4~0; 546#L326 assume ~id2~0 != ~id5~0; 535#L327 assume ~id2~0 != ~id6~0; 536#L328 assume ~id3~0 != ~id4~0; 553#L329 assume ~id3~0 != ~id5~0; 554#L330 assume ~id3~0 != ~id6~0; 517#L331 assume ~id4~0 != ~id5~0; 518#L332 assume ~id4~0 != ~id6~0; 545#L333 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 582#L293-1 init_#res#1 := init_~tmp~0#1; 607#init_returnLabel#1 main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 562#L22 assume !(0 == assume_abort_if_not_~cond#1); 563#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 575#L534-2 [2023-11-26 11:56:57,330 INFO L750 eck$LassoCheckResult]: Loop: 575#L534-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 576#L84 assume !(0 != ~mode1~0 % 256); 618#L107 assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 561#L110-2 ~mode1~0 := 1; 543#L84-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 544#L124 assume !(0 != ~mode2~0 % 256); 566#L141 assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 516#L144-2 ~mode2~0 := 1; 583#L124-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 531#L158 assume !(0 != ~mode3~0 % 256); 508#L175 assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 509#L178-2 ~mode3~0 := 1; 519#L158-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 528#L192 assume !(0 != ~mode4~0 % 256); 610#L209 assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 598#L212-2 ~mode4~0 := 1; 570#L192-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 522#L226 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 523#L229 assume !(node5_~m5~0#1 != ~nomsg~0); 577#L229-1 ~mode5~0 := 0; 530#L226-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 559#L260 assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 589#L263 assume !(node6_~m6~0#1 != ~nomsg~0); 538#L263-1 ~mode6~0 := 0; 608#L260-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 609#L466 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 595#L466-1 check_#res#1 := check_~tmp~1#1; 533#check_returnLabel#1 main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 534#L566 assume !(0 == assert_~arg#1 % 256); 593#L561 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 575#L534-2 [2023-11-26 11:56:57,334 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:56:57,334 INFO L85 PathProgramCache]: Analyzing trace with hash -1766357374, now seen corresponding path program 1 times [2023-11-26 11:56:57,335 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:56:57,335 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452642221] [2023-11-26 11:56:57,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:56:57,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:56:57,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:56:57,385 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:56:57,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:56:57,481 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:56:57,482 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:56:57,482 INFO L85 PathProgramCache]: Analyzing trace with hash 2108272766, now seen corresponding path program 1 times [2023-11-26 11:56:57,482 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:56:57,482 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [988007486] [2023-11-26 11:56:57,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:56:57,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:56:57,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:56:57,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:56:57,711 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:56:57,712 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [988007486] [2023-11-26 11:56:57,713 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [988007486] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:56:57,713 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:56:57,713 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:56:57,713 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1700727000] [2023-11-26 11:56:57,713 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:56:57,728 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:56:57,729 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:56:57,730 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:56:57,730 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:56:57,730 INFO L87 Difference]: Start difference. First operand 117 states and 163 transitions. cyclomatic complexity: 47 Second operand has 5 states, 5 states have (on average 6.0) internal successors, (30), 5 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:56:57,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:56:57,788 INFO L93 Difference]: Finished difference Result 120 states and 165 transitions. [2023-11-26 11:56:57,788 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 120 states and 165 transitions. [2023-11-26 11:56:57,791 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2023-11-26 11:56:57,794 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 120 states to 117 states and 161 transitions. [2023-11-26 11:56:57,794 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117 [2023-11-26 11:56:57,795 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117 [2023-11-26 11:56:57,795 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 161 transitions. [2023-11-26 11:56:57,796 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:56:57,796 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 161 transitions. [2023-11-26 11:56:57,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 161 transitions. [2023-11-26 11:56:57,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2023-11-26 11:56:57,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 117 states have (on average 1.376068376068376) internal successors, (161), 116 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:56:57,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 161 transitions. [2023-11-26 11:56:57,806 INFO L240 hiAutomatonCegarLoop]: Abstraction has 117 states and 161 transitions. [2023-11-26 11:56:57,809 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:56:57,811 INFO L428 stractBuchiCegarLoop]: Abstraction has 117 states and 161 transitions. [2023-11-26 11:56:57,812 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:56:57,813 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 117 states and 161 transitions. [2023-11-26 11:56:57,814 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2023-11-26 11:56:57,814 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:56:57,814 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:56:57,819 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:56:57,819 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:56:57,820 INFO L748 eck$LassoCheckResult]: Stem: 796#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0; 797#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~alive1~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~mode2~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~alive2~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~mode3~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~alive3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~mode4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;~alive4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;~mode5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~alive5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~mode6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~alive6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 809#L293 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 865#L294 assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) + (if ~alive6~0 % 256 % 4294967296 <= 2147483647 then ~alive6~0 % 256 % 4294967296 else ~alive6~0 % 256 % 4294967296 - 4294967296) >= 1; 762#L295 assume ~id1~0 >= 0; 763#L296 assume 0 == ~st1~0; 800#L297 assume ~send1~0 == ~id1~0; 798#L298 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 799#L299 assume ~id2~0 >= 0; 807#L300 assume 0 == ~st2~0; 840#L301 assume ~send2~0 == ~id2~0; 854#L302 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 855#L303 assume ~id3~0 >= 0; 863#L304 assume 0 == ~st3~0; 827#L305 assume ~send3~0 == ~id3~0; 828#L306 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 851#L307 assume ~id4~0 >= 0; 769#L308 assume 0 == ~st4~0; 770#L309 assume ~send4~0 == ~id4~0; 845#L310 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 816#L311 assume ~id5~0 >= 0; 817#L312 assume 0 == ~st5~0; 790#L313 assume ~send5~0 == ~id5~0; 791#L314 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 813#L315 assume ~id6~0 >= 0; 814#L316 assume 0 == ~st6~0; 760#L317 assume ~send6~0 == ~id6~0; 761#L318 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 868#L319 assume ~id1~0 != ~id2~0; 853#L320 assume ~id1~0 != ~id3~0; 836#L321 assume ~id1~0 != ~id4~0; 837#L322 assume ~id1~0 != ~id5~0; 753#L323 assume ~id1~0 != ~id6~0; 754#L324 assume ~id2~0 != ~id3~0; 781#L325 assume ~id2~0 != ~id4~0; 795#L326 assume ~id2~0 != ~id5~0; 784#L327 assume ~id2~0 != ~id6~0; 785#L328 assume ~id3~0 != ~id4~0; 802#L329 assume ~id3~0 != ~id5~0; 803#L330 assume ~id3~0 != ~id6~0; 766#L331 assume ~id4~0 != ~id5~0; 767#L332 assume ~id4~0 != ~id6~0; 794#L333 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 831#L293-1 init_#res#1 := init_~tmp~0#1; 856#init_returnLabel#1 main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 811#L22 assume !(0 == assume_abort_if_not_~cond#1); 812#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 824#L534-2 [2023-11-26 11:56:57,820 INFO L750 eck$LassoCheckResult]: Loop: 824#L534-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 825#L84 assume !(0 != ~mode1~0 % 256); 867#L107 assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 810#L110-2 ~mode1~0 := 1; 792#L84-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 793#L124 assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0; 852#L127 assume !(node2_~m2~0#1 != ~nomsg~0); 822#L127-1 ~mode2~0 := 0; 832#L124-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 780#L158 assume !(0 != ~mode3~0 % 256); 757#L175 assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 758#L178-2 ~mode3~0 := 1; 768#L158-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 777#L192 assume !(0 != ~mode4~0 % 256); 859#L209 assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 847#L212-2 ~mode4~0 := 1; 819#L192-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 771#L226 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 772#L229 assume !(node5_~m5~0#1 != ~nomsg~0); 826#L229-1 ~mode5~0 := 0; 779#L226-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 808#L260 assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 838#L263 assume !(node6_~m6~0#1 != ~nomsg~0); 787#L263-1 ~mode6~0 := 0; 857#L260-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 858#L466 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 869#L467 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 6;check_~tmp~1#1 := 1; 844#L466-1 check_#res#1 := check_~tmp~1#1; 782#check_returnLabel#1 main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 783#L566 assume !(0 == assert_~arg#1 % 256); 842#L561 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 824#L534-2 [2023-11-26 11:56:57,822 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:56:57,824 INFO L85 PathProgramCache]: Analyzing trace with hash -1766357374, now seen corresponding path program 2 times [2023-11-26 11:56:57,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:56:57,824 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180181256] [2023-11-26 11:56:57,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:56:57,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:56:57,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:56:57,855 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:56:57,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:56:57,904 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:56:57,905 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:56:57,905 INFO L85 PathProgramCache]: Analyzing trace with hash -1959206856, now seen corresponding path program 1 times [2023-11-26 11:56:57,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:56:57,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1724262120] [2023-11-26 11:56:57,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:56:57,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:56:57,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:56:57,945 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:56:57,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:56:57,982 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:56:57,983 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:56:57,984 INFO L85 PathProgramCache]: Analyzing trace with hash -1084175977, now seen corresponding path program 1 times [2023-11-26 11:56:57,984 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:56:57,984 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [526415369] [2023-11-26 11:56:57,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:56:57,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:56:58,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:56:58,122 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:56:58,122 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:56:58,122 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [526415369] [2023-11-26 11:56:58,128 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [526415369] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:56:58,128 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:56:58,128 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:56:58,129 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094528751] [2023-11-26 11:56:58,129 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:57:01,077 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 11:57:01,078 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 11:57:01,078 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 11:57:01,078 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 11:57:01,078 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 11:57:01,078 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:57:01,079 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 11:57:01,079 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 11:57:01,079 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2023-11-26 11:57:01,079 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 11:57:01,079 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 11:57:01,117 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,129 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,134 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,137 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,140 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,142 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,146 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,149 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,151 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,157 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,162 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,166 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,168 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,170 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,176 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,182 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,184 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,193 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:01,202 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:02,356 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:02,367 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:02,372 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:02,377 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:02,381 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 11:57:04,365 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 22