./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/reducercommutativity/rangesum10.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/reducercommutativity/rangesum10.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 43671c88cb28f81a53d6c7fbea907e55b0f99c68f8a522c4103c0a12ddf9f652 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 12:00:58,862 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 12:00:58,981 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 12:00:58,988 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 12:00:58,989 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 12:00:59,028 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 12:00:59,029 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 12:00:59,030 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 12:00:59,031 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 12:00:59,036 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 12:00:59,037 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 12:00:59,038 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 12:00:59,038 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 12:00:59,040 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 12:00:59,040 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 12:00:59,041 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 12:00:59,041 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 12:00:59,042 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 12:00:59,042 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 12:00:59,043 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 12:00:59,043 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 12:00:59,044 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 12:00:59,044 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 12:00:59,044 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 12:00:59,045 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 12:00:59,045 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 12:00:59,046 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 12:00:59,046 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 12:00:59,046 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 12:00:59,047 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 12:00:59,048 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 12:00:59,048 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 12:00:59,049 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 12:00:59,049 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 12:00:59,049 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 12:00:59,050 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 12:00:59,050 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 12:00:59,050 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 12:00:59,051 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 43671c88cb28f81a53d6c7fbea907e55b0f99c68f8a522c4103c0a12ddf9f652 [2023-11-26 12:00:59,363 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 12:00:59,390 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 12:00:59,393 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 12:00:59,394 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 12:00:59,395 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 12:00:59,396 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/reducercommutativity/rangesum10.i [2023-11-26 12:01:02,426 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 12:01:02,681 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 12:01:02,681 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/sv-benchmarks/c/reducercommutativity/rangesum10.i [2023-11-26 12:01:02,690 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/data/6ffb45079/15c1a7640c4545a4a49c13807bc1a615/FLAGbd0c1028a [2023-11-26 12:01:02,709 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/data/6ffb45079/15c1a7640c4545a4a49c13807bc1a615 [2023-11-26 12:01:02,715 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 12:01:02,719 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 12:01:02,723 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 12:01:02,723 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 12:01:02,728 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 12:01:02,729 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:01:02" (1/1) ... [2023-11-26 12:01:02,730 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7797a887 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:02, skipping insertion in model container [2023-11-26 12:01:02,730 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:01:02" (1/1) ... [2023-11-26 12:01:02,757 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 12:01:02,964 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:01:02,976 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 12:01:03,021 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:01:03,037 INFO L206 MainTranslator]: Completed translation [2023-11-26 12:01:03,037 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03 WrapperNode [2023-11-26 12:01:03,038 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 12:01:03,039 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 12:01:03,039 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 12:01:03,039 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 12:01:03,047 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,070 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,097 INFO L138 Inliner]: procedures = 17, calls = 24, calls flagged for inlining = 7, calls inlined = 7, statements flattened = 139 [2023-11-26 12:01:03,105 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 12:01:03,105 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 12:01:03,105 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 12:01:03,106 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 12:01:03,116 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,116 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,119 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,135 INFO L175 MemorySlicer]: Split 14 memory accesses to 2 slices as follows [2, 12]. 86 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 5 writes are split as follows [0, 5]. [2023-11-26 12:01:03,136 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,136 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,145 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,149 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,151 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,153 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,156 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 12:01:03,157 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 12:01:03,158 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 12:01:03,158 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 12:01:03,159 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (1/1) ... [2023-11-26 12:01:03,175 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:03,191 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:03,205 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:03,209 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 12:01:03,242 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 12:01:03,242 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 12:01:03,242 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 12:01:03,242 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 12:01:03,242 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 12:01:03,242 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 12:01:03,242 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 12:01:03,243 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 12:01:03,243 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 12:01:03,243 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 12:01:03,243 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 12:01:03,319 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 12:01:03,321 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 12:01:03,641 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 12:01:03,650 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 12:01:03,650 INFO L309 CfgBuilder]: Removed 5 assume(true) statements. [2023-11-26 12:01:03,652 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:01:03 BoogieIcfgContainer [2023-11-26 12:01:03,652 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 12:01:03,653 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 12:01:03,654 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 12:01:03,657 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 12:01:03,658 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:01:03,659 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 12:01:02" (1/3) ... [2023-11-26 12:01:03,660 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@50fe72e7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:01:03, skipping insertion in model container [2023-11-26 12:01:03,660 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:01:03,660 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:01:03" (2/3) ... [2023-11-26 12:01:03,661 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@50fe72e7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:01:03, skipping insertion in model container [2023-11-26 12:01:03,661 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:01:03,661 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:01:03" (3/3) ... [2023-11-26 12:01:03,662 INFO L332 chiAutomizerObserver]: Analyzing ICFG rangesum10.i [2023-11-26 12:01:03,719 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 12:01:03,719 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 12:01:03,720 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 12:01:03,720 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 12:01:03,720 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 12:01:03,720 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 12:01:03,720 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 12:01:03,721 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 12:01:03,725 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 30 states, 29 states have (on average 1.6206896551724137) internal successors, (47), 29 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:03,749 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2023-11-26 12:01:03,749 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:03,749 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:03,755 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:01:03,755 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 12:01:03,755 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 12:01:03,755 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 30 states, 29 states have (on average 1.6206896551724137) internal successors, (47), 29 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:03,758 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2023-11-26 12:01:03,758 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:03,758 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:03,759 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:01:03,759 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 12:01:03,766 INFO L748 eck$LassoCheckResult]: Stem: 26#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 6#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 23#L17-3true [2023-11-26 12:01:03,766 INFO L750 eck$LassoCheckResult]: Loop: 23#L17-3true assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 11#L17-2true init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 23#L17-3true [2023-11-26 12:01:03,772 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:03,775 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-26 12:01:03,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:03,785 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1476720589] [2023-11-26 12:01:03,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:03,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:03,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:03,879 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:03,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:03,907 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:03,910 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:03,910 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-26 12:01:03,911 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:03,911 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [635036088] [2023-11-26 12:01:03,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:03,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:03,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:03,926 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:03,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:03,934 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:03,936 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:03,936 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-26 12:01:03,936 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:03,937 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1012377248] [2023-11-26 12:01:03,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:03,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:03,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:03,988 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:04,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:04,025 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:04,483 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:01:04,483 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:01:04,484 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:01:04,484 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:01:04,484 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 12:01:04,484 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:04,484 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:01:04,484 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:01:04,485 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration1_Lasso [2023-11-26 12:01:04,485 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:01:04,486 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:01:04,506 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,762 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,765 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,767 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,770 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,772 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,774 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,777 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,779 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,782 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,785 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,788 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,797 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,799 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,802 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,804 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,806 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,808 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,811 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:04,813 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:05,132 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:01:05,136 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 12:01:05,138 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:05,138 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:05,143 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:05,157 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:05,170 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:05,170 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:05,170 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:05,171 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:05,171 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-26 12:01:05,179 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:05,179 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:05,208 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:05,218 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:05,218 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:05,219 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:05,220 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:05,228 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:05,241 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:05,241 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:05,241 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:05,241 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:05,244 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-26 12:01:05,247 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:05,248 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:05,261 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:05,265 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:05,265 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:05,266 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:05,267 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:05,275 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-26 12:01:05,280 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:05,292 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:05,292 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:05,293 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:05,293 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:05,293 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:05,294 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:05,294 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:05,303 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:05,308 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:05,309 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:05,309 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:05,310 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:05,318 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:05,331 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:05,331 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:05,331 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:05,331 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:05,335 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:05,335 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:05,335 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-26 12:01:05,347 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:05,359 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:05,359 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:05,360 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:05,361 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:05,372 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:05,384 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:05,384 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:05,385 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:05,385 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:05,388 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:05,388 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:05,400 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:05,400 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-26 12:01:05,407 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:05,407 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:05,408 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:05,411 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:05,439 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-26 12:01:05,443 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:05,454 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:05,454 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:05,455 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:05,455 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:05,460 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:05,460 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:05,474 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:05,482 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:05,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:05,482 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:05,484 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:05,486 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-26 12:01:05,488 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:05,500 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:05,500 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:05,500 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:05,500 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:05,508 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:05,508 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:05,527 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:05,535 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:05,535 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:05,535 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:05,536 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:05,548 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:05,560 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:05,561 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:05,561 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:05,561 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:05,561 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-26 12:01:05,568 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:05,568 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:05,583 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 12:01:05,609 INFO L443 ModelExtractionUtils]: Simplification made 9 calls to the SMT solver. [2023-11-26 12:01:05,609 INFO L444 ModelExtractionUtils]: 0 out of 16 variables were initially zero. Simplification set additionally 13 variables to zero. [2023-11-26 12:01:05,610 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:05,611 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:05,648 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:05,651 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-26 12:01:05,652 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 12:01:05,692 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-26 12:01:05,692 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 12:01:05,692 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_init_nondet_~x#1.base)_1, ULTIMATE.start_init_nondet_~i~0#1) = 19*v_rep(select #length ULTIMATE.start_init_nondet_~x#1.base)_1 - 8*ULTIMATE.start_init_nondet_~i~0#1 Supporting invariants [] [2023-11-26 12:01:05,699 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:05,732 INFO L156 tatePredicateManager]: 8 out of 8 supporting invariants were superfluous and have been removed [2023-11-26 12:01:05,741 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~x!base] could not be translated [2023-11-26 12:01:05,761 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:05,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:05,781 INFO L262 TraceCheckSpWp]: Trace formula consists of 39 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 12:01:05,782 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:05,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:05,797 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 12:01:05,797 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:05,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:05,862 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 12:01:05,865 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 30 states, 29 states have (on average 1.6206896551724137) internal successors, (47), 29 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:05,928 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 30 states, 29 states have (on average 1.6206896551724137) internal successors, (47), 29 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 59 states and 95 transitions. Complement of second has 8 states. [2023-11-26 12:01:05,931 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 12:01:05,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:05,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 47 transitions. [2023-11-26 12:01:05,938 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 47 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-26 12:01:05,938 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:05,939 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 47 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-26 12:01:05,939 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:05,939 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 47 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-26 12:01:05,939 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:05,940 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59 states and 95 transitions. [2023-11-26 12:01:05,944 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:05,948 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59 states to 22 states and 35 transitions. [2023-11-26 12:01:05,949 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2023-11-26 12:01:05,950 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2023-11-26 12:01:05,950 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 35 transitions. [2023-11-26 12:01:05,951 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:01:05,951 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 35 transitions. [2023-11-26 12:01:05,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 35 transitions. [2023-11-26 12:01:05,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2023-11-26 12:01:05,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.5909090909090908) internal successors, (35), 21 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:05,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 35 transitions. [2023-11-26 12:01:05,978 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 35 transitions. [2023-11-26 12:01:05,978 INFO L428 stractBuchiCegarLoop]: Abstraction has 22 states and 35 transitions. [2023-11-26 12:01:05,978 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 12:01:05,978 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 35 transitions. [2023-11-26 12:01:05,979 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:05,980 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:05,980 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:05,980 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-26 12:01:05,980 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:05,981 INFO L748 eck$LassoCheckResult]: Stem: 179#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 175#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 172#L17-3 assume !(init_nondet_~i~0#1 < 10); 167#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 168#L28-3 [2023-11-26 12:01:05,981 INFO L750 eck$LassoCheckResult]: Loop: 168#L28-3 assume !!(rangesum_~i~1#1 < 10); 169#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 170#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 168#L28-3 [2023-11-26 12:01:05,982 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:05,982 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2023-11-26 12:01:05,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:05,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1720536191] [2023-11-26 12:01:05,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:05,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:05,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:06,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:06,049 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:06,049 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1720536191] [2023-11-26 12:01:06,050 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1720536191] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:01:06,050 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:01:06,050 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 12:01:06,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1348977860] [2023-11-26 12:01:06,051 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:01:06,053 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:01:06,054 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:06,054 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 1 times [2023-11-26 12:01:06,054 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:06,054 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593044674] [2023-11-26 12:01:06,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:06,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:06,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:06,062 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:06,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:06,068 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:06,137 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:06,139 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 12:01:06,140 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 12:01:06,141 INFO L87 Difference]: Start difference. First operand 22 states and 35 transitions. cyclomatic complexity: 18 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:06,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:06,156 INFO L93 Difference]: Finished difference Result 23 states and 32 transitions. [2023-11-26 12:01:06,157 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 32 transitions. [2023-11-26 12:01:06,158 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:06,159 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 32 transitions. [2023-11-26 12:01:06,159 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2023-11-26 12:01:06,159 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2023-11-26 12:01:06,160 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 32 transitions. [2023-11-26 12:01:06,160 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:01:06,160 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 32 transitions. [2023-11-26 12:01:06,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 32 transitions. [2023-11-26 12:01:06,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2023-11-26 12:01:06,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4090909090909092) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:06,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 31 transitions. [2023-11-26 12:01:06,163 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 31 transitions. [2023-11-26 12:01:06,164 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 12:01:06,164 INFO L428 stractBuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2023-11-26 12:01:06,165 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 12:01:06,165 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 31 transitions. [2023-11-26 12:01:06,166 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:06,166 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:06,166 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:06,167 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2023-11-26 12:01:06,167 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:06,167 INFO L748 eck$LassoCheckResult]: Stem: 230#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 227#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 223#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 224#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 225#L17-3 assume !(init_nondet_~i~0#1 < 10); 218#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 219#L28-3 [2023-11-26 12:01:06,167 INFO L750 eck$LassoCheckResult]: Loop: 219#L28-3 assume !!(rangesum_~i~1#1 < 10); 220#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 221#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 219#L28-3 [2023-11-26 12:01:06,168 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:06,168 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2023-11-26 12:01:06,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:06,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801811437] [2023-11-26 12:01:06,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:06,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:06,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:06,256 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:06,257 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:06,257 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1801811437] [2023-11-26 12:01:06,257 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1801811437] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:01:06,258 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1441115176] [2023-11-26 12:01:06,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:06,259 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:01:06,259 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:06,264 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:01:06,283 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2023-11-26 12:01:06,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:06,325 INFO L262 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 12:01:06,326 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:06,345 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:06,345 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 12:01:06,371 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:06,372 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1441115176] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 12:01:06,373 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 12:01:06,373 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-26 12:01:06,377 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [661225454] [2023-11-26 12:01:06,378 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 12:01:06,378 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:01:06,378 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:06,379 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 2 times [2023-11-26 12:01:06,379 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:06,380 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122238676] [2023-11-26 12:01:06,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:06,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:06,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:06,391 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:06,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:06,408 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:06,482 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:06,483 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 12:01:06,484 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-26 12:01:06,484 INFO L87 Difference]: Start difference. First operand 22 states and 31 transitions. cyclomatic complexity: 14 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:06,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:06,522 INFO L93 Difference]: Finished difference Result 28 states and 37 transitions. [2023-11-26 12:01:06,522 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 37 transitions. [2023-11-26 12:01:06,525 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:06,529 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 37 transitions. [2023-11-26 12:01:06,529 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2023-11-26 12:01:06,530 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2023-11-26 12:01:06,531 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 37 transitions. [2023-11-26 12:01:06,531 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:01:06,531 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 37 transitions. [2023-11-26 12:01:06,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 37 transitions. [2023-11-26 12:01:06,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2023-11-26 12:01:06,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.3214285714285714) internal successors, (37), 27 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:06,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 37 transitions. [2023-11-26 12:01:06,537 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 37 transitions. [2023-11-26 12:01:06,538 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 12:01:06,540 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 37 transitions. [2023-11-26 12:01:06,540 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 12:01:06,540 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 37 transitions. [2023-11-26 12:01:06,545 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:06,545 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:06,546 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:06,547 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2023-11-26 12:01:06,547 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:06,548 INFO L748 eck$LassoCheckResult]: Stem: 321#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 313#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 314#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 315#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 316#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 317#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 328#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 327#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 326#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 325#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 324#L17-3 assume !(init_nondet_~i~0#1 < 10); 308#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 309#L28-3 [2023-11-26 12:01:06,548 INFO L750 eck$LassoCheckResult]: Loop: 309#L28-3 assume !!(rangesum_~i~1#1 < 10); 310#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 311#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 309#L28-3 [2023-11-26 12:01:06,548 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:06,548 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2023-11-26 12:01:06,549 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:06,549 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114204024] [2023-11-26 12:01:06,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:06,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:06,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:06,719 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2023-11-26 12:01:06,806 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:06,810 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:06,810 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114204024] [2023-11-26 12:01:06,810 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [114204024] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:01:06,811 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [42428948] [2023-11-26 12:01:06,811 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 12:01:06,812 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:01:06,812 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:06,813 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:01:06,835 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2023-11-26 12:01:06,892 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 12:01:06,892 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 12:01:06,893 INFO L262 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 12:01:06,895 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:06,923 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:06,924 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 12:01:07,002 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:07,002 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [42428948] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 12:01:07,003 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 12:01:07,003 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-26 12:01:07,003 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [695612412] [2023-11-26 12:01:07,003 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 12:01:07,004 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:01:07,004 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:07,005 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 3 times [2023-11-26 12:01:07,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:07,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1260186206] [2023-11-26 12:01:07,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:07,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:07,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:07,011 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:07,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:07,017 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:07,093 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:07,094 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-26 12:01:07,094 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2023-11-26 12:01:07,095 INFO L87 Difference]: Start difference. First operand 28 states and 37 transitions. cyclomatic complexity: 14 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:07,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:07,159 INFO L93 Difference]: Finished difference Result 40 states and 49 transitions. [2023-11-26 12:01:07,160 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 49 transitions. [2023-11-26 12:01:07,161 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:07,162 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 40 states and 49 transitions. [2023-11-26 12:01:07,162 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2023-11-26 12:01:07,162 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2023-11-26 12:01:07,162 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 49 transitions. [2023-11-26 12:01:07,163 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:01:07,163 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 49 transitions. [2023-11-26 12:01:07,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 49 transitions. [2023-11-26 12:01:07,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2023-11-26 12:01:07,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.225) internal successors, (49), 39 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:07,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 49 transitions. [2023-11-26 12:01:07,167 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 49 transitions. [2023-11-26 12:01:07,167 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-26 12:01:07,168 INFO L428 stractBuchiCegarLoop]: Abstraction has 40 states and 49 transitions. [2023-11-26 12:01:07,168 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 12:01:07,169 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 49 transitions. [2023-11-26 12:01:07,169 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:07,169 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:07,170 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:07,170 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2023-11-26 12:01:07,171 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:07,171 INFO L748 eck$LassoCheckResult]: Stem: 472#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 463#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 464#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 465#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 466#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 467#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 470#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 490#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 489#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 488#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 487#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 486#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 485#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 484#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 483#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 482#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 481#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 480#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 479#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 478#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 477#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 476#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 475#L17-3 assume !(init_nondet_~i~0#1 < 10); 458#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 459#L28-3 [2023-11-26 12:01:07,172 INFO L750 eck$LassoCheckResult]: Loop: 459#L28-3 assume !!(rangesum_~i~1#1 < 10); 460#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 461#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 459#L28-3 [2023-11-26 12:01:07,172 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:07,172 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2023-11-26 12:01:07,172 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:07,173 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1323944588] [2023-11-26 12:01:07,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:07,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:07,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:07,204 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:07,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:07,254 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:07,260 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:07,260 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 4 times [2023-11-26 12:01:07,260 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:07,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [823103197] [2023-11-26 12:01:07,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:07,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:07,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:07,266 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:07,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:07,270 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:07,271 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:07,271 INFO L85 PathProgramCache]: Analyzing trace with hash 1328180093, now seen corresponding path program 1 times [2023-11-26 12:01:07,271 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:07,271 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589991456] [2023-11-26 12:01:07,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:07,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:07,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:07,346 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2023-11-26 12:01:07,347 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:07,347 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589991456] [2023-11-26 12:01:07,347 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589991456] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:01:07,347 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:01:07,348 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 12:01:07,348 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2115604844] [2023-11-26 12:01:07,348 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:01:07,421 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:07,421 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 12:01:07,422 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 12:01:07,422 INFO L87 Difference]: Start difference. First operand 40 states and 49 transitions. cyclomatic complexity: 14 Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:07,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:07,477 INFO L93 Difference]: Finished difference Result 49 states and 58 transitions. [2023-11-26 12:01:07,477 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 58 transitions. [2023-11-26 12:01:07,480 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:07,482 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 49 states and 58 transitions. [2023-11-26 12:01:07,482 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2023-11-26 12:01:07,483 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2023-11-26 12:01:07,483 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 58 transitions. [2023-11-26 12:01:07,484 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:01:07,484 INFO L218 hiAutomatonCegarLoop]: Abstraction has 49 states and 58 transitions. [2023-11-26 12:01:07,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 58 transitions. [2023-11-26 12:01:07,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 46. [2023-11-26 12:01:07,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.1956521739130435) internal successors, (55), 45 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:07,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 55 transitions. [2023-11-26 12:01:07,494 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 55 transitions. [2023-11-26 12:01:07,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 12:01:07,497 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 55 transitions. [2023-11-26 12:01:07,498 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 12:01:07,498 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 55 transitions. [2023-11-26 12:01:07,499 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:07,500 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:07,500 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:07,501 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:07,501 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:07,501 INFO L748 eck$LassoCheckResult]: Stem: 570#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 566#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 560#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 561#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 562#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 563#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 592#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 591#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 590#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 589#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 588#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 587#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 586#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 585#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 584#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 583#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 582#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 581#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 580#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 579#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 576#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 575#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 574#L17-3 assume !(init_nondet_~i~0#1 < 10); 554#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 555#L28-3 assume !!(rangesum_~i~1#1 < 10); 556#L29 assume !(rangesum_~i~1#1 > 5); 557#L28-2 [2023-11-26 12:01:07,502 INFO L750 eck$LassoCheckResult]: Loop: 557#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 558#L28-3 assume !!(rangesum_~i~1#1 < 10); 578#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 557#L28-2 [2023-11-26 12:01:07,506 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:07,506 INFO L85 PathProgramCache]: Analyzing trace with hash -95702812, now seen corresponding path program 1 times [2023-11-26 12:01:07,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:07,507 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [512066518] [2023-11-26 12:01:07,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:07,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:07,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:07,550 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:07,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:07,578 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:07,579 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:07,579 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 5 times [2023-11-26 12:01:07,579 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:07,580 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [430988604] [2023-11-26 12:01:07,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:07,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:07,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:07,587 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:07,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:07,591 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:07,592 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:07,592 INFO L85 PathProgramCache]: Analyzing trace with hash 775842814, now seen corresponding path program 1 times [2023-11-26 12:01:07,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:07,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704915018] [2023-11-26 12:01:07,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:07,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:07,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:07,670 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2023-11-26 12:01:07,670 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:07,670 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704915018] [2023-11-26 12:01:07,671 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1704915018] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:01:07,671 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [930593158] [2023-11-26 12:01:07,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:07,671 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:01:07,671 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:07,675 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:01:07,699 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2023-11-26 12:01:07,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:07,807 INFO L262 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 12:01:07,809 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:07,837 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2023-11-26 12:01:07,837 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 12:01:07,868 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2023-11-26 12:01:07,869 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [930593158] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 12:01:07,869 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 12:01:07,869 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2023-11-26 12:01:07,872 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [590042013] [2023-11-26 12:01:07,872 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 12:01:07,945 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:07,946 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 12:01:07,946 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-26 12:01:07,947 INFO L87 Difference]: Start difference. First operand 46 states and 55 transitions. cyclomatic complexity: 14 Second operand has 7 states, 6 states have (on average 3.5) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:08,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:08,071 INFO L93 Difference]: Finished difference Result 76 states and 85 transitions. [2023-11-26 12:01:08,071 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 76 states and 85 transitions. [2023-11-26 12:01:08,072 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 14 [2023-11-26 12:01:08,073 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 76 states to 76 states and 85 transitions. [2023-11-26 12:01:08,073 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2023-11-26 12:01:08,073 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2023-11-26 12:01:08,073 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 85 transitions. [2023-11-26 12:01:08,074 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:01:08,074 INFO L218 hiAutomatonCegarLoop]: Abstraction has 76 states and 85 transitions. [2023-11-26 12:01:08,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 85 transitions. [2023-11-26 12:01:08,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 73. [2023-11-26 12:01:08,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 73 states have (on average 1.1232876712328768) internal successors, (82), 72 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:08,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 82 transitions. [2023-11-26 12:01:08,085 INFO L240 hiAutomatonCegarLoop]: Abstraction has 73 states and 82 transitions. [2023-11-26 12:01:08,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 12:01:08,088 INFO L428 stractBuchiCegarLoop]: Abstraction has 73 states and 82 transitions. [2023-11-26 12:01:08,088 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 12:01:08,088 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 82 transitions. [2023-11-26 12:01:08,090 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:08,090 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:08,091 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:08,092 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 4, 4, 3, 1, 1, 1, 1] [2023-11-26 12:01:08,092 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:08,092 INFO L748 eck$LassoCheckResult]: Stem: 872#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 862#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 863#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 864#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 865#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 866#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 898#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 897#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 896#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 895#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 894#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 893#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 892#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 891#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 890#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 889#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 888#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 887#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 886#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 885#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 884#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 877#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 876#L17-3 assume !(init_nondet_~i~0#1 < 10); 856#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 857#L28-3 assume !!(rangesum_~i~1#1 < 10); 858#L29 assume !(rangesum_~i~1#1 > 5); 859#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 860#L28-3 assume !!(rangesum_~i~1#1 < 10); 906#L29 assume !(rangesum_~i~1#1 > 5); 904#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 903#L28-3 assume !!(rangesum_~i~1#1 < 10); 902#L29 assume !(rangesum_~i~1#1 > 5); 901#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 900#L28-3 assume !!(rangesum_~i~1#1 < 10); 899#L29 assume !(rangesum_~i~1#1 > 5); 883#L28-2 [2023-11-26 12:01:08,092 INFO L750 eck$LassoCheckResult]: Loop: 883#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 880#L28-3 assume !!(rangesum_~i~1#1 < 10); 881#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 883#L28-2 [2023-11-26 12:01:08,093 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:08,093 INFO L85 PathProgramCache]: Analyzing trace with hash 1594065280, now seen corresponding path program 1 times [2023-11-26 12:01:08,093 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:08,093 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1540361274] [2023-11-26 12:01:08,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:08,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:08,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,117 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:08,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,136 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:08,136 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:08,137 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 6 times [2023-11-26 12:01:08,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:08,137 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1832079349] [2023-11-26 12:01:08,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:08,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:08,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,141 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:08,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,145 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:08,146 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:08,146 INFO L85 PathProgramCache]: Analyzing trace with hash -654604830, now seen corresponding path program 2 times [2023-11-26 12:01:08,146 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:08,146 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775202570] [2023-11-26 12:01:08,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:08,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:08,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:08,262 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2023-11-26 12:01:08,262 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:08,263 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775202570] [2023-11-26 12:01:08,263 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [775202570] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:01:08,263 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1803152238] [2023-11-26 12:01:08,263 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 12:01:08,263 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:01:08,264 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:08,267 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:01:08,291 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2023-11-26 12:01:08,380 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 12:01:08,380 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 12:01:08,382 INFO L262 TraceCheckSpWp]: Trace formula consists of 190 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 12:01:08,384 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:08,422 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2023-11-26 12:01:08,422 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 12:01:08,480 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2023-11-26 12:01:08,481 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1803152238] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 12:01:08,481 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-26 12:01:08,481 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 8 [2023-11-26 12:01:08,481 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1923626519] [2023-11-26 12:01:08,482 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-26 12:01:08,553 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:08,554 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-26 12:01:08,554 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2023-11-26 12:01:08,554 INFO L87 Difference]: Start difference. First operand 73 states and 82 transitions. cyclomatic complexity: 14 Second operand has 9 states, 8 states have (on average 3.625) internal successors, (29), 9 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:08,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:08,690 INFO L93 Difference]: Finished difference Result 94 states and 103 transitions. [2023-11-26 12:01:08,690 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 94 states and 103 transitions. [2023-11-26 12:01:08,691 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 14 [2023-11-26 12:01:08,692 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 94 states to 94 states and 103 transitions. [2023-11-26 12:01:08,693 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 74 [2023-11-26 12:01:08,693 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 74 [2023-11-26 12:01:08,693 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 103 transitions. [2023-11-26 12:01:08,694 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:01:08,694 INFO L218 hiAutomatonCegarLoop]: Abstraction has 94 states and 103 transitions. [2023-11-26 12:01:08,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 103 transitions. [2023-11-26 12:01:08,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 91. [2023-11-26 12:01:08,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 91 states have (on average 1.098901098901099) internal successors, (100), 90 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:08,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 100 transitions. [2023-11-26 12:01:08,700 INFO L240 hiAutomatonCegarLoop]: Abstraction has 91 states and 100 transitions. [2023-11-26 12:01:08,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 12:01:08,701 INFO L428 stractBuchiCegarLoop]: Abstraction has 91 states and 100 transitions. [2023-11-26 12:01:08,701 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 12:01:08,701 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 100 transitions. [2023-11-26 12:01:08,702 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:08,702 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:08,702 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:08,704 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 6, 6, 5, 1, 1, 1, 1] [2023-11-26 12:01:08,704 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:08,704 INFO L748 eck$LassoCheckResult]: Stem: 1276#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 1266#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 1267#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1268#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1269#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1270#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1303#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1302#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1301#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1300#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1299#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1298#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1297#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1296#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1295#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1294#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1293#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1292#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1291#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1290#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1289#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1282#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1281#L17-3 assume !(init_nondet_~i~0#1 < 10); 1259#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 1260#L28-3 assume !!(rangesum_~i~1#1 < 10); 1315#L29 assume !(rangesum_~i~1#1 > 5); 1263#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1264#L28-3 assume !!(rangesum_~i~1#1 < 10); 1261#L29 assume !(rangesum_~i~1#1 > 5); 1262#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1314#L28-3 assume !!(rangesum_~i~1#1 < 10); 1313#L29 assume !(rangesum_~i~1#1 > 5); 1312#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1311#L28-3 assume !!(rangesum_~i~1#1 < 10); 1310#L29 assume !(rangesum_~i~1#1 > 5); 1309#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1308#L28-3 assume !!(rangesum_~i~1#1 < 10); 1307#L29 assume !(rangesum_~i~1#1 > 5); 1306#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1305#L28-3 assume !!(rangesum_~i~1#1 < 10); 1304#L29 assume !(rangesum_~i~1#1 > 5); 1288#L28-2 [2023-11-26 12:01:08,705 INFO L750 eck$LassoCheckResult]: Loop: 1288#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1285#L28-3 assume !!(rangesum_~i~1#1 < 10); 1286#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 1288#L28-2 [2023-11-26 12:01:08,705 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:08,705 INFO L85 PathProgramCache]: Analyzing trace with hash 2114090752, now seen corresponding path program 2 times [2023-11-26 12:01:08,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:08,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [968107078] [2023-11-26 12:01:08,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:08,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:08,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,728 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:08,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,748 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:08,749 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:08,749 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 7 times [2023-11-26 12:01:08,750 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:08,750 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1575875099] [2023-11-26 12:01:08,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:08,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:08,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,779 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:08,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,783 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:08,783 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:08,783 INFO L85 PathProgramCache]: Analyzing trace with hash -522805150, now seen corresponding path program 3 times [2023-11-26 12:01:08,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:08,784 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [161985851] [2023-11-26 12:01:08,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:08,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:08,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,822 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:08,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:08,866 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:16,292 WARN L293 SmtUtils]: Spent 7.35s on a formula simplification. DAG size of input: 250 DAG size of output: 193 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-26 12:01:17,018 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:01:17,018 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:01:17,019 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:01:17,019 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:01:17,019 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 12:01:17,019 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:17,019 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:01:17,019 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:01:17,020 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration8_Lasso [2023-11-26 12:01:17,020 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:01:17,020 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:01:17,039 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,043 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,046 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,048 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,051 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,053 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,056 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,059 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,061 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,632 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,634 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,637 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,640 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,642 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,644 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,647 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,649 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,665 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,667 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,672 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,675 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,677 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,680 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,683 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,685 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,688 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:17,690 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:18,048 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:01:18,048 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 12:01:18,048 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,048 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,059 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,065 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,078 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2023-11-26 12:01:18,079 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,079 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:18,079 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,079 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,079 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,080 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:18,080 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:18,089 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,099 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,099 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,101 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,107 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2023-11-26 12:01:18,108 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,123 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,123 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:18,123 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,123 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,123 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,124 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:18,124 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:18,138 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,143 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,143 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,143 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,144 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,148 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2023-11-26 12:01:18,154 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,167 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,167 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:18,167 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,167 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,167 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,168 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:18,168 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:18,177 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,186 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,186 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,186 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,187 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,190 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2023-11-26 12:01:18,192 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,205 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,205 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:18,205 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,205 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,205 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,206 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:18,206 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:18,215 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,224 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,225 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,226 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,237 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,271 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2023-11-26 12:01:18,273 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,273 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:18,273 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,273 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,273 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,274 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:18,274 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:18,283 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,287 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2023-11-26 12:01:18,287 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,287 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,289 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,292 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2023-11-26 12:01:18,294 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,305 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,305 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:18,305 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,305 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,306 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,306 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:18,306 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:18,338 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,348 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,348 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,349 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,350 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,360 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,374 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2023-11-26 12:01:18,374 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,374 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:18,375 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,375 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,375 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,375 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:18,376 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:18,395 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,404 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,404 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,405 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,406 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,410 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,423 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2023-11-26 12:01:18,424 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,424 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:18,424 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,424 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,424 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,425 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:18,425 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:18,434 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,443 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,443 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,444 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,445 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,453 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,467 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2023-11-26 12:01:18,468 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,468 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,468 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,468 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,470 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:18,471 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:18,482 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,491 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,492 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,492 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,493 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,497 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2023-11-26 12:01:18,498 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,510 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,511 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,511 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,511 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,513 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:18,513 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:18,535 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,539 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,540 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,540 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,542 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,548 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,559 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2023-11-26 12:01:18,560 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,561 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,561 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,561 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,564 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:18,564 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:18,579 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,582 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,582 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,582 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,584 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,587 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,600 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2023-11-26 12:01:18,600 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,601 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,601 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,601 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,604 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:18,604 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:18,622 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,628 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,629 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,629 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,630 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,635 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,643 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2023-11-26 12:01:18,648 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,648 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:18,648 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,648 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,649 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,649 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:18,649 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:18,672 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,675 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,676 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,676 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,677 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,683 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,696 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2023-11-26 12:01:18,697 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,697 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:18,697 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,697 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,697 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,698 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:18,698 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:18,722 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-26 12:01:18,726 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:18,726 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,726 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,728 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,735 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:18,748 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2023-11-26 12:01:18,749 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:18,749 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:18,749 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:18,749 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:18,756 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-26 12:01:18,756 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-26 12:01:18,787 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 12:01:18,821 INFO L443 ModelExtractionUtils]: Simplification made 11 calls to the SMT solver. [2023-11-26 12:01:18,821 INFO L444 ModelExtractionUtils]: 2 out of 22 variables were initially zero. Simplification set additionally 17 variables to zero. [2023-11-26 12:01:18,821 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:18,821 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:18,834 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:18,836 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 12:01:18,836 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2023-11-26 12:01:18,847 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-26 12:01:18,848 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 12:01:18,848 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_rangesum_~x#1.base)_1, ULTIMATE.start_rangesum_~i~1#1) = 17*v_rep(select #length ULTIMATE.start_rangesum_~x#1.base)_1 - 8*ULTIMATE.start_rangesum_~i~1#1 Supporting invariants [] [2023-11-26 12:01:18,851 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Ended with exit code 0 [2023-11-26 12:01:18,882 INFO L156 tatePredicateManager]: 8 out of 8 supporting invariants were superfluous and have been removed [2023-11-26 12:01:18,883 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~x!base] could not be translated [2023-11-26 12:01:18,898 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:18,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:18,950 INFO L262 TraceCheckSpWp]: Trace formula consists of 186 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 12:01:18,951 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:19,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:19,009 INFO L262 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 12:01:19,009 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:19,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:19,039 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2023-11-26 12:01:19,040 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 91 states and 100 transitions. cyclomatic complexity: 14 Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:19,089 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 91 states and 100 transitions. cyclomatic complexity: 14. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 112 states and 125 transitions. Complement of second has 7 states. [2023-11-26 12:01:19,090 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 12:01:19,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:19,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 16 transitions. [2023-11-26 12:01:19,091 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 41 letters. Loop has 3 letters. [2023-11-26 12:01:19,092 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:19,092 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 44 letters. Loop has 3 letters. [2023-11-26 12:01:19,093 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:19,093 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 41 letters. Loop has 6 letters. [2023-11-26 12:01:19,094 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:19,094 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 112 states and 125 transitions. [2023-11-26 12:01:19,095 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:19,097 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 112 states to 110 states and 122 transitions. [2023-11-26 12:01:19,097 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 70 [2023-11-26 12:01:19,097 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 72 [2023-11-26 12:01:19,097 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 122 transitions. [2023-11-26 12:01:19,097 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:01:19,097 INFO L218 hiAutomatonCegarLoop]: Abstraction has 110 states and 122 transitions. [2023-11-26 12:01:19,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 122 transitions. [2023-11-26 12:01:19,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 108. [2023-11-26 12:01:19,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 108 states have (on average 1.1018518518518519) internal successors, (119), 107 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:19,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 119 transitions. [2023-11-26 12:01:19,104 INFO L240 hiAutomatonCegarLoop]: Abstraction has 108 states and 119 transitions. [2023-11-26 12:01:19,104 INFO L428 stractBuchiCegarLoop]: Abstraction has 108 states and 119 transitions. [2023-11-26 12:01:19,104 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-26 12:01:19,104 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 108 states and 119 transitions. [2023-11-26 12:01:19,105 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:19,105 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:19,105 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:19,106 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 6, 5, 5, 1, 1, 1, 1] [2023-11-26 12:01:19,106 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:19,106 INFO L748 eck$LassoCheckResult]: Stem: 1669#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 1665#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 1659#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1660#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1661#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1662#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1714#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1711#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1707#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1706#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1705#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1703#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1701#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1699#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1697#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1695#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1693#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1691#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1689#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1687#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1685#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 1676#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 1675#L17-3 assume !(init_nondet_~i~0#1 < 10); 1650#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 1651#L28-3 assume !!(rangesum_~i~1#1 < 10); 1730#L29 assume !(rangesum_~i~1#1 > 5); 1726#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1670#L28-3 assume !!(rangesum_~i~1#1 < 10); 1652#L29 assume !(rangesum_~i~1#1 > 5); 1653#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1656#L28-3 assume !!(rangesum_~i~1#1 < 10); 1735#L29 assume !(rangesum_~i~1#1 > 5); 1734#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1733#L28-3 assume !!(rangesum_~i~1#1 < 10); 1732#L29 assume !(rangesum_~i~1#1 > 5); 1731#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1729#L28-3 assume !!(rangesum_~i~1#1 < 10); 1728#L29 assume !(rangesum_~i~1#1 > 5); 1727#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1725#L28-3 assume !!(rangesum_~i~1#1 < 10); 1680#L29 [2023-11-26 12:01:19,106 INFO L750 eck$LassoCheckResult]: Loop: 1680#L29 assume !(rangesum_~i~1#1 > 5); 1708#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 1679#L28-3 assume !!(rangesum_~i~1#1 < 10); 1680#L29 [2023-11-26 12:01:19,107 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:19,107 INFO L85 PathProgramCache]: Analyzing trace with hash -2010013507, now seen corresponding path program 3 times [2023-11-26 12:01:19,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:19,107 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753688788] [2023-11-26 12:01:19,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:19,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:19,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:19,128 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:19,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:19,147 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:19,147 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:19,147 INFO L85 PathProgramCache]: Analyzing trace with hash 58645, now seen corresponding path program 1 times [2023-11-26 12:01:19,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:19,148 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1289789998] [2023-11-26 12:01:19,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:19,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:19,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:19,151 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:19,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:19,154 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:19,154 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:19,155 INFO L85 PathProgramCache]: Analyzing trace with hash 121682649, now seen corresponding path program 4 times [2023-11-26 12:01:19,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:19,155 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [71548077] [2023-11-26 12:01:19,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:19,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:19,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:19,194 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:19,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:19,220 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:19,239 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:01:19,239 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:01:19,239 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:01:19,239 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:01:19,239 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 12:01:19,239 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:19,239 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:01:19,240 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:01:19,240 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration9_Loop [2023-11-26 12:01:19,240 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:01:19,240 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:01:19,241 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,247 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,265 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:01:19,266 INFO L404 LassoAnalysis]: Checking for nontermination... [2023-11-26 12:01:19,268 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:19,268 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:19,270 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:19,278 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:01:19,279 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:01:19,292 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2023-11-26 12:01:19,315 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:19,316 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:19,316 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:19,317 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:19,320 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2023-11-26 12:01:19,320 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2023-11-26 12:01:19,321 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:01:19,359 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2023-11-26 12:01:19,369 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:19,372 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:01:19,372 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:01:19,372 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:01:19,372 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:01:19,372 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 12:01:19,372 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:19,372 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:01:19,372 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:01:19,372 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration9_Loop [2023-11-26 12:01:19,372 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:01:19,373 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:01:19,373 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,379 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:19,398 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:01:19,398 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 12:01:19,398 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:19,398 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:19,400 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:19,404 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:19,417 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2023-11-26 12:01:19,417 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:19,417 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:19,417 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:19,417 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:19,417 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:19,418 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:19,418 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:19,435 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 12:01:19,437 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2023-11-26 12:01:19,437 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2023-11-26 12:01:19,437 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:19,437 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:19,441 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:19,442 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 12:01:19,442 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2023-11-26 12:01:19,442 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 12:01:19,442 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_rangesum_~i~1#1) = -2*ULTIMATE.start_rangesum_~i~1#1 + 11 Supporting invariants [] [2023-11-26 12:01:19,445 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2023-11-26 12:01:19,449 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:19,450 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2023-11-26 12:01:19,462 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:19,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:19,505 INFO L262 TraceCheckSpWp]: Trace formula consists of 185 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 12:01:19,507 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:19,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:19,560 WARN L260 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 12:01:19,561 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:19,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:19,589 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2023-11-26 12:01:19,589 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 108 states and 119 transitions. cyclomatic complexity: 17 Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:19,629 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 108 states and 119 transitions. cyclomatic complexity: 17. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 140 states and 160 transitions. Complement of second has 7 states. [2023-11-26 12:01:19,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-26 12:01:19,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:19,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2023-11-26 12:01:19,631 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 18 transitions. Stem has 40 letters. Loop has 3 letters. [2023-11-26 12:01:19,634 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:19,634 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 18 transitions. Stem has 43 letters. Loop has 3 letters. [2023-11-26 12:01:19,634 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:19,634 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 18 transitions. Stem has 40 letters. Loop has 6 letters. [2023-11-26 12:01:19,635 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:19,635 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 140 states and 160 transitions. [2023-11-26 12:01:19,636 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2023-11-26 12:01:19,638 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 140 states to 116 states and 130 transitions. [2023-11-26 12:01:19,639 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 54 [2023-11-26 12:01:19,639 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 55 [2023-11-26 12:01:19,639 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 130 transitions. [2023-11-26 12:01:19,639 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:01:19,639 INFO L218 hiAutomatonCegarLoop]: Abstraction has 116 states and 130 transitions. [2023-11-26 12:01:19,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 130 transitions. [2023-11-26 12:01:19,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 113. [2023-11-26 12:01:19,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 113 states, 113 states have (on average 1.1150442477876106) internal successors, (126), 112 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:19,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 126 transitions. [2023-11-26 12:01:19,645 INFO L240 hiAutomatonCegarLoop]: Abstraction has 113 states and 126 transitions. [2023-11-26 12:01:19,645 INFO L428 stractBuchiCegarLoop]: Abstraction has 113 states and 126 transitions. [2023-11-26 12:01:19,645 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-26 12:01:19,645 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 113 states and 126 transitions. [2023-11-26 12:01:19,646 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2023-11-26 12:01:19,646 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:19,646 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:19,647 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 6, 6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:19,647 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:19,648 INFO L748 eck$LassoCheckResult]: Stem: 2069#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 2059#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 2060#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2061#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2062#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2063#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2108#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2106#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2104#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2102#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2100#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2098#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2096#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2094#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2092#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2090#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2089#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2087#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2084#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2079#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2078#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2077#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2076#L17-3 assume !(init_nondet_~i~0#1 < 10); 2051#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2052#L28-3 assume !!(rangesum_~i~1#1 < 10); 2053#L29 assume !(rangesum_~i~1#1 > 5); 2054#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2141#L28-3 assume !!(rangesum_~i~1#1 < 10); 2139#L29 assume !(rangesum_~i~1#1 > 5); 2137#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2135#L28-3 assume !!(rangesum_~i~1#1 < 10); 2133#L29 assume !(rangesum_~i~1#1 > 5); 2131#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2129#L28-3 assume !!(rangesum_~i~1#1 < 10); 2127#L29 assume !(rangesum_~i~1#1 > 5); 2125#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2124#L28-3 assume !!(rangesum_~i~1#1 < 10); 2121#L29 assume !(rangesum_~i~1#1 > 5); 2115#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2114#L28-3 assume !!(rangesum_~i~1#1 < 10); 2112#L29 assume !(rangesum_~i~1#1 > 5); 2113#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2111#L28-3 assume !(rangesum_~i~1#1 < 10); 2071#L28-4 assume !(0 != rangesum_~cnt~0#1);rangesum_#res#1 := 0; 2065#rangesum_returnLabel#1 main_#t~ret5#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2066#L28-8 assume !!(rangesum_~i~1#1 < 10); 2075#L29-2 assume !(rangesum_~i~1#1 > 5); 2064#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2047#L28-8 assume !!(rangesum_~i~1#1 < 10); 2048#L29-2 assume !(rangesum_~i~1#1 > 5); 2110#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2109#L28-8 assume !!(rangesum_~i~1#1 < 10); 2107#L29-2 assume !(rangesum_~i~1#1 > 5); 2105#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2103#L28-8 assume !!(rangesum_~i~1#1 < 10); 2101#L29-2 assume !(rangesum_~i~1#1 > 5); 2099#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2097#L28-8 assume !!(rangesum_~i~1#1 < 10); 2095#L29-2 assume !(rangesum_~i~1#1 > 5); 2093#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2091#L28-8 assume !!(rangesum_~i~1#1 < 10); 2088#L29-2 assume !(rangesum_~i~1#1 > 5); 2085#L28-7 [2023-11-26 12:01:19,648 INFO L750 eck$LassoCheckResult]: Loop: 2085#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2080#L28-8 assume !!(rangesum_~i~1#1 < 10); 2081#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 2085#L28-7 [2023-11-26 12:01:19,649 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:19,649 INFO L85 PathProgramCache]: Analyzing trace with hash -365260545, now seen corresponding path program 1 times [2023-11-26 12:01:19,649 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:19,649 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608043630] [2023-11-26 12:01:19,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:19,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:19,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:19,699 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Ended with exit code 0 [2023-11-26 12:01:19,713 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Ended with exit code 0 [2023-11-26 12:01:19,774 INFO L134 CoverageAnalysis]: Checked inductivity of 191 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2023-11-26 12:01:19,774 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:19,774 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608043630] [2023-11-26 12:01:19,774 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1608043630] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:01:19,774 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:01:19,775 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 12:01:19,775 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1660643524] [2023-11-26 12:01:19,775 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:01:19,775 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:01:19,776 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:19,776 INFO L85 PathProgramCache]: Analyzing trace with hash 85178, now seen corresponding path program 1 times [2023-11-26 12:01:19,776 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:19,776 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1213275646] [2023-11-26 12:01:19,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:19,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:19,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:19,782 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:19,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:19,786 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:19,852 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:19,853 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 12:01:19,853 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2023-11-26 12:01:19,853 INFO L87 Difference]: Start difference. First operand 113 states and 126 transitions. cyclomatic complexity: 20 Second operand has 4 states, 4 states have (on average 4.25) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:19,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:19,927 INFO L93 Difference]: Finished difference Result 127 states and 144 transitions. [2023-11-26 12:01:19,927 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 127 states and 144 transitions. [2023-11-26 12:01:19,929 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2023-11-26 12:01:19,930 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 127 states to 109 states and 123 transitions. [2023-11-26 12:01:19,930 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 62 [2023-11-26 12:01:19,932 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 62 [2023-11-26 12:01:19,932 INFO L73 IsDeterministic]: Start isDeterministic. Operand 109 states and 123 transitions. [2023-11-26 12:01:19,937 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:01:19,937 INFO L218 hiAutomatonCegarLoop]: Abstraction has 109 states and 123 transitions. [2023-11-26 12:01:19,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states and 123 transitions. [2023-11-26 12:01:19,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 99. [2023-11-26 12:01:19,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.101010101010101) internal successors, (109), 98 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:19,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 109 transitions. [2023-11-26 12:01:19,952 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 109 transitions. [2023-11-26 12:01:19,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 12:01:19,953 INFO L428 stractBuchiCegarLoop]: Abstraction has 99 states and 109 transitions. [2023-11-26 12:01:19,954 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-26 12:01:19,954 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 109 transitions. [2023-11-26 12:01:19,955 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 10 [2023-11-26 12:01:19,955 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:19,955 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:19,959 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 7, 7, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:19,959 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:19,960 INFO L748 eck$LassoCheckResult]: Stem: 2317#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 2306#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 2307#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2308#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2309#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2310#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2315#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2342#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2341#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2340#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2339#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2338#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2337#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2336#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2335#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2334#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2332#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2329#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2328#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2325#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2323#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 2322#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 2321#L17-3 assume !(init_nondet_~i~0#1 < 10); 2298#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2299#L28-3 assume !!(rangesum_~i~1#1 < 10); 2300#L29 assume !(rangesum_~i~1#1 > 5); 2301#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2304#L28-3 assume !!(rangesum_~i~1#1 < 10); 2302#L29 assume !(rangesum_~i~1#1 > 5); 2303#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2374#L28-3 assume !!(rangesum_~i~1#1 < 10); 2373#L29 assume !(rangesum_~i~1#1 > 5); 2372#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2371#L28-3 assume !!(rangesum_~i~1#1 < 10); 2370#L29 assume !(rangesum_~i~1#1 > 5); 2369#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2368#L28-3 assume !!(rangesum_~i~1#1 < 10); 2367#L29 assume !(rangesum_~i~1#1 > 5); 2364#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2365#L28-3 assume !!(rangesum_~i~1#1 < 10); 2361#L29 assume !(rangesum_~i~1#1 > 5); 2359#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2360#L28-3 assume !!(rangesum_~i~1#1 < 10); 2343#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 2326#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2324#L28-3 assume !(rangesum_~i~1#1 < 10); 2319#L28-4 assume !(0 != rangesum_~cnt~0#1);rangesum_#res#1 := 0; 2313#rangesum_returnLabel#1 main_#t~ret5#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 2294#L28-8 assume !!(rangesum_~i~1#1 < 10); 2295#L29-2 assume !(rangesum_~i~1#1 > 5); 2311#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2312#L28-8 assume !!(rangesum_~i~1#1 < 10); 2358#L29-2 assume !(rangesum_~i~1#1 > 5); 2357#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2356#L28-8 assume !!(rangesum_~i~1#1 < 10); 2355#L29-2 assume !(rangesum_~i~1#1 > 5); 2354#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2353#L28-8 assume !!(rangesum_~i~1#1 < 10); 2352#L29-2 assume !(rangesum_~i~1#1 > 5); 2351#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2350#L28-8 assume !!(rangesum_~i~1#1 < 10); 2349#L29-2 assume !(rangesum_~i~1#1 > 5); 2348#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2347#L28-8 assume !!(rangesum_~i~1#1 < 10); 2346#L29-2 assume !(rangesum_~i~1#1 > 5); 2344#L28-7 [2023-11-26 12:01:19,960 INFO L750 eck$LassoCheckResult]: Loop: 2344#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 2345#L28-8 assume !!(rangesum_~i~1#1 < 10); 2331#L29-2 assume !(rangesum_~i~1#1 > 5); 2344#L28-7 [2023-11-26 12:01:19,960 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:19,960 INFO L85 PathProgramCache]: Analyzing trace with hash 1039890653, now seen corresponding path program 1 times [2023-11-26 12:01:19,961 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:19,961 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276523984] [2023-11-26 12:01:19,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:19,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:19,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:20,087 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 197 trivial. 0 not checked. [2023-11-26 12:01:20,087 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:20,087 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1276523984] [2023-11-26 12:01:20,087 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1276523984] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-26 12:01:20,087 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1847769427] [2023-11-26 12:01:20,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:20,088 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:01:20,088 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:20,089 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:01:20,096 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2023-11-26 12:01:20,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:20,214 INFO L262 TraceCheckSpWp]: Trace formula consists of 257 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 12:01:20,217 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:20,259 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 197 trivial. 0 not checked. [2023-11-26 12:01:20,259 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:01:20,260 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1847769427] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:01:20,260 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2023-11-26 12:01:20,260 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 5 [2023-11-26 12:01:20,260 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1309311659] [2023-11-26 12:01:20,260 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:01:20,261 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:01:20,261 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:20,261 INFO L85 PathProgramCache]: Analyzing trace with hash 85180, now seen corresponding path program 1 times [2023-11-26 12:01:20,261 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:20,261 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592477939] [2023-11-26 12:01:20,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:20,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:20,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:20,264 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:20,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:20,267 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:20,284 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:01:20,284 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:01:20,284 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:01:20,284 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:01:20,285 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2023-11-26 12:01:20,285 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:20,285 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:01:20,285 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:01:20,285 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration11_Loop [2023-11-26 12:01:20,285 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:01:20,285 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:01:20,286 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:20,296 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:20,316 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:01:20,316 INFO L404 LassoAnalysis]: Checking for nontermination... [2023-11-26 12:01:20,316 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:20,316 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:20,317 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:20,325 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2023-11-26 12:01:20,325 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:01:20,338 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2023-11-26 12:01:20,364 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:20,365 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:20,365 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:20,366 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:20,371 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2023-11-26 12:01:20,371 INFO L160 nArgumentSynthesizer]: Using integer mode. [2023-11-26 12:01:20,385 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2023-11-26 12:01:20,471 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2023-11-26 12:01:20,481 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:20,481 INFO L210 LassoAnalysis]: Preferences: [2023-11-26 12:01:20,481 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-26 12:01:20,481 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-26 12:01:20,481 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-26 12:01:20,481 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-26 12:01:20,482 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:20,482 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-26 12:01:20,482 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-26 12:01:20,482 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration11_Loop [2023-11-26 12:01:20,482 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-26 12:01:20,482 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-26 12:01:20,483 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:20,488 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-26 12:01:20,508 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-26 12:01:20,508 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-26 12:01:20,508 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:20,508 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:20,509 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:20,513 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-26 12:01:20,526 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-26 12:01:20,526 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-26 12:01:20,526 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-26 12:01:20,527 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-26 12:01:20,527 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-26 12:01:20,527 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2023-11-26 12:01:20,527 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-26 12:01:20,528 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-26 12:01:20,551 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-26 12:01:20,553 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2023-11-26 12:01:20,553 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2023-11-26 12:01:20,554 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:01:20,554 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:20,555 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:01:20,560 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-26 12:01:20,560 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2023-11-26 12:01:20,560 INFO L513 LassoAnalysis]: Proved termination. [2023-11-26 12:01:20,560 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_rangesum_~i~1#1) = -2*ULTIMATE.start_rangesum_~i~1#1 + 9 Supporting invariants [] [2023-11-26 12:01:20,562 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2023-11-26 12:01:20,569 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:20,570 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2023-11-26 12:01:20,584 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:20,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:20,647 INFO L262 TraceCheckSpWp]: Trace formula consists of 257 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-26 12:01:20,649 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:20,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:20,763 WARN L260 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 12:01:20,763 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:20,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:01:20,774 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-26 12:01:20,775 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 99 states and 109 transitions. cyclomatic complexity: 16 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:20,801 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 99 states and 109 transitions. cyclomatic complexity: 16. Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 115 states and 127 transitions. Complement of second has 5 states. [2023-11-26 12:01:20,801 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2023-11-26 12:01:20,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:20,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 24 transitions. [2023-11-26 12:01:20,802 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 24 transitions. Stem has 65 letters. Loop has 3 letters. [2023-11-26 12:01:20,803 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:20,803 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 24 transitions. Stem has 68 letters. Loop has 3 letters. [2023-11-26 12:01:20,803 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:20,803 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 24 transitions. Stem has 65 letters. Loop has 6 letters. [2023-11-26 12:01:20,804 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-26 12:01:20,804 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 115 states and 127 transitions. [2023-11-26 12:01:20,805 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2023-11-26 12:01:20,806 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 115 states to 103 states and 114 transitions. [2023-11-26 12:01:20,806 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 40 [2023-11-26 12:01:20,806 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2023-11-26 12:01:20,806 INFO L73 IsDeterministic]: Start isDeterministic. Operand 103 states and 114 transitions. [2023-11-26 12:01:20,806 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:01:20,806 INFO L218 hiAutomatonCegarLoop]: Abstraction has 103 states and 114 transitions. [2023-11-26 12:01:20,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states and 114 transitions. [2023-11-26 12:01:20,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 102. [2023-11-26 12:01:20,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 102 states have (on average 1.107843137254902) internal successors, (113), 101 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:20,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 113 transitions. [2023-11-26 12:01:20,809 INFO L240 hiAutomatonCegarLoop]: Abstraction has 102 states and 113 transitions. [2023-11-26 12:01:20,809 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:20,809 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 12:01:20,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-26 12:01:20,810 INFO L87 Difference]: Start difference. First operand 102 states and 113 transitions. Second operand has 4 states, 4 states have (on average 4.25) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:20,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:20,837 INFO L93 Difference]: Finished difference Result 114 states and 128 transitions. [2023-11-26 12:01:20,837 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 128 transitions. [2023-11-26 12:01:20,838 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2023-11-26 12:01:20,839 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 114 states and 128 transitions. [2023-11-26 12:01:20,839 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2023-11-26 12:01:20,840 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2023-11-26 12:01:20,840 INFO L73 IsDeterministic]: Start isDeterministic. Operand 114 states and 128 transitions. [2023-11-26 12:01:20,840 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:01:20,840 INFO L218 hiAutomatonCegarLoop]: Abstraction has 114 states and 128 transitions. [2023-11-26 12:01:20,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states and 128 transitions. [2023-11-26 12:01:20,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 102. [2023-11-26 12:01:20,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 102 states have (on average 1.088235294117647) internal successors, (111), 101 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:20,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 111 transitions. [2023-11-26 12:01:20,843 INFO L240 hiAutomatonCegarLoop]: Abstraction has 102 states and 111 transitions. [2023-11-26 12:01:20,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 12:01:20,844 INFO L428 stractBuchiCegarLoop]: Abstraction has 102 states and 111 transitions. [2023-11-26 12:01:20,844 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2023-11-26 12:01:20,844 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 102 states and 111 transitions. [2023-11-26 12:01:20,845 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2023-11-26 12:01:20,845 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:20,845 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:20,846 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 7, 7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:20,846 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:20,846 INFO L748 eck$LassoCheckResult]: Stem: 3167#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 3158#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 3159#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3160#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3161#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3162#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3196#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3195#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3194#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3193#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3192#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3191#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3190#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3189#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3188#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3187#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3186#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3185#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3184#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3183#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3182#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3181#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3180#L17-3 assume !(init_nondet_~i~0#1 < 10); 3151#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3152#L28-3 assume !!(rangesum_~i~1#1 < 10); 3147#L29 assume !(rangesum_~i~1#1 > 5); 3148#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3170#L28-3 assume !!(rangesum_~i~1#1 < 10); 3149#L29 assume !(rangesum_~i~1#1 > 5); 3150#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3153#L28-3 assume !!(rangesum_~i~1#1 < 10); 3224#L29 assume !(rangesum_~i~1#1 > 5); 3223#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3222#L28-3 assume !!(rangesum_~i~1#1 < 10); 3221#L29 assume !(rangesum_~i~1#1 > 5); 3220#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3219#L28-3 assume !!(rangesum_~i~1#1 < 10); 3218#L29 assume !(rangesum_~i~1#1 > 5); 3215#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3216#L28-3 assume !!(rangesum_~i~1#1 < 10); 3203#L29 assume !(rangesum_~i~1#1 > 5); 3201#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3202#L28-3 assume !!(rangesum_~i~1#1 < 10); 3178#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3176#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3168#L28-3 assume !(rangesum_~i~1#1 < 10); 3169#L28-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 3163#rangesum_returnLabel#1 main_#t~ret5#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3164#L28-8 assume !!(rangesum_~i~1#1 < 10); 3179#L29-2 assume !(rangesum_~i~1#1 > 5); 3155#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3156#L28-8 assume !!(rangesum_~i~1#1 < 10); 3212#L29-2 assume !(rangesum_~i~1#1 > 5); 3157#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3143#L28-8 assume !!(rangesum_~i~1#1 < 10); 3144#L29-2 assume !(rangesum_~i~1#1 > 5); 3174#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3211#L28-8 assume !!(rangesum_~i~1#1 < 10); 3210#L29-2 assume !(rangesum_~i~1#1 > 5); 3209#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3208#L28-8 assume !!(rangesum_~i~1#1 < 10); 3205#L29-2 assume !(rangesum_~i~1#1 > 5); 3206#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3207#L28-8 assume !!(rangesum_~i~1#1 < 10); 3199#L29-2 assume !(rangesum_~i~1#1 > 5); 3197#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3141#L28-8 assume !!(rangesum_~i~1#1 < 10); 3142#L29-2 [2023-11-26 12:01:20,847 INFO L750 eck$LassoCheckResult]: Loop: 3142#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3173#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3175#L28-8 assume !!(rangesum_~i~1#1 < 10); 3142#L29-2 [2023-11-26 12:01:20,847 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:20,847 INFO L85 PathProgramCache]: Analyzing trace with hash -1815162476, now seen corresponding path program 1 times [2023-11-26 12:01:20,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:20,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096002765] [2023-11-26 12:01:20,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:20,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:20,867 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:01:20,867 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [476715731] [2023-11-26 12:01:20,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:20,867 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:01:20,868 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:20,871 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:01:20,887 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2023-11-26 12:01:21,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:01:21,047 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Forceful destruction successful, exit code 0 [2023-11-26 12:01:21,049 INFO L262 TraceCheckSpWp]: Trace formula consists of 259 conjuncts, 9 conjunts are in the unsatisfiable core [2023-11-26 12:01:21,051 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:21,147 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2023-11-26 12:01:21,148 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-26 12:01:21,260 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2023-11-26 12:01:21,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:21,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096002765] [2023-11-26 12:01:21,261 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:01:21,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [476715731] [2023-11-26 12:01:21,262 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [476715731] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-26 12:01:21,262 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-26 12:01:21,262 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 12 [2023-11-26 12:01:21,262 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1620557284] [2023-11-26 12:01:21,262 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-26 12:01:21,263 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-26 12:01:21,263 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:21,263 INFO L85 PathProgramCache]: Analyzing trace with hash 81548, now seen corresponding path program 2 times [2023-11-26 12:01:21,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:21,263 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1710634977] [2023-11-26 12:01:21,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:21,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:21,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:21,268 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:21,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:21,272 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:21,340 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:21,341 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2023-11-26 12:01:21,341 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2023-11-26 12:01:21,341 INFO L87 Difference]: Start difference. First operand 102 states and 111 transitions. cyclomatic complexity: 16 Second operand has 12 states, 12 states have (on average 3.5) internal successors, (42), 12 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:21,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:21,549 INFO L93 Difference]: Finished difference Result 153 states and 171 transitions. [2023-11-26 12:01:21,550 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 153 states and 171 transitions. [2023-11-26 12:01:21,551 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 19 [2023-11-26 12:01:21,552 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 153 states to 150 states and 168 transitions. [2023-11-26 12:01:21,552 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 61 [2023-11-26 12:01:21,553 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 61 [2023-11-26 12:01:21,553 INFO L73 IsDeterministic]: Start isDeterministic. Operand 150 states and 168 transitions. [2023-11-26 12:01:21,553 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:01:21,553 INFO L218 hiAutomatonCegarLoop]: Abstraction has 150 states and 168 transitions. [2023-11-26 12:01:21,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states and 168 transitions. [2023-11-26 12:01:21,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 119. [2023-11-26 12:01:21,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 119 states, 119 states have (on average 1.0756302521008403) internal successors, (128), 118 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:21,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 128 transitions. [2023-11-26 12:01:21,556 INFO L240 hiAutomatonCegarLoop]: Abstraction has 119 states and 128 transitions. [2023-11-26 12:01:21,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-26 12:01:21,563 INFO L428 stractBuchiCegarLoop]: Abstraction has 119 states and 128 transitions. [2023-11-26 12:01:21,563 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2023-11-26 12:01:21,563 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 128 transitions. [2023-11-26 12:01:21,564 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2023-11-26 12:01:21,564 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:21,564 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:21,565 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 10, 10, 9, 6, 6, 4, 3, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:21,566 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-26 12:01:21,566 INFO L748 eck$LassoCheckResult]: Stem: 3836#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 3823#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 3824#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3825#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3826#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3827#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3834#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3878#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3877#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3876#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3875#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3874#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3873#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3871#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3869#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3867#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3865#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3863#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3861#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3859#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3857#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 3845#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 3844#L17-3 assume !(init_nondet_~i~0#1 < 10); 3813#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3814#L28-3 assume !!(rangesum_~i~1#1 < 10); 3815#L29 assume !(rangesum_~i~1#1 > 5); 3816#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3900#L28-3 assume !!(rangesum_~i~1#1 < 10); 3901#L29 assume !(rangesum_~i~1#1 > 5); 3902#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3837#L28-3 assume !!(rangesum_~i~1#1 < 10); 3838#L29 assume !(rangesum_~i~1#1 > 5); 3907#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3906#L28-3 assume !!(rangesum_~i~1#1 < 10); 3905#L29 assume !(rangesum_~i~1#1 > 5); 3904#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3903#L28-3 assume !!(rangesum_~i~1#1 < 10); 3817#L29 assume !(rangesum_~i~1#1 > 5); 3818#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3909#L28-3 assume !!(rangesum_~i~1#1 < 10); 3890#L29 assume !(rangesum_~i~1#1 > 5); 3889#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3887#L28-3 assume !!(rangesum_~i~1#1 < 10); 3886#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3885#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3884#L28-3 assume !!(rangesum_~i~1#1 < 10); 3883#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3882#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3881#L28-3 assume !!(rangesum_~i~1#1 < 10); 3880#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3879#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3851#L28-3 assume !!(rangesum_~i~1#1 < 10); 3852#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3850#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3848#L28-3 assume !(rangesum_~i~1#1 < 10); 3840#L28-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 3831#rangesum_returnLabel#1 main_#t~ret5#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 3807#L28-8 assume !!(rangesum_~i~1#1 < 10); 3808#L29-2 assume !(rangesum_~i~1#1 > 5); 3828#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3829#L28-8 assume !!(rangesum_~i~1#1 < 10); 3894#L29-2 assume !(rangesum_~i~1#1 > 5); 3893#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3891#L28-8 assume !!(rangesum_~i~1#1 < 10); 3892#L29-2 assume !(rangesum_~i~1#1 > 5); 3899#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3898#L28-8 assume !!(rangesum_~i~1#1 < 10); 3897#L29-2 assume !(rangesum_~i~1#1 > 5); 3896#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3895#L28-8 assume !!(rangesum_~i~1#1 < 10); 3842#L29-2 assume !(rangesum_~i~1#1 > 5); 3843#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3908#L28-8 assume !!(rangesum_~i~1#1 < 10); 3872#L29-2 assume !(rangesum_~i~1#1 > 5); 3870#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3868#L28-8 assume !!(rangesum_~i~1#1 < 10); 3866#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3864#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3862#L28-8 assume !!(rangesum_~i~1#1 < 10); 3860#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3858#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3856#L28-8 assume !!(rangesum_~i~1#1 < 10); 3855#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3854#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3853#L28-8 assume !!(rangesum_~i~1#1 < 10); 3847#L29-2 [2023-11-26 12:01:21,566 INFO L750 eck$LassoCheckResult]: Loop: 3847#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 3849#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 3846#L28-8 assume !!(rangesum_~i~1#1 < 10); 3847#L29-2 [2023-11-26 12:01:21,567 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:21,567 INFO L85 PathProgramCache]: Analyzing trace with hash -1484601769, now seen corresponding path program 1 times [2023-11-26 12:01:21,567 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:21,567 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361497867] [2023-11-26 12:01:21,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:21,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:21,588 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:01:21,589 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [897272013] [2023-11-26 12:01:21,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:21,589 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:01:21,589 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:21,590 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:01:21,615 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2023-11-26 12:01:21,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:21,834 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:21,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:22,004 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:22,004 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:22,004 INFO L85 PathProgramCache]: Analyzing trace with hash 81548, now seen corresponding path program 3 times [2023-11-26 12:01:22,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:22,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [620072647] [2023-11-26 12:01:22,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:22,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:22,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:22,009 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:22,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:22,012 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:22,013 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:22,013 INFO L85 PathProgramCache]: Analyzing trace with hash 1801965686, now seen corresponding path program 2 times [2023-11-26 12:01:22,013 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:22,013 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727386945] [2023-11-26 12:01:22,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:22,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:22,035 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:01:22,036 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2108174560] [2023-11-26 12:01:22,036 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-26 12:01:22,036 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:01:22,036 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:22,043 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:01:22,063 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2023-11-26 12:01:22,219 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-26 12:01:22,219 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-26 12:01:22,221 INFO L262 TraceCheckSpWp]: Trace formula consists of 343 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-26 12:01:22,225 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:01:22,278 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 302 trivial. 0 not checked. [2023-11-26 12:01:22,279 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:01:22,279 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:01:22,279 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727386945] [2023-11-26 12:01:22,279 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:01:22,279 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2108174560] [2023-11-26 12:01:22,279 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2108174560] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:01:22,280 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:01:22,280 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 12:01:22,280 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1248252096] [2023-11-26 12:01:22,280 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:01:22,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:01:22,346 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 12:01:22,346 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-26 12:01:22,347 INFO L87 Difference]: Start difference. First operand 119 states and 128 transitions. cyclomatic complexity: 16 Second operand has 7 states, 6 states have (on average 4.666666666666667) internal successors, (28), 7 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:22,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:01:22,459 INFO L93 Difference]: Finished difference Result 150 states and 154 transitions. [2023-11-26 12:01:22,459 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 150 states and 154 transitions. [2023-11-26 12:01:22,461 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2023-11-26 12:01:22,462 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 150 states to 116 states and 120 transitions. [2023-11-26 12:01:22,462 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 50 [2023-11-26 12:01:22,463 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 61 [2023-11-26 12:01:22,463 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 120 transitions. [2023-11-26 12:01:22,463 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-26 12:01:22,463 INFO L218 hiAutomatonCegarLoop]: Abstraction has 116 states and 120 transitions. [2023-11-26 12:01:22,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 120 transitions. [2023-11-26 12:01:22,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 96. [2023-11-26 12:01:22,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 96 states, 96 states have (on average 1.0416666666666667) internal successors, (100), 95 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:01:22,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 100 transitions. [2023-11-26 12:01:22,466 INFO L240 hiAutomatonCegarLoop]: Abstraction has 96 states and 100 transitions. [2023-11-26 12:01:22,467 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 12:01:22,468 INFO L428 stractBuchiCegarLoop]: Abstraction has 96 states and 100 transitions. [2023-11-26 12:01:22,468 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2023-11-26 12:01:22,468 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 96 states and 100 transitions. [2023-11-26 12:01:22,469 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2023-11-26 12:01:22,469 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:01:22,469 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:01:22,476 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 10, 10, 10, 6, 6, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:01:22,478 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-26 12:01:22,479 INFO L748 eck$LassoCheckResult]: Stem: 4377#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 4365#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~ret8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~post10#1, main_~i~2#1, main_#t~ret12#1, main_~#x~0#1.base, main_~#x~0#1.offset, main_~temp~0#1, main_~ret~1#1, main_~ret2~0#1, main_~ret5~0#1;call main_~#x~0#1.base, main_~#x~0#1.offset := #Ultimate.allocOnStack(40);assume { :begin_inline_init_nondet } true;init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;init_nondet_~x#1.base, init_nondet_~x#1.offset := init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;havoc init_nondet_~i~0#1;init_nondet_~i~0#1 := 0; 4366#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4367#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4368#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4369#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4375#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4426#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4425#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4424#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4422#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4419#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4418#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4417#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4416#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4413#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4410#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4408#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4407#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4406#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4404#L17-3 assume !!(init_nondet_~i~0#1 < 10);havoc init_nondet_#t~nondet2#1;call write~int#1(init_nondet_#t~nondet2#1, init_nondet_~x#1.base, init_nondet_~x#1.offset + 4 * init_nondet_~i~0#1, 4);havoc init_nondet_#t~nondet2#1; 4385#L17-2 init_nondet_#t~post1#1 := init_nondet_~i~0#1;init_nondet_~i~0#1 := 1 + init_nondet_#t~post1#1;havoc init_nondet_#t~post1#1; 4384#L17-3 assume !(init_nondet_~i~0#1 < 10); 4355#L15 havoc init_nondet_#t~nondet2#1, init_nondet_#t~post1#1, init_nondet_~x#1.base, init_nondet_~x#1.offset, init_nondet_~i~0#1;havoc init_nondet_#in~x#1.base, init_nondet_#in~x#1.offset;assume { :end_inline_init_nondet } true;havoc main_~temp~0#1;havoc main_~ret~1#1;havoc main_~ret2~0#1;havoc main_~ret5~0#1;assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 4356#L28-3 assume !!(rangesum_~i~1#1 < 10); 4357#L29 assume !(rangesum_~i~1#1 > 5); 4358#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4378#L28-3 assume !!(rangesum_~i~1#1 < 10); 4359#L29 assume !(rangesum_~i~1#1 > 5); 4360#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4363#L28-3 assume !!(rangesum_~i~1#1 < 10); 4435#L29 assume !(rangesum_~i~1#1 > 5); 4434#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4433#L28-3 assume !!(rangesum_~i~1#1 < 10); 4432#L29 assume !(rangesum_~i~1#1 > 5); 4431#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4430#L28-3 assume !!(rangesum_~i~1#1 < 10); 4429#L29 assume !(rangesum_~i~1#1 > 5); 4428#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4427#L28-3 assume !!(rangesum_~i~1#1 < 10); 4412#L29 assume !(rangesum_~i~1#1 > 5); 4415#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4411#L28-3 assume !!(rangesum_~i~1#1 < 10); 4409#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4361#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4362#L28-3 assume !!(rangesum_~i~1#1 < 10); 4414#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4402#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4400#L28-3 assume !!(rangesum_~i~1#1 < 10); 4398#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4396#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4394#L28-3 assume !!(rangesum_~i~1#1 < 10); 4392#L29 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4390#L28-2 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4388#L28-3 assume !(rangesum_~i~1#1 < 10); 4380#L28-4 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 4373#rangesum_returnLabel#1 main_#t~ret5#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret~1#1 := main_#t~ret5#1;havoc main_#t~ret5#1;call main_#t~mem6#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem6#1;havoc main_#t~mem6#1;call main_#t~mem7#1 := read~int#1(main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~#x~0#1.base, main_~#x~0#1.offset, 4);havoc main_#t~mem7#1;call write~int#1(main_~temp~0#1, main_~#x~0#1.base, 4 + main_~#x~0#1.offset, 4);assume { :begin_inline_rangesum } true;rangesum_#in~x#1.base, rangesum_#in~x#1.offset := main_~#x~0#1.base, main_~#x~0#1.offset;havoc rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;rangesum_~x#1.base, rangesum_~x#1.offset := rangesum_#in~x#1.base, rangesum_#in~x#1.offset;havoc rangesum_~i~1#1;havoc rangesum_~ret~0#1;rangesum_~ret~0#1 := 0;rangesum_~cnt~0#1 := 0;rangesum_~i~1#1 := 0; 4374#L28-8 assume !!(rangesum_~i~1#1 < 10); 4405#L29-2 assume !(rangesum_~i~1#1 > 5); 4370#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4371#L28-8 assume !!(rangesum_~i~1#1 < 10); 4383#L29-2 assume !(rangesum_~i~1#1 > 5); 4372#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4351#L28-8 assume !!(rangesum_~i~1#1 < 10); 4352#L29-2 assume !(rangesum_~i~1#1 > 5); 4442#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4441#L28-8 assume !!(rangesum_~i~1#1 < 10); 4440#L29-2 assume !(rangesum_~i~1#1 > 5); 4439#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4438#L28-8 assume !!(rangesum_~i~1#1 < 10); 4437#L29-2 assume !(rangesum_~i~1#1 > 5); 4436#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4421#L28-8 assume !!(rangesum_~i~1#1 < 10); 4423#L29-2 assume !(rangesum_~i~1#1 > 5); 4420#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4349#L28-8 assume !!(rangesum_~i~1#1 < 10); 4350#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4382#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4403#L28-8 assume !!(rangesum_~i~1#1 < 10); 4401#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4399#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4397#L28-8 assume !!(rangesum_~i~1#1 < 10); 4395#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4393#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4391#L28-8 assume !!(rangesum_~i~1#1 < 10); 4389#L29-2 assume rangesum_~i~1#1 > 5;call rangesum_#t~mem4#1 := read~int#1(rangesum_~x#1.base, rangesum_~x#1.offset + 4 * rangesum_~i~1#1, 4);rangesum_~ret~0#1 := rangesum_~ret~0#1 + rangesum_#t~mem4#1;havoc rangesum_#t~mem4#1;rangesum_~cnt~0#1 := 1 + rangesum_~cnt~0#1; 4387#L28-7 rangesum_#t~post3#1 := rangesum_~i~1#1;rangesum_~i~1#1 := 1 + rangesum_#t~post3#1;havoc rangesum_#t~post3#1; 4386#L28-8 assume !(rangesum_~i~1#1 < 10); 4379#L28-9 assume 0 != rangesum_~cnt~0#1;rangesum_#res#1 := (if (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 <= 2147483647 then (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 else (if rangesum_~ret~0#1 < 0 && 0 != rangesum_~ret~0#1 % rangesum_~cnt~0#1 then (if rangesum_~cnt~0#1 < 0 then rangesum_~ret~0#1 / rangesum_~cnt~0#1 - 1 else 1 + rangesum_~ret~0#1 / rangesum_~cnt~0#1) else rangesum_~ret~0#1 / rangesum_~cnt~0#1) % 4294967296 - 4294967296); 4353#rangesum_returnLabel#2 main_#t~ret8#1 := rangesum_#res#1;havoc rangesum_#t~mem4#1, rangesum_#t~post3#1, rangesum_~x#1.base, rangesum_~x#1.offset, rangesum_~i~1#1, rangesum_~ret~0#1, rangesum_~cnt~0#1;havoc rangesum_#in~x#1.base, rangesum_#in~x#1.offset;assume { :end_inline_rangesum } true;main_~ret2~0#1 := main_#t~ret8#1;havoc main_#t~ret8#1;call main_#t~mem9#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset, 4);main_~temp~0#1 := main_#t~mem9#1;havoc main_#t~mem9#1;main_~i~2#1 := 0; 4354#L54-3 [2023-11-26 12:01:22,481 INFO L750 eck$LassoCheckResult]: Loop: 4354#L54-3 assume !!(main_~i~2#1 < 9);call main_#t~mem11#1 := read~int#1(main_~#x~0#1.base, main_~#x~0#1.offset + 4 * (1 + main_~i~2#1), 4);call write~int#1(main_#t~mem11#1, main_~#x~0#1.base, main_~#x~0#1.offset + 4 * main_~i~2#1, 4);havoc main_#t~mem11#1; 4376#L54-2 main_#t~post10#1 := main_~i~2#1;main_~i~2#1 := 1 + main_#t~post10#1;havoc main_#t~post10#1; 4354#L54-3 [2023-11-26 12:01:22,485 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:22,485 INFO L85 PathProgramCache]: Analyzing trace with hash 817204024, now seen corresponding path program 1 times [2023-11-26 12:01:22,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:22,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1422364523] [2023-11-26 12:01:22,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:22,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:22,511 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:01:22,511 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [545570627] [2023-11-26 12:01:22,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:22,512 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:01:22,512 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:22,516 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:01:22,531 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2023-11-26 12:01:22,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:22,833 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:22,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:22,993 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:22,993 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:22,994 INFO L85 PathProgramCache]: Analyzing trace with hash 3331, now seen corresponding path program 1 times [2023-11-26 12:01:22,994 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:22,994 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1042045700] [2023-11-26 12:01:22,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:22,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:22,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:22,998 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:23,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:23,002 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:01:23,003 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:01:23,003 INFO L85 PathProgramCache]: Analyzing trace with hash -645945734, now seen corresponding path program 1 times [2023-11-26 12:01:23,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:01:23,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457136601] [2023-11-26 12:01:23,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:23,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:01:23,026 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:01:23,026 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1501143427] [2023-11-26 12:01:23,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:01:23,026 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:01:23,026 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:01:23,031 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:01:23,061 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7b833705-79c8-4347-9e10-ba72e1016725/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2023-11-26 12:01:23,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:23,487 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:01:23,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:01:23,645 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace