./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-3.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-3.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5577528c45849c92d31dcecadbfe6524610e7683d1e420d37b6f0ce59c6c59b8 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 10:48:45,428 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 10:48:45,552 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 10:48:45,569 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 10:48:45,569 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 10:48:45,629 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 10:48:45,631 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 10:48:45,632 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 10:48:45,633 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 10:48:45,638 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 10:48:45,639 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 10:48:45,639 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 10:48:45,640 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 10:48:45,642 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 10:48:45,643 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 10:48:45,643 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 10:48:45,644 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 10:48:45,644 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 10:48:45,645 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 10:48:45,645 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 10:48:45,646 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 10:48:45,646 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 10:48:45,647 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 10:48:45,647 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 10:48:45,647 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 10:48:45,648 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 10:48:45,648 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 10:48:45,649 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 10:48:45,656 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 10:48:45,656 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 10:48:45,658 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 10:48:45,658 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 10:48:45,658 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 10:48:45,659 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 10:48:45,659 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 10:48:45,659 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 10:48:45,659 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 10:48:45,660 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 10:48:45,660 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5577528c45849c92d31dcecadbfe6524610e7683d1e420d37b6f0ce59c6c59b8 [2023-11-26 10:48:45,995 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 10:48:46,040 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 10:48:46,043 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 10:48:46,045 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 10:48:46,046 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 10:48:46,048 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-3.i [2023-11-26 10:48:49,112 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 10:48:49,528 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 10:48:49,530 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-3.i [2023-11-26 10:48:49,556 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/data/f9014f866/4bc342f9312f4072a5fd87b36830e776/FLAG75d6dd961 [2023-11-26 10:48:49,574 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/data/f9014f866/4bc342f9312f4072a5fd87b36830e776 [2023-11-26 10:48:49,582 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 10:48:49,585 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 10:48:49,589 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 10:48:49,589 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 10:48:49,594 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 10:48:49,595 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:48:49" (1/1) ... [2023-11-26 10:48:49,596 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3c413740 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:49, skipping insertion in model container [2023-11-26 10:48:49,597 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 10:48:49" (1/1) ... [2023-11-26 10:48:49,696 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 10:48:50,618 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 10:48:50,646 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 10:48:50,831 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 10:48:50,868 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-26 10:48:50,876 INFO L206 MainTranslator]: Completed translation [2023-11-26 10:48:50,876 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50 WrapperNode [2023-11-26 10:48:50,876 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 10:48:50,877 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 10:48:50,878 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 10:48:50,878 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 10:48:50,885 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:50,958 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:51,129 INFO L138 Inliner]: procedures = 177, calls = 624, calls flagged for inlining = 11, calls inlined = 38, statements flattened = 3629 [2023-11-26 10:48:51,130 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 10:48:51,132 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 10:48:51,132 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 10:48:51,132 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 10:48:51,143 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:51,144 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:51,167 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:51,515 INFO L175 MemorySlicer]: Split 584 memory accesses to 5 slices as follows [2, 466, 5, 106, 5]. 80 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0, 0, 0]. The 104 writes are split as follows [0, 98, 1, 4, 1]. [2023-11-26 10:48:51,516 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:51,516 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:51,592 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:51,625 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:51,636 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:51,650 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:51,722 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 10:48:51,723 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 10:48:51,723 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 10:48:51,723 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 10:48:51,724 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (1/1) ... [2023-11-26 10:48:51,731 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 10:48:51,775 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:51,801 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 10:48:51,823 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 10:48:51,895 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 10:48:51,895 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 10:48:51,895 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 10:48:51,896 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-26 10:48:51,896 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#4 [2023-11-26 10:48:51,896 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 10:48:51,896 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 10:48:51,897 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 10:48:51,897 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-26 10:48:51,897 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#4 [2023-11-26 10:48:51,897 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 10:48:51,898 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 10:48:51,898 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 10:48:51,898 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-26 10:48:51,900 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#4 [2023-11-26 10:48:51,900 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 10:48:51,900 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 10:48:51,900 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 10:48:51,901 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-26 10:48:51,901 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#4 [2023-11-26 10:48:51,901 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 10:48:51,901 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 10:48:51,901 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 10:48:51,902 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 10:48:51,902 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 10:48:51,903 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-26 10:48:51,903 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#4 [2023-11-26 10:48:51,904 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 10:48:51,904 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-26 10:48:51,904 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 10:48:51,905 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 10:48:51,905 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 10:48:51,905 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-26 10:48:51,906 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#4 [2023-11-26 10:48:51,906 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 10:48:51,907 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 10:48:51,907 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 10:48:51,907 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 10:48:51,907 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-26 10:48:51,907 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#4 [2023-11-26 10:48:51,908 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 10:48:51,908 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 10:48:52,334 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 10:48:52,336 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 10:48:52,340 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:48:52,402 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:48:52,420 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:48:52,437 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:48:52,453 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 10:48:56,164 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 10:48:56,203 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 10:48:56,203 INFO L309 CfgBuilder]: Removed 168 assume(true) statements. [2023-11-26 10:48:56,206 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:48:56 BoogieIcfgContainer [2023-11-26 10:48:56,206 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 10:48:56,207 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 10:48:56,207 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 10:48:56,211 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 10:48:56,212 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:48:56,212 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 10:48:49" (1/3) ... [2023-11-26 10:48:56,214 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@258310b3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:48:56, skipping insertion in model container [2023-11-26 10:48:56,214 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:48:56,215 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 10:48:50" (2/3) ... [2023-11-26 10:48:56,217 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@258310b3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 10:48:56, skipping insertion in model container [2023-11-26 10:48:56,217 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 10:48:56,217 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 10:48:56" (3/3) ... [2023-11-26 10:48:56,218 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_BER_test10-3.i [2023-11-26 10:48:56,340 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 10:48:56,341 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 10:48:56,341 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 10:48:56,341 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 10:48:56,341 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 10:48:56,341 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 10:48:56,341 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 10:48:56,342 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 10:48:56,352 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1033 states, 1025 states have (on average 1.6995121951219512) internal successors, (1742), 1025 states have internal predecessors, (1742), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2023-11-26 10:48:56,429 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 928 [2023-11-26 10:48:56,429 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:56,430 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:56,436 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:56,437 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:56,437 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 10:48:56,440 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1033 states, 1025 states have (on average 1.6995121951219512) internal successors, (1742), 1025 states have internal predecessors, (1742), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2023-11-26 10:48:56,456 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 928 [2023-11-26 10:48:56,456 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:56,456 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:56,457 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:56,457 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:56,466 INFO L748 eck$LassoCheckResult]: Stem: 152#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 953#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~switch34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc55#1.base, main_#t~malloc55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~memset~res58#1.base, main_#t~memset~res58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~malloc64#1.base, main_#t~malloc64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~memset~res71#1.base, main_#t~memset~res71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~nondet85#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~post89#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem94#1, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~short97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~malloc100#1.base, main_#t~malloc100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~memset~res105#1.base, main_#t~memset~res105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem115#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~nondet116#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem127#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~nondet128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~pre131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~post136#1, main_#t~mem140#1, main_#t~mem138#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem139#1, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~post118#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~post152#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~ite162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc208#1.base, main_#t~malloc208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~memset~res211#1.base, main_#t~memset~res211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~malloc217#1.base, main_#t~malloc217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~memset~res224#1.base, main_#t~memset~res224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1, main_#t~post235#1, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~nondet238#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~post242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem247#1, main_#t~mem246#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~short250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~malloc253#1.base, main_#t~malloc253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~memset~res258#1.base, main_#t~memset~res258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem263#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~nondet264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem268#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~nondet269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem280#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1, main_#t~nondet281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1, main_#t~pre284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~post289#1, main_#t~mem293#1, main_#t~mem291#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem292#1, main_#t~mem294#1, main_#t~post295#1, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~post271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem312#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1, main_#t~ite315#1, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~mem324#1, main_#t~mem323#1, main_#t~mem325#1, main_#t~mem326#1, main_#t~mem328#1, main_#t~mem327#1, main_#t~mem329#1, main_#t~mem330#1, main_#t~nondet331#1, main_#t~nondet332#1, main_#t~nondet333#1, main_#t~nondet334#1, main_#t~nondet335#1, main_#t~nondet336#1, main_#t~nondet337#1, main_#t~nondet338#1, main_#t~nondet339#1, main_#t~switch340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_#t~mem345#1, main_#t~mem346#1, main_#t~mem347#1, main_#t~mem348#1, main_#t~mem349#1, main_#t~mem350#1, main_#t~mem351#1, main_#t~nondet352#1, main_#t~nondet353#1, main_#t~nondet354#1, main_#t~nondet355#1, main_#t~nondet356#1, main_#t~nondet357#1, main_#t~nondet358#1, main_#t~nondet359#1, main_#t~nondet360#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1, main_#t~nondet363#1, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem373#1, main_#t~short374#1, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~ret376#1, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem387#1, main_#t~mem386#1, main_#t~mem388#1, main_#t~mem389#1, main_#t~mem391#1, main_#t~mem390#1, main_#t~mem392#1, main_#t~mem393#1, main_#t~nondet394#1, main_#t~nondet395#1, main_#t~nondet396#1, main_#t~nondet397#1, main_#t~nondet398#1, main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~nondet402#1, main_#t~switch403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~mem407#1, main_#t~mem408#1, main_#t~mem409#1, main_#t~mem410#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem413#1, main_#t~mem414#1, main_#t~nondet415#1, main_#t~nondet416#1, main_#t~nondet417#1, main_#t~nondet418#1, main_#t~nondet419#1, main_#t~nondet420#1, main_#t~nondet421#1, main_#t~nondet422#1, main_#t~nondet423#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1, main_#t~nondet426#1, main_#t~mem427#1.base, main_#t~mem427#1.offset, main_#t~mem428#1.base, main_#t~mem428#1.offset, main_#t~mem429#1.base, main_#t~mem429#1.offset, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~mem431#1.base, main_#t~mem431#1.offset, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1, main_#t~mem436#1, main_#t~short437#1, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~ret439#1, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1.base, main_#t~mem442#1.offset, main_#t~mem443#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~mem450#1, main_#t~mem449#1, main_#t~mem451#1, main_#t~mem452#1, main_#t~mem454#1, main_#t~mem453#1, main_#t~mem455#1, main_#t~mem456#1, main_#t~nondet457#1, main_#t~nondet458#1, main_#t~nondet459#1, main_#t~nondet460#1, main_#t~nondet461#1, main_#t~nondet462#1, main_#t~nondet463#1, main_#t~nondet464#1, main_#t~nondet465#1, main_#t~switch466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~mem470#1, main_#t~mem471#1, main_#t~mem472#1, main_#t~mem473#1, main_#t~mem474#1, main_#t~mem475#1, main_#t~mem476#1, main_#t~mem477#1, main_#t~nondet478#1, main_#t~nondet479#1, main_#t~nondet480#1, main_#t~nondet481#1, main_#t~nondet482#1, main_#t~nondet483#1, main_#t~nondet484#1, main_#t~nondet485#1, main_#t~nondet486#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1, main_#t~nondet489#1, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1, main_#t~mem498#1, main_#t~mem499#1, main_#t~short500#1, main_#t~mem501#1.base, main_#t~mem501#1.offset, main_#t~ret502#1, main_#t~mem503#1.base, main_#t~mem503#1.offset, main_#t~mem504#1.base, main_#t~mem504#1.offset, main_#t~mem505#1.base, main_#t~mem505#1.offset, main_#t~mem506#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~mem513#1, main_#t~mem512#1, main_#t~mem514#1, main_#t~mem515#1, main_#t~mem517#1, main_#t~mem516#1, main_#t~mem518#1, main_#t~mem519#1, main_#t~nondet520#1, main_#t~nondet521#1, main_#t~nondet522#1, main_#t~nondet523#1, main_#t~nondet524#1, main_#t~nondet525#1, main_#t~nondet526#1, main_#t~nondet527#1, main_#t~nondet528#1, main_#t~switch529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~mem533#1, main_#t~mem534#1, main_#t~mem535#1, main_#t~mem536#1, main_#t~mem537#1, main_#t~mem538#1, main_#t~mem539#1, main_#t~mem540#1, main_#t~nondet541#1, main_#t~nondet542#1, main_#t~nondet543#1, main_#t~nondet544#1, main_#t~nondet545#1, main_#t~nondet546#1, main_#t~nondet547#1, main_#t~nondet548#1, main_#t~nondet549#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1, main_#t~nondet552#1, main_#t~mem553#1.base, main_#t~mem553#1.offset, main_#t~mem554#1.base, main_#t~mem554#1.offset, main_#t~mem555#1.base, main_#t~mem555#1.offset, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~mem557#1.base, main_#t~mem557#1.offset, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1, main_#t~mem561#1, main_#t~mem562#1, main_#t~short563#1, main_#t~mem564#1.base, main_#t~mem564#1.offset, main_#t~ret565#1, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~mem567#1.base, main_#t~mem567#1.offset, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem570#1, main_#t~ite572#1.base, main_#t~ite572#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1.base, main_#t~mem576#1.offset, main_#t~short577#1, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1.base, main_#t~mem580#1.offset, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1.base, main_#t~mem589#1.offset, main_#t~mem590#1, main_#t~mem591#1.base, main_#t~mem591#1.offset, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1.base, main_#t~mem594#1.offset, main_#t~mem595#1.base, main_#t~mem595#1.offset, main_#t~mem596#1, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem600#1, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1, main_#t~nondet601#1, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_#t~mem604#1, main_#t~post605#1, main_#t~mem606#1.base, main_#t~mem606#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~mem609#1.base, main_#t~mem609#1.offset, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1, main_#t~post616#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1.base, main_#t~mem618#1.offset, main_#t~short619#1, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1.base, main_#t~mem622#1.offset, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1.base, main_#t~mem631#1.offset, main_#t~mem632#1, main_#t~mem633#1.base, main_#t~mem633#1.offset, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1.base, main_#t~mem636#1.offset, main_#t~mem637#1.base, main_#t~mem637#1.offset, main_#t~mem638#1, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem642#1, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1, main_#t~nondet643#1, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_#t~mem646#1, main_#t~post647#1, main_#t~mem648#1.base, main_#t~mem648#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_#t~mem650#1.base, main_#t~mem650#1.offset, main_#t~mem651#1.base, main_#t~mem651#1.offset, main_#t~mem652#1.base, main_#t~mem652#1.offset, main_#t~mem653#1.base, main_#t~mem653#1.offset, main_#t~mem654#1.base, main_#t~mem654#1.offset, main_#t~mem655#1.base, main_#t~mem655#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem656#1.base, main_#t~mem656#1.offset, main_#t~mem657#1, main_#t~post658#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite574#1.base, main_#t~ite574#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 809#L733-4true [2023-11-26 10:48:56,466 INFO L750 eck$LassoCheckResult]: Loop: 809#L733-4true call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2#L733-1true assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 524#L735true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 94#L735-2true call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 963#L740true assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 227#L743-268true assume !true; 57#L733-3true call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 809#L733-4true [2023-11-26 10:48:56,473 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:56,474 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 1 times [2023-11-26 10:48:56,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:56,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788438916] [2023-11-26 10:48:56,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:56,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:56,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:56,644 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:56,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:56,753 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:56,757 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:56,757 INFO L85 PathProgramCache]: Analyzing trace with hash 1421240857, now seen corresponding path program 1 times [2023-11-26 10:48:56,757 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:56,758 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2123153038] [2023-11-26 10:48:56,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:56,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:56,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:56,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:56,842 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2123153038] [2023-11-26 10:48:56,843 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-26 10:48:56,843 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2147293143] [2023-11-26 10:48:56,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:56,844 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:48:56,844 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:56,848 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:48:56,858 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-26 10:48:57,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:57,123 INFO L262 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-26 10:48:57,124 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:57,142 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:57,142 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:48:57,143 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2147293143] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:57,143 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:57,143 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 10:48:57,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1645362599] [2023-11-26 10:48:57,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:57,148 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:57,148 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:57,175 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 10:48:57,176 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 10:48:57,180 INFO L87 Difference]: Start difference. First operand has 1033 states, 1025 states have (on average 1.6995121951219512) internal successors, (1742), 1025 states have internal predecessors, (1742), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:57,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:57,250 INFO L93 Difference]: Finished difference Result 1017 states and 1531 transitions. [2023-11-26 10:48:57,251 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1017 states and 1531 transitions. [2023-11-26 10:48:57,265 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 592 [2023-11-26 10:48:57,287 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1017 states to 997 states and 1511 transitions. [2023-11-26 10:48:57,288 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 997 [2023-11-26 10:48:57,292 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 997 [2023-11-26 10:48:57,293 INFO L73 IsDeterministic]: Start isDeterministic. Operand 997 states and 1511 transitions. [2023-11-26 10:48:57,308 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:57,308 INFO L218 hiAutomatonCegarLoop]: Abstraction has 997 states and 1511 transitions. [2023-11-26 10:48:57,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 997 states and 1511 transitions. [2023-11-26 10:48:57,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 997 to 997. [2023-11-26 10:48:57,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 997 states, 990 states have (on average 1.5141414141414142) internal successors, (1499), 989 states have internal predecessors, (1499), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2023-11-26 10:48:57,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 997 states to 997 states and 1511 transitions. [2023-11-26 10:48:57,397 INFO L240 hiAutomatonCegarLoop]: Abstraction has 997 states and 1511 transitions. [2023-11-26 10:48:57,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 10:48:57,402 INFO L428 stractBuchiCegarLoop]: Abstraction has 997 states and 1511 transitions. [2023-11-26 10:48:57,402 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 10:48:57,402 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 997 states and 1511 transitions. [2023-11-26 10:48:57,409 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 592 [2023-11-26 10:48:57,409 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:57,409 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:57,411 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:57,411 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:57,411 INFO L748 eck$LassoCheckResult]: Stem: 2366#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 2367#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~switch34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc55#1.base, main_#t~malloc55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~memset~res58#1.base, main_#t~memset~res58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~malloc64#1.base, main_#t~malloc64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~memset~res71#1.base, main_#t~memset~res71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~nondet85#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~post89#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem94#1, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~short97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~malloc100#1.base, main_#t~malloc100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~memset~res105#1.base, main_#t~memset~res105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem115#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~nondet116#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem127#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~nondet128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~pre131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~post136#1, main_#t~mem140#1, main_#t~mem138#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem139#1, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~post118#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~post152#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~ite162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc208#1.base, main_#t~malloc208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~memset~res211#1.base, main_#t~memset~res211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~malloc217#1.base, main_#t~malloc217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~memset~res224#1.base, main_#t~memset~res224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1, main_#t~post235#1, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~nondet238#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~post242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem247#1, main_#t~mem246#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~short250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~malloc253#1.base, main_#t~malloc253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~memset~res258#1.base, main_#t~memset~res258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem263#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~nondet264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem268#1, 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main_#t~mem617#1.offset, main_#t~mem618#1.base, main_#t~mem618#1.offset, main_#t~short619#1, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1.base, main_#t~mem622#1.offset, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1.base, main_#t~mem631#1.offset, main_#t~mem632#1, main_#t~mem633#1.base, main_#t~mem633#1.offset, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1.base, main_#t~mem636#1.offset, main_#t~mem637#1.base, main_#t~mem637#1.offset, main_#t~mem638#1, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem642#1, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1, main_#t~nondet643#1, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_#t~mem646#1, main_#t~post647#1, main_#t~mem648#1.base, main_#t~mem648#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_#t~mem650#1.base, main_#t~mem650#1.offset, main_#t~mem651#1.base, main_#t~mem651#1.offset, main_#t~mem652#1.base, main_#t~mem652#1.offset, main_#t~mem653#1.base, main_#t~mem653#1.offset, main_#t~mem654#1.base, main_#t~mem654#1.offset, main_#t~mem655#1.base, main_#t~mem655#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem656#1.base, main_#t~mem656#1.offset, main_#t~mem657#1, main_#t~post658#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite574#1.base, main_#t~ite574#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2190#L733-4 [2023-11-26 10:48:57,414 INFO L750 eck$LassoCheckResult]: Loop: 2190#L733-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2076#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 2078#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2258#L735-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2259#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 2490#L743-268 havoc main_~_ha_hashv~1#1; 2491#L743-175 goto; 2321#L743-173 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 2154#L743-70 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 2482#L743-71 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch187#1 := 11 == main_~_hj_k~1#1; 2978#L743-72 assume main_#t~switch187#1;call main_#t~mem188#1 := read~int#1(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem188#1 % 256 % 4294967296);havoc main_#t~mem188#1; 2329#L743-74 main_#t~switch187#1 := main_#t~switch187#1 || 10 == main_~_hj_k~1#1; 2330#L743-75 assume main_#t~switch187#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem189#1 % 256 % 4294967296);havoc main_#t~mem189#1; 2945#L743-77 main_#t~switch187#1 := main_#t~switch187#1 || 9 == main_~_hj_k~1#1; 2970#L743-78 assume main_#t~switch187#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem190#1 % 256 % 4294967296);havoc main_#t~mem190#1; 2354#L743-80 main_#t~switch187#1 := main_#t~switch187#1 || 8 == main_~_hj_k~1#1; 2355#L743-81 assume main_#t~switch187#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem191#1 % 256 % 4294967296);havoc main_#t~mem191#1; 2691#L743-83 main_#t~switch187#1 := main_#t~switch187#1 || 7 == main_~_hj_k~1#1; 2692#L743-84 assume !main_#t~switch187#1; 3069#L743-86 main_#t~switch187#1 := main_#t~switch187#1 || 6 == main_~_hj_k~1#1; 3070#L743-87 assume main_#t~switch187#1;call main_#t~mem193#1 := read~int#1(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem193#1 % 256 % 4294967296);havoc main_#t~mem193#1; 2714#L743-89 main_#t~switch187#1 := main_#t~switch187#1 || 5 == main_~_hj_k~1#1; 2385#L743-90 assume main_#t~switch187#1;call main_#t~mem194#1 := read~int#1(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + (if main_#t~mem194#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem194#1 % 256 % 4294967296 else main_#t~mem194#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem194#1; 2386#L743-92 main_#t~switch187#1 := main_#t~switch187#1 || 4 == main_~_hj_k~1#1; 2662#L743-93 assume main_#t~switch187#1;call main_#t~mem195#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem195#1 % 256 % 4294967296);havoc main_#t~mem195#1; 2663#L743-95 main_#t~switch187#1 := main_#t~switch187#1 || 3 == main_~_hj_k~1#1; 2234#L743-96 assume main_#t~switch187#1;call main_#t~mem196#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem196#1 % 256 % 4294967296);havoc main_#t~mem196#1; 2235#L743-98 main_#t~switch187#1 := main_#t~switch187#1 || 2 == main_~_hj_k~1#1; 3067#L743-99 assume main_#t~switch187#1;call main_#t~mem197#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem197#1 % 256 % 4294967296);havoc main_#t~mem197#1; 2861#L743-101 main_#t~switch187#1 := main_#t~switch187#1 || 1 == main_~_hj_k~1#1; 2862#L743-102 assume main_#t~switch187#1;call main_#t~mem198#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem198#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem198#1 % 256 % 4294967296 else main_#t~mem198#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem198#1; 2629#L743-104 havoc main_#t~switch187#1; 2402#L743-170 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 2403#L743-106 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192; 2614#L743-112 main_~_hj_i~1#1 := main_#t~nondet199#1;havoc main_#t~nondet199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 2615#L743-113 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet200#1 := 256 * (main_~_hj_i~1#1 % 4294967296); 2669#L743-119 main_~_hj_j~1#1 := main_#t~nondet200#1;havoc main_#t~nondet200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 2920#L743-120 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet201#1 := main_~_hj_j~1#1 % 4294967296 / 8192; 2975#L743-126 main_~_ha_hashv~1#1 := main_#t~nondet201#1;havoc main_#t~nondet201#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 3041#L743-127 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet202#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096; 2338#L743-133 main_~_hj_i~1#1 := main_#t~nondet202#1;havoc main_#t~nondet202#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 2339#L743-134 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet203#1 := 65536 * (main_~_hj_i~1#1 % 4294967296); 2270#L743-140 main_~_hj_j~1#1 := main_#t~nondet203#1;havoc main_#t~nondet203#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 2347#L743-141 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet204#1 := main_~_hj_j~1#1 % 4294967296 / 32; 2348#L743-147 main_~_ha_hashv~1#1 := main_#t~nondet204#1;havoc main_#t~nondet204#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 2884#L743-148 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet205#1 := main_~_ha_hashv~1#1 % 4294967296 / 8; 2115#L743-154 main_~_hj_i~1#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 2116#L743-155 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet206#1 := 1024 * (main_~_hj_i~1#1 % 4294967296); 2305#L743-161 main_~_hj_j~1#1 := main_#t~nondet206#1;havoc main_#t~nondet206#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 2652#L743-162 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet207#1 := main_~_hj_j~1#1 % 4294967296 / 32768; 2653#L743-168 main_~_ha_hashv~1#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 2382#L743-169 goto; 2383#L743-171 havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset; 2306#L743-172 goto; 2307#L743-174 goto; 2585#L743-265 call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 2645#L743-177 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem225#1.base, main_#t~mem225#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem225#1.base, main_#t~mem225#1.offset; 2295#L743-193 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1 := read~int#1(main_#t~mem228#1.base, 20 + main_#t~mem228#1.offset, 4);call write~$Pointer$#1(main_#t~mem227#1.base, main_#t~mem227#1.offset - main_#t~mem229#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1.base, main_#t~mem231#1.offset := read~$Pointer$#1(main_#t~mem230#1.base, 16 + main_#t~mem230#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem231#1.base, 8 + main_#t~mem231#1.offset, 4);havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1.base, main_#t~mem231#1.offset;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem232#1.base, 16 + main_#t~mem232#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset; 2296#L743-192 goto; 2703#L743-263 havoc main_~_ha_bkt~1#1;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1 := read~int#1(main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);main_#t~post235#1 := main_#t~mem234#1;call write~int#1(1 + main_#t~post235#1, main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1;havoc main_#t~post235#1; 3012#L743-202 call main_#t~mem236#1.base, main_#t~mem236#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem237#1 := read~int#1(main_#t~mem236#1.base, 4 + main_#t~mem236#1.offset, 4); 2763#L743-196 assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem237#1 - 1) % 4294967296;main_#t~nondet238#1 := 0; 2764#L743-200 main_~_ha_bkt~1#1 := main_#t~nondet238#1;havoc main_#t~mem236#1.base, main_#t~mem236#1.offset;havoc main_#t~mem237#1;havoc main_#t~nondet238#1; 2786#L743-201 goto; 2562#L743-260 call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem240#1.base, main_#t~mem240#1.offset := read~$Pointer$#1(main_#t~mem239#1.base, main_#t~mem239#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem240#1.base, main_#t~mem240#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;havoc main_#t~mem240#1.base, main_#t~mem240#1.offset;call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post242#1 := main_#t~mem241#1;call write~int#1(1 + main_#t~post242#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem241#1;havoc main_#t~post242#1;call main_#t~mem243#1.base, main_#t~mem243#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem243#1.base, main_#t~mem243#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem243#1.base, main_#t~mem243#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem244#1.base, main_#t~mem244#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 2563#L743-204 assume main_#t~mem244#1.base != 0 || main_#t~mem244#1.offset != 0;havoc main_#t~mem244#1.base, main_#t~mem244#1.offset;call main_#t~mem245#1.base, main_#t~mem245#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem245#1.base, 12 + main_#t~mem245#1.offset, 4);havoc main_#t~mem245#1.base, main_#t~mem245#1.offset; 2742#L743-206 call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem247#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem246#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short250#1 := main_#t~mem247#1 % 4294967296 >= 10 * (1 + main_#t~mem246#1) % 4294967296; 2859#L743-207 assume main_#t~short250#1;call main_#t~mem248#1.base, main_#t~mem248#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem249#1 := read~int#1(main_#t~mem248#1.base, 36 + main_#t~mem248#1.offset, 4);main_#t~short250#1 := 0 == main_#t~mem249#1 % 4294967296; 3055#L743-209 assume !main_#t~short250#1;havoc main_#t~mem247#1;havoc main_#t~mem246#1;havoc main_#t~mem248#1.base, main_#t~mem248#1.offset;havoc main_#t~mem249#1;havoc main_#t~short250#1; 2675#L743-258 havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset; 2549#L743-259 goto; 2550#L743-261 havoc main_~_ha_bkt~1#1; 2570#L743-262 goto; 2949#L743-264 goto; 2950#L743-266 havoc main_~_ha_hashv~1#1; 3033#L743-267 goto; 2189#L733-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 2190#L733-4 [2023-11-26 10:48:57,414 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:57,415 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 2 times [2023-11-26 10:48:57,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:57,415 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1539551940] [2023-11-26 10:48:57,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:57,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:57,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:57,448 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:57,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:57,502 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:57,502 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:57,502 INFO L85 PathProgramCache]: Analyzing trace with hash -1854459258, now seen corresponding path program 1 times [2023-11-26 10:48:57,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:57,503 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1327733770] [2023-11-26 10:48:57,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:57,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:57,581 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:48:57,582 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [154178328] [2023-11-26 10:48:57,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:57,582 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:48:57,582 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:57,613 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:48:57,639 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-26 10:48:58,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:58,068 INFO L262 TraceCheckSpWp]: Trace formula consists of 548 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 10:48:58,072 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:58,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:58,112 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:48:58,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:58,113 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1327733770] [2023-11-26 10:48:58,113 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:48:58,113 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [154178328] [2023-11-26 10:48:58,114 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [154178328] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:58,114 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:58,114 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 10:48:58,114 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2109380169] [2023-11-26 10:48:58,114 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:58,115 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:58,115 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:58,116 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 10:48:58,116 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 10:48:58,116 INFO L87 Difference]: Start difference. First operand 997 states and 1511 transitions. cyclomatic complexity: 525 Second operand has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:58,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:58,246 INFO L93 Difference]: Finished difference Result 1018 states and 1532 transitions. [2023-11-26 10:48:58,246 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1018 states and 1532 transitions. [2023-11-26 10:48:58,256 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 613 [2023-11-26 10:48:58,269 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1018 states to 1018 states and 1532 transitions. [2023-11-26 10:48:58,269 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1018 [2023-11-26 10:48:58,272 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1018 [2023-11-26 10:48:58,272 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1018 states and 1532 transitions. [2023-11-26 10:48:58,274 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:58,274 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1018 states and 1532 transitions. [2023-11-26 10:48:58,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1018 states and 1532 transitions. [2023-11-26 10:48:58,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1018 to 1017. [2023-11-26 10:48:58,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1017 states, 1010 states have (on average 1.503960396039604) internal successors, (1519), 1009 states have internal predecessors, (1519), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2023-11-26 10:48:58,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1017 states to 1017 states and 1531 transitions. [2023-11-26 10:48:58,316 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1017 states and 1531 transitions. [2023-11-26 10:48:58,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 10:48:58,317 INFO L428 stractBuchiCegarLoop]: Abstraction has 1017 states and 1531 transitions. [2023-11-26 10:48:58,317 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 10:48:58,317 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1017 states and 1531 transitions. [2023-11-26 10:48:58,323 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 612 [2023-11-26 10:48:58,324 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:58,324 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:58,327 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:58,327 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:58,328 INFO L748 eck$LassoCheckResult]: Stem: 4615#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 4616#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~switch34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc55#1.base, main_#t~malloc55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~memset~res58#1.base, main_#t~memset~res58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~malloc64#1.base, main_#t~malloc64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~memset~res71#1.base, main_#t~memset~res71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~nondet85#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~post89#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem94#1, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~short97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~malloc100#1.base, main_#t~malloc100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~memset~res105#1.base, main_#t~memset~res105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem115#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~nondet116#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem127#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~nondet128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~pre131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~post136#1, main_#t~mem140#1, main_#t~mem138#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem139#1, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~post118#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~post152#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem159#1, 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main_#t~mem498#1, main_#t~mem499#1, main_#t~short500#1, main_#t~mem501#1.base, main_#t~mem501#1.offset, main_#t~ret502#1, main_#t~mem503#1.base, main_#t~mem503#1.offset, main_#t~mem504#1.base, main_#t~mem504#1.offset, main_#t~mem505#1.base, main_#t~mem505#1.offset, main_#t~mem506#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~mem513#1, main_#t~mem512#1, main_#t~mem514#1, main_#t~mem515#1, main_#t~mem517#1, main_#t~mem516#1, main_#t~mem518#1, main_#t~mem519#1, main_#t~nondet520#1, main_#t~nondet521#1, main_#t~nondet522#1, main_#t~nondet523#1, main_#t~nondet524#1, main_#t~nondet525#1, main_#t~nondet526#1, main_#t~nondet527#1, main_#t~nondet528#1, main_#t~switch529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~mem533#1, main_#t~mem534#1, main_#t~mem535#1, main_#t~mem536#1, main_#t~mem537#1, main_#t~mem538#1, main_#t~mem539#1, main_#t~mem540#1, main_#t~nondet541#1, main_#t~nondet542#1, main_#t~nondet543#1, main_#t~nondet544#1, main_#t~nondet545#1, main_#t~nondet546#1, main_#t~nondet547#1, main_#t~nondet548#1, main_#t~nondet549#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1, main_#t~nondet552#1, main_#t~mem553#1.base, main_#t~mem553#1.offset, main_#t~mem554#1.base, main_#t~mem554#1.offset, main_#t~mem555#1.base, main_#t~mem555#1.offset, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~mem557#1.base, main_#t~mem557#1.offset, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1, main_#t~mem561#1, main_#t~mem562#1, main_#t~short563#1, main_#t~mem564#1.base, main_#t~mem564#1.offset, main_#t~ret565#1, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~mem567#1.base, main_#t~mem567#1.offset, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem570#1, main_#t~ite572#1.base, main_#t~ite572#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1.base, main_#t~mem576#1.offset, main_#t~short577#1, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1.base, main_#t~mem580#1.offset, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1.base, main_#t~mem589#1.offset, main_#t~mem590#1, main_#t~mem591#1.base, main_#t~mem591#1.offset, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1.base, main_#t~mem594#1.offset, main_#t~mem595#1.base, main_#t~mem595#1.offset, main_#t~mem596#1, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem600#1, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1, main_#t~nondet601#1, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_#t~mem604#1, main_#t~post605#1, main_#t~mem606#1.base, main_#t~mem606#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~mem609#1.base, main_#t~mem609#1.offset, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1, main_#t~post616#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1.base, main_#t~mem618#1.offset, main_#t~short619#1, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1.base, main_#t~mem622#1.offset, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1.base, main_#t~mem631#1.offset, main_#t~mem632#1, main_#t~mem633#1.base, main_#t~mem633#1.offset, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1.base, main_#t~mem636#1.offset, main_#t~mem637#1.base, main_#t~mem637#1.offset, main_#t~mem638#1, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem642#1, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1, main_#t~nondet643#1, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_#t~mem646#1, main_#t~post647#1, main_#t~mem648#1.base, main_#t~mem648#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_#t~mem650#1.base, main_#t~mem650#1.offset, main_#t~mem651#1.base, main_#t~mem651#1.offset, main_#t~mem652#1.base, main_#t~mem652#1.offset, main_#t~mem653#1.base, main_#t~mem653#1.offset, main_#t~mem654#1.base, main_#t~mem654#1.offset, main_#t~mem655#1.base, main_#t~mem655#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem656#1.base, main_#t~mem656#1.offset, main_#t~mem657#1, main_#t~post658#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite574#1.base, main_#t~ite574#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4439#L733-4 [2023-11-26 10:48:58,328 INFO L750 eck$LassoCheckResult]: Loop: 4439#L733-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4325#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 4327#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4507#L735-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4508#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 4742#L743-268 havoc main_~_ha_hashv~1#1; 4743#L743-175 goto; 4570#L743-173 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 4403#L743-70 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 4731#L743-71 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch187#1 := 11 == main_~_hj_k~1#1; 5227#L743-72 assume main_#t~switch187#1;call main_#t~mem188#1 := read~int#1(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem188#1 % 256 % 4294967296);havoc main_#t~mem188#1; 4578#L743-74 main_#t~switch187#1 := main_#t~switch187#1 || 10 == main_~_hj_k~1#1; 4579#L743-75 assume main_#t~switch187#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem189#1 % 256 % 4294967296);havoc main_#t~mem189#1; 5194#L743-77 main_#t~switch187#1 := main_#t~switch187#1 || 9 == main_~_hj_k~1#1; 5219#L743-78 assume main_#t~switch187#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem190#1 % 256 % 4294967296);havoc main_#t~mem190#1; 4603#L743-80 main_#t~switch187#1 := main_#t~switch187#1 || 8 == main_~_hj_k~1#1; 4604#L743-81 assume main_#t~switch187#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem191#1 % 256 % 4294967296);havoc main_#t~mem191#1; 4940#L743-83 main_#t~switch187#1 := main_#t~switch187#1 || 7 == main_~_hj_k~1#1; 4941#L743-84 assume main_#t~switch187#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem192#1 % 256 % 4294967296);havoc main_#t~mem192#1; 5323#L743-86 main_#t~switch187#1 := main_#t~switch187#1 || 6 == main_~_hj_k~1#1; 5322#L743-87 assume main_#t~switch187#1;call main_#t~mem193#1 := read~int#1(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem193#1 % 256 % 4294967296);havoc main_#t~mem193#1; 4963#L743-89 main_#t~switch187#1 := main_#t~switch187#1 || 5 == main_~_hj_k~1#1; 4634#L743-90 assume main_#t~switch187#1;call main_#t~mem194#1 := read~int#1(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + (if main_#t~mem194#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem194#1 % 256 % 4294967296 else main_#t~mem194#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem194#1; 4635#L743-92 main_#t~switch187#1 := main_#t~switch187#1 || 4 == main_~_hj_k~1#1; 4911#L743-93 assume main_#t~switch187#1;call main_#t~mem195#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem195#1 % 256 % 4294967296);havoc main_#t~mem195#1; 4912#L743-95 main_#t~switch187#1 := main_#t~switch187#1 || 3 == main_~_hj_k~1#1; 4485#L743-96 assume main_#t~switch187#1;call main_#t~mem196#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem196#1 % 256 % 4294967296);havoc main_#t~mem196#1; 4486#L743-98 main_#t~switch187#1 := main_#t~switch187#1 || 2 == main_~_hj_k~1#1; 5317#L743-99 assume main_#t~switch187#1;call main_#t~mem197#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem197#1 % 256 % 4294967296);havoc main_#t~mem197#1; 5110#L743-101 main_#t~switch187#1 := main_#t~switch187#1 || 1 == main_~_hj_k~1#1; 5111#L743-102 assume main_#t~switch187#1;call main_#t~mem198#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem198#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem198#1 % 256 % 4294967296 else main_#t~mem198#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem198#1; 4878#L743-104 havoc main_#t~switch187#1; 4651#L743-170 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 4652#L743-106 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192; 4863#L743-112 main_~_hj_i~1#1 := main_#t~nondet199#1;havoc main_#t~nondet199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 4864#L743-113 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet200#1 := 256 * (main_~_hj_i~1#1 % 4294967296); 4918#L743-119 main_~_hj_j~1#1 := main_#t~nondet200#1;havoc main_#t~nondet200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 5169#L743-120 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet201#1 := main_~_hj_j~1#1 % 4294967296 / 8192; 5224#L743-126 main_~_ha_hashv~1#1 := main_#t~nondet201#1;havoc main_#t~nondet201#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 5292#L743-127 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet202#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096; 4587#L743-133 main_~_hj_i~1#1 := main_#t~nondet202#1;havoc main_#t~nondet202#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 4588#L743-134 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet203#1 := 65536 * (main_~_hj_i~1#1 % 4294967296); 4519#L743-140 main_~_hj_j~1#1 := main_#t~nondet203#1;havoc main_#t~nondet203#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 4596#L743-141 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet204#1 := main_~_hj_j~1#1 % 4294967296 / 32; 4597#L743-147 main_~_ha_hashv~1#1 := main_#t~nondet204#1;havoc main_#t~nondet204#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 5133#L743-148 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet205#1 := main_~_ha_hashv~1#1 % 4294967296 / 8; 4366#L743-154 main_~_hj_i~1#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 4367#L743-155 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet206#1 := 1024 * (main_~_hj_i~1#1 % 4294967296); 4557#L743-161 main_~_hj_j~1#1 := main_#t~nondet206#1;havoc main_#t~nondet206#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 4901#L743-162 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet207#1 := main_~_hj_j~1#1 % 4294967296 / 32768; 4902#L743-168 main_~_ha_hashv~1#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 4631#L743-169 goto; 4632#L743-171 havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset; 4558#L743-172 goto; 4559#L743-174 goto; 4836#L743-265 call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 4894#L743-177 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem225#1.base, main_#t~mem225#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem225#1.base, main_#t~mem225#1.offset; 4544#L743-193 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1 := read~int#1(main_#t~mem228#1.base, 20 + main_#t~mem228#1.offset, 4);call write~$Pointer$#1(main_#t~mem227#1.base, main_#t~mem227#1.offset - main_#t~mem229#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1.base, main_#t~mem231#1.offset := read~$Pointer$#1(main_#t~mem230#1.base, 16 + main_#t~mem230#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem231#1.base, 8 + main_#t~mem231#1.offset, 4);havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1.base, main_#t~mem231#1.offset;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem232#1.base, 16 + main_#t~mem232#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset; 4545#L743-192 goto; 4945#L743-263 havoc main_~_ha_bkt~1#1;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1 := read~int#1(main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);main_#t~post235#1 := main_#t~mem234#1;call write~int#1(1 + main_#t~post235#1, main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1;havoc main_#t~post235#1; 5262#L743-202 call main_#t~mem236#1.base, main_#t~mem236#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem237#1 := read~int#1(main_#t~mem236#1.base, 4 + main_#t~mem236#1.offset, 4); 5012#L743-196 assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem237#1 - 1) % 4294967296;main_#t~nondet238#1 := 0; 5013#L743-200 main_~_ha_bkt~1#1 := main_#t~nondet238#1;havoc main_#t~mem236#1.base, main_#t~mem236#1.offset;havoc main_#t~mem237#1;havoc main_#t~nondet238#1; 5035#L743-201 goto; 4811#L743-260 call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem240#1.base, main_#t~mem240#1.offset := read~$Pointer$#1(main_#t~mem239#1.base, main_#t~mem239#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem240#1.base, main_#t~mem240#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;havoc main_#t~mem240#1.base, main_#t~mem240#1.offset;call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post242#1 := main_#t~mem241#1;call write~int#1(1 + main_#t~post242#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem241#1;havoc main_#t~post242#1;call main_#t~mem243#1.base, main_#t~mem243#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem243#1.base, main_#t~mem243#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem243#1.base, main_#t~mem243#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem244#1.base, main_#t~mem244#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 4812#L743-204 assume main_#t~mem244#1.base != 0 || main_#t~mem244#1.offset != 0;havoc main_#t~mem244#1.base, main_#t~mem244#1.offset;call main_#t~mem245#1.base, main_#t~mem245#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem245#1.base, 12 + main_#t~mem245#1.offset, 4);havoc main_#t~mem245#1.base, main_#t~mem245#1.offset; 4991#L743-206 call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem247#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem246#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short250#1 := main_#t~mem247#1 % 4294967296 >= 10 * (1 + main_#t~mem246#1) % 4294967296; 5108#L743-207 assume main_#t~short250#1;call main_#t~mem248#1.base, main_#t~mem248#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem249#1 := read~int#1(main_#t~mem248#1.base, 36 + main_#t~mem248#1.offset, 4);main_#t~short250#1 := 0 == main_#t~mem249#1 % 4294967296; 5305#L743-209 assume !main_#t~short250#1;havoc main_#t~mem247#1;havoc main_#t~mem246#1;havoc main_#t~mem248#1.base, main_#t~mem248#1.offset;havoc main_#t~mem249#1;havoc main_#t~short250#1; 4924#L743-258 havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset; 4798#L743-259 goto; 4799#L743-261 havoc main_~_ha_bkt~1#1; 4820#L743-262 goto; 5198#L743-264 goto; 5199#L743-266 havoc main_~_ha_hashv~1#1; 5283#L743-267 goto; 4438#L733-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 4439#L733-4 [2023-11-26 10:48:58,329 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:58,330 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 3 times [2023-11-26 10:48:58,330 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:58,330 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335978268] [2023-11-26 10:48:58,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:58,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:58,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:58,372 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:58,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:58,415 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:58,416 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:58,416 INFO L85 PathProgramCache]: Analyzing trace with hash 1879808260, now seen corresponding path program 1 times [2023-11-26 10:48:58,417 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:58,417 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [115218963] [2023-11-26 10:48:58,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:58,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:58,485 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:48:58,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1261942862] [2023-11-26 10:48:58,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:58,486 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:48:58,486 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:58,489 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:48:58,510 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-26 10:48:58,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:48:59,001 INFO L262 TraceCheckSpWp]: Trace formula consists of 554 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 10:48:59,005 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:48:59,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:48:59,055 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:48:59,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:48:59,056 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [115218963] [2023-11-26 10:48:59,056 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:48:59,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1261942862] [2023-11-26 10:48:59,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1261942862] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:48:59,057 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:48:59,057 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 10:48:59,058 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [881035174] [2023-11-26 10:48:59,058 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:48:59,058 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:48:59,059 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:48:59,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 10:48:59,060 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 10:48:59,061 INFO L87 Difference]: Start difference. First operand 1017 states and 1531 transitions. cyclomatic complexity: 525 Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:48:59,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:48:59,311 INFO L93 Difference]: Finished difference Result 1004 states and 1511 transitions. [2023-11-26 10:48:59,311 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1004 states and 1511 transitions. [2023-11-26 10:48:59,322 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 599 [2023-11-26 10:48:59,334 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1004 states to 1004 states and 1511 transitions. [2023-11-26 10:48:59,335 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1004 [2023-11-26 10:48:59,337 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1004 [2023-11-26 10:48:59,337 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1004 states and 1511 transitions. [2023-11-26 10:48:59,340 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:48:59,340 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1004 states and 1511 transitions. [2023-11-26 10:48:59,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1004 states and 1511 transitions. [2023-11-26 10:48:59,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1004 to 1003. [2023-11-26 10:48:59,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1003 states, 996 states have (on average 1.5040160642570282) internal successors, (1498), 995 states have internal predecessors, (1498), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2023-11-26 10:48:59,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1003 states to 1003 states and 1510 transitions. [2023-11-26 10:48:59,374 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1003 states and 1510 transitions. [2023-11-26 10:48:59,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 10:48:59,380 INFO L428 stractBuchiCegarLoop]: Abstraction has 1003 states and 1510 transitions. [2023-11-26 10:48:59,380 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 10:48:59,380 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1003 states and 1510 transitions. [2023-11-26 10:48:59,388 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 598 [2023-11-26 10:48:59,388 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:48:59,390 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:48:59,391 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:48:59,391 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:48:59,397 INFO L748 eck$LassoCheckResult]: Stem: 6873#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 6874#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~switch34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc55#1.base, main_#t~malloc55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~memset~res58#1.base, main_#t~memset~res58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~malloc64#1.base, main_#t~malloc64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~memset~res71#1.base, main_#t~memset~res71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~nondet85#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~post89#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem94#1, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~short97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~malloc100#1.base, main_#t~malloc100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~memset~res105#1.base, main_#t~memset~res105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem115#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~nondet116#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem127#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~nondet128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~pre131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~post136#1, main_#t~mem140#1, main_#t~mem138#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem139#1, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~post118#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~post152#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~ite162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc208#1.base, main_#t~malloc208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~memset~res211#1.base, main_#t~memset~res211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~malloc217#1.base, main_#t~malloc217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~memset~res224#1.base, main_#t~memset~res224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1, main_#t~post235#1, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~nondet238#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~post242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem247#1, main_#t~mem246#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~short250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~malloc253#1.base, main_#t~malloc253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~memset~res258#1.base, main_#t~memset~res258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem263#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~nondet264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem268#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~nondet269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem280#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1, main_#t~nondet281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1, main_#t~pre284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~post289#1, main_#t~mem293#1, main_#t~mem291#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem292#1, main_#t~mem294#1, main_#t~post295#1, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~post271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem312#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1, main_#t~ite315#1, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~mem324#1, main_#t~mem323#1, main_#t~mem325#1, main_#t~mem326#1, main_#t~mem328#1, main_#t~mem327#1, main_#t~mem329#1, main_#t~mem330#1, main_#t~nondet331#1, main_#t~nondet332#1, main_#t~nondet333#1, main_#t~nondet334#1, main_#t~nondet335#1, main_#t~nondet336#1, main_#t~nondet337#1, main_#t~nondet338#1, main_#t~nondet339#1, main_#t~switch340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_#t~mem345#1, main_#t~mem346#1, main_#t~mem347#1, main_#t~mem348#1, main_#t~mem349#1, main_#t~mem350#1, main_#t~mem351#1, main_#t~nondet352#1, main_#t~nondet353#1, main_#t~nondet354#1, main_#t~nondet355#1, main_#t~nondet356#1, main_#t~nondet357#1, main_#t~nondet358#1, main_#t~nondet359#1, main_#t~nondet360#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1, main_#t~nondet363#1, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem373#1, main_#t~short374#1, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~ret376#1, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem387#1, main_#t~mem386#1, main_#t~mem388#1, main_#t~mem389#1, main_#t~mem391#1, main_#t~mem390#1, main_#t~mem392#1, main_#t~mem393#1, main_#t~nondet394#1, main_#t~nondet395#1, main_#t~nondet396#1, main_#t~nondet397#1, main_#t~nondet398#1, main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~nondet402#1, main_#t~switch403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~mem407#1, main_#t~mem408#1, main_#t~mem409#1, main_#t~mem410#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem413#1, main_#t~mem414#1, main_#t~nondet415#1, main_#t~nondet416#1, main_#t~nondet417#1, main_#t~nondet418#1, main_#t~nondet419#1, main_#t~nondet420#1, main_#t~nondet421#1, main_#t~nondet422#1, main_#t~nondet423#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1, main_#t~nondet426#1, main_#t~mem427#1.base, main_#t~mem427#1.offset, main_#t~mem428#1.base, main_#t~mem428#1.offset, main_#t~mem429#1.base, main_#t~mem429#1.offset, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~mem431#1.base, main_#t~mem431#1.offset, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1, main_#t~mem436#1, main_#t~short437#1, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~ret439#1, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1.base, main_#t~mem442#1.offset, main_#t~mem443#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~mem450#1, main_#t~mem449#1, main_#t~mem451#1, main_#t~mem452#1, main_#t~mem454#1, main_#t~mem453#1, main_#t~mem455#1, main_#t~mem456#1, main_#t~nondet457#1, main_#t~nondet458#1, main_#t~nondet459#1, main_#t~nondet460#1, main_#t~nondet461#1, main_#t~nondet462#1, main_#t~nondet463#1, main_#t~nondet464#1, main_#t~nondet465#1, main_#t~switch466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~mem470#1, main_#t~mem471#1, main_#t~mem472#1, main_#t~mem473#1, main_#t~mem474#1, main_#t~mem475#1, main_#t~mem476#1, main_#t~mem477#1, main_#t~nondet478#1, main_#t~nondet479#1, main_#t~nondet480#1, main_#t~nondet481#1, main_#t~nondet482#1, main_#t~nondet483#1, main_#t~nondet484#1, main_#t~nondet485#1, main_#t~nondet486#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1, main_#t~nondet489#1, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1, main_#t~mem498#1, main_#t~mem499#1, main_#t~short500#1, main_#t~mem501#1.base, main_#t~mem501#1.offset, main_#t~ret502#1, main_#t~mem503#1.base, main_#t~mem503#1.offset, main_#t~mem504#1.base, main_#t~mem504#1.offset, main_#t~mem505#1.base, main_#t~mem505#1.offset, main_#t~mem506#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~mem513#1, main_#t~mem512#1, main_#t~mem514#1, main_#t~mem515#1, main_#t~mem517#1, main_#t~mem516#1, main_#t~mem518#1, main_#t~mem519#1, main_#t~nondet520#1, main_#t~nondet521#1, main_#t~nondet522#1, main_#t~nondet523#1, main_#t~nondet524#1, main_#t~nondet525#1, main_#t~nondet526#1, main_#t~nondet527#1, main_#t~nondet528#1, main_#t~switch529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~mem533#1, main_#t~mem534#1, main_#t~mem535#1, main_#t~mem536#1, main_#t~mem537#1, main_#t~mem538#1, main_#t~mem539#1, main_#t~mem540#1, main_#t~nondet541#1, main_#t~nondet542#1, main_#t~nondet543#1, main_#t~nondet544#1, main_#t~nondet545#1, main_#t~nondet546#1, main_#t~nondet547#1, main_#t~nondet548#1, main_#t~nondet549#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1, main_#t~nondet552#1, main_#t~mem553#1.base, main_#t~mem553#1.offset, main_#t~mem554#1.base, main_#t~mem554#1.offset, main_#t~mem555#1.base, main_#t~mem555#1.offset, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~mem557#1.base, main_#t~mem557#1.offset, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1, main_#t~mem561#1, main_#t~mem562#1, main_#t~short563#1, main_#t~mem564#1.base, main_#t~mem564#1.offset, main_#t~ret565#1, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~mem567#1.base, main_#t~mem567#1.offset, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem570#1, main_#t~ite572#1.base, main_#t~ite572#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1.base, main_#t~mem576#1.offset, main_#t~short577#1, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1.base, main_#t~mem580#1.offset, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1.base, main_#t~mem589#1.offset, main_#t~mem590#1, main_#t~mem591#1.base, main_#t~mem591#1.offset, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1.base, main_#t~mem594#1.offset, main_#t~mem595#1.base, main_#t~mem595#1.offset, main_#t~mem596#1, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem600#1, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1, main_#t~nondet601#1, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_#t~mem604#1, main_#t~post605#1, main_#t~mem606#1.base, main_#t~mem606#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~mem609#1.base, main_#t~mem609#1.offset, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1, main_#t~post616#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1.base, main_#t~mem618#1.offset, main_#t~short619#1, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1.base, main_#t~mem622#1.offset, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1.base, main_#t~mem631#1.offset, main_#t~mem632#1, main_#t~mem633#1.base, main_#t~mem633#1.offset, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1.base, main_#t~mem636#1.offset, main_#t~mem637#1.base, main_#t~mem637#1.offset, main_#t~mem638#1, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem642#1, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1, main_#t~nondet643#1, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_#t~mem646#1, main_#t~post647#1, main_#t~mem648#1.base, main_#t~mem648#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_#t~mem650#1.base, main_#t~mem650#1.offset, main_#t~mem651#1.base, main_#t~mem651#1.offset, main_#t~mem652#1.base, main_#t~mem652#1.offset, main_#t~mem653#1.base, main_#t~mem653#1.offset, main_#t~mem654#1.base, main_#t~mem654#1.offset, main_#t~mem655#1.base, main_#t~mem655#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem656#1.base, main_#t~mem656#1.offset, main_#t~mem657#1, main_#t~post658#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite574#1.base, main_#t~ite574#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6697#L733-4 [2023-11-26 10:48:59,399 INFO L750 eck$LassoCheckResult]: Loop: 6697#L733-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6583#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 6585#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6765#L735-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6766#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 7002#L743-268 havoc main_~_ha_hashv~1#1; 7003#L743-175 goto; 6828#L743-173 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 6661#L743-70 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 6989#L743-71 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch187#1 := 11 == main_~_hj_k~1#1; 7486#L743-72 assume !main_#t~switch187#1; 6836#L743-74 main_#t~switch187#1 := main_#t~switch187#1 || 10 == main_~_hj_k~1#1; 6837#L743-75 assume !main_#t~switch187#1; 7453#L743-77 main_#t~switch187#1 := main_#t~switch187#1 || 9 == main_~_hj_k~1#1; 7478#L743-78 assume !main_#t~switch187#1; 6861#L743-80 main_#t~switch187#1 := main_#t~switch187#1 || 8 == main_~_hj_k~1#1; 6862#L743-81 assume !main_#t~switch187#1; 7199#L743-83 main_#t~switch187#1 := main_#t~switch187#1 || 7 == main_~_hj_k~1#1; 7200#L743-84 assume !main_#t~switch187#1; 7579#L743-86 main_#t~switch187#1 := main_#t~switch187#1 || 6 == main_~_hj_k~1#1; 7580#L743-87 assume !main_#t~switch187#1; 7222#L743-89 main_#t~switch187#1 := main_#t~switch187#1 || 5 == main_~_hj_k~1#1; 6892#L743-90 assume !main_#t~switch187#1; 6893#L743-92 main_#t~switch187#1 := main_#t~switch187#1 || 4 == main_~_hj_k~1#1; 7169#L743-93 assume main_#t~switch187#1;call main_#t~mem195#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem195#1 % 256 % 4294967296);havoc main_#t~mem195#1; 7170#L743-95 main_#t~switch187#1 := main_#t~switch187#1 || 3 == main_~_hj_k~1#1; 6746#L743-96 assume main_#t~switch187#1;call main_#t~mem196#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem196#1 % 256 % 4294967296);havoc main_#t~mem196#1; 6747#L743-98 main_#t~switch187#1 := main_#t~switch187#1 || 2 == main_~_hj_k~1#1; 7576#L743-99 assume main_#t~switch187#1;call main_#t~mem197#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem197#1 % 256 % 4294967296);havoc main_#t~mem197#1; 7577#L743-101 main_#t~switch187#1 := main_#t~switch187#1 || 1 == main_~_hj_k~1#1; 7523#L743-102 assume main_#t~switch187#1;call main_#t~mem198#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem198#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem198#1 % 256 % 4294967296 else main_#t~mem198#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem198#1; 7136#L743-104 havoc main_#t~switch187#1; 6909#L743-170 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 6910#L743-106 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192; 7121#L743-112 main_~_hj_i~1#1 := main_#t~nondet199#1;havoc main_#t~nondet199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 7122#L743-113 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet200#1 := 256 * (main_~_hj_i~1#1 % 4294967296); 7177#L743-119 main_~_hj_j~1#1 := main_#t~nondet200#1;havoc main_#t~nondet200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 7428#L743-120 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet201#1 := main_~_hj_j~1#1 % 4294967296 / 8192; 7483#L743-126 main_~_ha_hashv~1#1 := main_#t~nondet201#1;havoc main_#t~nondet201#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 7551#L743-127 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet202#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096; 6845#L743-133 main_~_hj_i~1#1 := main_#t~nondet202#1;havoc main_#t~nondet202#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 6846#L743-134 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet203#1 := 65536 * (main_~_hj_i~1#1 % 4294967296); 6777#L743-140 main_~_hj_j~1#1 := main_#t~nondet203#1;havoc main_#t~nondet203#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 6854#L743-141 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet204#1 := main_~_hj_j~1#1 % 4294967296 / 32; 6855#L743-147 main_~_ha_hashv~1#1 := main_#t~nondet204#1;havoc main_#t~nondet204#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 7392#L743-148 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet205#1 := main_~_ha_hashv~1#1 % 4294967296 / 8; 6624#L743-154 main_~_hj_i~1#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 6625#L743-155 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet206#1 := 1024 * (main_~_hj_i~1#1 % 4294967296); 6815#L743-161 main_~_hj_j~1#1 := main_#t~nondet206#1;havoc main_#t~nondet206#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 7159#L743-162 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet207#1 := main_~_hj_j~1#1 % 4294967296 / 32768; 7160#L743-168 main_~_ha_hashv~1#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 6889#L743-169 goto; 6890#L743-171 havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset; 6816#L743-172 goto; 6817#L743-174 goto; 7094#L743-265 call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 7152#L743-177 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem225#1.base, main_#t~mem225#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem225#1.base, main_#t~mem225#1.offset; 6802#L743-193 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1 := read~int#1(main_#t~mem228#1.base, 20 + main_#t~mem228#1.offset, 4);call write~$Pointer$#1(main_#t~mem227#1.base, main_#t~mem227#1.offset - main_#t~mem229#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1.base, main_#t~mem231#1.offset := read~$Pointer$#1(main_#t~mem230#1.base, 16 + main_#t~mem230#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem231#1.base, 8 + main_#t~mem231#1.offset, 4);havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1.base, main_#t~mem231#1.offset;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem232#1.base, 16 + main_#t~mem232#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset; 6803#L743-192 goto; 7204#L743-263 havoc main_~_ha_bkt~1#1;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1 := read~int#1(main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);main_#t~post235#1 := main_#t~mem234#1;call write~int#1(1 + main_#t~post235#1, main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1;havoc main_#t~post235#1; 7520#L743-202 call main_#t~mem236#1.base, main_#t~mem236#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem237#1 := read~int#1(main_#t~mem236#1.base, 4 + main_#t~mem236#1.offset, 4); 7271#L743-196 assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem237#1 - 1) % 4294967296;main_#t~nondet238#1 := 0; 7272#L743-200 main_~_ha_bkt~1#1 := main_#t~nondet238#1;havoc main_#t~mem236#1.base, main_#t~mem236#1.offset;havoc main_#t~mem237#1;havoc main_#t~nondet238#1; 7294#L743-201 goto; 7071#L743-260 call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem240#1.base, main_#t~mem240#1.offset := read~$Pointer$#1(main_#t~mem239#1.base, main_#t~mem239#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem240#1.base, main_#t~mem240#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;havoc main_#t~mem240#1.base, main_#t~mem240#1.offset;call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post242#1 := main_#t~mem241#1;call write~int#1(1 + main_#t~post242#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem241#1;havoc main_#t~post242#1;call main_#t~mem243#1.base, main_#t~mem243#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem243#1.base, main_#t~mem243#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem243#1.base, main_#t~mem243#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem244#1.base, main_#t~mem244#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 7072#L743-204 assume main_#t~mem244#1.base != 0 || main_#t~mem244#1.offset != 0;havoc main_#t~mem244#1.base, main_#t~mem244#1.offset;call main_#t~mem245#1.base, main_#t~mem245#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem245#1.base, 12 + main_#t~mem245#1.offset, 4);havoc main_#t~mem245#1.base, main_#t~mem245#1.offset; 7250#L743-206 call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem247#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem246#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short250#1 := main_#t~mem247#1 % 4294967296 >= 10 * (1 + main_#t~mem246#1) % 4294967296; 7367#L743-207 assume main_#t~short250#1;call main_#t~mem248#1.base, main_#t~mem248#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem249#1 := read~int#1(main_#t~mem248#1.base, 36 + main_#t~mem248#1.offset, 4);main_#t~short250#1 := 0 == main_#t~mem249#1 % 4294967296; 7564#L743-209 assume !main_#t~short250#1;havoc main_#t~mem247#1;havoc main_#t~mem246#1;havoc main_#t~mem248#1.base, main_#t~mem248#1.offset;havoc main_#t~mem249#1;havoc main_#t~short250#1; 7185#L743-258 havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset; 7058#L743-259 goto; 7059#L743-261 havoc main_~_ha_bkt~1#1; 7079#L743-262 goto; 7458#L743-264 goto; 7459#L743-266 havoc main_~_ha_hashv~1#1; 7544#L743-267 goto; 6696#L733-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 6697#L733-4 [2023-11-26 10:48:59,400 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:59,400 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 4 times [2023-11-26 10:48:59,400 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:59,401 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [687643940] [2023-11-26 10:48:59,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:59,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:59,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:59,453 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:48:59,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:48:59,490 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:48:59,495 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:48:59,495 INFO L85 PathProgramCache]: Analyzing trace with hash -564912110, now seen corresponding path program 1 times [2023-11-26 10:48:59,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:48:59,500 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287029512] [2023-11-26 10:48:59,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:59,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:48:59,570 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:48:59,579 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [579779717] [2023-11-26 10:48:59,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:48:59,580 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:48:59,580 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:48:59,585 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:48:59,622 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-26 10:49:01,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:49:01,291 INFO L262 TraceCheckSpWp]: Trace formula consists of 512 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 10:49:01,295 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:49:01,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:49:01,465 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:49:01,465 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:49:01,465 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [287029512] [2023-11-26 10:49:01,465 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:49:01,465 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [579779717] [2023-11-26 10:49:01,466 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [579779717] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:49:01,466 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:49:01,466 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-26 10:49:01,466 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [194832435] [2023-11-26 10:49:01,466 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:49:01,467 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:49:01,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:49:01,468 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2023-11-26 10:49:01,468 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2023-11-26 10:49:01,468 INFO L87 Difference]: Start difference. First operand 1003 states and 1510 transitions. cyclomatic complexity: 518 Second operand has 8 states, 8 states have (on average 9.625) internal successors, (77), 8 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:49:02,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:49:02,144 INFO L93 Difference]: Finished difference Result 1052 states and 1572 transitions. [2023-11-26 10:49:02,144 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1052 states and 1572 transitions. [2023-11-26 10:49:02,154 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 647 [2023-11-26 10:49:02,165 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1052 states to 1052 states and 1572 transitions. [2023-11-26 10:49:02,165 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1052 [2023-11-26 10:49:02,167 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1052 [2023-11-26 10:49:02,167 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1052 states and 1572 transitions. [2023-11-26 10:49:02,169 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:49:02,169 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1052 states and 1572 transitions. [2023-11-26 10:49:02,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1052 states and 1572 transitions. [2023-11-26 10:49:02,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1052 to 1043. [2023-11-26 10:49:02,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1043 states, 1036 states have (on average 1.4922779922779923) internal successors, (1546), 1035 states have internal predecessors, (1546), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2023-11-26 10:49:02,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1043 states to 1043 states and 1558 transitions. [2023-11-26 10:49:02,199 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1043 states and 1558 transitions. [2023-11-26 10:49:02,199 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 10:49:02,201 INFO L428 stractBuchiCegarLoop]: Abstraction has 1043 states and 1558 transitions. [2023-11-26 10:49:02,201 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 10:49:02,202 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1043 states and 1558 transitions. [2023-11-26 10:49:02,207 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 638 [2023-11-26 10:49:02,208 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:49:02,208 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:49:02,211 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:49:02,211 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:49:02,212 INFO L748 eck$LassoCheckResult]: Stem: 9168#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 9169#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~switch34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc55#1.base, main_#t~malloc55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~memset~res58#1.base, main_#t~memset~res58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~malloc64#1.base, main_#t~malloc64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~memset~res71#1.base, main_#t~memset~res71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~nondet85#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~post89#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem94#1, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~short97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~malloc100#1.base, main_#t~malloc100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~memset~res105#1.base, main_#t~memset~res105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem115#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~nondet116#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem127#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~nondet128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~pre131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~post136#1, main_#t~mem140#1, main_#t~mem138#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem139#1, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~post118#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~post152#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~ite162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc208#1.base, main_#t~malloc208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~memset~res211#1.base, main_#t~memset~res211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~malloc217#1.base, main_#t~malloc217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~memset~res224#1.base, main_#t~memset~res224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1, main_#t~post235#1, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~nondet238#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~post242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem247#1, main_#t~mem246#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~short250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~malloc253#1.base, main_#t~malloc253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~memset~res258#1.base, main_#t~memset~res258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem263#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~nondet264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem268#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~nondet269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem280#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1, main_#t~nondet281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1, main_#t~pre284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~post289#1, main_#t~mem293#1, main_#t~mem291#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem292#1, main_#t~mem294#1, main_#t~post295#1, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~post271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem312#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1, main_#t~ite315#1, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~mem324#1, main_#t~mem323#1, main_#t~mem325#1, main_#t~mem326#1, main_#t~mem328#1, main_#t~mem327#1, main_#t~mem329#1, main_#t~mem330#1, main_#t~nondet331#1, main_#t~nondet332#1, main_#t~nondet333#1, main_#t~nondet334#1, main_#t~nondet335#1, main_#t~nondet336#1, main_#t~nondet337#1, main_#t~nondet338#1, main_#t~nondet339#1, main_#t~switch340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_#t~mem345#1, main_#t~mem346#1, main_#t~mem347#1, main_#t~mem348#1, main_#t~mem349#1, main_#t~mem350#1, main_#t~mem351#1, main_#t~nondet352#1, main_#t~nondet353#1, main_#t~nondet354#1, main_#t~nondet355#1, main_#t~nondet356#1, main_#t~nondet357#1, main_#t~nondet358#1, main_#t~nondet359#1, main_#t~nondet360#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1, main_#t~nondet363#1, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1.base, main_#t~mem365#1.offset, main_#t~mem366#1.base, main_#t~mem366#1.offset, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~mem368#1.base, main_#t~mem368#1.offset, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem373#1, main_#t~short374#1, main_#t~mem375#1.base, main_#t~mem375#1.offset, main_#t~ret376#1, main_#t~mem377#1.base, main_#t~mem377#1.offset, main_#t~mem378#1.base, main_#t~mem378#1.offset, main_#t~mem379#1.base, main_#t~mem379#1.offset, main_#t~mem380#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem387#1, main_#t~mem386#1, main_#t~mem388#1, main_#t~mem389#1, main_#t~mem391#1, main_#t~mem390#1, main_#t~mem392#1, main_#t~mem393#1, main_#t~nondet394#1, main_#t~nondet395#1, main_#t~nondet396#1, main_#t~nondet397#1, main_#t~nondet398#1, main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~nondet402#1, main_#t~switch403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~mem407#1, main_#t~mem408#1, main_#t~mem409#1, main_#t~mem410#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem413#1, main_#t~mem414#1, main_#t~nondet415#1, main_#t~nondet416#1, main_#t~nondet417#1, main_#t~nondet418#1, main_#t~nondet419#1, main_#t~nondet420#1, main_#t~nondet421#1, main_#t~nondet422#1, main_#t~nondet423#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1, main_#t~nondet426#1, main_#t~mem427#1.base, main_#t~mem427#1.offset, main_#t~mem428#1.base, main_#t~mem428#1.offset, main_#t~mem429#1.base, main_#t~mem429#1.offset, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~mem431#1.base, main_#t~mem431#1.offset, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1, main_#t~mem436#1, main_#t~short437#1, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~ret439#1, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1.base, main_#t~mem442#1.offset, main_#t~mem443#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~mem450#1, main_#t~mem449#1, main_#t~mem451#1, main_#t~mem452#1, main_#t~mem454#1, main_#t~mem453#1, main_#t~mem455#1, main_#t~mem456#1, main_#t~nondet457#1, main_#t~nondet458#1, main_#t~nondet459#1, main_#t~nondet460#1, main_#t~nondet461#1, main_#t~nondet462#1, main_#t~nondet463#1, main_#t~nondet464#1, main_#t~nondet465#1, main_#t~switch466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~mem470#1, main_#t~mem471#1, main_#t~mem472#1, main_#t~mem473#1, main_#t~mem474#1, main_#t~mem475#1, main_#t~mem476#1, main_#t~mem477#1, main_#t~nondet478#1, main_#t~nondet479#1, main_#t~nondet480#1, main_#t~nondet481#1, main_#t~nondet482#1, main_#t~nondet483#1, main_#t~nondet484#1, main_#t~nondet485#1, main_#t~nondet486#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1, main_#t~nondet489#1, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1, main_#t~mem498#1, main_#t~mem499#1, main_#t~short500#1, main_#t~mem501#1.base, main_#t~mem501#1.offset, main_#t~ret502#1, main_#t~mem503#1.base, main_#t~mem503#1.offset, main_#t~mem504#1.base, main_#t~mem504#1.offset, main_#t~mem505#1.base, main_#t~mem505#1.offset, main_#t~mem506#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~mem513#1, main_#t~mem512#1, main_#t~mem514#1, main_#t~mem515#1, main_#t~mem517#1, main_#t~mem516#1, main_#t~mem518#1, main_#t~mem519#1, main_#t~nondet520#1, main_#t~nondet521#1, main_#t~nondet522#1, main_#t~nondet523#1, main_#t~nondet524#1, main_#t~nondet525#1, main_#t~nondet526#1, main_#t~nondet527#1, main_#t~nondet528#1, main_#t~switch529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~mem533#1, main_#t~mem534#1, main_#t~mem535#1, main_#t~mem536#1, main_#t~mem537#1, main_#t~mem538#1, main_#t~mem539#1, main_#t~mem540#1, main_#t~nondet541#1, main_#t~nondet542#1, main_#t~nondet543#1, main_#t~nondet544#1, main_#t~nondet545#1, main_#t~nondet546#1, main_#t~nondet547#1, main_#t~nondet548#1, main_#t~nondet549#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1, main_#t~nondet552#1, main_#t~mem553#1.base, main_#t~mem553#1.offset, main_#t~mem554#1.base, main_#t~mem554#1.offset, main_#t~mem555#1.base, main_#t~mem555#1.offset, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~mem557#1.base, main_#t~mem557#1.offset, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1, main_#t~mem561#1, main_#t~mem562#1, main_#t~short563#1, main_#t~mem564#1.base, main_#t~mem564#1.offset, main_#t~ret565#1, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~mem567#1.base, main_#t~mem567#1.offset, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem570#1, main_#t~ite572#1.base, main_#t~ite572#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1.base, main_#t~mem576#1.offset, main_#t~short577#1, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1.base, main_#t~mem580#1.offset, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1.base, main_#t~mem589#1.offset, main_#t~mem590#1, main_#t~mem591#1.base, main_#t~mem591#1.offset, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1.base, main_#t~mem594#1.offset, main_#t~mem595#1.base, main_#t~mem595#1.offset, main_#t~mem596#1, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem600#1, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1, main_#t~nondet601#1, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_#t~mem604#1, main_#t~post605#1, main_#t~mem606#1.base, main_#t~mem606#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~mem609#1.base, main_#t~mem609#1.offset, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1, main_#t~post616#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1.base, main_#t~mem618#1.offset, main_#t~short619#1, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1.base, main_#t~mem622#1.offset, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1.base, main_#t~mem631#1.offset, main_#t~mem632#1, main_#t~mem633#1.base, main_#t~mem633#1.offset, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1.base, main_#t~mem636#1.offset, main_#t~mem637#1.base, main_#t~mem637#1.offset, main_#t~mem638#1, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem642#1, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1, main_#t~nondet643#1, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_#t~mem646#1, main_#t~post647#1, main_#t~mem648#1.base, main_#t~mem648#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_#t~mem650#1.base, main_#t~mem650#1.offset, main_#t~mem651#1.base, main_#t~mem651#1.offset, main_#t~mem652#1.base, main_#t~mem652#1.offset, main_#t~mem653#1.base, main_#t~mem653#1.offset, main_#t~mem654#1.base, main_#t~mem654#1.offset, main_#t~mem655#1.base, main_#t~mem655#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem656#1.base, main_#t~mem656#1.offset, main_#t~mem657#1, main_#t~post658#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite574#1.base, main_#t~ite574#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8991#L733-4 [2023-11-26 10:49:02,214 INFO L750 eck$LassoCheckResult]: Loop: 8991#L733-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8877#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 8879#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9059#L735-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9060#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 9299#L743-268 havoc main_~_ha_hashv~1#1; 9300#L743-175 goto; 9123#L743-173 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 9124#L743-70 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 9919#L743-71 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch187#1 := 11 == main_~_hj_k~1#1; 9918#L743-72 assume !main_#t~switch187#1; 9917#L743-74 main_#t~switch187#1 := main_#t~switch187#1 || 10 == main_~_hj_k~1#1; 9916#L743-75 assume !main_#t~switch187#1; 9915#L743-77 main_#t~switch187#1 := main_#t~switch187#1 || 9 == main_~_hj_k~1#1; 9914#L743-78 assume !main_#t~switch187#1; 9913#L743-80 main_#t~switch187#1 := main_#t~switch187#1 || 8 == main_~_hj_k~1#1; 9912#L743-81 assume !main_#t~switch187#1; 9911#L743-83 main_#t~switch187#1 := main_#t~switch187#1 || 7 == main_~_hj_k~1#1; 9910#L743-84 assume !main_#t~switch187#1; 9909#L743-86 main_#t~switch187#1 := main_#t~switch187#1 || 6 == main_~_hj_k~1#1; 9908#L743-87 assume !main_#t~switch187#1; 9907#L743-89 main_#t~switch187#1 := main_#t~switch187#1 || 5 == main_~_hj_k~1#1; 9187#L743-90 assume !main_#t~switch187#1; 9188#L743-92 main_#t~switch187#1 := main_#t~switch187#1 || 4 == main_~_hj_k~1#1; 9464#L743-93 assume main_#t~switch187#1;call main_#t~mem195#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem195#1 % 256 % 4294967296);havoc main_#t~mem195#1; 9465#L743-95 main_#t~switch187#1 := main_#t~switch187#1 || 3 == main_~_hj_k~1#1; 9040#L743-96 assume main_#t~switch187#1;call main_#t~mem196#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem196#1 % 256 % 4294967296);havoc main_#t~mem196#1; 9041#L743-98 main_#t~switch187#1 := main_#t~switch187#1 || 2 == main_~_hj_k~1#1; 9872#L743-99 assume main_#t~switch187#1;call main_#t~mem197#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem197#1 % 256 % 4294967296);havoc main_#t~mem197#1; 9665#L743-101 main_#t~switch187#1 := main_#t~switch187#1 || 1 == main_~_hj_k~1#1; 9666#L743-102 assume main_#t~switch187#1;call main_#t~mem198#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem198#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem198#1 % 256 % 4294967296 else main_#t~mem198#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem198#1; 9430#L743-104 havoc main_#t~switch187#1; 9203#L743-170 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 9204#L743-106 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192; 9885#L743-112 main_~_hj_i~1#1 := main_#t~nondet199#1;havoc main_#t~nondet199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 9884#L743-113 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet200#1 := 256 * (main_~_hj_i~1#1 % 4294967296); 9883#L743-119 main_~_hj_j~1#1 := main_#t~nondet200#1;havoc main_#t~nondet200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 9866#L743-120 assume !(0 == main_~_ha_hashv~1#1 % 4294967296); 9867#L743-122 assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet201#1 := main_~_ha_hashv~1#1; 9779#L743-126 main_~_ha_hashv~1#1 := main_#t~nondet201#1;havoc main_#t~nondet201#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 9846#L743-127 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet202#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096; 9142#L743-133 main_~_hj_i~1#1 := main_#t~nondet202#1;havoc main_#t~nondet202#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 9143#L743-134 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet203#1 := 65536 * (main_~_hj_i~1#1 % 4294967296); 9071#L743-140 main_~_hj_j~1#1 := main_#t~nondet203#1;havoc main_#t~nondet203#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 9151#L743-141 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet204#1 := main_~_hj_j~1#1 % 4294967296 / 32; 9152#L743-147 main_~_ha_hashv~1#1 := main_#t~nondet204#1;havoc main_#t~nondet204#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 9689#L743-148 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet205#1 := main_~_ha_hashv~1#1 % 4294967296 / 8; 8918#L743-154 main_~_hj_i~1#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 8919#L743-155 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet206#1 := 1024 * (main_~_hj_i~1#1 % 4294967296); 9111#L743-161 main_~_hj_j~1#1 := main_#t~nondet206#1;havoc main_#t~nondet206#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 9457#L743-162 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet207#1 := main_~_hj_j~1#1 % 4294967296 / 32768; 9458#L743-168 main_~_ha_hashv~1#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 9185#L743-169 goto; 9186#L743-171 havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset; 9100#L743-172 goto; 9101#L743-174 goto; 9386#L743-265 call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 9445#L743-177 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem225#1.base, main_#t~mem225#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem225#1.base, main_#t~mem225#1.offset; 9092#L743-193 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1 := read~int#1(main_#t~mem228#1.base, 20 + main_#t~mem228#1.offset, 4);call write~$Pointer$#1(main_#t~mem227#1.base, main_#t~mem227#1.offset - main_#t~mem229#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1.base, main_#t~mem231#1.offset := read~$Pointer$#1(main_#t~mem230#1.base, 16 + main_#t~mem230#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem231#1.base, 8 + main_#t~mem231#1.offset, 4);havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1.base, main_#t~mem231#1.offset;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem232#1.base, 16 + main_#t~mem232#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset; 9093#L743-192 goto; 9504#L743-263 havoc main_~_ha_bkt~1#1;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1 := read~int#1(main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);main_#t~post235#1 := main_#t~mem234#1;call write~int#1(1 + main_#t~post235#1, main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1;havoc main_#t~post235#1; 9816#L743-202 call main_#t~mem236#1.base, main_#t~mem236#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem237#1 := read~int#1(main_#t~mem236#1.base, 4 + main_#t~mem236#1.offset, 4); 9566#L743-196 assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem237#1 - 1) % 4294967296;main_#t~nondet238#1 := 0; 9567#L743-200 main_~_ha_bkt~1#1 := main_#t~nondet238#1;havoc main_#t~mem236#1.base, main_#t~mem236#1.offset;havoc main_#t~mem237#1;havoc main_#t~nondet238#1; 9588#L743-201 goto; 9363#L743-260 call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem240#1.base, main_#t~mem240#1.offset := read~$Pointer$#1(main_#t~mem239#1.base, main_#t~mem239#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem240#1.base, main_#t~mem240#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;havoc main_#t~mem240#1.base, main_#t~mem240#1.offset;call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post242#1 := main_#t~mem241#1;call write~int#1(1 + main_#t~post242#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem241#1;havoc main_#t~post242#1;call main_#t~mem243#1.base, main_#t~mem243#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem243#1.base, main_#t~mem243#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem243#1.base, main_#t~mem243#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem244#1.base, main_#t~mem244#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 9364#L743-204 assume main_#t~mem244#1.base != 0 || main_#t~mem244#1.offset != 0;havoc main_#t~mem244#1.base, main_#t~mem244#1.offset;call main_#t~mem245#1.base, main_#t~mem245#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem245#1.base, 12 + main_#t~mem245#1.offset, 4);havoc main_#t~mem245#1.base, main_#t~mem245#1.offset; 9544#L743-206 call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem247#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem246#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short250#1 := main_#t~mem247#1 % 4294967296 >= 10 * (1 + main_#t~mem246#1) % 4294967296; 9662#L743-207 assume main_#t~short250#1;call main_#t~mem248#1.base, main_#t~mem248#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem249#1 := read~int#1(main_#t~mem248#1.base, 36 + main_#t~mem248#1.offset, 4);main_#t~short250#1 := 0 == main_#t~mem249#1 % 4294967296; 9857#L743-209 assume !main_#t~short250#1;havoc main_#t~mem247#1;havoc main_#t~mem246#1;havoc main_#t~mem248#1.base, main_#t~mem248#1.offset;havoc main_#t~mem249#1;havoc main_#t~short250#1; 9481#L743-258 havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset; 9351#L743-259 goto; 9352#L743-261 havoc main_~_ha_bkt~1#1; 9371#L743-262 goto; 9752#L743-264 goto; 9753#L743-266 havoc main_~_ha_hashv~1#1; 9836#L743-267 goto; 8990#L733-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 8991#L733-4 [2023-11-26 10:49:02,215 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:49:02,215 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 5 times [2023-11-26 10:49:02,215 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:49:02,215 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351275412] [2023-11-26 10:49:02,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:02,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:49:02,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:49:02,247 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:49:02,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:49:02,283 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:49:02,283 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:49:02,284 INFO L85 PathProgramCache]: Analyzing trace with hash 339873630, now seen corresponding path program 1 times [2023-11-26 10:49:02,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:49:02,284 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [49616606] [2023-11-26 10:49:02,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:02,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:49:02,347 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:49:02,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [350009597] [2023-11-26 10:49:02,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:02,348 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:49:02,348 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:49:02,351 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:49:02,378 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-26 10:49:03,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:49:03,766 INFO L262 TraceCheckSpWp]: Trace formula consists of 513 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 10:49:03,770 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:49:03,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:49:03,983 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:49:03,983 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:49:03,983 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [49616606] [2023-11-26 10:49:03,983 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:49:03,984 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [350009597] [2023-11-26 10:49:03,984 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [350009597] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:49:03,984 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:49:03,984 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 10:49:03,985 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [194378596] [2023-11-26 10:49:03,985 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:49:03,985 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:49:03,985 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:49:03,986 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 10:49:03,986 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 10:49:03,986 INFO L87 Difference]: Start difference. First operand 1043 states and 1558 transitions. cyclomatic complexity: 526 Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:49:04,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:49:04,715 INFO L93 Difference]: Finished difference Result 1043 states and 1557 transitions. [2023-11-26 10:49:04,715 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1043 states and 1557 transitions. [2023-11-26 10:49:04,723 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 638 [2023-11-26 10:49:04,734 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1043 states to 1043 states and 1557 transitions. [2023-11-26 10:49:04,734 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1043 [2023-11-26 10:49:04,736 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1043 [2023-11-26 10:49:04,736 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1043 states and 1557 transitions. [2023-11-26 10:49:04,738 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:49:04,738 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1043 states and 1557 transitions. [2023-11-26 10:49:04,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1043 states and 1557 transitions. [2023-11-26 10:49:04,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1043 to 1040. [2023-11-26 10:49:04,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1040 states, 1033 states have (on average 1.4917715392061957) internal successors, (1541), 1032 states have internal predecessors, (1541), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2023-11-26 10:49:04,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1040 states to 1040 states and 1553 transitions. [2023-11-26 10:49:04,766 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1040 states and 1553 transitions. [2023-11-26 10:49:04,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 10:49:04,773 INFO L428 stractBuchiCegarLoop]: Abstraction has 1040 states and 1553 transitions. [2023-11-26 10:49:04,773 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 10:49:04,773 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1040 states and 1553 transitions. [2023-11-26 10:49:04,779 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 635 [2023-11-26 10:49:04,779 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:49:04,779 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:49:04,780 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:49:04,780 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:49:04,780 INFO L748 eck$LassoCheckResult]: Stem: 11494#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 11495#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~switch34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc55#1.base, main_#t~malloc55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~memset~res58#1.base, main_#t~memset~res58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~malloc64#1.base, main_#t~malloc64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~memset~res71#1.base, main_#t~memset~res71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~nondet85#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~post89#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem94#1, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~short97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~malloc100#1.base, main_#t~malloc100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~memset~res105#1.base, main_#t~memset~res105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem115#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~nondet116#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem127#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~nondet128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~pre131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~post136#1, main_#t~mem140#1, main_#t~mem138#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem139#1, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~post118#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~post152#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~ite162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc208#1.base, main_#t~malloc208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~memset~res211#1.base, main_#t~memset~res211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~malloc217#1.base, main_#t~malloc217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~memset~res224#1.base, main_#t~memset~res224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1, main_#t~post235#1, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~nondet238#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~post242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem247#1, main_#t~mem246#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~short250#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~malloc253#1.base, main_#t~malloc253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~memset~res258#1.base, main_#t~memset~res258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem263#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~nondet264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem268#1, 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main_#t~mem617#1.offset, main_#t~mem618#1.base, main_#t~mem618#1.offset, main_#t~short619#1, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1.base, main_#t~mem622#1.offset, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1.base, main_#t~mem631#1.offset, main_#t~mem632#1, main_#t~mem633#1.base, main_#t~mem633#1.offset, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1.base, main_#t~mem636#1.offset, main_#t~mem637#1.base, main_#t~mem637#1.offset, main_#t~mem638#1, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem642#1, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1, main_#t~nondet643#1, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_#t~mem646#1, main_#t~post647#1, main_#t~mem648#1.base, main_#t~mem648#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_#t~mem650#1.base, main_#t~mem650#1.offset, main_#t~mem651#1.base, main_#t~mem651#1.offset, main_#t~mem652#1.base, main_#t~mem652#1.offset, main_#t~mem653#1.base, main_#t~mem653#1.offset, main_#t~mem654#1.base, main_#t~mem654#1.offset, main_#t~mem655#1.base, main_#t~mem655#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem656#1.base, main_#t~mem656#1.offset, main_#t~mem657#1, main_#t~post658#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite574#1.base, main_#t~ite574#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11317#L733-4 [2023-11-26 10:49:04,782 INFO L750 eck$LassoCheckResult]: Loop: 11317#L733-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11205#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 11207#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 11385#L735-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11386#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 11627#L743-268 havoc main_~_ha_hashv~1#1; 11628#L743-175 goto; 11449#L743-173 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 11450#L743-70 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 11612#L743-71 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch187#1 := 11 == main_~_hj_k~1#1; 12110#L743-72 assume !main_#t~switch187#1; 11457#L743-74 main_#t~switch187#1 := main_#t~switch187#1 || 10 == main_~_hj_k~1#1; 11458#L743-75 assume !main_#t~switch187#1; 12239#L743-77 main_#t~switch187#1 := main_#t~switch187#1 || 9 == main_~_hj_k~1#1; 12238#L743-78 assume !main_#t~switch187#1; 12237#L743-80 main_#t~switch187#1 := main_#t~switch187#1 || 8 == main_~_hj_k~1#1; 12236#L743-81 assume !main_#t~switch187#1; 12235#L743-83 main_#t~switch187#1 := main_#t~switch187#1 || 7 == main_~_hj_k~1#1; 12234#L743-84 assume !main_#t~switch187#1; 12233#L743-86 main_#t~switch187#1 := main_#t~switch187#1 || 6 == main_~_hj_k~1#1; 12232#L743-87 assume !main_#t~switch187#1; 11843#L743-89 main_#t~switch187#1 := main_#t~switch187#1 || 5 == main_~_hj_k~1#1; 11513#L743-90 assume !main_#t~switch187#1; 11514#L743-92 main_#t~switch187#1 := main_#t~switch187#1 || 4 == main_~_hj_k~1#1; 12059#L743-93 assume main_#t~switch187#1;call main_#t~mem195#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem195#1 % 256 % 4294967296);havoc main_#t~mem195#1; 12224#L743-95 main_#t~switch187#1 := main_#t~switch187#1 || 3 == main_~_hj_k~1#1; 12222#L743-96 assume main_#t~switch187#1;call main_#t~mem196#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem196#1 % 256 % 4294967296);havoc main_#t~mem196#1; 12220#L743-98 main_#t~switch187#1 := main_#t~switch187#1 || 2 == main_~_hj_k~1#1; 12218#L743-99 assume main_#t~switch187#1;call main_#t~mem197#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem197#1 % 256 % 4294967296);havoc main_#t~mem197#1; 12216#L743-101 main_#t~switch187#1 := main_#t~switch187#1 || 1 == main_~_hj_k~1#1; 12213#L743-102 assume main_#t~switch187#1;call main_#t~mem198#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem198#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem198#1 % 256 % 4294967296 else main_#t~mem198#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem198#1; 12212#L743-104 havoc main_#t~switch187#1; 12211#L743-170 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 12210#L743-106 assume !(0 == main_~_hj_i~1#1 % 4294967296); 12112#L743-108 assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296); 12113#L743-110 assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet199#1 := 0; 11739#L743-112 main_~_hj_i~1#1 := main_#t~nondet199#1;havoc main_#t~nondet199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 11740#L743-113 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet200#1 := 256 * (main_~_hj_i~1#1 % 4294967296); 12049#L743-119 main_~_hj_j~1#1 := main_#t~nondet200#1;havoc main_#t~nondet200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 12050#L743-120 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet201#1 := main_~_hj_j~1#1 % 4294967296 / 8192; 12107#L743-126 main_~_ha_hashv~1#1 := main_#t~nondet201#1;havoc main_#t~nondet201#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 12173#L743-127 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet202#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096; 11464#L743-133 main_~_hj_i~1#1 := main_#t~nondet202#1;havoc main_#t~nondet202#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 11465#L743-134 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet203#1 := 65536 * (main_~_hj_i~1#1 % 4294967296); 11397#L743-140 main_~_hj_j~1#1 := main_#t~nondet203#1;havoc main_#t~nondet203#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 11475#L743-141 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet204#1 := main_~_hj_j~1#1 % 4294967296 / 32; 11476#L743-147 main_~_ha_hashv~1#1 := main_#t~nondet204#1;havoc main_#t~nondet204#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 12013#L743-148 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet205#1 := main_~_ha_hashv~1#1 % 4294967296 / 8; 11242#L743-154 main_~_hj_i~1#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 11243#L743-155 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet206#1 := 1024 * (main_~_hj_i~1#1 % 4294967296); 11428#L743-161 main_~_hj_j~1#1 := main_#t~nondet206#1;havoc main_#t~nondet206#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 11778#L743-162 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet207#1 := main_~_hj_j~1#1 % 4294967296 / 32768; 11779#L743-168 main_~_ha_hashv~1#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 11508#L743-169 goto; 11509#L743-171 havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset; 11429#L743-172 goto; 11430#L743-174 goto; 11712#L743-265 call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 11771#L743-177 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem225#1.base, main_#t~mem225#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem225#1.base, main_#t~mem225#1.offset; 11420#L743-193 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1 := read~int#1(main_#t~mem228#1.base, 20 + main_#t~mem228#1.offset, 4);call write~$Pointer$#1(main_#t~mem227#1.base, main_#t~mem227#1.offset - main_#t~mem229#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1.base, main_#t~mem231#1.offset := read~$Pointer$#1(main_#t~mem230#1.base, 16 + main_#t~mem230#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem231#1.base, 8 + main_#t~mem231#1.offset, 4);havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1.base, main_#t~mem231#1.offset;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem232#1.base, 16 + main_#t~mem232#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset; 11421#L743-192 goto; 11832#L743-263 havoc main_~_ha_bkt~1#1;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1 := read~int#1(main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);main_#t~post235#1 := main_#t~mem234#1;call write~int#1(1 + main_#t~post235#1, main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1;havoc main_#t~post235#1; 12144#L743-202 call main_#t~mem236#1.base, main_#t~mem236#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem237#1 := read~int#1(main_#t~mem236#1.base, 4 + main_#t~mem236#1.offset, 4); 11892#L743-196 assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem237#1 - 1) % 4294967296;main_#t~nondet238#1 := 0; 11893#L743-200 main_~_ha_bkt~1#1 := main_#t~nondet238#1;havoc main_#t~mem236#1.base, main_#t~mem236#1.offset;havoc main_#t~mem237#1;havoc main_#t~nondet238#1; 11915#L743-201 goto; 11690#L743-260 call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem240#1.base, main_#t~mem240#1.offset := read~$Pointer$#1(main_#t~mem239#1.base, main_#t~mem239#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem240#1.base, main_#t~mem240#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;havoc main_#t~mem240#1.base, main_#t~mem240#1.offset;call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post242#1 := main_#t~mem241#1;call write~int#1(1 + main_#t~post242#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem241#1;havoc main_#t~post242#1;call main_#t~mem243#1.base, main_#t~mem243#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem243#1.base, main_#t~mem243#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem243#1.base, main_#t~mem243#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem244#1.base, main_#t~mem244#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 11691#L743-204 assume main_#t~mem244#1.base != 0 || main_#t~mem244#1.offset != 0;havoc main_#t~mem244#1.base, main_#t~mem244#1.offset;call main_#t~mem245#1.base, main_#t~mem245#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem245#1.base, 12 + main_#t~mem245#1.offset, 4);havoc main_#t~mem245#1.base, main_#t~mem245#1.offset; 11871#L743-206 call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem247#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem246#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short250#1 := main_#t~mem247#1 % 4294967296 >= 10 * (1 + main_#t~mem246#1) % 4294967296; 11988#L743-207 assume main_#t~short250#1;call main_#t~mem248#1.base, main_#t~mem248#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem249#1 := read~int#1(main_#t~mem248#1.base, 36 + main_#t~mem248#1.offset, 4);main_#t~short250#1 := 0 == main_#t~mem249#1 % 4294967296; 12186#L743-209 assume !main_#t~short250#1;havoc main_#t~mem247#1;havoc main_#t~mem246#1;havoc main_#t~mem248#1.base, main_#t~mem248#1.offset;havoc main_#t~mem249#1;havoc main_#t~short250#1; 11807#L743-258 havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset; 11677#L743-259 goto; 11678#L743-261 havoc main_~_ha_bkt~1#1; 11698#L743-262 goto; 12081#L743-264 goto; 12082#L743-266 havoc main_~_ha_hashv~1#1; 12164#L743-267 goto; 11316#L733-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 11317#L733-4 [2023-11-26 10:49:04,782 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:49:04,782 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 6 times [2023-11-26 10:49:04,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:49:04,787 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1470575542] [2023-11-26 10:49:04,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:04,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:49:04,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:49:04,815 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:49:04,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:49:04,843 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:49:04,843 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:49:04,844 INFO L85 PathProgramCache]: Analyzing trace with hash -2005777619, now seen corresponding path program 1 times [2023-11-26 10:49:04,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:49:04,844 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [726089805] [2023-11-26 10:49:04,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:04,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:49:04,890 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:49:04,890 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [49730936] [2023-11-26 10:49:04,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:04,891 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:49:04,891 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:49:04,898 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:49:04,918 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-26 10:49:05,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:49:05,331 INFO L262 TraceCheckSpWp]: Trace formula consists of 514 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 10:49:05,334 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:49:05,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:49:05,444 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:49:05,444 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:49:05,444 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [726089805] [2023-11-26 10:49:05,444 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:49:05,445 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [49730936] [2023-11-26 10:49:05,445 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [49730936] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:49:05,445 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:49:05,445 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 10:49:05,445 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1545324716] [2023-11-26 10:49:05,445 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:49:05,446 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:49:05,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:49:05,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 10:49:05,447 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2023-11-26 10:49:05,447 INFO L87 Difference]: Start difference. First operand 1040 states and 1553 transitions. cyclomatic complexity: 524 Second operand has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 7 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:49:06,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:49:06,084 INFO L93 Difference]: Finished difference Result 1055 states and 1574 transitions. [2023-11-26 10:49:06,084 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1055 states and 1574 transitions. [2023-11-26 10:49:06,092 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 650 [2023-11-26 10:49:06,102 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1055 states to 1055 states and 1574 transitions. [2023-11-26 10:49:06,102 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1055 [2023-11-26 10:49:06,103 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1055 [2023-11-26 10:49:06,104 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1055 states and 1574 transitions. [2023-11-26 10:49:06,107 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:49:06,107 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1055 states and 1574 transitions. [2023-11-26 10:49:06,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1055 states and 1574 transitions. [2023-11-26 10:49:06,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1055 to 1048. [2023-11-26 10:49:06,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1048 states, 1041 states have (on average 1.4908741594620558) internal successors, (1552), 1040 states have internal predecessors, (1552), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2023-11-26 10:49:06,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1048 states to 1048 states and 1564 transitions. [2023-11-26 10:49:06,140 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1048 states and 1564 transitions. [2023-11-26 10:49:06,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 10:49:06,142 INFO L428 stractBuchiCegarLoop]: Abstraction has 1048 states and 1564 transitions. [2023-11-26 10:49:06,142 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 10:49:06,143 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1048 states and 1564 transitions. [2023-11-26 10:49:06,148 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 643 [2023-11-26 10:49:06,148 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:49:06,148 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:49:06,151 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:49:06,151 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:49:06,151 INFO L748 eck$LassoCheckResult]: Stem: 13833#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 13834#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~switch34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc55#1.base, main_#t~malloc55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~memset~res58#1.base, main_#t~memset~res58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~malloc64#1.base, main_#t~malloc64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~memset~res71#1.base, main_#t~memset~res71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~nondet85#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~post89#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem94#1, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~short97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~malloc100#1.base, main_#t~malloc100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~memset~res105#1.base, main_#t~memset~res105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem115#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~nondet116#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem127#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~nondet128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~pre131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~post136#1, main_#t~mem140#1, main_#t~mem138#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem139#1, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~post118#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~post152#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~ite162#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, 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main_#t~nondet542#1, main_#t~nondet543#1, main_#t~nondet544#1, main_#t~nondet545#1, main_#t~nondet546#1, main_#t~nondet547#1, main_#t~nondet548#1, main_#t~nondet549#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1, main_#t~nondet552#1, main_#t~mem553#1.base, main_#t~mem553#1.offset, main_#t~mem554#1.base, main_#t~mem554#1.offset, main_#t~mem555#1.base, main_#t~mem555#1.offset, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~mem557#1.base, main_#t~mem557#1.offset, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1, main_#t~mem561#1, main_#t~mem562#1, main_#t~short563#1, main_#t~mem564#1.base, main_#t~mem564#1.offset, main_#t~ret565#1, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~mem567#1.base, main_#t~mem567#1.offset, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem570#1, main_#t~ite572#1.base, main_#t~ite572#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1.base, main_#t~mem576#1.offset, main_#t~short577#1, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1.base, main_#t~mem580#1.offset, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1.base, main_#t~mem589#1.offset, main_#t~mem590#1, main_#t~mem591#1.base, main_#t~mem591#1.offset, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1.base, main_#t~mem594#1.offset, main_#t~mem595#1.base, main_#t~mem595#1.offset, main_#t~mem596#1, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem600#1, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1, main_#t~nondet601#1, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_#t~mem604#1, main_#t~post605#1, main_#t~mem606#1.base, main_#t~mem606#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~mem609#1.base, main_#t~mem609#1.offset, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1, main_#t~post616#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1.base, main_#t~mem618#1.offset, main_#t~short619#1, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1.base, main_#t~mem622#1.offset, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1.base, main_#t~mem631#1.offset, main_#t~mem632#1, main_#t~mem633#1.base, main_#t~mem633#1.offset, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1.base, main_#t~mem636#1.offset, main_#t~mem637#1.base, main_#t~mem637#1.offset, main_#t~mem638#1, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem642#1, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1, main_#t~nondet643#1, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_#t~mem646#1, main_#t~post647#1, main_#t~mem648#1.base, main_#t~mem648#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_#t~mem650#1.base, main_#t~mem650#1.offset, main_#t~mem651#1.base, main_#t~mem651#1.offset, main_#t~mem652#1.base, main_#t~mem652#1.offset, main_#t~mem653#1.base, main_#t~mem653#1.offset, main_#t~mem654#1.base, main_#t~mem654#1.offset, main_#t~mem655#1.base, main_#t~mem655#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem656#1.base, main_#t~mem656#1.offset, main_#t~mem657#1, main_#t~post658#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite574#1.base, main_#t~ite574#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13656#L733-4 [2023-11-26 10:49:06,152 INFO L750 eck$LassoCheckResult]: Loop: 13656#L733-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13542#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 13544#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 13724#L735-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13725#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 13957#L743-268 havoc main_~_ha_hashv~1#1; 13958#L743-175 goto; 13786#L743-173 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 13787#L743-70 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 14528#L743-71 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch187#1 := 11 == main_~_hj_k~1#1; 14450#L743-72 assume !main_#t~switch187#1; 14451#L743-74 main_#t~switch187#1 := main_#t~switch187#1 || 10 == main_~_hj_k~1#1; 14415#L743-75 assume !main_#t~switch187#1; 14416#L743-77 main_#t~switch187#1 := main_#t~switch187#1 || 9 == main_~_hj_k~1#1; 14441#L743-78 assume !main_#t~switch187#1; 14442#L743-80 main_#t~switch187#1 := main_#t~switch187#1 || 8 == main_~_hj_k~1#1; 14512#L743-81 assume !main_#t~switch187#1; 14513#L743-83 main_#t~switch187#1 := main_#t~switch187#1 || 7 == main_~_hj_k~1#1; 14555#L743-84 assume !main_#t~switch187#1; 14556#L743-86 main_#t~switch187#1 := main_#t~switch187#1 || 6 == main_~_hj_k~1#1; 14586#L743-87 assume !main_#t~switch187#1; 14585#L743-89 main_#t~switch187#1 := main_#t~switch187#1 || 5 == main_~_hj_k~1#1; 14575#L743-90 assume !main_#t~switch187#1; 14574#L743-92 main_#t~switch187#1 := main_#t~switch187#1 || 4 == main_~_hj_k~1#1; 14129#L743-93 assume main_#t~switch187#1;call main_#t~mem195#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem195#1 % 256 % 4294967296);havoc main_#t~mem195#1; 14130#L743-95 main_#t~switch187#1 := main_#t~switch187#1 || 3 == main_~_hj_k~1#1; 14583#L743-96 assume main_#t~switch187#1;call main_#t~mem196#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem196#1 % 256 % 4294967296);havoc main_#t~mem196#1; 14581#L743-98 main_#t~switch187#1 := main_#t~switch187#1 || 2 == main_~_hj_k~1#1; 14577#L743-99 assume main_#t~switch187#1;call main_#t~mem197#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem197#1 % 256 % 4294967296);havoc main_#t~mem197#1; 14576#L743-101 main_#t~switch187#1 := main_#t~switch187#1 || 1 == main_~_hj_k~1#1; 14488#L743-102 assume main_#t~switch187#1;call main_#t~mem198#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem198#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem198#1 % 256 % 4294967296 else main_#t~mem198#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem198#1; 14096#L743-104 havoc main_#t~switch187#1; 13868#L743-170 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 13869#L743-106 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192; 14546#L743-112 main_~_hj_i~1#1 := main_#t~nondet199#1;havoc main_#t~nondet199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 14137#L743-113 assume !(0 == main_~_hj_j~1#1 % 4294967296); 14138#L743-115 assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296); 14557#L743-117 assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);assume main_#t~nondet200#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296; 14388#L743-119 main_~_hj_j~1#1 := main_#t~nondet200#1;havoc main_#t~nondet200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 14389#L743-120 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet201#1 := main_~_hj_j~1#1 % 4294967296 / 8192; 14447#L743-126 main_~_ha_hashv~1#1 := main_#t~nondet201#1;havoc main_#t~nondet201#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 14517#L743-127 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet202#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096; 13803#L743-133 main_~_hj_i~1#1 := main_#t~nondet202#1;havoc main_#t~nondet202#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 13804#L743-134 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet203#1 := 65536 * (main_~_hj_i~1#1 % 4294967296); 13736#L743-140 main_~_hj_j~1#1 := main_#t~nondet203#1;havoc main_#t~nondet203#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 13814#L743-141 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet204#1 := main_~_hj_j~1#1 % 4294967296 / 32; 13815#L743-147 main_~_ha_hashv~1#1 := main_#t~nondet204#1;havoc main_#t~nondet204#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 14352#L743-148 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet205#1 := main_~_ha_hashv~1#1 % 4294967296 / 8; 13581#L743-154 main_~_hj_i~1#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 13582#L743-155 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet206#1 := 1024 * (main_~_hj_i~1#1 % 4294967296); 13769#L743-161 main_~_hj_j~1#1 := main_#t~nondet206#1;havoc main_#t~nondet206#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 14119#L743-162 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet207#1 := main_~_hj_j~1#1 % 4294967296 / 32768; 14120#L743-168 main_~_ha_hashv~1#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 13849#L743-169 goto; 13850#L743-171 havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset; 13770#L743-172 goto; 13771#L743-174 goto; 14052#L743-265 call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 14112#L743-177 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem225#1.base, main_#t~mem225#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem225#1.base, main_#t~mem225#1.offset; 13759#L743-193 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1 := read~int#1(main_#t~mem228#1.base, 20 + main_#t~mem228#1.offset, 4);call write~$Pointer$#1(main_#t~mem227#1.base, main_#t~mem227#1.offset - main_#t~mem229#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1.base, main_#t~mem231#1.offset := read~$Pointer$#1(main_#t~mem230#1.base, 16 + main_#t~mem230#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem231#1.base, 8 + main_#t~mem231#1.offset, 4);havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1.base, main_#t~mem231#1.offset;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem232#1.base, 16 + main_#t~mem232#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset; 13760#L743-192 goto; 14171#L743-263 havoc main_~_ha_bkt~1#1;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1 := read~int#1(main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);main_#t~post235#1 := main_#t~mem234#1;call write~int#1(1 + main_#t~post235#1, main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1;havoc main_#t~post235#1; 14485#L743-202 call main_#t~mem236#1.base, main_#t~mem236#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem237#1 := read~int#1(main_#t~mem236#1.base, 4 + main_#t~mem236#1.offset, 4); 14231#L743-196 assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem237#1 - 1) % 4294967296;main_#t~nondet238#1 := 0; 14232#L743-200 main_~_ha_bkt~1#1 := main_#t~nondet238#1;havoc main_#t~mem236#1.base, main_#t~mem236#1.offset;havoc main_#t~mem237#1;havoc main_#t~nondet238#1; 14254#L743-201 goto; 14029#L743-260 call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem240#1.base, main_#t~mem240#1.offset := read~$Pointer$#1(main_#t~mem239#1.base, main_#t~mem239#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem240#1.base, main_#t~mem240#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;havoc main_#t~mem240#1.base, main_#t~mem240#1.offset;call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post242#1 := main_#t~mem241#1;call write~int#1(1 + main_#t~post242#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem241#1;havoc main_#t~post242#1;call main_#t~mem243#1.base, main_#t~mem243#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem243#1.base, main_#t~mem243#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem243#1.base, main_#t~mem243#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem244#1.base, main_#t~mem244#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 14030#L743-204 assume main_#t~mem244#1.base != 0 || main_#t~mem244#1.offset != 0;havoc main_#t~mem244#1.base, main_#t~mem244#1.offset;call main_#t~mem245#1.base, main_#t~mem245#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem245#1.base, 12 + main_#t~mem245#1.offset, 4);havoc main_#t~mem245#1.base, main_#t~mem245#1.offset; 14210#L743-206 call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem247#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem246#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short250#1 := main_#t~mem247#1 % 4294967296 >= 10 * (1 + main_#t~mem246#1) % 4294967296; 14327#L743-207 assume main_#t~short250#1;call main_#t~mem248#1.base, main_#t~mem248#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem249#1 := read~int#1(main_#t~mem248#1.base, 36 + main_#t~mem248#1.offset, 4);main_#t~short250#1 := 0 == main_#t~mem249#1 % 4294967296; 14532#L743-209 assume !main_#t~short250#1;havoc main_#t~mem247#1;havoc main_#t~mem246#1;havoc main_#t~mem248#1.base, main_#t~mem248#1.offset;havoc main_#t~mem249#1;havoc main_#t~short250#1; 14146#L743-258 havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset; 14016#L743-259 goto; 14017#L743-261 havoc main_~_ha_bkt~1#1; 14037#L743-262 goto; 14420#L743-264 goto; 14421#L743-266 havoc main_~_ha_hashv~1#1; 14507#L743-267 goto; 13655#L733-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 13656#L733-4 [2023-11-26 10:49:06,153 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:49:06,153 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 7 times [2023-11-26 10:49:06,154 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:49:06,154 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [155572567] [2023-11-26 10:49:06,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:06,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:49:06,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:49:06,181 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:49:06,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:49:06,206 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:49:06,207 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:49:06,207 INFO L85 PathProgramCache]: Analyzing trace with hash 2005204683, now seen corresponding path program 1 times [2023-11-26 10:49:06,207 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:49:06,208 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553004837] [2023-11-26 10:49:06,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:06,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:49:06,261 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:49:06,261 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1733602890] [2023-11-26 10:49:06,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:06,262 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:49:06,262 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:49:06,266 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:49:06,302 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-26 10:49:15,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:49:15,471 INFO L262 TraceCheckSpWp]: Trace formula consists of 512 conjuncts, 56 conjunts are in the unsatisfiable core [2023-11-26 10:49:15,476 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:49:15,805 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-26 10:49:15,806 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 44 treesize of output 22 [2023-11-26 10:49:16,294 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 10:49:16,294 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 10:49:16,295 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 10:49:16,295 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1553004837] [2023-11-26 10:49:16,295 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 10:49:16,295 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1733602890] [2023-11-26 10:49:16,295 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1733602890] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 10:49:16,295 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 10:49:16,296 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2023-11-26 10:49:16,296 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446314111] [2023-11-26 10:49:16,296 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 10:49:16,297 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 10:49:16,297 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 10:49:16,297 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-26 10:49:16,297 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2023-11-26 10:49:16,298 INFO L87 Difference]: Start difference. First operand 1048 states and 1564 transitions. cyclomatic complexity: 527 Second operand has 13 states, 13 states have (on average 6.076923076923077) internal successors, (79), 13 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 10:49:20,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 10:49:20,644 INFO L93 Difference]: Finished difference Result 1072 states and 1591 transitions. [2023-11-26 10:49:20,644 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1072 states and 1591 transitions. [2023-11-26 10:49:20,652 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 667 [2023-11-26 10:49:20,662 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1072 states to 1072 states and 1591 transitions. [2023-11-26 10:49:20,662 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1072 [2023-11-26 10:49:20,664 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1072 [2023-11-26 10:49:20,664 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1072 states and 1591 transitions. [2023-11-26 10:49:20,666 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 10:49:20,666 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1072 states and 1591 transitions. [2023-11-26 10:49:20,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1072 states and 1591 transitions. [2023-11-26 10:49:20,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1072 to 1059. [2023-11-26 10:49:20,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1059 states, 1052 states have (on average 1.4866920152091254) internal successors, (1564), 1051 states have internal predecessors, (1564), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2023-11-26 10:49:20,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1059 states to 1059 states and 1576 transitions. [2023-11-26 10:49:20,695 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1059 states and 1576 transitions. [2023-11-26 10:49:20,696 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2023-11-26 10:49:20,696 INFO L428 stractBuchiCegarLoop]: Abstraction has 1059 states and 1576 transitions. [2023-11-26 10:49:20,696 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 10:49:20,697 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1059 states and 1576 transitions. [2023-11-26 10:49:20,702 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 654 [2023-11-26 10:49:20,702 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 10:49:20,702 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 10:49:20,703 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 10:49:20,703 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 10:49:20,704 INFO L748 eck$LassoCheckResult]: Stem: 16207#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 16208#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~switch34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc55#1.base, main_#t~malloc55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~memset~res58#1.base, main_#t~memset~res58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~malloc64#1.base, main_#t~malloc64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~memset~res71#1.base, main_#t~memset~res71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~nondet85#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~post89#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem94#1, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~short97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~malloc100#1.base, main_#t~malloc100#1.offset, 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main_#t~mem428#1.offset, main_#t~mem429#1.base, main_#t~mem429#1.offset, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~mem431#1.base, main_#t~mem431#1.offset, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1, main_#t~mem436#1, main_#t~short437#1, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~ret439#1, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1.base, main_#t~mem442#1.offset, main_#t~mem443#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~mem450#1, main_#t~mem449#1, main_#t~mem451#1, main_#t~mem452#1, main_#t~mem454#1, main_#t~mem453#1, main_#t~mem455#1, main_#t~mem456#1, main_#t~nondet457#1, main_#t~nondet458#1, main_#t~nondet459#1, main_#t~nondet460#1, main_#t~nondet461#1, main_#t~nondet462#1, main_#t~nondet463#1, main_#t~nondet464#1, main_#t~nondet465#1, main_#t~switch466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~mem470#1, main_#t~mem471#1, main_#t~mem472#1, main_#t~mem473#1, main_#t~mem474#1, main_#t~mem475#1, main_#t~mem476#1, main_#t~mem477#1, main_#t~nondet478#1, main_#t~nondet479#1, main_#t~nondet480#1, main_#t~nondet481#1, main_#t~nondet482#1, main_#t~nondet483#1, main_#t~nondet484#1, main_#t~nondet485#1, main_#t~nondet486#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1, main_#t~nondet489#1, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1, main_#t~mem498#1, main_#t~mem499#1, main_#t~short500#1, main_#t~mem501#1.base, main_#t~mem501#1.offset, main_#t~ret502#1, main_#t~mem503#1.base, main_#t~mem503#1.offset, main_#t~mem504#1.base, main_#t~mem504#1.offset, main_#t~mem505#1.base, main_#t~mem505#1.offset, main_#t~mem506#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~mem513#1, main_#t~mem512#1, main_#t~mem514#1, main_#t~mem515#1, main_#t~mem517#1, main_#t~mem516#1, main_#t~mem518#1, main_#t~mem519#1, main_#t~nondet520#1, main_#t~nondet521#1, main_#t~nondet522#1, main_#t~nondet523#1, main_#t~nondet524#1, main_#t~nondet525#1, main_#t~nondet526#1, main_#t~nondet527#1, main_#t~nondet528#1, main_#t~switch529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~mem533#1, main_#t~mem534#1, main_#t~mem535#1, main_#t~mem536#1, main_#t~mem537#1, main_#t~mem538#1, main_#t~mem539#1, main_#t~mem540#1, main_#t~nondet541#1, main_#t~nondet542#1, main_#t~nondet543#1, main_#t~nondet544#1, main_#t~nondet545#1, main_#t~nondet546#1, main_#t~nondet547#1, main_#t~nondet548#1, main_#t~nondet549#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1, main_#t~nondet552#1, main_#t~mem553#1.base, main_#t~mem553#1.offset, main_#t~mem554#1.base, main_#t~mem554#1.offset, main_#t~mem555#1.base, main_#t~mem555#1.offset, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~mem557#1.base, main_#t~mem557#1.offset, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1, main_#t~mem561#1, main_#t~mem562#1, main_#t~short563#1, main_#t~mem564#1.base, main_#t~mem564#1.offset, main_#t~ret565#1, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~mem567#1.base, main_#t~mem567#1.offset, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem570#1, main_#t~ite572#1.base, main_#t~ite572#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1.base, main_#t~mem576#1.offset, main_#t~short577#1, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1.base, main_#t~mem580#1.offset, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1.base, main_#t~mem589#1.offset, main_#t~mem590#1, main_#t~mem591#1.base, main_#t~mem591#1.offset, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1.base, main_#t~mem594#1.offset, main_#t~mem595#1.base, main_#t~mem595#1.offset, main_#t~mem596#1, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem600#1, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1, main_#t~nondet601#1, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_#t~mem604#1, main_#t~post605#1, main_#t~mem606#1.base, main_#t~mem606#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~mem609#1.base, main_#t~mem609#1.offset, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1, main_#t~post616#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1.base, main_#t~mem618#1.offset, main_#t~short619#1, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1.base, main_#t~mem622#1.offset, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1.base, main_#t~mem631#1.offset, main_#t~mem632#1, main_#t~mem633#1.base, main_#t~mem633#1.offset, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1.base, main_#t~mem636#1.offset, main_#t~mem637#1.base, main_#t~mem637#1.offset, main_#t~mem638#1, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem642#1, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1, main_#t~nondet643#1, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_#t~mem646#1, main_#t~post647#1, main_#t~mem648#1.base, main_#t~mem648#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_#t~mem650#1.base, main_#t~mem650#1.offset, main_#t~mem651#1.base, main_#t~mem651#1.offset, main_#t~mem652#1.base, main_#t~mem652#1.offset, main_#t~mem653#1.base, main_#t~mem653#1.offset, main_#t~mem654#1.base, main_#t~mem654#1.offset, main_#t~mem655#1.base, main_#t~mem655#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem656#1.base, main_#t~mem656#1.offset, main_#t~mem657#1, main_#t~post658#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite574#1.base, main_#t~ite574#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 16030#L733-4 [2023-11-26 10:49:20,704 INFO L750 eck$LassoCheckResult]: Loop: 16030#L733-4 call main_#t~mem7#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 15916#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 15918#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 16098#L735-2 call main_#t~mem9#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 16099#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 16331#L743-268 havoc main_~_ha_hashv~1#1; 16332#L743-175 goto; 16160#L743-173 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 16161#L743-70 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 16323#L743-71 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch187#1 := 11 == main_~_hj_k~1#1; 16821#L743-72 assume !main_#t~switch187#1; 16170#L743-74 main_#t~switch187#1 := main_#t~switch187#1 || 10 == main_~_hj_k~1#1; 16171#L743-75 assume !main_#t~switch187#1; 16788#L743-77 main_#t~switch187#1 := main_#t~switch187#1 || 9 == main_~_hj_k~1#1; 16963#L743-78 assume !main_#t~switch187#1; 16962#L743-80 main_#t~switch187#1 := main_#t~switch187#1 || 8 == main_~_hj_k~1#1; 16960#L743-81 assume !main_#t~switch187#1; 16959#L743-83 main_#t~switch187#1 := main_#t~switch187#1 || 7 == main_~_hj_k~1#1; 16921#L743-84 assume !main_#t~switch187#1; 16916#L743-86 main_#t~switch187#1 := main_#t~switch187#1 || 6 == main_~_hj_k~1#1; 16917#L743-87 assume !main_#t~switch187#1; 16919#L743-89 main_#t~switch187#1 := main_#t~switch187#1 || 5 == main_~_hj_k~1#1; 16956#L743-90 assume !main_#t~switch187#1; 16771#L743-92 main_#t~switch187#1 := main_#t~switch187#1 || 4 == main_~_hj_k~1#1; 16503#L743-93 assume main_#t~switch187#1;call main_#t~mem195#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem195#1 % 256 % 4294967296);havoc main_#t~mem195#1; 16504#L743-95 main_#t~switch187#1 := main_#t~switch187#1 || 3 == main_~_hj_k~1#1; 16074#L743-96 assume main_#t~switch187#1;call main_#t~mem196#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem196#1 % 256 % 4294967296);havoc main_#t~mem196#1; 16075#L743-98 main_#t~switch187#1 := main_#t~switch187#1 || 2 == main_~_hj_k~1#1; 16911#L743-99 assume main_#t~switch187#1;call main_#t~mem197#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem197#1 % 256 % 4294967296);havoc main_#t~mem197#1; 16912#L743-101 main_#t~switch187#1 := main_#t~switch187#1 || 1 == main_~_hj_k~1#1; 16858#L743-102 assume main_#t~switch187#1;call main_#t~mem198#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem198#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem198#1 % 256 % 4294967296 else main_#t~mem198#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem198#1; 16470#L743-104 havoc main_#t~switch187#1; 16242#L743-170 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 16243#L743-106 assume !(0 == main_~_hj_i~1#1 % 4294967296); 16823#L743-108 assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296); 16824#L743-110 assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet199#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296; 16914#L743-112 main_~_hj_i~1#1 := main_#t~nondet199#1;havoc main_#t~nondet199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 16928#L743-113 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet200#1 := 256 * (main_~_hj_i~1#1 % 4294967296); 16926#L743-119 main_~_hj_j~1#1 := main_#t~nondet200#1;havoc main_#t~nondet200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 16923#L743-120 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet201#1 := main_~_hj_j~1#1 % 4294967296 / 8192; 16818#L743-126 main_~_ha_hashv~1#1 := main_#t~nondet201#1;havoc main_#t~nondet201#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 16885#L743-127 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet202#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096; 16177#L743-133 main_~_hj_i~1#1 := main_#t~nondet202#1;havoc main_#t~nondet202#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 16178#L743-134 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet203#1 := 65536 * (main_~_hj_i~1#1 % 4294967296); 16110#L743-140 main_~_hj_j~1#1 := main_#t~nondet203#1;havoc main_#t~nondet203#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 16188#L743-141 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet204#1 := main_~_hj_j~1#1 % 4294967296 / 32; 16189#L743-147 main_~_ha_hashv~1#1 := main_#t~nondet204#1;havoc main_#t~nondet204#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1; 16725#L743-148 assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~nondet205#1 := main_~_ha_hashv~1#1 % 4294967296 / 8; 15955#L743-154 main_~_hj_i~1#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1; 15956#L743-155 assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~nondet206#1 := 1024 * (main_~_hj_i~1#1 % 4294967296); 16143#L743-161 main_~_hj_j~1#1 := main_#t~nondet206#1;havoc main_#t~nondet206#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1; 16493#L743-162 assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~nondet207#1 := main_~_hj_j~1#1 % 4294967296 / 32768; 16494#L743-168 main_~_ha_hashv~1#1 := main_#t~nondet207#1;havoc main_#t~nondet207#1; 16223#L743-169 goto; 16224#L743-171 havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset; 16144#L743-172 goto; 16145#L743-174 goto; 16426#L743-265 call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 16486#L743-177 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem225#1.base, main_#t~mem225#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem225#1.base, main_#t~mem225#1.offset; 16133#L743-193 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1 := read~int#1(main_#t~mem228#1.base, 20 + main_#t~mem228#1.offset, 4);call write~$Pointer$#1(main_#t~mem227#1.base, main_#t~mem227#1.offset - main_#t~mem229#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1.base, main_#t~mem231#1.offset := read~$Pointer$#1(main_#t~mem230#1.base, 16 + main_#t~mem230#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem231#1.base, 8 + main_#t~mem231#1.offset, 4);havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1.base, main_#t~mem231#1.offset;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem232#1.base, 16 + main_#t~mem232#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset; 16134#L743-192 goto; 16544#L743-263 havoc main_~_ha_bkt~1#1;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1 := read~int#1(main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);main_#t~post235#1 := main_#t~mem234#1;call write~int#1(1 + main_#t~post235#1, main_#t~mem233#1.base, 12 + main_#t~mem233#1.offset, 4);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1;havoc main_#t~post235#1; 16855#L743-202 call main_#t~mem236#1.base, main_#t~mem236#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem237#1 := read~int#1(main_#t~mem236#1.base, 4 + main_#t~mem236#1.offset, 4); 16604#L743-196 assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem237#1 - 1) % 4294967296;main_#t~nondet238#1 := 0; 16605#L743-200 main_~_ha_bkt~1#1 := main_#t~nondet238#1;havoc main_#t~mem236#1.base, main_#t~mem236#1.offset;havoc main_#t~mem237#1;havoc main_#t~nondet238#1; 16627#L743-201 goto; 16403#L743-260 call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem240#1.base, main_#t~mem240#1.offset := read~$Pointer$#1(main_#t~mem239#1.base, main_#t~mem239#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem240#1.base, main_#t~mem240#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;havoc main_#t~mem240#1.base, main_#t~mem240#1.offset;call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post242#1 := main_#t~mem241#1;call write~int#1(1 + main_#t~post242#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem241#1;havoc main_#t~post242#1;call main_#t~mem243#1.base, main_#t~mem243#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem243#1.base, main_#t~mem243#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem243#1.base, main_#t~mem243#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem244#1.base, main_#t~mem244#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 16404#L743-204 assume main_#t~mem244#1.base != 0 || main_#t~mem244#1.offset != 0;havoc main_#t~mem244#1.base, main_#t~mem244#1.offset;call main_#t~mem245#1.base, main_#t~mem245#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem245#1.base, 12 + main_#t~mem245#1.offset, 4);havoc main_#t~mem245#1.base, main_#t~mem245#1.offset; 16583#L743-206 call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem247#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem246#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short250#1 := main_#t~mem247#1 % 4294967296 >= 10 * (1 + main_#t~mem246#1) % 4294967296; 16700#L743-207 assume main_#t~short250#1;call main_#t~mem248#1.base, main_#t~mem248#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem249#1 := read~int#1(main_#t~mem248#1.base, 36 + main_#t~mem248#1.offset, 4);main_#t~short250#1 := 0 == main_#t~mem249#1 % 4294967296; 16899#L743-209 assume !main_#t~short250#1;havoc main_#t~mem247#1;havoc main_#t~mem246#1;havoc main_#t~mem248#1.base, main_#t~mem248#1.offset;havoc main_#t~mem249#1;havoc main_#t~short250#1; 16519#L743-258 havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset; 16390#L743-259 goto; 16391#L743-261 havoc main_~_ha_bkt~1#1; 16411#L743-262 goto; 16792#L743-264 goto; 16793#L743-266 havoc main_~_ha_hashv~1#1; 16877#L743-267 goto; 16029#L733-3 call main_#t~mem5#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#3(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 16030#L733-4 [2023-11-26 10:49:20,705 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:49:20,705 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 8 times [2023-11-26 10:49:20,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:49:20,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [602263172] [2023-11-26 10:49:20,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:20,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:49:20,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:49:20,724 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 10:49:20,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 10:49:20,749 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 10:49:20,749 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 10:49:20,750 INFO L85 PathProgramCache]: Analyzing trace with hash 239801835, now seen corresponding path program 1 times [2023-11-26 10:49:20,750 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 10:49:20,750 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130842202] [2023-11-26 10:49:20,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:20,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 10:49:20,798 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 10:49:20,798 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1166031776] [2023-11-26 10:49:20,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 10:49:20,799 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 10:49:20,799 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 10:49:20,806 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 10:49:20,834 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c08a4876-a81e-4568-a9dc-7f4d3267be73/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-26 10:49:21,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 10:49:21,784 INFO L262 TraceCheckSpWp]: Trace formula consists of 512 conjuncts, 18 conjunts are in the unsatisfiable core [2023-11-26 10:49:21,786 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 10:49:34,841 WARN L293 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 18 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)