./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test8-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test8-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash fe37ed55d149c65fede95413b0b499314c3ede2b9eb9a49f03115ea64cafc68c --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 12:05:16,674 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 12:05:16,743 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 12:05:16,748 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 12:05:16,749 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 12:05:16,775 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 12:05:16,776 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 12:05:16,777 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 12:05:16,777 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 12:05:16,778 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 12:05:16,779 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 12:05:16,779 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 12:05:16,780 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 12:05:16,781 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 12:05:16,781 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 12:05:16,782 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 12:05:16,782 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 12:05:16,783 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 12:05:16,783 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 12:05:16,784 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 12:05:16,784 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 12:05:16,785 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 12:05:16,785 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 12:05:16,786 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 12:05:16,786 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 12:05:16,787 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 12:05:16,787 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 12:05:16,787 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 12:05:16,787 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 12:05:16,788 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 12:05:16,788 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 12:05:16,789 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 12:05:16,789 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 12:05:16,789 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 12:05:16,790 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 12:05:16,790 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 12:05:16,790 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 12:05:16,791 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 12:05:16,791 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fe37ed55d149c65fede95413b0b499314c3ede2b9eb9a49f03115ea64cafc68c [2023-11-26 12:05:17,098 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 12:05:17,130 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 12:05:17,133 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 12:05:17,135 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 12:05:17,136 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 12:05:17,137 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test8-2.i [2023-11-26 12:05:20,417 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 12:05:20,809 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 12:05:20,810 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/sv-benchmarks/c/uthash-2.0.2/uthash_BER_test8-2.i [2023-11-26 12:05:20,841 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/data/5a45efbd6/67c1d3d9a54442b2988748cba41404c4/FLAG1cb8c8fe7 [2023-11-26 12:05:20,856 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/data/5a45efbd6/67c1d3d9a54442b2988748cba41404c4 [2023-11-26 12:05:20,858 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 12:05:20,860 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 12:05:20,862 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 12:05:20,862 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 12:05:20,868 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 12:05:20,869 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:05:20" (1/1) ... [2023-11-26 12:05:20,870 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@57661dc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:20, skipping insertion in model container [2023-11-26 12:05:20,871 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:05:20" (1/1) ... [2023-11-26 12:05:20,950 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 12:05:21,695 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:05:21,710 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 12:05:21,910 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:05:21,967 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-26 12:05:21,973 INFO L206 MainTranslator]: Completed translation [2023-11-26 12:05:21,974 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21 WrapperNode [2023-11-26 12:05:21,974 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 12:05:21,976 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 12:05:21,976 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 12:05:21,976 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 12:05:21,983 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,039 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,150 INFO L138 Inliner]: procedures = 177, calls = 350, calls flagged for inlining = 21, calls inlined = 65, statements flattened = 1809 [2023-11-26 12:05:22,164 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 12:05:22,165 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 12:05:22,165 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 12:05:22,166 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 12:05:22,181 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,182 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,210 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,392 INFO L175 MemorySlicer]: Split 309 memory accesses to 4 slices as follows [2, 34, 268, 5]. 87 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0, 0]. The 63 writes are split as follows [0, 4, 58, 1]. [2023-11-26 12:05:22,395 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,396 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,488 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,522 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,539 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,560 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,584 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 12:05:22,585 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 12:05:22,586 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 12:05:22,586 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 12:05:22,587 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (1/1) ... [2023-11-26 12:05:22,594 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:05:22,606 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:22,619 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:05:22,652 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 12:05:22,670 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 12:05:22,671 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 12:05:22,671 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 12:05:22,671 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-26 12:05:22,671 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 12:05:22,671 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 12:05:22,672 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 12:05:22,673 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-26 12:05:22,673 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 12:05:22,673 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 12:05:22,673 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 12:05:22,674 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-26 12:05:22,674 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 12:05:22,674 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 12:05:22,675 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 12:05:22,676 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-26 12:05:22,676 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 12:05:22,676 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 12:05:22,676 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 12:05:22,676 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 12:05:22,677 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 12:05:22,677 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-26 12:05:22,678 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 12:05:22,678 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-26 12:05:22,678 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 12:05:22,679 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 12:05:22,679 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 12:05:22,679 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-26 12:05:22,679 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 12:05:22,679 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 12:05:22,680 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 12:05:22,681 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 12:05:22,681 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-26 12:05:22,681 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 12:05:22,682 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 12:05:23,015 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 12:05:23,018 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 12:05:23,023 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:05:23,104 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:05:23,139 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:05:23,186 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:05:25,191 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 12:05:25,248 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 12:05:25,248 INFO L309 CfgBuilder]: Removed 71 assume(true) statements. [2023-11-26 12:05:25,250 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:05:25 BoogieIcfgContainer [2023-11-26 12:05:25,263 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 12:05:25,264 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 12:05:25,264 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 12:05:25,268 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 12:05:25,269 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:05:25,269 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 12:05:20" (1/3) ... [2023-11-26 12:05:25,270 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7a78290b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:05:25, skipping insertion in model container [2023-11-26 12:05:25,270 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:05:25,270 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:05:21" (2/3) ... [2023-11-26 12:05:25,271 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7a78290b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:05:25, skipping insertion in model container [2023-11-26 12:05:25,271 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:05:25,271 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:05:25" (3/3) ... [2023-11-26 12:05:25,272 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_BER_test8-2.i [2023-11-26 12:05:25,344 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 12:05:25,345 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 12:05:25,345 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 12:05:25,345 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 12:05:25,345 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 12:05:25,345 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 12:05:25,346 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 12:05:25,346 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 12:05:25,353 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 539 states, 534 states have (on average 1.6591760299625469) internal successors, (886), 534 states have internal predecessors, (886), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:25,443 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 525 [2023-11-26 12:05:25,443 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:25,443 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:25,453 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:05:25,453 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:25,453 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 12:05:25,455 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 539 states, 534 states have (on average 1.6591760299625469) internal successors, (886), 534 states have internal predecessors, (886), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:25,469 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 525 [2023-11-26 12:05:25,469 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:25,470 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:25,471 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:05:25,471 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:25,479 INFO L748 eck$LassoCheckResult]: Stem: 175#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 442#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~short281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem304#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1, main_#t~nondet305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1, main_#t~post309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~post320#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite278#1.base, main_#t~ite278#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 327#L765-4true [2023-11-26 12:05:25,479 INFO L750 eck$LassoCheckResult]: Loop: 327#L765-4true call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 474#L765-1true assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 510#L767true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 429#L767-2true call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 226#L772-269true assume !true; 39#L772-270true call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#2(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 114#L709true assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 168#L702true assume !(0 == __VERIFIER_assert_~cond#1); 531#L701true havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 7#L708true havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 472#L707true havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 196#L765-3true call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#1(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 327#L765-4true [2023-11-26 12:05:25,485 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:25,486 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 1 times [2023-11-26 12:05:25,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:25,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1649396083] [2023-11-26 12:05:25,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:25,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:25,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:25,628 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:25,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:25,730 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:25,735 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:25,736 INFO L85 PathProgramCache]: Analyzing trace with hash -325592504, now seen corresponding path program 1 times [2023-11-26 12:05:25,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:25,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985922294] [2023-11-26 12:05:25,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:25,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:25,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:25,819 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:25,823 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [985922294] [2023-11-26 12:05:25,824 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-26 12:05:25,824 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1370692794] [2023-11-26 12:05:25,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:25,825 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:25,825 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:25,829 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:25,836 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-26 12:05:26,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:26,032 INFO L262 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-26 12:05:26,033 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:26,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:26,056 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:26,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1370692794] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:26,058 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:26,058 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 12:05:26,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1789037003] [2023-11-26 12:05:26,060 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:26,064 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:26,065 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:26,109 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 12:05:26,111 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 12:05:26,115 INFO L87 Difference]: Start difference. First operand has 539 states, 534 states have (on average 1.6591760299625469) internal successors, (886), 534 states have internal predecessors, (886), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:26,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:26,190 INFO L93 Difference]: Finished difference Result 508 states and 724 transitions. [2023-11-26 12:05:26,191 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 508 states and 724 transitions. [2023-11-26 12:05:26,202 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 463 [2023-11-26 12:05:26,221 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 508 states to 473 states and 689 transitions. [2023-11-26 12:05:26,222 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 473 [2023-11-26 12:05:26,225 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 473 [2023-11-26 12:05:26,226 INFO L73 IsDeterministic]: Start isDeterministic. Operand 473 states and 689 transitions. [2023-11-26 12:05:26,235 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:26,235 INFO L218 hiAutomatonCegarLoop]: Abstraction has 473 states and 689 transitions. [2023-11-26 12:05:26,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 473 states and 689 transitions. [2023-11-26 12:05:26,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 473 to 473. [2023-11-26 12:05:26,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 473 states, 469 states have (on average 1.4562899786780383) internal successors, (683), 468 states have internal predecessors, (683), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:26,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 473 states to 473 states and 689 transitions. [2023-11-26 12:05:26,297 INFO L240 hiAutomatonCegarLoop]: Abstraction has 473 states and 689 transitions. [2023-11-26 12:05:26,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 12:05:26,302 INFO L428 stractBuchiCegarLoop]: Abstraction has 473 states and 689 transitions. [2023-11-26 12:05:26,302 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 12:05:26,302 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 473 states and 689 transitions. [2023-11-26 12:05:26,306 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 463 [2023-11-26 12:05:26,306 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:26,306 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:26,308 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:05:26,308 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:26,309 INFO L748 eck$LassoCheckResult]: Stem: 1347#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 1348#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~short281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem304#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1, main_#t~nondet305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1, main_#t~post309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~post320#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite278#1.base, main_#t~ite278#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1370#L765-4 [2023-11-26 12:05:26,333 INFO L750 eck$LassoCheckResult]: Loop: 1370#L765-4 call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1488#L765-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 1552#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1541#L767-2 call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 1401#L772-269 havoc main_~_ha_hashv~0#1; 1402#L772-176 goto; 1418#L772-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1419#L772-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1486#L772-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 1314#L772-73 assume main_#t~switch33#1;call main_#t~mem34#1 := read~int#2(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 1164#L772-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 1165#L772-76 assume !main_#t~switch33#1; 1197#L772-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 1454#L772-79 assume main_#t~switch33#1;call main_#t~mem36#1 := read~int#2(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 1363#L772-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 1364#L772-82 assume main_#t~switch33#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1473#L772-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 1474#L772-85 assume main_#t~switch33#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1516#L772-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 1504#L772-88 assume main_#t~switch33#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1479#L772-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 1294#L772-91 assume main_#t~switch33#1;call main_#t~mem40#1 := read~int#2(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1295#L772-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 1365#L772-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 1366#L772-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 1394#L772-97 assume !main_#t~switch33#1; 1411#L772-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 1333#L772-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 1334#L772-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 1505#L772-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 1440#L772-105 havoc main_#t~switch33#1; 1441#L772-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1538#L772-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1450#L772-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1503#L772-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1107#L772-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1403#L772-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1117#L772-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1322#L772-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1143#L772-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1144#L772-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1089#L772-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1531#L772-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1547#L772-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1524#L772-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1137#L772-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1138#L772-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1223#L772-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1224#L772-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1199#L772-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 1259#L772-170 goto; 1358#L772-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1335#L772-173 goto; 1336#L772-175 goto; 1522#L772-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1523#L772-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 1175#L772-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#2(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 1176#L772-193 goto; 1182#L772-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#2(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#2(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 1397#L772-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#2(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 1388#L772-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 1300#L772-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 1301#L772-202 goto; 1380#L772-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#2(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1381#L772-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 1260#L772-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 1261#L772-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#2(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 1456#L772-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 1475#L772-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1476#L772-260 goto; 1420#L772-262 havoc main_~_ha_bkt~0#1; 1421#L772-263 goto; 1536#L772-265 goto; 1487#L772-267 havoc main_~_ha_hashv~0#1; 1460#L772-268 goto; 1162#L772-270 call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#2(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 1163#L709 assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 1270#L702 assume !(0 == __VERIFIER_assert_~cond#1); 1342#L701 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 1103#L708 havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 1104#L707 havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 1369#L765-3 call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#1(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1370#L765-4 [2023-11-26 12:05:26,334 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:26,334 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 2 times [2023-11-26 12:05:26,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:26,335 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [375787595] [2023-11-26 12:05:26,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:26,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:26,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:26,387 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:26,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:26,434 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:26,435 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:26,436 INFO L85 PathProgramCache]: Analyzing trace with hash -240786733, now seen corresponding path program 1 times [2023-11-26 12:05:26,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:26,437 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1580141043] [2023-11-26 12:05:26,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:26,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:26,576 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:26,576 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [95546369] [2023-11-26 12:05:26,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:26,577 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:26,577 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:26,612 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:26,633 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-26 12:05:27,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:27,012 INFO L262 TraceCheckSpWp]: Trace formula consists of 571 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 12:05:27,017 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:27,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:27,072 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:27,072 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:27,073 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1580141043] [2023-11-26 12:05:27,073 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:05:27,073 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [95546369] [2023-11-26 12:05:27,073 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [95546369] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:27,073 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:27,073 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 12:05:27,074 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [908283024] [2023-11-26 12:05:27,074 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:27,074 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:27,075 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:27,075 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 12:05:27,075 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 12:05:27,076 INFO L87 Difference]: Start difference. First operand 473 states and 689 transitions. cyclomatic complexity: 220 Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:27,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:27,210 INFO L93 Difference]: Finished difference Result 494 states and 710 transitions. [2023-11-26 12:05:27,210 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 494 states and 710 transitions. [2023-11-26 12:05:27,215 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 484 [2023-11-26 12:05:27,221 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 494 states to 494 states and 710 transitions. [2023-11-26 12:05:27,221 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 494 [2023-11-26 12:05:27,222 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 494 [2023-11-26 12:05:27,222 INFO L73 IsDeterministic]: Start isDeterministic. Operand 494 states and 710 transitions. [2023-11-26 12:05:27,225 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:27,225 INFO L218 hiAutomatonCegarLoop]: Abstraction has 494 states and 710 transitions. [2023-11-26 12:05:27,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states and 710 transitions. [2023-11-26 12:05:27,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 493. [2023-11-26 12:05:27,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 493 states, 489 states have (on average 1.4376278118609407) internal successors, (703), 488 states have internal predecessors, (703), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:27,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 493 states to 493 states and 709 transitions. [2023-11-26 12:05:27,248 INFO L240 hiAutomatonCegarLoop]: Abstraction has 493 states and 709 transitions. [2023-11-26 12:05:27,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 12:05:27,249 INFO L428 stractBuchiCegarLoop]: Abstraction has 493 states and 709 transitions. [2023-11-26 12:05:27,249 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 12:05:27,249 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 493 states and 709 transitions. [2023-11-26 12:05:27,252 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 483 [2023-11-26 12:05:27,252 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:27,252 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:27,254 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:05:27,254 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:27,254 INFO L748 eck$LassoCheckResult]: Stem: 2565#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 2566#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~short281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem304#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1, main_#t~nondet305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1, main_#t~post309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~post320#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite278#1.base, main_#t~ite278#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2588#L765-4 [2023-11-26 12:05:27,255 INFO L750 eck$LassoCheckResult]: Loop: 2588#L765-4 call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2708#L765-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 2777#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2766#L767-2 call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 2619#L772-269 havoc main_~_ha_hashv~0#1; 2620#L772-176 goto; 2636#L772-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2637#L772-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2705#L772-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 2531#L772-73 assume main_#t~switch33#1;call main_#t~mem34#1 := read~int#2(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 2532#L772-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 2413#L772-76 assume main_#t~switch33#1;call main_#t~mem35#1 := read~int#2(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 2414#L772-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 2672#L772-79 assume main_#t~switch33#1;call main_#t~mem36#1 := read~int#2(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 2673#L772-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 2753#L772-82 assume main_#t~switch33#1;call main_#t~mem37#1 := read~int#2(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 2754#L772-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 2786#L772-85 assume main_#t~switch33#1;call main_#t~mem38#1 := read~int#2(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 2735#L772-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 2723#L772-88 assume main_#t~switch33#1;call main_#t~mem39#1 := read~int#2(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2699#L772-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 2511#L772-91 assume main_#t~switch33#1;call main_#t~mem40#1 := read~int#2(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 2512#L772-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 2583#L772-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 2584#L772-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 2614#L772-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 2629#L772-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 2553#L772-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 2554#L772-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 2724#L772-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 2658#L772-105 havoc main_#t~switch33#1; 2659#L772-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2761#L772-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2668#L772-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2722#L772-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2323#L772-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2621#L772-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2333#L772-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2540#L772-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2359#L772-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2360#L772-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2305#L772-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2752#L772-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2772#L772-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2745#L772-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2353#L772-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2354#L772-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2440#L772-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2441#L772-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2416#L772-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 2475#L772-170 goto; 2575#L772-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2548#L772-173 goto; 2549#L772-175 goto; 2743#L772-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2744#L772-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 2389#L772-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#2(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 2390#L772-193 goto; 2396#L772-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#2(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#2(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 2615#L772-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#2(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 2604#L772-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 2515#L772-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 2516#L772-202 goto; 2595#L772-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#2(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2596#L772-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 2477#L772-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 2478#L772-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#2(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 2674#L772-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 2694#L772-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2695#L772-260 goto; 2638#L772-262 havoc main_~_ha_bkt~0#1; 2639#L772-263 goto; 2759#L772-265 goto; 2706#L772-267 havoc main_~_ha_hashv~0#1; 2679#L772-268 goto; 2378#L772-270 call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#2(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 2379#L709 assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 2486#L702 assume !(0 == __VERIFIER_assert_~cond#1); 2559#L701 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 2319#L708 havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 2320#L707 havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 2587#L765-3 call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#1(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 2588#L765-4 [2023-11-26 12:05:27,256 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:27,256 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 3 times [2023-11-26 12:05:27,256 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:27,256 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979852505] [2023-11-26 12:05:27,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:27,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:27,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:27,273 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:27,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:27,295 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:27,295 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:27,296 INFO L85 PathProgramCache]: Analyzing trace with hash -534353329, now seen corresponding path program 1 times [2023-11-26 12:05:27,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:27,296 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683442007] [2023-11-26 12:05:27,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:27,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:27,388 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:27,389 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1240636669] [2023-11-26 12:05:27,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:27,389 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:27,389 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:27,393 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:27,412 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-26 12:05:27,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:27,725 INFO L262 TraceCheckSpWp]: Trace formula consists of 583 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 12:05:27,729 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:27,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:27,758 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:27,758 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:27,758 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683442007] [2023-11-26 12:05:27,758 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:05:27,759 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1240636669] [2023-11-26 12:05:27,759 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1240636669] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:27,759 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:27,759 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 12:05:27,760 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [173192454] [2023-11-26 12:05:27,760 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:27,760 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:27,760 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:27,761 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 12:05:27,761 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 12:05:27,761 INFO L87 Difference]: Start difference. First operand 493 states and 709 transitions. cyclomatic complexity: 220 Second operand has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:27,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:27,889 INFO L93 Difference]: Finished difference Result 480 states and 689 transitions. [2023-11-26 12:05:27,889 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 480 states and 689 transitions. [2023-11-26 12:05:27,894 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 470 [2023-11-26 12:05:27,899 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 480 states to 480 states and 689 transitions. [2023-11-26 12:05:27,899 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 480 [2023-11-26 12:05:27,900 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 480 [2023-11-26 12:05:27,900 INFO L73 IsDeterministic]: Start isDeterministic. Operand 480 states and 689 transitions. [2023-11-26 12:05:27,902 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:27,902 INFO L218 hiAutomatonCegarLoop]: Abstraction has 480 states and 689 transitions. [2023-11-26 12:05:27,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 480 states and 689 transitions. [2023-11-26 12:05:27,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 480 to 479. [2023-11-26 12:05:27,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 479 states, 475 states have (on average 1.4357894736842105) internal successors, (682), 474 states have internal predecessors, (682), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:27,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 479 states to 479 states and 688 transitions. [2023-11-26 12:05:27,918 INFO L240 hiAutomatonCegarLoop]: Abstraction has 479 states and 688 transitions. [2023-11-26 12:05:27,918 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 12:05:27,919 INFO L428 stractBuchiCegarLoop]: Abstraction has 479 states and 688 transitions. [2023-11-26 12:05:27,919 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 12:05:27,919 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 479 states and 688 transitions. [2023-11-26 12:05:27,922 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 469 [2023-11-26 12:05:27,922 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:27,922 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:27,924 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:05:27,924 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:27,924 INFO L748 eck$LassoCheckResult]: Stem: 3788#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 3789#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~short281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem304#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1, main_#t~nondet305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1, main_#t~post309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~post320#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite278#1.base, main_#t~ite278#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3812#L765-4 [2023-11-26 12:05:27,925 INFO L750 eck$LassoCheckResult]: Loop: 3812#L765-4 call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3931#L765-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 3994#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3983#L767-2 call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 3843#L772-269 havoc main_~_ha_hashv~0#1; 3844#L772-176 goto; 3860#L772-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3861#L772-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3928#L772-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 3755#L772-73 assume !main_#t~switch33#1; 3605#L772-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 3606#L772-76 assume !main_#t~switch33#1; 3638#L772-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 3896#L772-79 assume !main_#t~switch33#1; 3803#L772-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 3804#L772-82 assume !main_#t~switch33#1; 3915#L772-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 3916#L772-85 assume !main_#t~switch33#1; 3958#L772-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 3946#L772-88 assume !main_#t~switch33#1; 3921#L772-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 3735#L772-91 assume !main_#t~switch33#1; 3736#L772-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 3805#L772-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 3806#L772-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 3836#L772-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 3853#L772-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 3774#L772-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 3775#L772-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 3947#L772-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 3882#L772-105 havoc main_#t~switch33#1; 3883#L772-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3980#L772-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3892#L772-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3945#L772-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3548#L772-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3845#L772-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3558#L772-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3763#L772-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3584#L772-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3585#L772-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3530#L772-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3973#L772-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3989#L772-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3966#L772-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3578#L772-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3579#L772-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3664#L772-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3665#L772-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3640#L772-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 3700#L772-170 goto; 3799#L772-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3776#L772-173 goto; 3777#L772-175 goto; 3964#L772-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3965#L772-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 3616#L772-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#2(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 3617#L772-193 goto; 3623#L772-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#2(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#2(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 3839#L772-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#2(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 3830#L772-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 3741#L772-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 3742#L772-202 goto; 3822#L772-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#2(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3823#L772-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 3701#L772-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 3702#L772-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#2(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 3898#L772-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 3917#L772-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3918#L772-260 goto; 3862#L772-262 havoc main_~_ha_bkt~0#1; 3863#L772-263 goto; 3978#L772-265 goto; 3929#L772-267 havoc main_~_ha_hashv~0#1; 3902#L772-268 goto; 3603#L772-270 call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#2(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 3604#L709 assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 3711#L702 assume !(0 == __VERIFIER_assert_~cond#1); 3783#L701 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 3544#L708 havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 3545#L707 havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 3811#L765-3 call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#1(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3812#L765-4 [2023-11-26 12:05:27,925 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:27,925 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 4 times [2023-11-26 12:05:27,925 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:27,926 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1110668007] [2023-11-26 12:05:27,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:27,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:27,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:27,944 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:27,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:27,995 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:27,996 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:27,996 INFO L85 PathProgramCache]: Analyzing trace with hash -968560931, now seen corresponding path program 1 times [2023-11-26 12:05:27,997 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:27,997 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901079085] [2023-11-26 12:05:27,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:27,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:28,057 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:28,057 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [966940061] [2023-11-26 12:05:28,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:28,058 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:28,058 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:28,064 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:28,084 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-26 12:05:29,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:29,030 INFO L262 TraceCheckSpWp]: Trace formula consists of 541 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 12:05:29,034 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:29,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:29,171 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:29,171 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:29,171 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901079085] [2023-11-26 12:05:29,172 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:05:29,172 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [966940061] [2023-11-26 12:05:29,172 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [966940061] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:29,172 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:29,172 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-26 12:05:29,173 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2090726436] [2023-11-26 12:05:29,173 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:29,173 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:29,173 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:29,174 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2023-11-26 12:05:29,174 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2023-11-26 12:05:29,174 INFO L87 Difference]: Start difference. First operand 479 states and 688 transitions. cyclomatic complexity: 213 Second operand has 8 states, 8 states have (on average 10.25) internal successors, (82), 8 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:29,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:29,691 INFO L93 Difference]: Finished difference Result 528 states and 750 transitions. [2023-11-26 12:05:29,691 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 528 states and 750 transitions. [2023-11-26 12:05:29,696 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 518 [2023-11-26 12:05:29,702 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 528 states to 528 states and 750 transitions. [2023-11-26 12:05:29,702 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 528 [2023-11-26 12:05:29,705 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 528 [2023-11-26 12:05:29,706 INFO L73 IsDeterministic]: Start isDeterministic. Operand 528 states and 750 transitions. [2023-11-26 12:05:29,707 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:29,707 INFO L218 hiAutomatonCegarLoop]: Abstraction has 528 states and 750 transitions. [2023-11-26 12:05:29,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 528 states and 750 transitions. [2023-11-26 12:05:29,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 528 to 519. [2023-11-26 12:05:29,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 515 states have (on average 1.4174757281553398) internal successors, (730), 514 states have internal predecessors, (730), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:29,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 736 transitions. [2023-11-26 12:05:29,725 INFO L240 hiAutomatonCegarLoop]: Abstraction has 519 states and 736 transitions. [2023-11-26 12:05:29,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 12:05:29,727 INFO L428 stractBuchiCegarLoop]: Abstraction has 519 states and 736 transitions. [2023-11-26 12:05:29,727 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 12:05:29,727 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 519 states and 736 transitions. [2023-11-26 12:05:29,733 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 509 [2023-11-26 12:05:29,733 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:29,733 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:29,735 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:05:29,735 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:29,735 INFO L748 eck$LassoCheckResult]: Stem: 5049#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 5050#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~short281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem304#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1, main_#t~nondet305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1, main_#t~post309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~post320#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite278#1.base, main_#t~ite278#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5073#L765-4 [2023-11-26 12:05:29,736 INFO L750 eck$LassoCheckResult]: Loop: 5073#L765-4 call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5192#L765-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 5260#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5248#L767-2 call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 5104#L772-269 havoc main_~_ha_hashv~0#1; 5105#L772-176 goto; 5122#L772-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5123#L772-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5190#L772-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 5015#L772-73 assume !main_#t~switch33#1; 4865#L772-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 4866#L772-76 assume !main_#t~switch33#1; 4898#L772-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 5158#L772-79 assume !main_#t~switch33#1; 5065#L772-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 5066#L772-82 assume !main_#t~switch33#1; 5177#L772-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 5178#L772-85 assume !main_#t~switch33#1; 5220#L772-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 5208#L772-88 assume !main_#t~switch33#1; 5183#L772-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 4995#L772-91 assume !main_#t~switch33#1; 4996#L772-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 5067#L772-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 5068#L772-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 5097#L772-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 5115#L772-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 5035#L772-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 5036#L772-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 5209#L772-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 5144#L772-105 havoc main_#t~switch33#1; 5145#L772-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5247#L772-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5268#L772-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5207#L772-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 5106#L772-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5107#L772-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 5253#L772-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1; 4818#L772-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5024#L772-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4844#L772-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4845#L772-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4791#L772-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5236#L772-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5255#L772-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5228#L772-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4838#L772-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4839#L772-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4924#L772-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4925#L772-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4900#L772-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 4960#L772-170 goto; 5060#L772-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5037#L772-173 goto; 5038#L772-175 goto; 5226#L772-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5227#L772-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 4876#L772-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#2(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 4877#L772-193 goto; 4883#L772-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#2(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#2(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 5100#L772-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#2(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 5091#L772-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 5001#L772-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 5002#L772-202 goto; 5083#L772-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#2(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5084#L772-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 4961#L772-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 4962#L772-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#2(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 5160#L772-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 5179#L772-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5180#L772-260 goto; 5124#L772-262 havoc main_~_ha_bkt~0#1; 5125#L772-263 goto; 5241#L772-265 goto; 5191#L772-267 havoc main_~_ha_hashv~0#1; 5164#L772-268 goto; 4863#L772-270 call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#2(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 4864#L709 assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 4971#L702 assume !(0 == __VERIFIER_assert_~cond#1); 5044#L701 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 4805#L708 havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 4806#L707 havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 5072#L765-3 call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#1(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 5073#L765-4 [2023-11-26 12:05:29,737 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:29,737 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 5 times [2023-11-26 12:05:29,737 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:29,737 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870504905] [2023-11-26 12:05:29,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:29,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:29,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:29,763 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:29,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:29,780 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:29,780 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:29,780 INFO L85 PathProgramCache]: Analyzing trace with hash 231617376, now seen corresponding path program 1 times [2023-11-26 12:05:29,781 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:29,781 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1963075700] [2023-11-26 12:05:29,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:29,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:29,833 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:29,833 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [814430993] [2023-11-26 12:05:29,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:29,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:29,834 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:29,840 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:29,855 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-26 12:05:30,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:30,690 INFO L262 TraceCheckSpWp]: Trace formula consists of 542 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 12:05:30,694 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:30,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:30,832 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:30,832 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:30,833 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1963075700] [2023-11-26 12:05:30,833 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:05:30,833 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [814430993] [2023-11-26 12:05:30,833 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [814430993] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:30,833 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:30,834 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 12:05:30,834 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [223083580] [2023-11-26 12:05:30,834 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:30,835 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:30,835 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:30,835 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 12:05:30,836 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 12:05:30,836 INFO L87 Difference]: Start difference. First operand 519 states and 736 transitions. cyclomatic complexity: 221 Second operand has 7 states, 7 states have (on average 11.857142857142858) internal successors, (83), 7 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:31,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:31,725 INFO L93 Difference]: Finished difference Result 537 states and 763 transitions. [2023-11-26 12:05:31,725 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 537 states and 763 transitions. [2023-11-26 12:05:31,731 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 527 [2023-11-26 12:05:31,738 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 537 states to 537 states and 763 transitions. [2023-11-26 12:05:31,738 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 537 [2023-11-26 12:05:31,739 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 537 [2023-11-26 12:05:31,739 INFO L73 IsDeterministic]: Start isDeterministic. Operand 537 states and 763 transitions. [2023-11-26 12:05:31,741 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:31,741 INFO L218 hiAutomatonCegarLoop]: Abstraction has 537 states and 763 transitions. [2023-11-26 12:05:31,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states and 763 transitions. [2023-11-26 12:05:31,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 529. [2023-11-26 12:05:31,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 529 states, 525 states have (on average 1.420952380952381) internal successors, (746), 524 states have internal predecessors, (746), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:31,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 529 states to 529 states and 752 transitions. [2023-11-26 12:05:31,755 INFO L240 hiAutomatonCegarLoop]: Abstraction has 529 states and 752 transitions. [2023-11-26 12:05:31,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 12:05:31,760 INFO L428 stractBuchiCegarLoop]: Abstraction has 529 states and 752 transitions. [2023-11-26 12:05:31,760 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 12:05:31,760 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 529 states and 752 transitions. [2023-11-26 12:05:31,763 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 519 [2023-11-26 12:05:31,763 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:31,764 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:31,766 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:05:31,766 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:31,767 INFO L748 eck$LassoCheckResult]: Stem: 6368#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 6369#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~short281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem304#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1, main_#t~nondet305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1, main_#t~post309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~post320#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite278#1.base, main_#t~ite278#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6392#L765-4 [2023-11-26 12:05:31,770 INFO L750 eck$LassoCheckResult]: Loop: 6392#L765-4 call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6513#L765-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 6582#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6570#L767-2 call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 6423#L772-269 havoc main_~_ha_hashv~0#1; 6424#L772-176 goto; 6441#L772-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6442#L772-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6511#L772-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 6333#L772-73 assume !main_#t~switch33#1; 6183#L772-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 6184#L772-76 assume !main_#t~switch33#1; 6216#L772-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 6486#L772-79 assume !main_#t~switch33#1; 6384#L772-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 6385#L772-82 assume !main_#t~switch33#1; 6498#L772-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 6499#L772-85 assume !main_#t~switch33#1; 6541#L772-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 6529#L772-88 assume !main_#t~switch33#1; 6504#L772-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 6313#L772-91 assume !main_#t~switch33#1; 6314#L772-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 6386#L772-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 6387#L772-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 6416#L772-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 6434#L772-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 6354#L772-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 6355#L772-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 6530#L772-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 6463#L772-105 havoc main_#t~switch33#1; 6464#L772-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6566#L772-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 6497#L772-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 6472#L772-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := 0; 6473#L772-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6623#L772-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 6592#L772-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6595#L772-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 6335#L772-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6594#L772-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6162#L772-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6163#L772-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6109#L772-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6559#L772-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6577#L772-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6551#L772-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6156#L772-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6157#L772-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6242#L772-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6243#L772-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6218#L772-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 6278#L772-170 goto; 6379#L772-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6356#L772-173 goto; 6357#L772-175 goto; 6549#L772-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6550#L772-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 6194#L772-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#2(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 6195#L772-193 goto; 6201#L772-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#2(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#2(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 6419#L772-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#2(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 6410#L772-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 6319#L772-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 6320#L772-202 goto; 6403#L772-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#2(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6404#L772-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 6279#L772-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 6280#L772-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#2(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 6480#L772-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 6500#L772-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6501#L772-260 goto; 6443#L772-262 havoc main_~_ha_bkt~0#1; 6444#L772-263 goto; 6564#L772-265 goto; 6512#L772-267 havoc main_~_ha_hashv~0#1; 6484#L772-268 goto; 6181#L772-270 call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#2(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 6182#L709 assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 6289#L702 assume !(0 == __VERIFIER_assert_~cond#1); 6363#L701 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 6123#L708 havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 6124#L707 havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 6391#L765-3 call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#1(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 6392#L765-4 [2023-11-26 12:05:31,770 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:31,770 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 6 times [2023-11-26 12:05:31,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:31,776 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885056682] [2023-11-26 12:05:31,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:31,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:31,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:31,798 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:31,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:31,832 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:31,833 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:31,833 INFO L85 PathProgramCache]: Analyzing trace with hash 644143256, now seen corresponding path program 1 times [2023-11-26 12:05:31,833 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:31,833 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1218885306] [2023-11-26 12:05:31,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:31,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:31,917 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:31,917 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [538993609] [2023-11-26 12:05:31,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:31,917 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:31,918 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:31,924 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:31,937 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-26 12:05:32,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:32,673 INFO L262 TraceCheckSpWp]: Trace formula consists of 543 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-26 12:05:32,677 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:32,903 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:32,904 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:32,904 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:32,904 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1218885306] [2023-11-26 12:05:32,904 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:05:32,904 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [538993609] [2023-11-26 12:05:32,905 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [538993609] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:32,905 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:32,905 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 12:05:32,907 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1013097798] [2023-11-26 12:05:32,907 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:32,908 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:32,908 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:32,909 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 12:05:32,909 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 12:05:32,909 INFO L87 Difference]: Start difference. First operand 529 states and 752 transitions. cyclomatic complexity: 227 Second operand has 6 states, 6 states have (on average 14.0) internal successors, (84), 6 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:33,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:33,652 INFO L93 Difference]: Finished difference Result 533 states and 756 transitions. [2023-11-26 12:05:33,652 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 533 states and 756 transitions. [2023-11-26 12:05:33,657 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 523 [2023-11-26 12:05:33,662 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 533 states to 533 states and 756 transitions. [2023-11-26 12:05:33,663 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 533 [2023-11-26 12:05:33,663 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 533 [2023-11-26 12:05:33,664 INFO L73 IsDeterministic]: Start isDeterministic. Operand 533 states and 756 transitions. [2023-11-26 12:05:33,665 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:33,665 INFO L218 hiAutomatonCegarLoop]: Abstraction has 533 states and 756 transitions. [2023-11-26 12:05:33,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 533 states and 756 transitions. [2023-11-26 12:05:33,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 533 to 532. [2023-11-26 12:05:33,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 532 states, 528 states have (on average 1.418560606060606) internal successors, (749), 527 states have internal predecessors, (749), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:33,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 532 states to 532 states and 755 transitions. [2023-11-26 12:05:33,679 INFO L240 hiAutomatonCegarLoop]: Abstraction has 532 states and 755 transitions. [2023-11-26 12:05:33,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 12:05:33,680 INFO L428 stractBuchiCegarLoop]: Abstraction has 532 states and 755 transitions. [2023-11-26 12:05:33,681 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 12:05:33,681 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 532 states and 755 transitions. [2023-11-26 12:05:33,684 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 522 [2023-11-26 12:05:33,684 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:33,684 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:33,685 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:05:33,685 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:33,685 INFO L748 eck$LassoCheckResult]: Stem: 7687#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 7688#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~short281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem304#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1, main_#t~nondet305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1, main_#t~post309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~post320#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite278#1.base, main_#t~ite278#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7711#L765-4 [2023-11-26 12:05:33,686 INFO L750 eck$LassoCheckResult]: Loop: 7711#L765-4 call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7832#L765-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 7905#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7893#L767-2 call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 7742#L772-269 havoc main_~_ha_hashv~0#1; 7743#L772-176 goto; 7760#L772-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7761#L772-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7829#L772-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 7653#L772-73 assume !main_#t~switch33#1; 7503#L772-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 7504#L772-76 assume !main_#t~switch33#1; 7536#L772-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 7797#L772-79 assume !main_#t~switch33#1; 7703#L772-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 7704#L772-82 assume !main_#t~switch33#1; 7948#L772-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 7946#L772-85 assume !main_#t~switch33#1; 7944#L772-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 7943#L772-88 assume !main_#t~switch33#1; 7942#L772-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 7941#L772-91 assume !main_#t~switch33#1; 7889#L772-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 7705#L772-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 7706#L772-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 7737#L772-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 7753#L772-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 7670#L772-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 7671#L772-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 7849#L772-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 7850#L772-105 havoc main_#t~switch33#1; 7891#L772-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7892#L772-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 7923#L772-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7921#L772-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 7920#L772-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7898#L772-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 7454#L772-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1; 7456#L772-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7662#L772-128 assume !(0 == main_~_hj_i~0#1 % 4294967296); 7790#L772-130 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~nondet48#1 := main_~_hj_i~0#1; 7482#L772-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7483#L772-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7429#L772-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7877#L772-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7900#L772-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7869#L772-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7476#L772-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7477#L772-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7562#L772-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7563#L772-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7538#L772-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 7597#L772-170 goto; 7697#L772-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7672#L772-173 goto; 7673#L772-175 goto; 7866#L772-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7867#L772-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 7512#L772-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#2(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 7513#L772-193 goto; 7519#L772-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#2(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#2(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 7738#L772-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#2(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 7727#L772-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 7637#L772-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 7638#L772-202 goto; 7719#L772-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#2(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7720#L772-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 7599#L772-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 7600#L772-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#2(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 7798#L772-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 7818#L772-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7819#L772-260 goto; 7762#L772-262 havoc main_~_ha_bkt~0#1; 7763#L772-263 goto; 7883#L772-265 goto; 7830#L772-267 havoc main_~_ha_hashv~0#1; 7802#L772-268 goto; 7499#L772-270 call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#2(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 7500#L709 assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 7608#L702 assume !(0 == __VERIFIER_assert_~cond#1); 7681#L701 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 7443#L708 havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 7444#L707 havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 7710#L765-3 call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#1(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 7711#L765-4 [2023-11-26 12:05:33,687 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:33,687 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 7 times [2023-11-26 12:05:33,687 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:33,687 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248482793] [2023-11-26 12:05:33,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:33,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:33,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:33,707 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:33,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:33,732 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:33,732 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:33,733 INFO L85 PathProgramCache]: Analyzing trace with hash 628033714, now seen corresponding path program 1 times [2023-11-26 12:05:33,733 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:33,733 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1758708755] [2023-11-26 12:05:33,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:33,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:33,783 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:33,784 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1477408330] [2023-11-26 12:05:33,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:33,784 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:33,784 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:33,788 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:33,800 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-26 12:05:34,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:34,885 INFO L262 TraceCheckSpWp]: Trace formula consists of 543 conjuncts, 26 conjunts are in the unsatisfiable core [2023-11-26 12:05:34,888 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:35,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:05:35,053 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:05:35,053 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:05:35,053 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1758708755] [2023-11-26 12:05:35,053 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:05:35,054 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1477408330] [2023-11-26 12:05:35,054 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1477408330] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:05:35,054 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:05:35,054 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 12:05:35,055 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [234677305] [2023-11-26 12:05:35,055 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:05:35,055 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:05:35,055 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:05:35,056 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 12:05:35,056 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 12:05:35,056 INFO L87 Difference]: Start difference. First operand 532 states and 755 transitions. cyclomatic complexity: 227 Second operand has 6 states, 6 states have (on average 14.0) internal successors, (84), 6 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:05:35,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:05:35,744 INFO L93 Difference]: Finished difference Result 530 states and 751 transitions. [2023-11-26 12:05:35,744 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 530 states and 751 transitions. [2023-11-26 12:05:35,750 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 520 [2023-11-26 12:05:35,756 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 530 states to 530 states and 751 transitions. [2023-11-26 12:05:35,756 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 530 [2023-11-26 12:05:35,760 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 530 [2023-11-26 12:05:35,760 INFO L73 IsDeterministic]: Start isDeterministic. Operand 530 states and 751 transitions. [2023-11-26 12:05:35,761 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:05:35,761 INFO L218 hiAutomatonCegarLoop]: Abstraction has 530 states and 751 transitions. [2023-11-26 12:05:35,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 530 states and 751 transitions. [2023-11-26 12:05:35,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 530 to 529. [2023-11-26 12:05:35,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 529 states, 525 states have (on average 1.417142857142857) internal successors, (744), 524 states have internal predecessors, (744), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:05:35,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 529 states to 529 states and 750 transitions. [2023-11-26 12:05:35,778 INFO L240 hiAutomatonCegarLoop]: Abstraction has 529 states and 750 transitions. [2023-11-26 12:05:35,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 12:05:35,781 INFO L428 stractBuchiCegarLoop]: Abstraction has 529 states and 750 transitions. [2023-11-26 12:05:35,781 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 12:05:35,781 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 529 states and 750 transitions. [2023-11-26 12:05:35,786 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 519 [2023-11-26 12:05:35,786 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:05:35,786 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:05:35,787 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:05:35,787 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:05:35,788 INFO L748 eck$LassoCheckResult]: Stem: 9009#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 9010#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~ite276#1.base, main_#t~ite276#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~short281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem304#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1, main_#t~nondet305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1, main_#t~post309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_#t~post320#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite278#1.base, main_#t~ite278#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9033#L765-4 [2023-11-26 12:05:35,788 INFO L750 eck$LassoCheckResult]: Loop: 9033#L765-4 call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9154#L765-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 9221#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9210#L767-2 call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 9064#L772-269 havoc main_~_ha_hashv~0#1; 9065#L772-176 goto; 9082#L772-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9083#L772-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9268#L772-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 9267#L772-73 assume !main_#t~switch33#1; 8823#L772-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 8824#L772-76 assume !main_#t~switch33#1; 9266#L772-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 9119#L772-79 assume !main_#t~switch33#1; 9025#L772-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 9026#L772-82 assume !main_#t~switch33#1; 9139#L772-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 9140#L772-85 assume !main_#t~switch33#1; 9183#L772-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 9171#L772-88 assume !main_#t~switch33#1; 9145#L772-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 8954#L772-91 assume !main_#t~switch33#1; 8955#L772-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 9027#L772-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 9028#L772-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 9074#L772-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 9075#L772-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 8995#L772-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 8996#L772-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 9172#L772-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 9104#L772-105 havoc main_#t~switch33#1; 9105#L772-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9206#L772-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 9138#L772-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 9113#L772-111 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet45#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 9115#L772-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9274#L772-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 8766#L772-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9066#L772-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 8976#L772-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9231#L772-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 8802#L772-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8803#L772-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8749#L772-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9199#L772-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9216#L772-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9191#L772-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8796#L772-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8797#L772-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8883#L772-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8884#L772-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8859#L772-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 8919#L772-170 goto; 9020#L772-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8997#L772-173 goto; 8998#L772-175 goto; 9189#L772-266 call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9190#L772-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 8834#L772-194 call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#2(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#2(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#2(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#2(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 8835#L772-193 goto; 8841#L772-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#2(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#2(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 9060#L772-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#2(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 9051#L772-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 8960#L772-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 8961#L772-202 goto; 9044#L772-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#2(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#2(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9045#L772-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 8920#L772-207 call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 8921#L772-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#2(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 9121#L772-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 9141#L772-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9142#L772-260 goto; 9084#L772-262 havoc main_~_ha_bkt~0#1; 9085#L772-263 goto; 9204#L772-265 goto; 9153#L772-267 havoc main_~_ha_hashv~0#1; 9125#L772-268 goto; 8821#L772-270 call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#2(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 8822#L709 assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 8930#L702 assume !(0 == __VERIFIER_assert_~cond#1); 9004#L701 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 8763#L708 havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 8764#L707 havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 9032#L765-3 call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#1(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 9033#L765-4 [2023-11-26 12:05:35,789 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:35,789 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 8 times [2023-11-26 12:05:35,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:35,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1194420698] [2023-11-26 12:05:35,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:35,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:35,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:35,806 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:05:35,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:05:35,827 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:05:35,827 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:05:35,828 INFO L85 PathProgramCache]: Analyzing trace with hash 163062998, now seen corresponding path program 1 times [2023-11-26 12:05:35,828 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:05:35,828 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [440785195] [2023-11-26 12:05:35,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:35,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:05:35,905 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:05:35,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2115292581] [2023-11-26 12:05:35,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:05:35,905 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:05:35,906 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:05:35,911 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:05:35,950 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07454a81-4e21-4c67-adc5-3304bc2d98a4/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-26 12:05:37,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:05:37,781 INFO L262 TraceCheckSpWp]: Trace formula consists of 541 conjuncts, 18 conjunts are in the unsatisfiable core [2023-11-26 12:05:37,783 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:05:50,063 WARN L293 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 18 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-26 12:06:09,446 WARN L293 SmtUtils]: Spent 15.44s on a formula simplification that was a NOOP. DAG size: 3 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-26 12:06:17,322 WARN L293 SmtUtils]: Spent 7.88s on a formula simplification that was a NOOP. DAG size: 3 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)