./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test6-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test6-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ac848265e1daab3ca0f2905a3d0d6fdafaee38399ca7123ad8517babc999ef80 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:59:22,675 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:59:22,803 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:59:22,817 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:59:22,818 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:59:22,859 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:59:22,860 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:59:22,861 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:59:22,862 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:59:22,867 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:59:22,869 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:59:22,870 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:59:22,870 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:59:22,873 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:59:22,873 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:59:22,874 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:59:22,875 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:59:22,875 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:59:22,876 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:59:22,876 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:59:22,877 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:59:22,877 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:59:22,878 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:59:22,878 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:59:22,879 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:59:22,879 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:59:22,880 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:59:22,880 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:59:22,881 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:59:22,881 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:59:22,883 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:59:22,883 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:59:22,883 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:59:22,884 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:59:22,884 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:59:22,884 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:59:22,885 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:59:22,885 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:59:22,886 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ac848265e1daab3ca0f2905a3d0d6fdafaee38399ca7123ad8517babc999ef80 [2023-11-26 11:59:23,234 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:59:23,267 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:59:23,270 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:59:23,272 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:59:23,273 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:59:23,275 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test6-1.i [2023-11-26 11:59:26,599 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:59:26,976 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:59:26,977 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test6-1.i [2023-11-26 11:59:27,005 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/data/401bb75cf/39caea0000804ea590e37ab5d8265493/FLAG551b6004e [2023-11-26 11:59:27,023 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/data/401bb75cf/39caea0000804ea590e37ab5d8265493 [2023-11-26 11:59:27,029 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:59:27,032 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:59:27,036 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:59:27,036 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:59:27,045 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:59:27,046 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:59:27" (1/1) ... [2023-11-26 11:59:27,047 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7afcc12a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:27, skipping insertion in model container [2023-11-26 11:59:27,048 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:59:27" (1/1) ... [2023-11-26 11:59:27,134 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:59:27,961 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:59:27,992 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:59:28,282 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:59:28,383 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-26 11:59:28,393 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:59:28,394 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28 WrapperNode [2023-11-26 11:59:28,394 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:59:28,396 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:59:28,396 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:59:28,397 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:59:28,406 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,507 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,634 INFO L138 Inliner]: procedures = 282, calls = 298, calls flagged for inlining = 23, calls inlined = 33, statements flattened = 1512 [2023-11-26 11:59:28,635 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:59:28,636 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:59:28,636 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:59:28,636 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:59:28,650 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,651 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,661 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,808 INFO L175 MemorySlicer]: Split 270 memory accesses to 5 slices as follows [221, 2, 8, 5, 34]. 82 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [0, 2, 0, 0, 0]. The 59 writes are split as follows [50, 0, 4, 1, 4]. [2023-11-26 11:59:28,809 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,809 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,867 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,884 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,893 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,903 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,925 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:59:28,926 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:59:28,927 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:59:28,927 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:59:28,928 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (1/1) ... [2023-11-26 11:59:28,935 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:59:28,948 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:59:28,965 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:59:28,986 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:59:29,026 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 11:59:29,026 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 11:59:29,026 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 11:59:29,027 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-26 11:59:29,027 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#4 [2023-11-26 11:59:29,027 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 11:59:29,028 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 11:59:29,028 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 11:59:29,028 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-26 11:59:29,028 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#4 [2023-11-26 11:59:29,029 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 11:59:29,029 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-26 11:59:29,029 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 11:59:29,029 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 11:59:29,031 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 11:59:29,032 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-26 11:59:29,032 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#4 [2023-11-26 11:59:29,032 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 11:59:29,032 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 11:59:29,033 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 11:59:29,033 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 11:59:29,033 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-26 11:59:29,033 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#4 [2023-11-26 11:59:29,034 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 11:59:29,034 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 11:59:29,034 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 11:59:29,034 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-26 11:59:29,034 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#4 [2023-11-26 11:59:29,035 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 11:59:29,035 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:59:29,036 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 11:59:29,037 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 11:59:29,037 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 11:59:29,037 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-26 11:59:29,038 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#4 [2023-11-26 11:59:29,039 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:59:29,040 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 11:59:29,040 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 11:59:29,040 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-26 11:59:29,040 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#4 [2023-11-26 11:59:29,040 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:59:29,040 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:59:29,356 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:59:29,359 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:59:29,364 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:59:29,452 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:59:29,514 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:59:29,547 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:59:29,578 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:59:31,607 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:59:31,645 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:59:31,646 INFO L309 CfgBuilder]: Removed 63 assume(true) statements. [2023-11-26 11:59:31,648 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:59:31 BoogieIcfgContainer [2023-11-26 11:59:31,648 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:59:31,649 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:59:31,649 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:59:31,654 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:59:31,655 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:59:31,655 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:59:27" (1/3) ... [2023-11-26 11:59:31,656 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4a0ba399 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:59:31, skipping insertion in model container [2023-11-26 11:59:31,658 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:59:31,658 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:59:28" (2/3) ... [2023-11-26 11:59:31,660 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4a0ba399 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:59:31, skipping insertion in model container [2023-11-26 11:59:31,660 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:59:31,660 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:59:31" (3/3) ... [2023-11-26 11:59:31,662 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_OAT_test6-1.i [2023-11-26 11:59:31,761 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:59:31,761 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:59:31,762 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:59:31,762 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:59:31,762 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:59:31,762 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:59:31,762 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:59:31,762 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:59:31,773 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:59:31,844 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 390 [2023-11-26 11:59:31,844 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:59:31,844 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:59:31,851 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:59:31,852 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:59:31,852 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:59:31,853 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:59:31,860 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 390 [2023-11-26 11:59:31,860 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:59:31,860 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:59:31,861 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:59:31,861 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:59:31,869 INFO L748 eck$LassoCheckResult]: Stem: 120#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 333#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8#L989-4true [2023-11-26 11:59:31,870 INFO L750 eck$LassoCheckResult]: Loop: 8#L989-4true call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 208#L989-1true assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 4#real_malloc_returnLabel#1true main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 9#L991true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 80#L991-2true call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 240#L996-263true assume !true; 390#L989-3true call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 8#L989-4true [2023-11-26 11:59:31,876 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:31,876 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 1 times [2023-11-26 11:59:31,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:31,887 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748147891] [2023-11-26 11:59:31,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:31,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:32,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:32,038 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:59:32,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:32,149 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:59:32,154 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:32,154 INFO L85 PathProgramCache]: Analyzing trace with hash 1419562106, now seen corresponding path program 1 times [2023-11-26 11:59:32,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:32,155 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900062227] [2023-11-26 11:59:32,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:32,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:32,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:59:32,252 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:59:32,252 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1900062227] [2023-11-26 11:59:32,253 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-26 11:59:32,253 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1812960298] [2023-11-26 11:59:32,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:32,254 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:59:32,254 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:59:32,258 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:59:32,284 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-26 11:59:32,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:59:32,459 INFO L262 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-26 11:59:32,461 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:59:32,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:59:32,479 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:59:32,479 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1812960298] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:59:32,480 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:59:32,480 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 11:59:32,481 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1803185083] [2023-11-26 11:59:32,482 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:59:32,485 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:59:32,486 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:59:32,519 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 11:59:32,520 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 11:59:32,523 INFO L87 Difference]: Start difference. First operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:59:32,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:59:32,556 INFO L93 Difference]: Finished difference Result 397 states and 573 transitions. [2023-11-26 11:59:32,558 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 397 states and 573 transitions. [2023-11-26 11:59:32,563 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 367 [2023-11-26 11:59:32,573 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 397 states to 374 states and 550 transitions. [2023-11-26 11:59:32,574 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 374 [2023-11-26 11:59:32,576 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 374 [2023-11-26 11:59:32,577 INFO L73 IsDeterministic]: Start isDeterministic. Operand 374 states and 550 transitions. [2023-11-26 11:59:32,581 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:59:32,581 INFO L218 hiAutomatonCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 11:59:32,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states and 550 transitions. [2023-11-26 11:59:32,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 374. [2023-11-26 11:59:32,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 374 states, 370 states have (on average 1.4702702702702704) internal successors, (544), 369 states have internal predecessors, (544), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:59:32,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 550 transitions. [2023-11-26 11:59:32,633 INFO L240 hiAutomatonCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 11:59:32,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 11:59:32,637 INFO L428 stractBuchiCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 11:59:32,637 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:59:32,638 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 374 states and 550 transitions. [2023-11-26 11:59:32,640 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 367 [2023-11-26 11:59:32,640 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:59:32,640 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:59:32,642 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:59:32,642 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:59:32,643 INFO L748 eck$LassoCheckResult]: Stem: 1150#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 1151#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 859#L989-4 [2023-11-26 11:59:32,645 INFO L750 eck$LassoCheckResult]: Loop: 859#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 849#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 843#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 844#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 860#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 967#L996-263 havoc main_~_ha_hashv~0#1; 968#L996-176 goto; 1175#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 892#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 893#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 1106#L996-73 assume main_#t~switch68#1;call main_#t~mem69#1 := read~int#0(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem69#1 % 256 % 4294967296);havoc main_#t~mem69#1; 1107#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 857#L996-76 assume main_#t~switch68#1;call main_#t~mem70#1 := read~int#0(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem70#1 % 256 % 4294967296);havoc main_#t~mem70#1; 858#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 943#L996-79 assume main_#t~switch68#1;call main_#t~mem71#1 := read~int#0(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem71#1 % 256 % 4294967296);havoc main_#t~mem71#1; 944#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 969#L996-82 assume main_#t~switch68#1;call main_#t~mem72#1 := read~int#0(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem72#1 % 256 % 4294967296);havoc main_#t~mem72#1; 935#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 908#L996-85 assume !main_#t~switch68#1; 909#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 936#L996-88 assume main_#t~switch68#1;call main_#t~mem74#1 := read~int#0(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem74#1 % 256 % 4294967296);havoc main_#t~mem74#1; 955#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 1082#L996-91 assume main_#t~switch68#1;call main_#t~mem75#1 := read~int#0(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem75#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem75#1 % 256 % 4294967296 else main_#t~mem75#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem75#1; 1083#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 1193#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 999#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 1000#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 1206#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 1090#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 1088#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 906#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 907#L996-105 havoc main_#t~switch68#1; 1073#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 982#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 930#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 931#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1016#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1081#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1133#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1179#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 922#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1011#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 973#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1070#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1071#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1114#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 910#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 911#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1050#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1159#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 838#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 977#L996-170 goto; 978#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 959#L996-173 goto; 960#L996-175 goto; 1166#L996-260 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1167#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 1173#L996-190 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#0(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#0(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#0(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#0(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 1187#L996-189 goto; 998#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#0(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#0(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 1108#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#0(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 1033#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 1034#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 1062#L996-198 goto; 1158#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#0(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#0(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 939#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 940#L996-203 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 904#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#0(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 905#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 1136#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1177#L996-254 goto; 1209#L996-256 havoc main_~_ha_bkt~0#1; 1210#L996-257 goto; 1202#L996-259 goto; 879#L996-261 havoc main_~_ha_hashv~0#1; 880#L996-262 goto; 988#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 859#L989-4 [2023-11-26 11:59:32,645 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:32,645 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 2 times [2023-11-26 11:59:32,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:32,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133464422] [2023-11-26 11:59:32,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:32,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:32,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:32,667 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:59:32,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:32,724 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:59:32,726 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:32,726 INFO L85 PathProgramCache]: Analyzing trace with hash 997853422, now seen corresponding path program 1 times [2023-11-26 11:59:32,727 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:32,727 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [874286113] [2023-11-26 11:59:32,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:32,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:32,847 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:59:32,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [103638823] [2023-11-26 11:59:32,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:32,854 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:59:32,855 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:59:32,884 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:59:32,887 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-26 11:59:33,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:59:33,274 INFO L262 TraceCheckSpWp]: Trace formula consists of 553 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:59:33,278 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:59:33,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:59:33,330 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:59:33,331 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:59:33,331 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [874286113] [2023-11-26 11:59:33,332 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:59:33,333 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [103638823] [2023-11-26 11:59:33,333 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [103638823] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:59:33,333 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:59:33,333 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:59:33,334 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [425811384] [2023-11-26 11:59:33,334 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:59:33,335 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:59:33,335 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:59:33,336 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 11:59:33,336 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 11:59:33,336 INFO L87 Difference]: Start difference. First operand 374 states and 550 transitions. cyclomatic complexity: 179 Second operand has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:59:33,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:59:33,476 INFO L93 Difference]: Finished difference Result 395 states and 571 transitions. [2023-11-26 11:59:33,476 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 395 states and 571 transitions. [2023-11-26 11:59:33,480 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 388 [2023-11-26 11:59:33,485 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 395 states to 395 states and 571 transitions. [2023-11-26 11:59:33,485 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 395 [2023-11-26 11:59:33,486 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 395 [2023-11-26 11:59:33,486 INFO L73 IsDeterministic]: Start isDeterministic. Operand 395 states and 571 transitions. [2023-11-26 11:59:33,488 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:59:33,488 INFO L218 hiAutomatonCegarLoop]: Abstraction has 395 states and 571 transitions. [2023-11-26 11:59:33,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states and 571 transitions. [2023-11-26 11:59:33,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 394. [2023-11-26 11:59:33,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 390 states have (on average 1.4461538461538461) internal successors, (564), 389 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:59:33,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 570 transitions. [2023-11-26 11:59:33,511 INFO L240 hiAutomatonCegarLoop]: Abstraction has 394 states and 570 transitions. [2023-11-26 11:59:33,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 11:59:33,513 INFO L428 stractBuchiCegarLoop]: Abstraction has 394 states and 570 transitions. [2023-11-26 11:59:33,513 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:59:33,514 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 394 states and 570 transitions. [2023-11-26 11:59:33,516 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 387 [2023-11-26 11:59:33,516 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:59:33,516 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:59:33,520 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:59:33,520 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:59:33,521 INFO L748 eck$LassoCheckResult]: Stem: 2155#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 2156#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1862#L989-4 [2023-11-26 11:59:33,522 INFO L750 eck$LassoCheckResult]: Loop: 1862#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1852#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 1846#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 1847#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1863#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 1966#L996-263 havoc main_~_ha_hashv~0#1; 1967#L996-176 goto; 2183#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1895#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1896#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 2109#L996-73 assume main_#t~switch68#1;call main_#t~mem69#1 := read~int#0(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem69#1 % 256 % 4294967296);havoc main_#t~mem69#1; 2110#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 1860#L996-76 assume main_#t~switch68#1;call main_#t~mem70#1 := read~int#0(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem70#1 % 256 % 4294967296);havoc main_#t~mem70#1; 1861#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 1944#L996-79 assume main_#t~switch68#1;call main_#t~mem71#1 := read~int#0(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem71#1 % 256 % 4294967296);havoc main_#t~mem71#1; 1945#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 1972#L996-82 assume main_#t~switch68#1;call main_#t~mem72#1 := read~int#0(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem72#1 % 256 % 4294967296);havoc main_#t~mem72#1; 1938#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 1911#L996-85 assume main_#t~switch68#1;call main_#t~mem73#1 := read~int#0(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem73#1 % 256 % 4294967296);havoc main_#t~mem73#1; 1912#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 1939#L996-88 assume main_#t~switch68#1;call main_#t~mem74#1 := read~int#0(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem74#1 % 256 % 4294967296);havoc main_#t~mem74#1; 1958#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 2085#L996-91 assume main_#t~switch68#1;call main_#t~mem75#1 := read~int#0(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem75#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem75#1 % 256 % 4294967296 else main_#t~mem75#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem75#1; 2086#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 2203#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 2204#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 2218#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 2219#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 2095#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 2096#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 1909#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 1910#L996-105 havoc main_#t~switch68#1; 2076#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1988#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1933#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1934#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2022#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2084#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2139#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2189#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1925#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2014#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1976#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2073#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2074#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2120#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1913#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1914#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2053#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2168#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1841#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 1980#L996-170 goto; 1981#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1962#L996-173 goto; 1963#L996-175 goto; 2176#L996-260 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2177#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 2184#L996-190 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#0(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#0(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#0(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#0(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 2197#L996-189 goto; 2001#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#0(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#0(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 2114#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#0(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 2036#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 2037#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 2065#L996-198 goto; 2166#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#0(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#0(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1942#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 1943#L996-203 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 1907#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#0(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 1908#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 2142#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2187#L996-254 goto; 2222#L996-256 havoc main_~_ha_bkt~0#1; 2223#L996-257 goto; 2213#L996-259 goto; 1882#L996-261 havoc main_~_ha_hashv~0#1; 1883#L996-262 goto; 1991#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 1862#L989-4 [2023-11-26 11:59:33,523 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:33,524 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 3 times [2023-11-26 11:59:33,524 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:33,524 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1645739621] [2023-11-26 11:59:33,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:33,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:33,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:33,562 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:59:33,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:33,603 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:59:33,607 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:33,607 INFO L85 PathProgramCache]: Analyzing trace with hash 437153644, now seen corresponding path program 1 times [2023-11-26 11:59:33,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:33,608 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748303625] [2023-11-26 11:59:33,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:33,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:33,711 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:59:33,712 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1238078578] [2023-11-26 11:59:33,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:33,712 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:59:33,713 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:59:33,716 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:59:33,748 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-26 11:59:34,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:59:34,067 INFO L262 TraceCheckSpWp]: Trace formula consists of 559 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:59:34,072 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:59:34,114 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:59:34,116 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:59:34,116 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:59:34,116 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748303625] [2023-11-26 11:59:34,117 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:59:34,117 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1238078578] [2023-11-26 11:59:34,117 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1238078578] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:59:34,117 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:59:34,118 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 11:59:34,118 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1269153541] [2023-11-26 11:59:34,119 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:59:34,120 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:59:34,120 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:59:34,121 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 11:59:34,121 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 11:59:34,121 INFO L87 Difference]: Start difference. First operand 394 states and 570 transitions. cyclomatic complexity: 179 Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:59:34,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:59:34,248 INFO L93 Difference]: Finished difference Result 381 states and 550 transitions. [2023-11-26 11:59:34,248 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 381 states and 550 transitions. [2023-11-26 11:59:34,252 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 374 [2023-11-26 11:59:34,257 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 381 states to 381 states and 550 transitions. [2023-11-26 11:59:34,257 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 381 [2023-11-26 11:59:34,258 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 381 [2023-11-26 11:59:34,259 INFO L73 IsDeterministic]: Start isDeterministic. Operand 381 states and 550 transitions. [2023-11-26 11:59:34,260 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:59:34,260 INFO L218 hiAutomatonCegarLoop]: Abstraction has 381 states and 550 transitions. [2023-11-26 11:59:34,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states and 550 transitions. [2023-11-26 11:59:34,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 380. [2023-11-26 11:59:34,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 376 states have (on average 1.4441489361702127) internal successors, (543), 375 states have internal predecessors, (543), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:59:34,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 549 transitions. [2023-11-26 11:59:34,274 INFO L240 hiAutomatonCegarLoop]: Abstraction has 380 states and 549 transitions. [2023-11-26 11:59:34,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 11:59:34,280 INFO L428 stractBuchiCegarLoop]: Abstraction has 380 states and 549 transitions. [2023-11-26 11:59:34,280 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:59:34,281 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 380 states and 549 transitions. [2023-11-26 11:59:34,284 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 373 [2023-11-26 11:59:34,284 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:59:34,285 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:59:34,287 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:59:34,287 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:59:34,294 INFO L748 eck$LassoCheckResult]: Stem: 3163#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 3164#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2874#L989-4 [2023-11-26 11:59:34,295 INFO L750 eck$LassoCheckResult]: Loop: 2874#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2864#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 2858#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 2859#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2875#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 2982#L996-263 havoc main_~_ha_hashv~0#1; 2983#L996-176 goto; 3190#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2907#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2908#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 3120#L996-73 assume !main_#t~switch68#1; 3121#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 2872#L996-76 assume !main_#t~switch68#1; 2873#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 2958#L996-79 assume !main_#t~switch68#1; 2959#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 2989#L996-82 assume !main_#t~switch68#1; 2950#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 2923#L996-85 assume !main_#t~switch68#1; 2924#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 2951#L996-88 assume !main_#t~switch68#1; 2970#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 3097#L996-91 assume !main_#t~switch68#1; 3098#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 3208#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 3014#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 3015#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 3222#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 3105#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 3103#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 2921#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 2922#L996-105 havoc main_#t~switch68#1; 3088#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2997#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2945#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2946#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3031#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3096#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3147#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3194#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2936#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3026#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2987#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3085#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3086#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3129#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2925#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2926#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3065#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3174#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2853#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 2992#L996-170 goto; 2993#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2974#L996-173 goto; 2975#L996-175 goto; 3181#L996-260 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3182#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 3188#L996-190 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#0(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#0(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#0(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#0(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 3202#L996-189 goto; 3013#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#0(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#0(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 3123#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#0(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 3048#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 3049#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 3077#L996-198 goto; 3173#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#0(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#0(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2954#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 2955#L996-203 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 2919#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#0(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 2920#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 3151#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3192#L996-254 goto; 3225#L996-256 havoc main_~_ha_bkt~0#1; 3226#L996-257 goto; 3218#L996-259 goto; 2894#L996-261 havoc main_~_ha_hashv~0#1; 2895#L996-262 goto; 3003#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 2874#L989-4 [2023-11-26 11:59:34,296 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:34,296 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 4 times [2023-11-26 11:59:34,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:34,298 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78482081] [2023-11-26 11:59:34,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:34,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:34,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:34,344 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:59:34,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:34,372 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:59:34,373 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:34,373 INFO L85 PathProgramCache]: Analyzing trace with hash -2007566726, now seen corresponding path program 1 times [2023-11-26 11:59:34,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:34,374 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046795817] [2023-11-26 11:59:34,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:34,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:34,441 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:59:34,441 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1527280510] [2023-11-26 11:59:34,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:34,442 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:59:34,442 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:59:34,448 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:59:34,453 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-26 11:59:35,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:59:35,901 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 11:59:35,906 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:59:36,114 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:59:36,114 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:59:36,115 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:59:36,115 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2046795817] [2023-11-26 11:59:36,115 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:59:36,115 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1527280510] [2023-11-26 11:59:36,115 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1527280510] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:59:36,116 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:59:36,116 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 11:59:36,116 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1815414343] [2023-11-26 11:59:36,116 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:59:36,117 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:59:36,117 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:59:36,118 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 11:59:36,118 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 11:59:36,118 INFO L87 Difference]: Start difference. First operand 380 states and 549 transitions. cyclomatic complexity: 172 Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:59:36,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:59:36,715 INFO L93 Difference]: Finished difference Result 420 states and 597 transitions. [2023-11-26 11:59:36,715 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 420 states and 597 transitions. [2023-11-26 11:59:36,719 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 413 [2023-11-26 11:59:36,724 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 420 states to 420 states and 597 transitions. [2023-11-26 11:59:36,725 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 420 [2023-11-26 11:59:36,725 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 420 [2023-11-26 11:59:36,726 INFO L73 IsDeterministic]: Start isDeterministic. Operand 420 states and 597 transitions. [2023-11-26 11:59:36,727 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:59:36,727 INFO L218 hiAutomatonCegarLoop]: Abstraction has 420 states and 597 transitions. [2023-11-26 11:59:36,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420 states and 597 transitions. [2023-11-26 11:59:36,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420 to 417. [2023-11-26 11:59:36,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 417 states, 413 states have (on average 1.4213075060532687) internal successors, (587), 412 states have internal predecessors, (587), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:59:36,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 593 transitions. [2023-11-26 11:59:36,738 INFO L240 hiAutomatonCegarLoop]: Abstraction has 417 states and 593 transitions. [2023-11-26 11:59:36,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:59:36,740 INFO L428 stractBuchiCegarLoop]: Abstraction has 417 states and 593 transitions. [2023-11-26 11:59:36,740 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 11:59:36,740 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 417 states and 593 transitions. [2023-11-26 11:59:36,743 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 410 [2023-11-26 11:59:36,743 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:59:36,743 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:59:36,744 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:59:36,744 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:59:36,745 INFO L748 eck$LassoCheckResult]: Stem: 4200#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 4201#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3911#L989-4 [2023-11-26 11:59:36,745 INFO L750 eck$LassoCheckResult]: Loop: 3911#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3901#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 3895#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 3896#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3912#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 4015#L996-263 havoc main_~_ha_hashv~0#1; 4016#L996-176 goto; 4226#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4266#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4305#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 4304#L996-73 assume !main_#t~switch68#1; 4303#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 4302#L996-76 assume !main_#t~switch68#1; 4301#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 4300#L996-79 assume !main_#t~switch68#1; 4299#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 4298#L996-82 assume !main_#t~switch68#1; 4296#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 4295#L996-85 assume !main_#t~switch68#1; 4293#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 4292#L996-88 assume !main_#t~switch68#1; 4291#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 4290#L996-91 assume !main_#t~switch68#1; 4289#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 4287#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 4288#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 4297#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 4284#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 4294#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 4279#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 4273#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 4272#L996-105 havoc main_#t~switch68#1; 4271#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4270#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3982#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3983#L996-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 4072#L996-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet81#1 := main_~_hj_j~0#1; 4133#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4134#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 4186#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4232#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3974#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4064#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4025#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4122#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4123#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4167#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3962#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3963#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4102#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4213#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3890#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 4029#L996-170 goto; 4030#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4011#L996-173 goto; 4012#L996-175 goto; 4219#L996-260 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4220#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 4227#L996-190 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#0(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#0(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#0(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#0(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 4240#L996-189 goto; 4051#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#0(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#0(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 4161#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#0(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 4085#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 4086#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 4114#L996-198 goto; 4211#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#0(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#0(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3991#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 3992#L996-203 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 3956#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#0(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 3957#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 4189#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4230#L996-254 goto; 4264#L996-256 havoc main_~_ha_bkt~0#1; 4265#L996-257 goto; 4257#L996-259 goto; 3931#L996-261 havoc main_~_ha_hashv~0#1; 3932#L996-262 goto; 4041#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 3911#L989-4 [2023-11-26 11:59:36,746 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:36,746 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 5 times [2023-11-26 11:59:36,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:36,747 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [547363438] [2023-11-26 11:59:36,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:36,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:36,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:36,764 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:59:36,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:36,781 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:59:36,782 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:36,782 INFO L85 PathProgramCache]: Analyzing trace with hash -241550153, now seen corresponding path program 1 times [2023-11-26 11:59:36,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:36,783 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [817134591] [2023-11-26 11:59:36,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:36,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:36,831 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:59:36,831 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [109431120] [2023-11-26 11:59:36,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:36,832 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:59:36,832 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:59:36,836 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:59:36,860 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-26 11:59:37,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:59:37,339 INFO L262 TraceCheckSpWp]: Trace formula consists of 518 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 11:59:37,342 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:59:37,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:59:37,549 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:59:37,550 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:59:37,550 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [817134591] [2023-11-26 11:59:37,550 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:59:37,550 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [109431120] [2023-11-26 11:59:37,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [109431120] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:59:37,551 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:59:37,551 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 11:59:37,551 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1532446628] [2023-11-26 11:59:37,551 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:59:37,552 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:59:37,552 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:59:37,553 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:59:37,553 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:59:37,553 INFO L87 Difference]: Start difference. First operand 417 states and 593 transitions. cyclomatic complexity: 179 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:59:38,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:59:38,455 INFO L93 Difference]: Finished difference Result 428 states and 609 transitions. [2023-11-26 11:59:38,456 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 428 states and 609 transitions. [2023-11-26 11:59:38,459 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 421 [2023-11-26 11:59:38,463 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 428 states to 428 states and 609 transitions. [2023-11-26 11:59:38,464 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 428 [2023-11-26 11:59:38,464 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 428 [2023-11-26 11:59:38,465 INFO L73 IsDeterministic]: Start isDeterministic. Operand 428 states and 609 transitions. [2023-11-26 11:59:38,466 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:59:38,466 INFO L218 hiAutomatonCegarLoop]: Abstraction has 428 states and 609 transitions. [2023-11-26 11:59:38,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 428 states and 609 transitions. [2023-11-26 11:59:38,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 428 to 425. [2023-11-26 11:59:38,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 425 states, 421 states have (on average 1.4228028503562946) internal successors, (599), 420 states have internal predecessors, (599), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:59:38,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 605 transitions. [2023-11-26 11:59:38,477 INFO L240 hiAutomatonCegarLoop]: Abstraction has 425 states and 605 transitions. [2023-11-26 11:59:38,480 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 11:59:38,483 INFO L428 stractBuchiCegarLoop]: Abstraction has 425 states and 605 transitions. [2023-11-26 11:59:38,483 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 11:59:38,483 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 425 states and 605 transitions. [2023-11-26 11:59:38,488 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 418 [2023-11-26 11:59:38,489 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:59:38,489 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:59:38,490 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:59:38,490 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:59:38,490 INFO L748 eck$LassoCheckResult]: Stem: 5289#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 5290#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4999#L989-4 [2023-11-26 11:59:38,491 INFO L750 eck$LassoCheckResult]: Loop: 4999#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4989#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 4983#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 4984#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5000#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 5104#L996-263 havoc main_~_ha_hashv~0#1; 5105#L996-176 goto; 5316#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5360#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5401#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 5400#L996-73 assume !main_#t~switch68#1; 5399#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 5398#L996-76 assume !main_#t~switch68#1; 5397#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 5396#L996-79 assume !main_#t~switch68#1; 5395#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 5394#L996-82 assume !main_#t~switch68#1; 5393#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 5392#L996-85 assume !main_#t~switch68#1; 5076#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 5077#L996-88 assume !main_#t~switch68#1; 5096#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 5223#L996-91 assume !main_#t~switch68#1; 5224#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 5338#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 5339#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 5391#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 5359#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 5232#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 5233#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 5379#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 5378#L996-105 havoc main_#t~switch68#1; 5377#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5376#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5370#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5369#L996-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 5368#L996-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet81#1 := main_~_hj_j~0#1; 5367#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5293#L996-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 5294#L996-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet82#1 := main_~_ha_hashv~0#1; 5275#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5322#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5062#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5152#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5114#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5211#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5212#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5256#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5050#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5051#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5191#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5303#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4978#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 5118#L996-170 goto; 5119#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5100#L996-173 goto; 5101#L996-175 goto; 5309#L996-260 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5310#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 5317#L996-190 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#0(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#0(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#0(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#0(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 5332#L996-189 goto; 5139#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#0(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#0(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 5250#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#0(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 5174#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 5175#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 5203#L996-198 goto; 5301#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#0(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#0(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5080#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 5081#L996-203 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 5044#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#0(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 5045#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 5278#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5320#L996-254 goto; 5357#L996-256 havoc main_~_ha_bkt~0#1; 5358#L996-257 goto; 5349#L996-259 goto; 5019#L996-261 havoc main_~_ha_hashv~0#1; 5020#L996-262 goto; 5129#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 4999#L989-4 [2023-11-26 11:59:38,491 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:38,492 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 6 times [2023-11-26 11:59:38,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:38,492 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576061889] [2023-11-26 11:59:38,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:38,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:38,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:38,514 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:59:38,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:38,567 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:59:38,568 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:38,568 INFO L85 PathProgramCache]: Analyzing trace with hash -1685960177, now seen corresponding path program 1 times [2023-11-26 11:59:38,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:38,569 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1728762334] [2023-11-26 11:59:38,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:38,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:38,645 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:59:38,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [460957476] [2023-11-26 11:59:38,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:38,646 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:59:38,646 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:59:38,652 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:59:38,688 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-26 11:59:39,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:59:39,112 INFO L262 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 11:59:39,115 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:59:39,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:59:39,237 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:59:39,237 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:59:39,237 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1728762334] [2023-11-26 11:59:39,237 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:59:39,238 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [460957476] [2023-11-26 11:59:39,238 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [460957476] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:59:39,238 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:59:39,238 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 11:59:39,241 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [473887548] [2023-11-26 11:59:39,241 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:59:39,241 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:59:39,242 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:59:39,242 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:59:39,242 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:59:39,242 INFO L87 Difference]: Start difference. First operand 425 states and 605 transitions. cyclomatic complexity: 183 Second operand has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 7 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:59:40,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:59:40,021 INFO L93 Difference]: Finished difference Result 439 states and 625 transitions. [2023-11-26 11:59:40,021 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 439 states and 625 transitions. [2023-11-26 11:59:40,025 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 432 [2023-11-26 11:59:40,030 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 439 states to 439 states and 625 transitions. [2023-11-26 11:59:40,030 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 439 [2023-11-26 11:59:40,031 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 439 [2023-11-26 11:59:40,031 INFO L73 IsDeterministic]: Start isDeterministic. Operand 439 states and 625 transitions. [2023-11-26 11:59:40,032 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:59:40,032 INFO L218 hiAutomatonCegarLoop]: Abstraction has 439 states and 625 transitions. [2023-11-26 11:59:40,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states and 625 transitions. [2023-11-26 11:59:40,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 431. [2023-11-26 11:59:40,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 431 states, 427 states have (on average 1.423887587822014) internal successors, (608), 426 states have internal predecessors, (608), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:59:40,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 431 states to 431 states and 614 transitions. [2023-11-26 11:59:40,043 INFO L240 hiAutomatonCegarLoop]: Abstraction has 431 states and 614 transitions. [2023-11-26 11:59:40,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 11:59:40,046 INFO L428 stractBuchiCegarLoop]: Abstraction has 431 states and 614 transitions. [2023-11-26 11:59:40,046 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 11:59:40,047 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 431 states and 614 transitions. [2023-11-26 11:59:40,049 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 424 [2023-11-26 11:59:40,049 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:59:40,049 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:59:40,052 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:59:40,053 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:59:40,053 INFO L748 eck$LassoCheckResult]: Stem: 6401#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 6402#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6113#L989-4 [2023-11-26 11:59:40,053 INFO L750 eck$LassoCheckResult]: Loop: 6113#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6103#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 6097#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 6098#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6114#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 6217#L996-263 havoc main_~_ha_hashv~0#1; 6218#L996-176 goto; 6427#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6472#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6521#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 6520#L996-73 assume !main_#t~switch68#1; 6514#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 6513#L996-76 assume !main_#t~switch68#1; 6512#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 6195#L996-79 assume !main_#t~switch68#1; 6196#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 6223#L996-82 assume !main_#t~switch68#1; 6189#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 6162#L996-85 assume !main_#t~switch68#1; 6163#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 6190#L996-88 assume !main_#t~switch68#1; 6209#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 6336#L996-91 assume !main_#t~switch68#1; 6337#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 6451#L996-94 assume !main_#t~switch68#1; 6452#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 6519#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 6467#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 6345#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 6343#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 6160#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 6161#L996-105 havoc main_#t~switch68#1; 6326#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6239#L996-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 6240#L996-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 6447#L996-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet80#1 := 0; 6455#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6487#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 6466#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6474#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 6387#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6473#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6176#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6265#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6227#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6323#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6324#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6368#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6164#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6165#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6303#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6414#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6092#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 6231#L996-170 goto; 6232#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6213#L996-173 goto; 6214#L996-175 goto; 6420#L996-260 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6421#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 6428#L996-190 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#0(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#0(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#0(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#0(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 6445#L996-189 goto; 6252#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#0(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#0(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 6362#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#0(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 6286#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 6287#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 6315#L996-198 goto; 6412#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#0(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#0(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6193#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 6194#L996-203 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 6158#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#0(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 6159#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 6390#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6431#L996-254 goto; 6470#L996-256 havoc main_~_ha_bkt~0#1; 6471#L996-257 goto; 6462#L996-259 goto; 6133#L996-261 havoc main_~_ha_hashv~0#1; 6134#L996-262 goto; 6242#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 6113#L989-4 [2023-11-26 11:59:40,054 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:40,054 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 7 times [2023-11-26 11:59:40,054 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:40,055 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2027979875] [2023-11-26 11:59:40,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:40,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:40,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:40,077 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:59:40,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:40,096 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:59:40,097 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:40,097 INFO L85 PathProgramCache]: Analyzing trace with hash 1209671895, now seen corresponding path program 1 times [2023-11-26 11:59:40,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:40,098 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1253125114] [2023-11-26 11:59:40,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:40,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:40,151 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:59:40,152 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [661774888] [2023-11-26 11:59:40,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:40,152 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:59:40,152 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:59:40,156 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:59:40,177 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-26 11:59:40,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:59:40,538 INFO L262 TraceCheckSpWp]: Trace formula consists of 513 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 11:59:40,540 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:59:40,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:59:40,587 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:59:40,587 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:59:40,587 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1253125114] [2023-11-26 11:59:40,587 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:59:40,588 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [661774888] [2023-11-26 11:59:40,588 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [661774888] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:59:40,588 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:59:40,588 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:59:40,589 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1516149165] [2023-11-26 11:59:40,589 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:59:40,589 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:59:40,589 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:59:40,590 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:59:40,590 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:59:40,590 INFO L87 Difference]: Start difference. First operand 431 states and 614 transitions. cyclomatic complexity: 186 Second operand has 5 states, 5 states have (on average 15.8) internal successors, (79), 5 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:59:40,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:59:40,741 INFO L93 Difference]: Finished difference Result 500 states and 726 transitions. [2023-11-26 11:59:40,741 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 500 states and 726 transitions. [2023-11-26 11:59:40,745 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 493 [2023-11-26 11:59:40,750 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 500 states to 500 states and 726 transitions. [2023-11-26 11:59:40,751 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 500 [2023-11-26 11:59:40,751 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 500 [2023-11-26 11:59:40,752 INFO L73 IsDeterministic]: Start isDeterministic. Operand 500 states and 726 transitions. [2023-11-26 11:59:40,753 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:59:40,753 INFO L218 hiAutomatonCegarLoop]: Abstraction has 500 states and 726 transitions. [2023-11-26 11:59:40,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 500 states and 726 transitions. [2023-11-26 11:59:40,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 500 to 431. [2023-11-26 11:59:40,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 431 states, 427 states have (on average 1.4168618266978923) internal successors, (605), 426 states have internal predecessors, (605), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:59:40,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 431 states to 431 states and 611 transitions. [2023-11-26 11:59:40,765 INFO L240 hiAutomatonCegarLoop]: Abstraction has 431 states and 611 transitions. [2023-11-26 11:59:40,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:59:40,766 INFO L428 stractBuchiCegarLoop]: Abstraction has 431 states and 611 transitions. [2023-11-26 11:59:40,766 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 11:59:40,766 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 431 states and 611 transitions. [2023-11-26 11:59:40,768 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 424 [2023-11-26 11:59:40,769 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:59:40,769 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:59:40,769 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:59:40,770 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:59:40,770 INFO L748 eck$LassoCheckResult]: Stem: 7581#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 7582#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7286#L989-4 [2023-11-26 11:59:40,770 INFO L750 eck$LassoCheckResult]: Loop: 7286#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7276#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 7270#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 7271#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7287#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 7393#L996-263 havoc main_~_ha_hashv~0#1; 7394#L996-176 goto; 7609#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7657#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7686#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 7685#L996-73 assume !main_#t~switch68#1; 7648#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 7649#L996-76 assume !main_#t~switch68#1; 7623#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 7624#L996-79 assume !main_#t~switch68#1; 7569#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 7570#L996-82 assume !main_#t~switch68#1; 7362#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 7363#L996-85 assume !main_#t~switch68#1; 7364#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 7365#L996-88 assume !main_#t~switch68#1; 7598#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 7599#L996-91 assume !main_#t~switch68#1; 7658#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 7659#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 7683#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 7681#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 7679#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 7677#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 7675#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 7673#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 7672#L996-105 havoc main_#t~switch68#1; 7544#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7416#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 7360#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7361#L996-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 7450#L996-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 7627#L996-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet81#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 7651#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7661#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 7565#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7660#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7349#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7442#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7404#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7500#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7501#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7546#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7337#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7338#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7477#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7593#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7267#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 7408#L996-170 goto; 7409#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7389#L996-173 goto; 7390#L996-175 goto; 7602#L996-260 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7603#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 7610#L996-190 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#0(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#0(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#0(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#0(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 7628#L996-189 goto; 7429#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#0(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#0(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 7539#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#0(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 7465#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 7466#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 7494#L996-198 goto; 7592#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#0(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#0(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7368#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 7369#L996-203 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 7329#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#0(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 7330#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 7567#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7612#L996-254 goto; 7653#L996-256 havoc main_~_ha_bkt~0#1; 7654#L996-257 goto; 7645#L996-259 goto; 7306#L996-261 havoc main_~_ha_hashv~0#1; 7307#L996-262 goto; 7418#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 7286#L989-4 [2023-11-26 11:59:40,771 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:40,771 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 8 times [2023-11-26 11:59:40,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:40,772 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [395346198] [2023-11-26 11:59:40,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:40,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:40,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:40,785 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:59:40,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:59:40,802 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:59:40,802 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:59:40,802 INFO L85 PathProgramCache]: Analyzing trace with hash -461098509, now seen corresponding path program 1 times [2023-11-26 11:59:40,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:59:40,803 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1068307989] [2023-11-26 11:59:40,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:40,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:59:40,852 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:59:40,852 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1518694244] [2023-11-26 11:59:40,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:59:40,853 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:59:40,853 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:59:40,856 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:59:40,897 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-26 11:59:45,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:59:45,209 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 64 conjunts are in the unsatisfiable core [2023-11-26 11:59:45,214 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:59:45,495 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-26 11:59:45,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 44 treesize of output 22 [2023-11-26 11:59:46,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:59:46,727 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:59:46,727 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:59:46,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1068307989] [2023-11-26 11:59:46,728 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:59:46,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1518694244] [2023-11-26 11:59:46,728 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1518694244] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:59:46,728 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:59:46,729 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2023-11-26 11:59:46,729 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2016069659] [2023-11-26 11:59:46,729 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:59:46,730 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:59:46,730 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:59:46,730 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2023-11-26 11:59:46,731 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2023-11-26 11:59:46,732 INFO L87 Difference]: Start difference. First operand 431 states and 611 transitions. cyclomatic complexity: 183 Second operand has 16 states, 16 states have (on average 4.9375) internal successors, (79), 16 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:59:50,608 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.30s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 12:00:03,663 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.71s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 12:00:05,569 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.91s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 12:00:08,218 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 12:00:09,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:00:09,580 INFO L93 Difference]: Finished difference Result 450 states and 634 transitions. [2023-11-26 12:00:09,580 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 450 states and 634 transitions. [2023-11-26 12:00:09,584 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 443 [2023-11-26 12:00:09,592 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 450 states to 450 states and 634 transitions. [2023-11-26 12:00:09,593 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 450 [2023-11-26 12:00:09,593 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 450 [2023-11-26 12:00:09,594 INFO L73 IsDeterministic]: Start isDeterministic. Operand 450 states and 634 transitions. [2023-11-26 12:00:09,595 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:00:09,595 INFO L218 hiAutomatonCegarLoop]: Abstraction has 450 states and 634 transitions. [2023-11-26 12:00:09,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 450 states and 634 transitions. [2023-11-26 12:00:09,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 450 to 440. [2023-11-26 12:00:09,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 440 states, 436 states have (on average 1.4105504587155964) internal successors, (615), 435 states have internal predecessors, (615), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:00:09,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 440 states to 440 states and 621 transitions. [2023-11-26 12:00:09,610 INFO L240 hiAutomatonCegarLoop]: Abstraction has 440 states and 621 transitions. [2023-11-26 12:00:09,610 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2023-11-26 12:00:09,613 INFO L428 stractBuchiCegarLoop]: Abstraction has 440 states and 621 transitions. [2023-11-26 12:00:09,613 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-26 12:00:09,613 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 440 states and 621 transitions. [2023-11-26 12:00:09,616 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 433 [2023-11-26 12:00:09,616 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:00:09,616 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:00:09,617 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:00:09,617 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:00:09,618 INFO L748 eck$LassoCheckResult]: Stem: 8719#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 8720#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8424#L989-4 [2023-11-26 12:00:09,619 INFO L750 eck$LassoCheckResult]: Loop: 8424#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8414#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 8408#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 8409#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 8425#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 8530#L996-263 havoc main_~_ha_hashv~0#1; 8531#L996-176 goto; 8747#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 8787#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8841#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 8840#L996-73 assume !main_#t~switch68#1; 8839#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 8422#L996-76 assume !main_#t~switch68#1; 8423#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 8508#L996-79 assume !main_#t~switch68#1; 8509#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 8534#L996-82 assume !main_#t~switch68#1; 8499#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 8500#L996-85 assume !main_#t~switch68#1; 8828#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 8826#L996-88 assume !main_#t~switch68#1; 8824#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 8649#L996-91 assume !main_#t~switch68#1; 8650#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 8767#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 8768#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 8834#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 8835#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 8833#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 8832#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 8831#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 8472#L996-105 havoc main_#t~switch68#1; 8639#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8546#L996-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 8548#L996-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 8763#L996-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet80#1 := 0; 8494#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8495#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 8582#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8794#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 8704#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8793#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 8676#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8791#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8664#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8636#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 8637#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8684#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8475#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8476#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8613#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8730#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8403#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 8541#L996-170 goto; 8542#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8524#L996-173 goto; 8525#L996-175 goto; 8738#L996-260 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8739#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 8745#L996-190 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#0(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#0(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#0(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#0(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 8759#L996-189 goto; 8563#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#0(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#0(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 8677#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#0(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 8597#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 8598#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 8628#L996-198 goto; 8728#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#0(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#0(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8504#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 8505#L996-203 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 8467#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#0(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 8468#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 8706#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 8749#L996-254 goto; 8785#L996-256 havoc main_~_ha_bkt~0#1; 8786#L996-257 goto; 8777#L996-259 goto; 8444#L996-261 havoc main_~_ha_hashv~0#1; 8445#L996-262 goto; 8553#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 8424#L989-4 [2023-11-26 12:00:09,620 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:09,620 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 9 times [2023-11-26 12:00:09,620 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:09,621 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [835884412] [2023-11-26 12:00:09,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:09,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:09,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:09,639 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:00:09,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:09,660 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:00:09,661 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:09,661 INFO L85 PathProgramCache]: Analyzing trace with hash -177113515, now seen corresponding path program 1 times [2023-11-26 12:00:09,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:09,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592958930] [2023-11-26 12:00:09,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:09,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:09,715 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:00:09,716 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [476528783] [2023-11-26 12:00:09,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:09,716 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:00:09,717 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:00:09,724 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:00:09,735 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-26 12:00:11,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:00:11,063 INFO L262 TraceCheckSpWp]: Trace formula consists of 519 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 12:00:11,065 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:00:11,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:00:11,248 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:00:11,248 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:00:11,248 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [592958930] [2023-11-26 12:00:11,248 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:00:11,249 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [476528783] [2023-11-26 12:00:11,249 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [476528783] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:00:11,249 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:00:11,249 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 12:00:11,249 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1252979092] [2023-11-26 12:00:11,250 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:00:11,250 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:00:11,250 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:00:11,251 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 12:00:11,251 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 12:00:11,251 INFO L87 Difference]: Start difference. First operand 440 states and 621 transitions. cyclomatic complexity: 184 Second operand has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:00:12,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:00:12,105 INFO L93 Difference]: Finished difference Result 446 states and 628 transitions. [2023-11-26 12:00:12,105 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 446 states and 628 transitions. [2023-11-26 12:00:12,108 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 439 [2023-11-26 12:00:12,113 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 446 states to 446 states and 628 transitions. [2023-11-26 12:00:12,113 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 446 [2023-11-26 12:00:12,114 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 446 [2023-11-26 12:00:12,114 INFO L73 IsDeterministic]: Start isDeterministic. Operand 446 states and 628 transitions. [2023-11-26 12:00:12,115 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:00:12,115 INFO L218 hiAutomatonCegarLoop]: Abstraction has 446 states and 628 transitions. [2023-11-26 12:00:12,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 446 states and 628 transitions. [2023-11-26 12:00:12,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 446 to 444. [2023-11-26 12:00:12,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 444 states, 440 states have (on average 1.4090909090909092) internal successors, (620), 439 states have internal predecessors, (620), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:00:12,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 444 states and 626 transitions. [2023-11-26 12:00:12,128 INFO L240 hiAutomatonCegarLoop]: Abstraction has 444 states and 626 transitions. [2023-11-26 12:00:12,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 12:00:12,129 INFO L428 stractBuchiCegarLoop]: Abstraction has 444 states and 626 transitions. [2023-11-26 12:00:12,129 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-26 12:00:12,130 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 444 states and 626 transitions. [2023-11-26 12:00:12,132 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 437 [2023-11-26 12:00:12,133 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:00:12,133 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:00:12,134 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:00:12,134 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:00:12,135 INFO L748 eck$LassoCheckResult]: Stem: 9846#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#2 := ~initToZeroAtPointerBaseAddress~int(#memory_int#2, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 9847#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9553#L989-4 [2023-11-26 12:00:12,135 INFO L750 eck$LassoCheckResult]: Loop: 9553#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9543#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 9537#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 9538#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9554#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 9658#L996-263 havoc main_~_ha_hashv~0#1; 9659#L996-176 goto; 9873#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9918#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9971#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 9801#L996-73 assume !main_#t~switch68#1; 9802#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 9968#L996-76 assume !main_#t~switch68#1; 9883#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 9634#L996-79 assume !main_#t~switch68#1; 9635#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 9662#L996-82 assume !main_#t~switch68#1; 9628#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 9602#L996-85 assume !main_#t~switch68#1; 9603#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 9629#L996-88 assume !main_#t~switch68#1; 9648#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 9777#L996-91 assume !main_#t~switch68#1; 9778#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 9894#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 9895#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 9972#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 9916#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 9917#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 9970#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 9969#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 9601#L996-105 havoc main_#t~switch68#1; 9767#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9674#L996-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 9676#L996-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 9890#L996-111 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet80#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 9623#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9624#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 9909#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9925#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 9829#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9922#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 9803#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9920#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 9792#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9761#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9762#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9810#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 9604#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9605#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9741#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9857#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 9532#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 9669#L996-170 goto; 9670#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 9652#L996-173 goto; 9653#L996-175 goto; 9864#L996-260 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9865#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 9871#L996-190 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#0(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#0(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#0(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#0(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 9886#L996-189 goto; 9691#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#0(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#0(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 9805#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#0(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 9727#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 9728#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 9756#L996-198 goto; 9856#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#0(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#0(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9632#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 9633#L996-203 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 9598#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#0(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 9599#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 9833#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9875#L996-254 goto; 9914#L996-256 havoc main_~_ha_bkt~0#1; 9915#L996-257 goto; 9905#L996-259 goto; 9573#L996-261 havoc main_~_ha_hashv~0#1; 9574#L996-262 goto; 9681#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 9553#L989-4 [2023-11-26 12:00:12,135 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:12,136 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 10 times [2023-11-26 12:00:12,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:12,136 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187108431] [2023-11-26 12:00:12,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:12,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:12,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:12,156 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:00:12,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:12,188 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:00:12,189 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:12,189 INFO L85 PathProgramCache]: Analyzing trace with hash 2068465939, now seen corresponding path program 1 times [2023-11-26 12:00:12,190 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:12,190 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52962733] [2023-11-26 12:00:12,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:12,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:12,247 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:00:12,247 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1020604550] [2023-11-26 12:00:12,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:12,248 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:00:12,248 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:00:12,252 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:00:12,268 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aa7d320d-f29c-488c-b85f-13a8bc35f20f/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2023-11-26 12:00:14,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:00:14,630 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 20 conjunts are in the unsatisfiable core [2023-11-26 12:00:14,632 INFO L285 TraceCheckSpWp]: Computing forward predicates...