./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ff5be3465740cb655882704e7eef418c95d0bbd56a2060e741c7d3e996e58af7 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:44:37,358 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:44:37,481 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:44:37,488 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:44:37,489 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:44:37,555 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:44:37,556 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:44:37,557 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:44:37,558 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:44:37,563 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:44:37,565 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:44:37,565 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:44:37,566 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:44:37,568 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:44:37,568 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:44:37,569 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:44:37,569 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:44:37,571 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:44:37,572 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:44:37,572 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:44:37,573 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:44:37,573 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:44:37,574 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:44:37,574 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:44:37,575 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:44:37,575 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:44:37,576 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:44:37,576 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:44:37,577 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:44:37,577 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:44:37,578 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:44:37,579 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:44:37,579 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:44:37,579 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:44:37,595 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:44:37,595 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:44:37,595 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:44:37,596 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:44:37,596 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ff5be3465740cb655882704e7eef418c95d0bbd56a2060e741c7d3e996e58af7 [2023-11-26 11:44:37,942 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:44:37,975 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:44:37,978 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:44:37,979 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:44:37,980 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:44:37,981 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i [2023-11-26 11:44:41,106 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:44:41,550 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:44:41,551 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i [2023-11-26 11:44:41,580 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/data/57f1be72f/ec3ab7fa8a5341cfb32d8ade11d6e9dc/FLAGafe31eb52 [2023-11-26 11:44:41,598 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/data/57f1be72f/ec3ab7fa8a5341cfb32d8ade11d6e9dc [2023-11-26 11:44:41,604 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:44:41,606 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:44:41,610 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:44:41,610 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:44:41,615 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:44:41,616 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:44:41" (1/1) ... [2023-11-26 11:44:41,617 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3c695542 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:41, skipping insertion in model container [2023-11-26 11:44:41,617 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:44:41" (1/1) ... [2023-11-26 11:44:41,698 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:44:42,487 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:44:42,501 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:44:42,719 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:44:42,799 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-26 11:44:42,808 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:44:42,808 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42 WrapperNode [2023-11-26 11:44:42,809 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:44:42,810 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:44:42,810 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:44:42,810 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:44:42,818 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:42,882 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:43,020 INFO L138 Inliner]: procedures = 282, calls = 298, calls flagged for inlining = 23, calls inlined = 33, statements flattened = 1512 [2023-11-26 11:44:43,020 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:44:43,021 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:44:43,021 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:44:43,022 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:44:43,034 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:43,034 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:43,046 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:43,232 INFO L175 MemorySlicer]: Split 270 memory accesses to 5 slices as follows [2, 8, 5, 221, 34]. 82 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0, 0, 0]. The 59 writes are split as follows [0, 4, 1, 50, 4]. [2023-11-26 11:44:43,232 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:43,232 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:43,314 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:43,367 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:43,378 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:43,392 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:43,415 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:44:43,421 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:44:43,421 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:44:43,421 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:44:43,422 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (1/1) ... [2023-11-26 11:44:43,428 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:44:43,439 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:43,457 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:44:43,493 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:44:43,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 11:44:43,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 11:44:43,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 11:44:43,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-26 11:44:43,503 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#4 [2023-11-26 11:44:43,503 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 11:44:43,503 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 11:44:43,503 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 11:44:43,503 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-26 11:44:43,503 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#4 [2023-11-26 11:44:43,504 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 11:44:43,504 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-26 11:44:43,504 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 11:44:43,504 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 11:44:43,506 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 11:44:43,506 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-26 11:44:43,506 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#4 [2023-11-26 11:44:43,507 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 11:44:43,507 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 11:44:43,507 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 11:44:43,507 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 11:44:43,507 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-26 11:44:43,507 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#4 [2023-11-26 11:44:43,508 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 11:44:43,508 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 11:44:43,508 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 11:44:43,508 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-26 11:44:43,509 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#4 [2023-11-26 11:44:43,509 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 11:44:43,509 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:44:43,510 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 11:44:43,510 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 11:44:43,510 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 11:44:43,510 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-26 11:44:43,511 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#4 [2023-11-26 11:44:43,511 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:44:43,511 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 11:44:43,512 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 11:44:43,512 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-26 11:44:43,512 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#4 [2023-11-26 11:44:43,512 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:44:43,512 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:44:43,806 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:44:43,808 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:44:43,814 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:44:43,895 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:44:43,928 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:44:43,960 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:44:43,986 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:44:45,870 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:44:45,895 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:44:45,899 INFO L309 CfgBuilder]: Removed 63 assume(true) statements. [2023-11-26 11:44:45,901 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:44:45 BoogieIcfgContainer [2023-11-26 11:44:45,901 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:44:45,903 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:44:45,903 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:44:45,907 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:44:45,908 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:44:45,909 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:44:41" (1/3) ... [2023-11-26 11:44:45,911 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@22a44f0b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:44:45, skipping insertion in model container [2023-11-26 11:44:45,911 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:44:45,911 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:44:42" (2/3) ... [2023-11-26 11:44:45,914 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@22a44f0b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:44:45, skipping insertion in model container [2023-11-26 11:44:45,914 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:44:45,915 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:44:45" (3/3) ... [2023-11-26 11:44:45,916 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_SAX_test6-1.i [2023-11-26 11:44:45,990 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:44:45,990 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:44:45,991 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:44:45,991 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:44:45,991 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:44:45,991 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:44:45,991 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:44:45,991 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:44:45,998 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:46,046 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 390 [2023-11-26 11:44:46,047 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:46,047 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:46,054 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:46,055 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:46,055 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:44:46,056 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:46,084 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 390 [2023-11-26 11:44:46,084 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:46,084 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:46,085 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:46,085 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:46,092 INFO L748 eck$LassoCheckResult]: Stem: 119#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 333#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8#L989-4true [2023-11-26 11:44:46,093 INFO L750 eck$LassoCheckResult]: Loop: 8#L989-4true call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 208#L989-1true assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 4#real_malloc_returnLabel#1true main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 9#L991true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 80#L991-2true call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 239#L996-263true assume !true; 391#L989-3true call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 8#L989-4true [2023-11-26 11:44:46,099 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:46,100 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 1 times [2023-11-26 11:44:46,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:46,110 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505107758] [2023-11-26 11:44:46,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:46,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:46,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:46,234 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:46,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:46,291 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:46,294 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:46,294 INFO L85 PathProgramCache]: Analyzing trace with hash 1419562106, now seen corresponding path program 1 times [2023-11-26 11:44:46,295 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:46,295 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699651890] [2023-11-26 11:44:46,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:46,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:46,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:46,382 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:46,383 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1699651890] [2023-11-26 11:44:46,383 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-26 11:44:46,384 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [253489112] [2023-11-26 11:44:46,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:46,384 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:46,384 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:46,394 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:46,401 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-26 11:44:46,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:46,621 INFO L262 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-26 11:44:46,622 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:46,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:46,676 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:46,677 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [253489112] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:46,677 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:46,677 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 11:44:46,678 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [886711200] [2023-11-26 11:44:46,679 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:46,683 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:46,684 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:46,714 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 11:44:46,714 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 11:44:46,717 INFO L87 Difference]: Start difference. First operand has 414 states, 409 states have (on average 1.6503667481662592) internal successors, (675), 409 states have internal predecessors, (675), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:46,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:46,751 INFO L93 Difference]: Finished difference Result 397 states and 573 transitions. [2023-11-26 11:44:46,753 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 397 states and 573 transitions. [2023-11-26 11:44:46,761 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 367 [2023-11-26 11:44:46,773 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 397 states to 374 states and 550 transitions. [2023-11-26 11:44:46,774 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 374 [2023-11-26 11:44:46,777 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 374 [2023-11-26 11:44:46,778 INFO L73 IsDeterministic]: Start isDeterministic. Operand 374 states and 550 transitions. [2023-11-26 11:44:46,783 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:46,783 INFO L218 hiAutomatonCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 11:44:46,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states and 550 transitions. [2023-11-26 11:44:46,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 374. [2023-11-26 11:44:46,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 374 states, 370 states have (on average 1.4702702702702704) internal successors, (544), 369 states have internal predecessors, (544), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:46,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 550 transitions. [2023-11-26 11:44:46,853 INFO L240 hiAutomatonCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 11:44:46,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 11:44:46,859 INFO L428 stractBuchiCegarLoop]: Abstraction has 374 states and 550 transitions. [2023-11-26 11:44:46,859 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:44:46,859 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 374 states and 550 transitions. [2023-11-26 11:44:46,862 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 367 [2023-11-26 11:44:46,862 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:46,863 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:46,864 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:46,864 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:46,865 INFO L748 eck$LassoCheckResult]: Stem: 1148#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 1149#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 859#L989-4 [2023-11-26 11:44:46,867 INFO L750 eck$LassoCheckResult]: Loop: 859#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 849#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 843#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 844#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 860#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 963#L996-263 havoc main_~_ha_hashv~0#1; 964#L996-176 goto; 1173#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 889#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 890#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 1104#L996-73 assume main_#t~switch68#1;call main_#t~mem69#1 := read~int#3(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem69#1 % 256 % 4294967296);havoc main_#t~mem69#1; 1105#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 857#L996-76 assume main_#t~switch68#1;call main_#t~mem70#1 := read~int#3(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem70#1 % 256 % 4294967296);havoc main_#t~mem70#1; 858#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 941#L996-79 assume main_#t~switch68#1;call main_#t~mem71#1 := read~int#3(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem71#1 % 256 % 4294967296);havoc main_#t~mem71#1; 942#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 965#L996-82 assume main_#t~switch68#1;call main_#t~mem72#1 := read~int#3(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem72#1 % 256 % 4294967296);havoc main_#t~mem72#1; 933#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 906#L996-85 assume !main_#t~switch68#1; 907#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 934#L996-88 assume main_#t~switch68#1;call main_#t~mem74#1 := read~int#3(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem74#1 % 256 % 4294967296);havoc main_#t~mem74#1; 951#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 1079#L996-91 assume main_#t~switch68#1;call main_#t~mem75#1 := read~int#3(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem75#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem75#1 % 256 % 4294967296 else main_#t~mem75#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem75#1; 1080#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 1193#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 995#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 996#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 1206#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 1087#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 1085#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 904#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 905#L996-105 havoc main_#t~switch68#1; 1070#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 978#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 928#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 929#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1012#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1078#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1131#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1177#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 920#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1007#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 969#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1067#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1068#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1112#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 908#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 909#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1047#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1157#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 838#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 973#L996-170 goto; 974#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 955#L996-173 goto; 956#L996-175 goto; 1164#L996-260 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1165#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 1171#L996-190 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#3(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#3(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#3(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#3(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 1185#L996-189 goto; 994#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#3(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#3(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 1106#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#3(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 1029#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 1030#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 1059#L996-198 goto; 1156#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#3(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#3(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 937#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 938#L996-203 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 902#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#3(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 903#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 1134#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1175#L996-254 goto; 1209#L996-256 havoc main_~_ha_bkt~0#1; 1210#L996-257 goto; 1202#L996-259 goto; 876#L996-261 havoc main_~_ha_hashv~0#1; 877#L996-262 goto; 984#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 859#L989-4 [2023-11-26 11:44:46,868 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:46,868 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 2 times [2023-11-26 11:44:46,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:46,868 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846016195] [2023-11-26 11:44:46,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:46,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:46,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:46,892 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:46,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:46,919 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:46,920 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:46,920 INFO L85 PathProgramCache]: Analyzing trace with hash 997853422, now seen corresponding path program 1 times [2023-11-26 11:44:46,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:46,921 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112157642] [2023-11-26 11:44:46,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:46,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:46,988 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:46,989 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1533187206] [2023-11-26 11:44:46,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:46,989 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:46,989 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:47,030 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:47,037 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-26 11:44:47,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:47,398 INFO L262 TraceCheckSpWp]: Trace formula consists of 553 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:44:47,404 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:47,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:47,461 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:47,461 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:47,462 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1112157642] [2023-11-26 11:44:47,462 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:47,462 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1533187206] [2023-11-26 11:44:47,462 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1533187206] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:47,462 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:47,463 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 11:44:47,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1099653446] [2023-11-26 11:44:47,463 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:47,464 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:47,464 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:47,465 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 11:44:47,465 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 11:44:47,465 INFO L87 Difference]: Start difference. First operand 374 states and 550 transitions. cyclomatic complexity: 179 Second operand has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:47,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:47,593 INFO L93 Difference]: Finished difference Result 395 states and 571 transitions. [2023-11-26 11:44:47,593 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 395 states and 571 transitions. [2023-11-26 11:44:47,597 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 388 [2023-11-26 11:44:47,603 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 395 states to 395 states and 571 transitions. [2023-11-26 11:44:47,603 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 395 [2023-11-26 11:44:47,604 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 395 [2023-11-26 11:44:47,604 INFO L73 IsDeterministic]: Start isDeterministic. Operand 395 states and 571 transitions. [2023-11-26 11:44:47,611 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:47,611 INFO L218 hiAutomatonCegarLoop]: Abstraction has 395 states and 571 transitions. [2023-11-26 11:44:47,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states and 571 transitions. [2023-11-26 11:44:47,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 394. [2023-11-26 11:44:47,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 390 states have (on average 1.4461538461538461) internal successors, (564), 389 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:47,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 570 transitions. [2023-11-26 11:44:47,639 INFO L240 hiAutomatonCegarLoop]: Abstraction has 394 states and 570 transitions. [2023-11-26 11:44:47,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 11:44:47,640 INFO L428 stractBuchiCegarLoop]: Abstraction has 394 states and 570 transitions. [2023-11-26 11:44:47,640 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:44:47,640 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 394 states and 570 transitions. [2023-11-26 11:44:47,643 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 387 [2023-11-26 11:44:47,643 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:47,643 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:47,645 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:47,645 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:47,646 INFO L748 eck$LassoCheckResult]: Stem: 2155#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 2156#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1862#L989-4 [2023-11-26 11:44:47,646 INFO L750 eck$LassoCheckResult]: Loop: 1862#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1852#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 1846#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 1847#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1863#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 1963#L996-263 havoc main_~_ha_hashv~0#1; 1964#L996-176 goto; 2181#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1892#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1893#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 2109#L996-73 assume main_#t~switch68#1;call main_#t~mem69#1 := read~int#3(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem69#1 % 256 % 4294967296);havoc main_#t~mem69#1; 2110#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 1860#L996-76 assume main_#t~switch68#1;call main_#t~mem70#1 := read~int#3(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem70#1 % 256 % 4294967296);havoc main_#t~mem70#1; 1861#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 1943#L996-79 assume main_#t~switch68#1;call main_#t~mem71#1 := read~int#3(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem71#1 % 256 % 4294967296);havoc main_#t~mem71#1; 1944#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 1969#L996-82 assume main_#t~switch68#1;call main_#t~mem72#1 := read~int#3(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem72#1 % 256 % 4294967296);havoc main_#t~mem72#1; 1970#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 1909#L996-85 assume main_#t~switch68#1;call main_#t~mem73#1 := read~int#3(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem73#1 % 256 % 4294967296);havoc main_#t~mem73#1; 1910#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 1938#L996-88 assume main_#t~switch68#1;call main_#t~mem74#1 := read~int#3(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem74#1 % 256 % 4294967296);havoc main_#t~mem74#1; 1955#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 2084#L996-91 assume main_#t~switch68#1;call main_#t~mem75#1 := read~int#3(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem75#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem75#1 % 256 % 4294967296 else main_#t~mem75#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem75#1; 2085#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 2203#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 2204#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 2218#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 2219#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 2094#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 2095#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 1907#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 1908#L996-105 havoc main_#t~switch68#1; 2075#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1986#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1931#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1932#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2020#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2083#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2139#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2187#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1923#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2012#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1974#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2072#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2073#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2120#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1911#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1912#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2052#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2168#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1841#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 1978#L996-170 goto; 1979#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1959#L996-173 goto; 1960#L996-175 goto; 2174#L996-260 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2175#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 2182#L996-190 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#3(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#3(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#3(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#3(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 2195#L996-189 goto; 1999#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#3(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#3(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 2114#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#3(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 2034#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 2035#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 2064#L996-198 goto; 2166#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#3(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#3(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1941#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 1942#L996-203 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 1905#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#3(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 1906#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 2142#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2185#L996-254 goto; 2222#L996-256 havoc main_~_ha_bkt~0#1; 2223#L996-257 goto; 2213#L996-259 goto; 1879#L996-261 havoc main_~_ha_hashv~0#1; 1880#L996-262 goto; 1989#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 1862#L989-4 [2023-11-26 11:44:47,647 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:47,647 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 3 times [2023-11-26 11:44:47,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:47,647 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534711327] [2023-11-26 11:44:47,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:47,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:47,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:47,669 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:47,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:47,691 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:47,691 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:47,692 INFO L85 PathProgramCache]: Analyzing trace with hash 437153644, now seen corresponding path program 1 times [2023-11-26 11:44:47,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:47,692 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1418129660] [2023-11-26 11:44:47,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:47,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:47,765 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:47,765 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [241398084] [2023-11-26 11:44:47,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:47,766 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:47,766 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:47,770 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:47,789 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-26 11:44:48,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:48,148 INFO L262 TraceCheckSpWp]: Trace formula consists of 559 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 11:44:48,153 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:48,196 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:48,196 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:48,197 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:48,197 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1418129660] [2023-11-26 11:44:48,197 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:48,197 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [241398084] [2023-11-26 11:44:48,197 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [241398084] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:48,198 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:48,198 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 11:44:48,198 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [99360801] [2023-11-26 11:44:48,198 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:48,199 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:48,199 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:48,199 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 11:44:48,199 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 11:44:48,200 INFO L87 Difference]: Start difference. First operand 394 states and 570 transitions. cyclomatic complexity: 179 Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:48,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:48,313 INFO L93 Difference]: Finished difference Result 381 states and 550 transitions. [2023-11-26 11:44:48,314 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 381 states and 550 transitions. [2023-11-26 11:44:48,318 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 374 [2023-11-26 11:44:48,322 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 381 states to 381 states and 550 transitions. [2023-11-26 11:44:48,323 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 381 [2023-11-26 11:44:48,324 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 381 [2023-11-26 11:44:48,325 INFO L73 IsDeterministic]: Start isDeterministic. Operand 381 states and 550 transitions. [2023-11-26 11:44:48,326 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:48,326 INFO L218 hiAutomatonCegarLoop]: Abstraction has 381 states and 550 transitions. [2023-11-26 11:44:48,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states and 550 transitions. [2023-11-26 11:44:48,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 380. [2023-11-26 11:44:48,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 376 states have (on average 1.4441489361702127) internal successors, (543), 375 states have internal predecessors, (543), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:48,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 549 transitions. [2023-11-26 11:44:48,359 INFO L240 hiAutomatonCegarLoop]: Abstraction has 380 states and 549 transitions. [2023-11-26 11:44:48,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 11:44:48,364 INFO L428 stractBuchiCegarLoop]: Abstraction has 380 states and 549 transitions. [2023-11-26 11:44:48,365 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:44:48,365 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 380 states and 549 transitions. [2023-11-26 11:44:48,367 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 373 [2023-11-26 11:44:48,368 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:48,369 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:48,372 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:48,372 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:48,377 INFO L748 eck$LassoCheckResult]: Stem: 3161#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 3162#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2874#L989-4 [2023-11-26 11:44:48,378 INFO L750 eck$LassoCheckResult]: Loop: 2874#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2864#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 2858#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 2859#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2875#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 2978#L996-263 havoc main_~_ha_hashv~0#1; 2979#L996-176 goto; 3188#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2904#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2905#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 3118#L996-73 assume !main_#t~switch68#1; 3119#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 2872#L996-76 assume !main_#t~switch68#1; 2873#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 2956#L996-79 assume !main_#t~switch68#1; 2957#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 2985#L996-82 assume !main_#t~switch68#1; 2948#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 2921#L996-85 assume !main_#t~switch68#1; 2922#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 2949#L996-88 assume !main_#t~switch68#1; 2966#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 3094#L996-91 assume !main_#t~switch68#1; 3095#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 3208#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 3010#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 3011#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 3222#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 3102#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 3100#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 2919#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 2920#L996-105 havoc main_#t~switch68#1; 3085#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2993#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2943#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2944#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3027#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3093#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3145#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3192#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2934#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3022#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2983#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3082#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3083#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3127#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2923#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2924#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3062#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3172#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2853#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 2988#L996-170 goto; 2989#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2970#L996-173 goto; 2971#L996-175 goto; 3179#L996-260 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3180#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 3186#L996-190 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#3(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#3(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#3(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#3(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 3200#L996-189 goto; 3009#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#3(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#3(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 3121#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#3(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 3044#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 3045#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 3074#L996-198 goto; 3171#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#3(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#3(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2952#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 2953#L996-203 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 2917#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#3(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 2918#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 3149#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3190#L996-254 goto; 3225#L996-256 havoc main_~_ha_bkt~0#1; 3226#L996-257 goto; 3218#L996-259 goto; 2891#L996-261 havoc main_~_ha_hashv~0#1; 2892#L996-262 goto; 2999#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 2874#L989-4 [2023-11-26 11:44:48,378 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:48,378 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 4 times [2023-11-26 11:44:48,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:48,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885486366] [2023-11-26 11:44:48,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:48,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:48,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:48,415 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:48,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:48,445 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:48,445 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:48,446 INFO L85 PathProgramCache]: Analyzing trace with hash -2007566726, now seen corresponding path program 1 times [2023-11-26 11:44:48,446 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:48,446 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1806776660] [2023-11-26 11:44:48,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:48,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:48,508 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:48,508 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [345508872] [2023-11-26 11:44:48,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:48,509 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:48,509 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:48,512 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:48,519 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-26 11:44:49,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:49,551 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-26 11:44:49,556 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:49,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:49,792 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:49,792 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:49,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1806776660] [2023-11-26 11:44:49,793 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:49,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [345508872] [2023-11-26 11:44:49,793 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [345508872] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:49,793 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:49,794 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 11:44:49,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [845799788] [2023-11-26 11:44:49,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:49,795 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:49,795 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:49,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 11:44:49,796 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-26 11:44:49,796 INFO L87 Difference]: Start difference. First operand 380 states and 549 transitions. cyclomatic complexity: 172 Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:50,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:50,320 INFO L93 Difference]: Finished difference Result 420 states and 597 transitions. [2023-11-26 11:44:50,320 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 420 states and 597 transitions. [2023-11-26 11:44:50,324 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 413 [2023-11-26 11:44:50,329 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 420 states to 420 states and 597 transitions. [2023-11-26 11:44:50,329 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 420 [2023-11-26 11:44:50,329 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 420 [2023-11-26 11:44:50,330 INFO L73 IsDeterministic]: Start isDeterministic. Operand 420 states and 597 transitions. [2023-11-26 11:44:50,331 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:50,331 INFO L218 hiAutomatonCegarLoop]: Abstraction has 420 states and 597 transitions. [2023-11-26 11:44:50,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420 states and 597 transitions. [2023-11-26 11:44:50,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420 to 417. [2023-11-26 11:44:50,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 417 states, 413 states have (on average 1.4213075060532687) internal successors, (587), 412 states have internal predecessors, (587), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:50,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 593 transitions. [2023-11-26 11:44:50,343 INFO L240 hiAutomatonCegarLoop]: Abstraction has 417 states and 593 transitions. [2023-11-26 11:44:50,343 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:44:50,344 INFO L428 stractBuchiCegarLoop]: Abstraction has 417 states and 593 transitions. [2023-11-26 11:44:50,344 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 11:44:50,344 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 417 states and 593 transitions. [2023-11-26 11:44:50,347 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 410 [2023-11-26 11:44:50,347 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:50,347 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:50,348 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:50,348 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:50,349 INFO L748 eck$LassoCheckResult]: Stem: 4200#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 4201#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3911#L989-4 [2023-11-26 11:44:50,349 INFO L750 eck$LassoCheckResult]: Loop: 3911#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3901#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 3895#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 3896#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3912#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 4012#L996-263 havoc main_~_ha_hashv~0#1; 4013#L996-176 goto; 4227#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4270#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4305#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 4304#L996-73 assume !main_#t~switch68#1; 4303#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 3909#L996-76 assume !main_#t~switch68#1; 3910#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 3992#L996-79 assume !main_#t~switch68#1; 3993#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 4018#L996-82 assume !main_#t~switch68#1; 3985#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 3986#L996-85 assume !main_#t~switch68#1; 4297#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 4296#L996-88 assume !main_#t~switch68#1; 4295#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 4133#L996-91 assume !main_#t~switch68#1; 4134#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 4250#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 4049#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 4050#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 4265#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 4142#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 4140#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 3956#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 3957#L996-105 havoc main_#t~switch68#1; 4123#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4165#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3980#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3981#L996-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 4069#L996-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet81#1 := main_~_hj_j~0#1; 4131#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4132#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 4186#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4233#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3972#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4061#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4022#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4120#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4121#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4167#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3960#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3961#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4100#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4213#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3890#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 4026#L996-170 goto; 4027#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4008#L996-173 goto; 4009#L996-175 goto; 4220#L996-260 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4221#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 4228#L996-190 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#3(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#3(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#3(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#3(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 4241#L996-189 goto; 4048#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#3(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#3(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 4160#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#3(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 4082#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 4083#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 4112#L996-198 goto; 4211#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#3(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#3(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3990#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 3991#L996-203 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 3954#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#3(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 3955#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 4189#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4231#L996-254 goto; 4268#L996-256 havoc main_~_ha_bkt~0#1; 4269#L996-257 goto; 4260#L996-259 goto; 3928#L996-261 havoc main_~_ha_hashv~0#1; 3929#L996-262 goto; 4038#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 3911#L989-4 [2023-11-26 11:44:50,349 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:50,350 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 5 times [2023-11-26 11:44:50,350 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:50,350 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1911789718] [2023-11-26 11:44:50,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:50,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:50,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:50,367 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:50,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:50,386 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:50,386 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:50,387 INFO L85 PathProgramCache]: Analyzing trace with hash -241550153, now seen corresponding path program 1 times [2023-11-26 11:44:50,387 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:50,387 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284752614] [2023-11-26 11:44:50,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:50,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:50,469 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:50,469 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [638517955] [2023-11-26 11:44:50,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:50,470 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:50,470 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:50,473 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:50,484 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-26 11:44:50,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:50,891 INFO L262 TraceCheckSpWp]: Trace formula consists of 518 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 11:44:50,894 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:51,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:51,101 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:51,101 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:51,102 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1284752614] [2023-11-26 11:44:51,102 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:51,102 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [638517955] [2023-11-26 11:44:51,102 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [638517955] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:51,103 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:51,103 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 11:44:51,103 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1092016175] [2023-11-26 11:44:51,103 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:51,104 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:51,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:51,105 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:44:51,105 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:44:51,105 INFO L87 Difference]: Start difference. First operand 417 states and 593 transitions. cyclomatic complexity: 179 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:51,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:51,965 INFO L93 Difference]: Finished difference Result 428 states and 609 transitions. [2023-11-26 11:44:51,965 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 428 states and 609 transitions. [2023-11-26 11:44:51,969 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 421 [2023-11-26 11:44:51,975 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 428 states to 428 states and 609 transitions. [2023-11-26 11:44:51,976 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 428 [2023-11-26 11:44:51,977 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 428 [2023-11-26 11:44:51,979 INFO L73 IsDeterministic]: Start isDeterministic. Operand 428 states and 609 transitions. [2023-11-26 11:44:51,980 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:51,980 INFO L218 hiAutomatonCegarLoop]: Abstraction has 428 states and 609 transitions. [2023-11-26 11:44:51,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 428 states and 609 transitions. [2023-11-26 11:44:51,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 428 to 425. [2023-11-26 11:44:51,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 425 states, 421 states have (on average 1.4228028503562946) internal successors, (599), 420 states have internal predecessors, (599), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:51,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 605 transitions. [2023-11-26 11:44:51,993 INFO L240 hiAutomatonCegarLoop]: Abstraction has 425 states and 605 transitions. [2023-11-26 11:44:51,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 11:44:51,997 INFO L428 stractBuchiCegarLoop]: Abstraction has 425 states and 605 transitions. [2023-11-26 11:44:51,997 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 11:44:51,997 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 425 states and 605 transitions. [2023-11-26 11:44:52,000 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 418 [2023-11-26 11:44:52,000 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:52,000 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:52,001 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:52,002 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:52,002 INFO L748 eck$LassoCheckResult]: Stem: 5289#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 5290#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4999#L989-4 [2023-11-26 11:44:52,004 INFO L750 eck$LassoCheckResult]: Loop: 4999#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4989#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 4983#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 4984#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5000#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 5099#L996-263 havoc main_~_ha_hashv~0#1; 5100#L996-176 goto; 5316#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5363#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5401#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 5400#L996-73 assume !main_#t~switch68#1; 5399#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 5398#L996-76 assume !main_#t~switch68#1; 5397#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 5396#L996-79 assume !main_#t~switch68#1; 5395#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 5394#L996-82 assume !main_#t~switch68#1; 5393#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 5392#L996-85 assume !main_#t~switch68#1; 5391#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 5390#L996-88 assume !main_#t~switch68#1; 5389#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 5388#L996-91 assume !main_#t~switch68#1; 5387#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 5385#L996-94 assume !main_#t~switch68#1; 5384#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 5382#L996-97 assume !main_#t~switch68#1; 5379#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 5377#L996-100 assume !main_#t~switch68#1; 5227#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 5228#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 5045#L996-105 havoc main_#t~switch68#1; 5254#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5121#L996-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 5122#L996-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 5337#L996-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet80#1 := 0; 5345#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5369#L996-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet81#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 5218#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5219#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 5275#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5322#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5060#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5147#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5109#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5206#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5207#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5256#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5048#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5049#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5186#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5303#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4978#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 5113#L996-170 goto; 5114#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5095#L996-173 goto; 5096#L996-175 goto; 5309#L996-260 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5310#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 5317#L996-190 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#3(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#3(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#3(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#3(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 5333#L996-189 goto; 5134#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#3(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#3(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 5249#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#3(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 5168#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 5169#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 5198#L996-198 goto; 5301#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#3(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#3(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5077#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 5078#L996-203 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 5042#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#3(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 5043#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 5278#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5320#L996-254 goto; 5361#L996-256 havoc main_~_ha_bkt~0#1; 5362#L996-257 goto; 5352#L996-259 goto; 5016#L996-261 havoc main_~_ha_hashv~0#1; 5017#L996-262 goto; 5124#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 4999#L989-4 [2023-11-26 11:44:52,005 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:52,005 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 6 times [2023-11-26 11:44:52,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:52,006 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [350844257] [2023-11-26 11:44:52,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:52,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:52,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:52,039 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:52,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:52,064 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:52,067 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:52,068 INFO L85 PathProgramCache]: Analyzing trace with hash -375013541, now seen corresponding path program 1 times [2023-11-26 11:44:52,068 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:52,068 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821846401] [2023-11-26 11:44:52,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:52,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:52,125 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:52,126 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1365177204] [2023-11-26 11:44:52,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:52,126 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:52,126 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:52,131 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:52,144 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-26 11:44:52,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:52,543 INFO L262 TraceCheckSpWp]: Trace formula consists of 501 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 11:44:52,546 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:52,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:52,612 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:52,612 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:52,612 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821846401] [2023-11-26 11:44:52,612 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:52,613 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1365177204] [2023-11-26 11:44:52,613 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1365177204] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:52,613 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:52,614 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 11:44:52,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872926876] [2023-11-26 11:44:52,616 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:52,617 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:52,617 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:52,618 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 11:44:52,618 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-26 11:44:52,618 INFO L87 Difference]: Start difference. First operand 425 states and 605 transitions. cyclomatic complexity: 183 Second operand has 5 states, 5 states have (on average 15.8) internal successors, (79), 5 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:52,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:52,786 INFO L93 Difference]: Finished difference Result 498 states and 724 transitions. [2023-11-26 11:44:52,786 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 498 states and 724 transitions. [2023-11-26 11:44:52,792 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 491 [2023-11-26 11:44:52,797 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 498 states to 498 states and 724 transitions. [2023-11-26 11:44:52,798 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 498 [2023-11-26 11:44:52,799 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 498 [2023-11-26 11:44:52,799 INFO L73 IsDeterministic]: Start isDeterministic. Operand 498 states and 724 transitions. [2023-11-26 11:44:52,800 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:52,800 INFO L218 hiAutomatonCegarLoop]: Abstraction has 498 states and 724 transitions. [2023-11-26 11:44:52,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 498 states and 724 transitions. [2023-11-26 11:44:52,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 498 to 425. [2023-11-26 11:44:52,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 425 states, 421 states have (on average 1.4156769596199525) internal successors, (596), 420 states have internal predecessors, (596), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:52,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 602 transitions. [2023-11-26 11:44:52,819 INFO L240 hiAutomatonCegarLoop]: Abstraction has 425 states and 602 transitions. [2023-11-26 11:44:52,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-26 11:44:52,822 INFO L428 stractBuchiCegarLoop]: Abstraction has 425 states and 602 transitions. [2023-11-26 11:44:52,822 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 11:44:52,822 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 425 states and 602 transitions. [2023-11-26 11:44:52,825 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 418 [2023-11-26 11:44:52,825 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:52,825 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:52,828 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:52,829 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:52,829 INFO L748 eck$LassoCheckResult]: Stem: 6462#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 6463#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6164#L989-4 [2023-11-26 11:44:52,830 INFO L750 eck$LassoCheckResult]: Loop: 6164#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6154#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 6148#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 6149#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6165#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 6267#L996-263 havoc main_~_ha_hashv~0#1; 6268#L996-176 goto; 6490#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6539#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6450#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 6415#L996-73 assume !main_#t~switch68#1; 6416#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 6529#L996-76 assume !main_#t~switch68#1; 6501#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 6502#L996-79 assume !main_#t~switch68#1; 6451#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 6273#L996-82 assume !main_#t~switch68#1; 6274#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 6211#L996-85 assume !main_#t~switch68#1; 6212#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 6258#L996-88 assume !main_#t~switch68#1; 6259#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 6390#L996-91 assume !main_#t~switch68#1; 6391#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 6515#L996-94 assume !main_#t~switch68#1; 6304#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 6305#L996-97 assume !main_#t~switch68#1; 6566#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 6400#L996-100 assume !main_#t~switch68#1; 6401#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 6209#L996-103 assume !main_#t~switch68#1; 6210#L996-105 havoc main_#t~switch68#1; 6424#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6425#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 6548#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6546#L996-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 6547#L996-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 6531#L996-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet81#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 6324#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6542#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 6446#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6496#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6225#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6316#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6278#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6376#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6377#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6427#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6213#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6214#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6356#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6475#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6143#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 6282#L996-170 goto; 6283#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6263#L996-173 goto; 6264#L996-175 goto; 6483#L996-260 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6484#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 6491#L996-190 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#3(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#3(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#3(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#3(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 6506#L996-189 goto; 6303#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#3(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#3(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 6419#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#3(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 6338#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 6339#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 6368#L996-198 goto; 6473#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#3(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#3(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6244#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 6245#L996-203 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 6207#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#3(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 6208#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 6449#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6494#L996-254 goto; 6536#L996-256 havoc main_~_ha_bkt~0#1; 6537#L996-257 goto; 6526#L996-259 goto; 6181#L996-261 havoc main_~_ha_hashv~0#1; 6182#L996-262 goto; 6293#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 6164#L989-4 [2023-11-26 11:44:52,831 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:52,831 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 7 times [2023-11-26 11:44:52,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:52,831 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474822062] [2023-11-26 11:44:52,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:52,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:52,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:52,860 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:52,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:52,889 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:52,889 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:52,890 INFO L85 PathProgramCache]: Analyzing trace with hash -674517253, now seen corresponding path program 1 times [2023-11-26 11:44:52,890 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:52,890 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347895533] [2023-11-26 11:44:52,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:52,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:52,932 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:52,932 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [765312943] [2023-11-26 11:44:52,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:52,933 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:52,933 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:52,939 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:52,963 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-26 11:44:53,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:53,292 INFO L262 TraceCheckSpWp]: Trace formula consists of 493 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 11:44:53,295 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:44:53,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:44:53,329 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 11:44:53,329 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:44:53,329 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347895533] [2023-11-26 11:44:53,329 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 11:44:53,329 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [765312943] [2023-11-26 11:44:53,330 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [765312943] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:44:53,330 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:44:53,330 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 11:44:53,330 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [771227792] [2023-11-26 11:44:53,331 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:44:53,331 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:44:53,331 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:44:53,332 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 11:44:53,332 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 11:44:53,332 INFO L87 Difference]: Start difference. First operand 425 states and 602 transitions. cyclomatic complexity: 180 Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:44:53,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:44:53,403 INFO L93 Difference]: Finished difference Result 343 states and 481 transitions. [2023-11-26 11:44:53,403 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 343 states and 481 transitions. [2023-11-26 11:44:53,407 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 336 [2023-11-26 11:44:53,410 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 343 states to 343 states and 481 transitions. [2023-11-26 11:44:53,411 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 343 [2023-11-26 11:44:53,411 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 343 [2023-11-26 11:44:53,411 INFO L73 IsDeterministic]: Start isDeterministic. Operand 343 states and 481 transitions. [2023-11-26 11:44:53,412 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:44:53,412 INFO L218 hiAutomatonCegarLoop]: Abstraction has 343 states and 481 transitions. [2023-11-26 11:44:53,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states and 481 transitions. [2023-11-26 11:44:53,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 343. [2023-11-26 11:44:53,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 343 states, 339 states have (on average 1.40117994100295) internal successors, (475), 338 states have internal predecessors, (475), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:44:53,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 481 transitions. [2023-11-26 11:44:53,422 INFO L240 hiAutomatonCegarLoop]: Abstraction has 343 states and 481 transitions. [2023-11-26 11:44:53,422 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 11:44:53,423 INFO L428 stractBuchiCegarLoop]: Abstraction has 343 states and 481 transitions. [2023-11-26 11:44:53,423 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-26 11:44:53,423 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 343 states and 481 transitions. [2023-11-26 11:44:53,425 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 336 [2023-11-26 11:44:53,425 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:44:53,425 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:44:53,426 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:44:53,426 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:44:53,426 INFO L748 eck$LassoCheckResult]: Stem: 7429#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;#memory_int#1 := ~initToZeroAtPointerBaseAddress~int(#memory_int#1, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 7430#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~nondet59#1, main_#t~nondet60#1, main_#t~nondet61#1, main_#t~nondet62#1, main_#t~nondet63#1, main_#t~nondet64#1, main_#t~nondet65#1, main_#t~nondet66#1, main_#t~nondet67#1, main_#t~switch68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~mem78#1, main_#t~mem79#1, main_#t~nondet80#1, main_#t~nondet81#1, main_#t~nondet82#1, main_#t~nondet83#1, main_#t~nondet84#1, main_#t~nondet85#1, main_#t~nondet86#1, main_#t~nondet87#1, main_#t~nondet88#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret89#1.base, main_#t~ret89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~ret97#1.base, main_#t~ret97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~nondet117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem126#1, main_#t~mem125#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~short129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ret132#1.base, main_#t~ret132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~nondet142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem146#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~nondet147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~nondet159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~pre162#1, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~post167#1, main_#t~mem171#1, main_#t~mem169#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem170#1, main_#t~mem172#1, main_#t~post173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1, main_#t~post185#1, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem192#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~ite195#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem203#1, main_#t~mem202#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1, main_#t~mem209#1, main_#t~mem211#1, main_#t~mem210#1, main_#t~mem212#1, main_#t~mem213#1, main_#t~nondet214#1, main_#t~nondet215#1, main_#t~nondet216#1, main_#t~nondet217#1, main_#t~nondet218#1, main_#t~nondet219#1, main_#t~nondet220#1, main_#t~nondet221#1, main_#t~nondet222#1, main_#t~switch223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~mem229#1, main_#t~mem230#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem233#1, main_#t~mem234#1, main_#t~nondet235#1, main_#t~nondet236#1, main_#t~nondet237#1, main_#t~nondet238#1, main_#t~nondet239#1, main_#t~nondet240#1, main_#t~nondet241#1, main_#t~nondet242#1, main_#t~nondet243#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~nondet246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~mem255#1, main_#t~mem256#1, main_#t~short257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~ret259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~short266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem291#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~nondet292#1, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1, main_#t~post307#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem199#1, main_#t~post200#1, main_#t~mem201#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#4(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7169#L989-4 [2023-11-26 11:44:53,427 INFO L750 eck$LassoCheckResult]: Loop: 7169#L989-4 call main_#t~mem42#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7165#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 7159#real_malloc_returnLabel#1 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 7160#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7170#L991-2 call main_#t~mem44#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 7260#L996-263 havoc main_~_ha_hashv~0#1; 7261#L996-176 goto; 7454#L996-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7196#L996-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7197#L996-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch68#1 := 11 == main_~_hj_k~0#1; 7394#L996-73 assume !main_#t~switch68#1; 7395#L996-75 main_#t~switch68#1 := main_#t~switch68#1 || 10 == main_~_hj_k~0#1; 7167#L996-76 assume !main_#t~switch68#1; 7168#L996-78 main_#t~switch68#1 := main_#t~switch68#1 || 9 == main_~_hj_k~0#1; 7243#L996-79 assume !main_#t~switch68#1; 7244#L996-81 main_#t~switch68#1 := main_#t~switch68#1 || 8 == main_~_hj_k~0#1; 7266#L996-82 assume !main_#t~switch68#1; 7239#L996-84 main_#t~switch68#1 := main_#t~switch68#1 || 7 == main_~_hj_k~0#1; 7212#L996-85 assume !main_#t~switch68#1; 7213#L996-87 main_#t~switch68#1 := main_#t~switch68#1 || 6 == main_~_hj_k~0#1; 7240#L996-88 assume !main_#t~switch68#1; 7252#L996-90 main_#t~switch68#1 := main_#t~switch68#1 || 5 == main_~_hj_k~0#1; 7372#L996-91 assume !main_#t~switch68#1; 7373#L996-93 main_#t~switch68#1 := main_#t~switch68#1 || 4 == main_~_hj_k~0#1; 7473#L996-94 assume main_#t~switch68#1;call main_#t~mem76#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem76#1 % 256 % 4294967296);havoc main_#t~mem76#1; 7296#L996-96 main_#t~switch68#1 := main_#t~switch68#1 || 3 == main_~_hj_k~0#1; 7297#L996-97 assume main_#t~switch68#1;call main_#t~mem77#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem77#1 % 256 % 4294967296);havoc main_#t~mem77#1; 7485#L996-99 main_#t~switch68#1 := main_#t~switch68#1 || 2 == main_~_hj_k~0#1; 7380#L996-100 assume main_#t~switch68#1;call main_#t~mem78#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem78#1 % 256 % 4294967296);havoc main_#t~mem78#1; 7378#L996-102 main_#t~switch68#1 := main_#t~switch68#1 || 1 == main_~_hj_k~0#1; 7210#L996-103 assume main_#t~switch68#1;call main_#t~mem79#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem79#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem79#1 % 256 % 4294967296 else main_#t~mem79#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem79#1; 7211#L996-105 havoc main_#t~switch68#1; 7365#L996-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7282#L996-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet80#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 7234#L996-113 main_~_hj_i~0#1 := main_#t~nondet80#1;havoc main_#t~nondet80#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7235#L996-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 7316#L996-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 7465#L996-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet81#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 7484#L996-120 main_~_hj_j~0#1 := main_#t~nondet81#1;havoc main_#t~nondet81#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7490#L996-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet82#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 7420#L996-127 main_~_ha_hashv~0#1 := main_#t~nondet82#1;havoc main_#t~nondet82#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7459#L996-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet83#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7226#L996-134 main_~_hj_i~0#1 := main_#t~nondet83#1;havoc main_#t~nondet83#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7308#L996-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet84#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7270#L996-141 main_~_hj_j~0#1 := main_#t~nondet84#1;havoc main_#t~nondet84#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7362#L996-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet85#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7363#L996-148 main_~_ha_hashv~0#1 := main_#t~nondet85#1;havoc main_#t~nondet85#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7403#L996-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet86#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7214#L996-155 main_~_hj_i~0#1 := main_#t~nondet86#1;havoc main_#t~nondet86#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7215#L996-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet87#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7342#L996-162 main_~_hj_j~0#1 := main_#t~nondet87#1;havoc main_#t~nondet87#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7442#L996-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet88#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7154#L996-169 main_~_ha_hashv~0#1 := main_#t~nondet88#1;havoc main_#t~nondet88#1; 7274#L996-170 goto; 7275#L996-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7256#L996-173 goto; 7257#L996-175 goto; 7448#L996-260 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7449#L996-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem104#1.base, main_#t~mem104#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem104#1.base, main_#t~mem104#1.offset; 7455#L996-190 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$#3(main_#t~mem105#1.base, 16 + main_#t~mem105#1.offset, 4);call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1 := read~int#3(main_#t~mem107#1.base, 20 + main_#t~mem107#1.offset, 4);call write~$Pointer$#3(main_#t~mem106#1.base, main_#t~mem106#1.offset - main_#t~mem108#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#3(main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem110#1.base, 8 + main_#t~mem110#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;call main_#t~mem111#1.base, main_#t~mem111#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem111#1.base, 16 + main_#t~mem111#1.offset, 4);havoc main_#t~mem111#1.base, main_#t~mem111#1.offset; 7466#L996-189 goto; 7295#L996-258 havoc main_~_ha_bkt~0#1;call main_#t~mem112#1.base, main_#t~mem112#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem113#1 := read~int#3(main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);main_#t~post114#1 := main_#t~mem113#1;call write~int#3(1 + main_#t~post114#1, main_#t~mem112#1.base, 12 + main_#t~mem112#1.offset, 4);havoc main_#t~mem112#1.base, main_#t~mem112#1.offset;havoc main_#t~mem113#1;havoc main_#t~post114#1; 7397#L996-199 call main_#t~mem115#1.base, main_#t~mem115#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem116#1 := read~int#3(main_#t~mem115#1.base, 4 + main_#t~mem115#1.offset, 4); 7328#L996-193 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem116#1 - 1) % 4294967296;main_#t~nondet117#1 := 0; 7329#L996-197 main_~_ha_bkt~0#1 := main_#t~nondet117#1;havoc main_#t~mem115#1.base, main_#t~mem115#1.offset;havoc main_#t~mem116#1;havoc main_#t~nondet117#1; 7354#L996-198 goto; 7440#L996-255 call main_#t~mem118#1.base, main_#t~mem118#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem119#1.base, main_#t~mem119#1.offset := read~$Pointer$#3(main_#t~mem118#1.base, main_#t~mem118#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem119#1.base, main_#t~mem119#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem118#1.base, main_#t~mem118#1.offset;havoc main_#t~mem119#1.base, main_#t~mem119#1.offset;call main_#t~mem120#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post121#1 := main_#t~mem120#1;call write~int#3(1 + main_#t~post121#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem120#1;havoc main_#t~post121#1;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem122#1.base, main_#t~mem122#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem123#1.base, main_#t~mem123#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7241#L996-201 assume main_#t~mem123#1.base != 0 || main_#t~mem123#1.offset != 0;havoc main_#t~mem123#1.base, main_#t~mem123#1.offset;call main_#t~mem124#1.base, main_#t~mem124#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem124#1.base, 12 + main_#t~mem124#1.offset, 4);havoc main_#t~mem124#1.base, main_#t~mem124#1.offset; 7242#L996-203 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem126#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem125#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short129#1 := main_#t~mem126#1 % 4294967296 >= 10 * (1 + main_#t~mem125#1) % 4294967296; 7208#L996-204 assume main_#t~short129#1;call main_#t~mem127#1.base, main_#t~mem127#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem128#1 := read~int#3(main_#t~mem127#1.base, 36 + main_#t~mem127#1.offset, 4);main_#t~short129#1 := 0 == main_#t~mem128#1 % 4294967296; 7209#L996-206 assume !main_#t~short129#1;havoc main_#t~mem126#1;havoc main_#t~mem125#1;havoc main_#t~mem127#1.base, main_#t~mem127#1.offset;havoc main_#t~mem128#1;havoc main_#t~short129#1; 7423#L996-253 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7458#L996-254 goto; 7488#L996-256 havoc main_~_ha_bkt~0#1; 7489#L996-257 goto; 7480#L996-259 goto; 7183#L996-261 havoc main_~_ha_hashv~0#1; 7184#L996-262 goto; 7285#L989-3 call main_#t~mem40#1 := read~int#4(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int#4(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 7169#L989-4 [2023-11-26 11:44:53,427 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:53,428 INFO L85 PathProgramCache]: Analyzing trace with hash 2403, now seen corresponding path program 8 times [2023-11-26 11:44:53,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:53,428 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1075586702] [2023-11-26 11:44:53,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:53,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:53,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:53,441 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:44:53,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:44:53,456 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:44:53,457 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:44:53,457 INFO L85 PathProgramCache]: Analyzing trace with hash -461098509, now seen corresponding path program 1 times [2023-11-26 11:44:53,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:44:53,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [440791896] [2023-11-26 11:44:53,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:53,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:44:53,502 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 11:44:53,503 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1616380813] [2023-11-26 11:44:53,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:44:53,503 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 11:44:53,503 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:44:53,511 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 11:44:53,524 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5491c172-3099-4575-be6a-5a8aafd3ff77/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-26 11:44:59,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:44:59,978 INFO L262 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 27 conjunts are in the unsatisfiable core [2023-11-26 11:44:59,982 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 11:45:24,945 WARN L293 SmtUtils]: Spent 24.03s on a formula simplification that was a NOOP. DAG size: 3 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)