./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test8-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test8-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ca0a592612bf67ed64c0cb4dbe07151d7191a8039e0f3c4eacc12cd10ecaa237 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 12:00:02,242 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 12:00:02,359 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 12:00:02,365 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 12:00:02,366 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 12:00:02,397 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 12:00:02,398 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 12:00:02,399 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 12:00:02,400 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 12:00:02,401 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 12:00:02,402 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 12:00:02,403 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 12:00:02,403 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 12:00:02,404 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 12:00:02,405 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 12:00:02,405 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 12:00:02,406 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 12:00:02,407 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 12:00:02,407 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 12:00:02,408 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 12:00:02,408 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 12:00:02,409 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 12:00:02,410 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 12:00:02,410 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 12:00:02,411 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 12:00:02,411 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 12:00:02,412 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 12:00:02,413 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 12:00:02,413 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 12:00:02,414 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 12:00:02,414 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 12:00:02,415 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 12:00:02,415 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 12:00:02,416 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 12:00:02,417 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 12:00:02,417 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 12:00:02,418 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 12:00:02,419 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 12:00:02,419 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ca0a592612bf67ed64c0cb4dbe07151d7191a8039e0f3c4eacc12cd10ecaa237 [2023-11-26 12:00:02,773 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 12:00:02,815 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 12:00:02,822 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 12:00:02,825 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 12:00:02,827 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 12:00:02,829 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test8-1.i [2023-11-26 12:00:05,967 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 12:00:06,483 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 12:00:06,486 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test8-1.i [2023-11-26 12:00:06,521 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/data/28ee3d6a7/bb221a10676b4de889adb7dc5322ec36/FLAGc9732efc3 [2023-11-26 12:00:06,545 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/data/28ee3d6a7/bb221a10676b4de889adb7dc5322ec36 [2023-11-26 12:00:06,548 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 12:00:06,550 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 12:00:06,551 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 12:00:06,552 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 12:00:06,561 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 12:00:06,564 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:00:06" (1/1) ... [2023-11-26 12:00:06,567 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@72f73694 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:06, skipping insertion in model container [2023-11-26 12:00:06,567 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 12:00:06" (1/1) ... [2023-11-26 12:00:06,668 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 12:00:07,533 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:00:07,562 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 12:00:07,661 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 12:00:07,710 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-26 12:00:07,720 INFO L206 MainTranslator]: Completed translation [2023-11-26 12:00:07,721 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07 WrapperNode [2023-11-26 12:00:07,721 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 12:00:07,723 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 12:00:07,723 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 12:00:07,723 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 12:00:07,733 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:07,796 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:07,938 INFO L138 Inliner]: procedures = 177, calls = 299, calls flagged for inlining = 21, calls inlined = 65, statements flattened = 1644 [2023-11-26 12:00:07,939 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 12:00:07,940 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 12:00:07,940 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 12:00:07,941 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 12:00:07,954 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:07,955 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:07,970 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:08,112 INFO L175 MemorySlicer]: Split 261 memory accesses to 4 slices as follows [220, 2, 34, 5]. 84 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [0, 2, 0, 0]. The 55 writes are split as follows [50, 0, 4, 1]. [2023-11-26 12:00:08,113 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:08,113 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:08,166 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:08,183 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:08,191 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:08,200 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:08,216 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 12:00:08,218 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 12:00:08,218 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 12:00:08,218 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 12:00:08,219 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (1/1) ... [2023-11-26 12:00:08,226 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 12:00:08,242 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:00:08,269 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 12:00:08,291 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 12:00:08,325 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 12:00:08,325 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 12:00:08,326 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 12:00:08,326 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-26 12:00:08,326 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 12:00:08,326 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 12:00:08,327 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 12:00:08,327 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-26 12:00:08,327 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 12:00:08,327 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 12:00:08,328 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 12:00:08,328 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-26 12:00:08,328 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 12:00:08,328 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 12:00:08,330 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 12:00:08,331 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-26 12:00:08,331 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 12:00:08,331 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 12:00:08,332 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 12:00:08,332 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 12:00:08,332 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 12:00:08,332 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-26 12:00:08,332 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 12:00:08,333 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-26 12:00:08,334 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 12:00:08,335 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 12:00:08,335 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 12:00:08,335 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-26 12:00:08,335 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 12:00:08,335 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 12:00:08,337 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 12:00:08,337 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 12:00:08,337 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-26 12:00:08,338 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 12:00:08,339 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 12:00:08,695 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 12:00:08,698 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 12:00:08,703 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:00:08,785 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:00:08,820 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:00:08,843 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 12:00:10,859 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 12:00:10,896 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 12:00:10,896 INFO L309 CfgBuilder]: Removed 62 assume(true) statements. [2023-11-26 12:00:10,898 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:00:10 BoogieIcfgContainer [2023-11-26 12:00:10,899 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 12:00:10,900 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 12:00:10,900 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 12:00:10,905 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 12:00:10,906 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:00:10,906 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 12:00:06" (1/3) ... [2023-11-26 12:00:10,908 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@77f796ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:00:10, skipping insertion in model container [2023-11-26 12:00:10,908 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:00:10,908 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 12:00:07" (2/3) ... [2023-11-26 12:00:10,909 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@77f796ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 12:00:10, skipping insertion in model container [2023-11-26 12:00:10,909 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 12:00:10,909 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 12:00:10" (3/3) ... [2023-11-26 12:00:10,912 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_SAX_test8-1.i [2023-11-26 12:00:11,050 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 12:00:11,050 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 12:00:11,050 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 12:00:11,051 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 12:00:11,051 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 12:00:11,051 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 12:00:11,052 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 12:00:11,052 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 12:00:11,064 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 505 states, 500 states have (on average 1.66) internal successors, (830), 500 states have internal predecessors, (830), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:00:11,164 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 494 [2023-11-26 12:00:11,164 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:00:11,164 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:00:11,174 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:00:11,174 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:00:11,174 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 12:00:11,176 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 505 states, 500 states have (on average 1.66) internal successors, (830), 500 states have internal predecessors, (830), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:00:11,193 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 494 [2023-11-26 12:00:11,194 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:00:11,194 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:00:11,198 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:00:11,198 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:00:11,208 INFO L748 eck$LassoCheckResult]: Stem: 161#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 412#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 301#L765-4true [2023-11-26 12:00:11,209 INFO L750 eck$LassoCheckResult]: Loop: 301#L765-4true call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 443#L765-1true assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 477#L767true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 399#L767-2true call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 207#L772-269true assume !true; 36#L772-270true call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#0(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 104#L709true assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 154#L702true assume !(0 == __VERIFIER_assert_~cond#1); 498#L701true havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 5#L708true havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 441#L707true havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 180#L765-3true call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 301#L765-4true [2023-11-26 12:00:11,216 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:11,216 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 1 times [2023-11-26 12:00:11,228 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:11,229 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191823636] [2023-11-26 12:00:11,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:11,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:11,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:11,361 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:00:11,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:11,418 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:00:11,421 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:11,422 INFO L85 PathProgramCache]: Analyzing trace with hash -325592504, now seen corresponding path program 1 times [2023-11-26 12:00:11,422 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:11,422 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164505691] [2023-11-26 12:00:11,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:11,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:11,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:00:11,470 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:00:11,471 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164505691] [2023-11-26 12:00:11,472 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-26 12:00:11,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1865986101] [2023-11-26 12:00:11,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:11,472 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:00:11,473 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:00:11,477 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:00:11,515 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-26 12:00:11,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:00:11,688 INFO L262 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-26 12:00:11,690 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:00:11,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:00:11,727 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:00:11,728 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1865986101] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:00:11,728 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:00:11,729 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 12:00:11,730 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1311979262] [2023-11-26 12:00:11,731 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:00:11,736 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:00:11,737 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:00:11,791 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 12:00:11,792 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 12:00:11,796 INFO L87 Difference]: Start difference. First operand has 505 states, 500 states have (on average 1.66) internal successors, (830), 500 states have internal predecessors, (830), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:00:11,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:00:11,865 INFO L93 Difference]: Finished difference Result 474 states and 677 transitions. [2023-11-26 12:00:11,867 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 474 states and 677 transitions. [2023-11-26 12:00:11,876 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 432 [2023-11-26 12:00:11,893 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 474 states to 439 states and 642 transitions. [2023-11-26 12:00:11,894 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 439 [2023-11-26 12:00:11,896 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 439 [2023-11-26 12:00:11,897 INFO L73 IsDeterministic]: Start isDeterministic. Operand 439 states and 642 transitions. [2023-11-26 12:00:11,902 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:00:11,903 INFO L218 hiAutomatonCegarLoop]: Abstraction has 439 states and 642 transitions. [2023-11-26 12:00:11,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states and 642 transitions. [2023-11-26 12:00:11,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 439. [2023-11-26 12:00:11,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 439 states, 435 states have (on average 1.4620689655172414) internal successors, (636), 434 states have internal predecessors, (636), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:00:11,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 439 states to 439 states and 642 transitions. [2023-11-26 12:00:11,971 INFO L240 hiAutomatonCegarLoop]: Abstraction has 439 states and 642 transitions. [2023-11-26 12:00:11,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 12:00:11,981 INFO L428 stractBuchiCegarLoop]: Abstraction has 439 states and 642 transitions. [2023-11-26 12:00:11,982 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 12:00:11,982 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 439 states and 642 transitions. [2023-11-26 12:00:11,986 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 432 [2023-11-26 12:00:11,987 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:00:11,987 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:00:11,992 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:00:11,993 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:00:11,993 INFO L748 eck$LassoCheckResult]: Stem: 1258#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 1259#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1280#L765-4 [2023-11-26 12:00:12,004 INFO L750 eck$LassoCheckResult]: Loop: 1280#L765-4 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1389#L765-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 1450#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1440#L767-2 call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 1309#L772-269 havoc main_~_ha_hashv~0#1; 1310#L772-176 goto; 1326#L772-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1327#L772-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1387#L772-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 1227#L772-73 assume main_#t~switch33#1;call main_#t~mem34#1 := read~int#0(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 1089#L772-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 1090#L772-76 assume !main_#t~switch33#1; 1114#L772-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 1358#L772-79 assume main_#t~switch33#1;call main_#t~mem36#1 := read~int#0(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 1273#L772-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 1274#L772-82 assume main_#t~switch33#1;call main_#t~mem37#1 := read~int#0(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1374#L772-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 1375#L772-85 assume main_#t~switch33#1;call main_#t~mem38#1 := read~int#0(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1415#L772-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 1405#L772-88 assume main_#t~switch33#1;call main_#t~mem39#1 := read~int#0(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1380#L772-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 1211#L772-91 assume main_#t~switch33#1;call main_#t~mem40#1 := read~int#0(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1212#L772-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 1275#L772-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 1276#L772-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 1302#L772-97 assume !main_#t~switch33#1; 1319#L772-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 1246#L772-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 1247#L772-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 1406#L772-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 1344#L772-105 havoc main_#t~switch33#1; 1345#L772-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1437#L772-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1354#L772-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1404#L772-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1031#L772-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1311#L772-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1041#L772-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1235#L772-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1068#L772-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1069#L772-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1021#L772-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1430#L772-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1446#L772-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1423#L772-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1062#L772-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1063#L772-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1140#L772-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1141#L772-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1116#L772-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 1175#L772-170 goto; 1268#L772-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1248#L772-173 goto; 1249#L772-175 goto; 1421#L772-266 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1422#L772-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 1094#L772-194 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#0(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#0(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#0(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#0(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 1095#L772-193 goto; 1101#L772-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#0(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#0(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 1305#L772-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#0(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 1298#L772-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 1215#L772-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 1216#L772-202 goto; 1290#L772-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#0(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#0(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1291#L772-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 1176#L772-207 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 1177#L772-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#0(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 1360#L772-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 1376#L772-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1377#L772-260 goto; 1328#L772-262 havoc main_~_ha_bkt~0#1; 1329#L772-263 goto; 1435#L772-265 goto; 1388#L772-267 havoc main_~_ha_hashv~0#1; 1363#L772-268 goto; 1087#L772-270 call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#0(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 1088#L709 assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 1185#L702 assume !(0 == __VERIFIER_assert_~cond#1); 1253#L701 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 1027#L708 havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 1028#L707 havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 1279#L765-3 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1280#L765-4 [2023-11-26 12:00:12,006 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:12,011 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 2 times [2023-11-26 12:00:12,012 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:12,012 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139270296] [2023-11-26 12:00:12,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:12,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:12,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:12,052 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:00:12,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:12,100 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:00:12,109 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:12,110 INFO L85 PathProgramCache]: Analyzing trace with hash -240786733, now seen corresponding path program 1 times [2023-11-26 12:00:12,111 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:12,111 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [249851336] [2023-11-26 12:00:12,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:12,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:12,261 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:00:12,262 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [296559860] [2023-11-26 12:00:12,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:12,262 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:00:12,262 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:00:12,304 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:00:12,309 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-26 12:00:12,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:00:12,695 INFO L262 TraceCheckSpWp]: Trace formula consists of 571 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-26 12:00:12,702 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:00:12,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:00:12,768 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:00:12,768 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:00:12,769 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [249851336] [2023-11-26 12:00:12,770 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:00:12,770 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [296559860] [2023-11-26 12:00:12,770 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [296559860] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:00:12,770 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:00:12,771 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-26 12:00:12,771 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1145931097] [2023-11-26 12:00:12,771 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:00:12,772 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:00:12,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:00:12,773 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-26 12:00:12,773 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-26 12:00:12,774 INFO L87 Difference]: Start difference. First operand 439 states and 642 transitions. cyclomatic complexity: 206 Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:00:12,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:00:12,929 INFO L93 Difference]: Finished difference Result 460 states and 663 transitions. [2023-11-26 12:00:12,929 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 460 states and 663 transitions. [2023-11-26 12:00:12,934 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 453 [2023-11-26 12:00:12,942 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 460 states to 460 states and 663 transitions. [2023-11-26 12:00:12,942 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 460 [2023-11-26 12:00:12,944 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 460 [2023-11-26 12:00:12,944 INFO L73 IsDeterministic]: Start isDeterministic. Operand 460 states and 663 transitions. [2023-11-26 12:00:12,951 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:00:12,951 INFO L218 hiAutomatonCegarLoop]: Abstraction has 460 states and 663 transitions. [2023-11-26 12:00:12,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 460 states and 663 transitions. [2023-11-26 12:00:12,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 460 to 459. [2023-11-26 12:00:12,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 459 states, 455 states have (on average 1.4417582417582417) internal successors, (656), 454 states have internal predecessors, (656), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:00:12,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 459 states to 459 states and 662 transitions. [2023-11-26 12:00:12,986 INFO L240 hiAutomatonCegarLoop]: Abstraction has 459 states and 662 transitions. [2023-11-26 12:00:12,987 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-26 12:00:12,988 INFO L428 stractBuchiCegarLoop]: Abstraction has 459 states and 662 transitions. [2023-11-26 12:00:12,988 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 12:00:12,988 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 459 states and 662 transitions. [2023-11-26 12:00:12,991 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 452 [2023-11-26 12:00:12,991 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:00:12,991 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:00:12,993 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:00:12,993 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:00:12,994 INFO L748 eck$LassoCheckResult]: Stem: 2407#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 2408#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2429#L765-4 [2023-11-26 12:00:12,994 INFO L750 eck$LassoCheckResult]: Loop: 2429#L765-4 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2539#L765-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 2601#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2591#L767-2 call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 2458#L772-269 havoc main_~_ha_hashv~0#1; 2459#L772-176 goto; 2475#L772-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2476#L772-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2536#L772-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 2375#L772-73 assume !main_#t~switch33#1; 2376#L772-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 2618#L772-76 assume main_#t~switch33#1;call main_#t~mem35#1 := read~int#0(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 2262#L772-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 2507#L772-79 assume main_#t~switch33#1;call main_#t~mem36#1 := read~int#0(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 2422#L772-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 2423#L772-82 assume main_#t~switch33#1;call main_#t~mem37#1 := read~int#0(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 2523#L772-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 2524#L772-85 assume main_#t~switch33#1;call main_#t~mem38#1 := read~int#0(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 2564#L772-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 2554#L772-88 assume main_#t~switch33#1;call main_#t~mem39#1 := read~int#0(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2529#L772-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 2359#L772-91 assume main_#t~switch33#1;call main_#t~mem40#1 := read~int#0(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 2360#L772-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 2424#L772-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 2425#L772-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 2451#L772-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 2468#L772-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 2395#L772-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 2396#L772-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 2555#L772-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 2493#L772-105 havoc main_#t~switch33#1; 2494#L772-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2586#L772-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2503#L772-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2553#L772-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2179#L772-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2460#L772-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2189#L772-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2384#L772-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2216#L772-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2217#L772-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2169#L772-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2579#L772-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2597#L772-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2572#L772-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2210#L772-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2211#L772-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2288#L772-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2289#L772-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2264#L772-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 2323#L772-170 goto; 2417#L772-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2397#L772-173 goto; 2398#L772-175 goto; 2570#L772-266 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2571#L772-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 2242#L772-194 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#0(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#0(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#0(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#0(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 2243#L772-193 goto; 2249#L772-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#0(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#0(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 2454#L772-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#0(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 2447#L772-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 2363#L772-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 2364#L772-202 goto; 2439#L772-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#0(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#0(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2440#L772-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 2326#L772-207 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 2327#L772-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#0(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 2509#L772-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 2525#L772-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2526#L772-260 goto; 2477#L772-262 havoc main_~_ha_bkt~0#1; 2478#L772-263 goto; 2584#L772-265 goto; 2537#L772-267 havoc main_~_ha_hashv~0#1; 2511#L772-268 goto; 2233#L772-270 call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#0(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 2234#L709 assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 2333#L702 assume !(0 == __VERIFIER_assert_~cond#1); 2400#L701 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 2175#L708 havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 2176#L707 havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 2428#L765-3 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 2429#L765-4 [2023-11-26 12:00:12,995 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:12,995 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 3 times [2023-11-26 12:00:12,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:12,996 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969673558] [2023-11-26 12:00:12,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:12,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:13,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:13,019 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:00:13,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:13,040 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:00:13,041 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:13,041 INFO L85 PathProgramCache]: Analyzing trace with hash 1849571409, now seen corresponding path program 1 times [2023-11-26 12:00:13,041 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:13,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912820041] [2023-11-26 12:00:13,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:13,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:13,131 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:00:13,131 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [409677595] [2023-11-26 12:00:13,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:13,132 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:00:13,132 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:00:13,136 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:00:13,145 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-26 12:00:13,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:00:13,488 INFO L262 TraceCheckSpWp]: Trace formula consists of 577 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-26 12:00:13,492 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:00:13,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:00:13,548 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:00:13,549 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:00:13,549 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912820041] [2023-11-26 12:00:13,549 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:00:13,549 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [409677595] [2023-11-26 12:00:13,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [409677595] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:00:13,550 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:00:13,550 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-26 12:00:13,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [266559887] [2023-11-26 12:00:13,551 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:00:13,551 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:00:13,551 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:00:13,552 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-26 12:00:13,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-26 12:00:13,552 INFO L87 Difference]: Start difference. First operand 459 states and 662 transitions. cyclomatic complexity: 206 Second operand has 5 states, 5 states have (on average 16.4) internal successors, (82), 5 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:00:13,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:00:13,673 INFO L93 Difference]: Finished difference Result 446 states and 642 transitions. [2023-11-26 12:00:13,673 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 446 states and 642 transitions. [2023-11-26 12:00:13,677 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 439 [2023-11-26 12:00:13,682 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 446 states to 446 states and 642 transitions. [2023-11-26 12:00:13,683 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 446 [2023-11-26 12:00:13,685 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 446 [2023-11-26 12:00:13,685 INFO L73 IsDeterministic]: Start isDeterministic. Operand 446 states and 642 transitions. [2023-11-26 12:00:13,686 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:00:13,686 INFO L218 hiAutomatonCegarLoop]: Abstraction has 446 states and 642 transitions. [2023-11-26 12:00:13,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 446 states and 642 transitions. [2023-11-26 12:00:13,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 446 to 445. [2023-11-26 12:00:13,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 441 states have (on average 1.439909297052154) internal successors, (635), 440 states have internal predecessors, (635), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:00:13,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 641 transitions. [2023-11-26 12:00:13,711 INFO L240 hiAutomatonCegarLoop]: Abstraction has 445 states and 641 transitions. [2023-11-26 12:00:13,711 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 12:00:13,712 INFO L428 stractBuchiCegarLoop]: Abstraction has 445 states and 641 transitions. [2023-11-26 12:00:13,712 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 12:00:13,712 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 641 transitions. [2023-11-26 12:00:13,714 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 438 [2023-11-26 12:00:13,715 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:00:13,715 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:00:13,716 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:00:13,716 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:00:13,716 INFO L748 eck$LassoCheckResult]: Stem: 3562#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 3563#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3585#L765-4 [2023-11-26 12:00:13,717 INFO L750 eck$LassoCheckResult]: Loop: 3585#L765-4 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3695#L765-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 3755#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3745#L767-2 call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 3614#L772-269 havoc main_~_ha_hashv~0#1; 3615#L772-176 goto; 3631#L772-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3632#L772-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3692#L772-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 3531#L772-73 assume !main_#t~switch33#1; 3393#L772-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 3394#L772-76 assume !main_#t~switch33#1; 3418#L772-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 3663#L772-79 assume !main_#t~switch33#1; 3577#L772-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 3578#L772-82 assume !main_#t~switch33#1; 3679#L772-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 3680#L772-85 assume !main_#t~switch33#1; 3720#L772-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 3710#L772-88 assume !main_#t~switch33#1; 3686#L772-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 3515#L772-91 assume !main_#t~switch33#1; 3516#L772-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 3579#L772-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 3580#L772-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 3609#L772-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 3624#L772-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 3552#L772-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 3553#L772-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 3711#L772-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 3649#L772-105 havoc main_#t~switch33#1; 3650#L772-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3742#L772-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3659#L772-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3709#L772-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3335#L772-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3616#L772-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3345#L772-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3539#L772-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3372#L772-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3373#L772-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3325#L772-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3735#L772-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3751#L772-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3728#L772-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3366#L772-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3367#L772-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3444#L772-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3445#L772-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3420#L772-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 3478#L772-170 goto; 3571#L772-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3547#L772-173 goto; 3548#L772-175 goto; 3725#L772-266 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3726#L772-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 3396#L772-194 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#0(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#0(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#0(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#0(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 3397#L772-193 goto; 3403#L772-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#0(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#0(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 3610#L772-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#0(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 3601#L772-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 3519#L772-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 3520#L772-202 goto; 3592#L772-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#0(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#0(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3593#L772-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 3480#L772-207 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 3481#L772-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#0(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 3664#L772-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 3681#L772-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3682#L772-260 goto; 3633#L772-262 havoc main_~_ha_bkt~0#1; 3634#L772-263 goto; 3740#L772-265 goto; 3693#L772-267 havoc main_~_ha_hashv~0#1; 3668#L772-268 goto; 3391#L772-270 call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#0(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 3392#L709 assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 3489#L702 assume !(0 == __VERIFIER_assert_~cond#1); 3556#L701 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 3331#L708 havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 3332#L707 havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 3584#L765-3 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3585#L765-4 [2023-11-26 12:00:13,717 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:13,717 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 4 times [2023-11-26 12:00:13,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:13,717 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1741270377] [2023-11-26 12:00:13,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:13,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:13,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:13,734 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:00:13,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:13,752 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:00:13,752 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:13,752 INFO L85 PathProgramCache]: Analyzing trace with hash -968560931, now seen corresponding path program 1 times [2023-11-26 12:00:13,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:13,753 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870914256] [2023-11-26 12:00:13,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:13,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:13,836 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:00:13,837 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [771952876] [2023-11-26 12:00:13,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:13,838 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:00:13,838 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:00:13,843 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:00:13,859 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-26 12:00:14,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:00:14,333 INFO L262 TraceCheckSpWp]: Trace formula consists of 541 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-26 12:00:14,338 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:00:14,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:00:14,472 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:00:14,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:00:14,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [870914256] [2023-11-26 12:00:14,473 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:00:14,473 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [771952876] [2023-11-26 12:00:14,473 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [771952876] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:00:14,473 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:00:14,473 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-26 12:00:14,474 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [188072927] [2023-11-26 12:00:14,474 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:00:14,474 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:00:14,475 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:00:14,475 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2023-11-26 12:00:14,475 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2023-11-26 12:00:14,476 INFO L87 Difference]: Start difference. First operand 445 states and 641 transitions. cyclomatic complexity: 199 Second operand has 8 states, 8 states have (on average 10.25) internal successors, (82), 8 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:00:15,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 12:00:15,247 INFO L93 Difference]: Finished difference Result 494 states and 703 transitions. [2023-11-26 12:00:15,247 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 494 states and 703 transitions. [2023-11-26 12:00:15,252 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 487 [2023-11-26 12:00:15,257 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 494 states to 494 states and 703 transitions. [2023-11-26 12:00:15,257 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 494 [2023-11-26 12:00:15,258 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 494 [2023-11-26 12:00:15,258 INFO L73 IsDeterministic]: Start isDeterministic. Operand 494 states and 703 transitions. [2023-11-26 12:00:15,260 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 12:00:15,260 INFO L218 hiAutomatonCegarLoop]: Abstraction has 494 states and 703 transitions. [2023-11-26 12:00:15,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states and 703 transitions. [2023-11-26 12:00:15,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 485. [2023-11-26 12:00:15,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 485 states, 481 states have (on average 1.4199584199584199) internal successors, (683), 480 states have internal predecessors, (683), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 12:00:15,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 485 states to 485 states and 689 transitions. [2023-11-26 12:00:15,274 INFO L240 hiAutomatonCegarLoop]: Abstraction has 485 states and 689 transitions. [2023-11-26 12:00:15,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-26 12:00:15,276 INFO L428 stractBuchiCegarLoop]: Abstraction has 485 states and 689 transitions. [2023-11-26 12:00:15,276 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 12:00:15,276 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 485 states and 689 transitions. [2023-11-26 12:00:15,279 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 478 [2023-11-26 12:00:15,279 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 12:00:15,279 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 12:00:15,280 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 12:00:15,280 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 12:00:15,281 INFO L748 eck$LassoCheckResult]: Stem: 4755#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int~0 := 0; 4756#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~switch33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc54#1.base, main_#t~malloc54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~memset~res57#1.base, main_#t~memset~res57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~malloc63#1.base, main_#t~malloc63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~memset~res70#1.base, main_#t~memset~res70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~post81#1, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~nondet84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~post88#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem93#1, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~short96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~malloc99#1.base, main_#t~malloc99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~memset~res104#1.base, main_#t~memset~res104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~nondet110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem114#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~nondet115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~nondet127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~pre130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~post135#1, main_#t~mem139#1, main_#t~mem137#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem138#1, main_#t~mem140#1, main_#t~post141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~post117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~post151#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem158#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~ite161#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem170#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem174#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem176#1, main_#t~mem178#1, main_#t~mem177#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~nondet187#1, main_#t~nondet188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_#t~nondet208#1, main_#t~nondet209#1, main_#t~nondet210#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~nondet213#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~ret226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~short233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem256#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~nondet257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~post261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~post272#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem167#1, main_#t~mem168#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4778#L765-4 [2023-11-26 12:00:15,281 INFO L750 eck$LassoCheckResult]: Loop: 4778#L765-4 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4891#L765-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 4961#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4949#L767-2 call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#0(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 4808#L772-269 havoc main_~_ha_hashv~0#1; 4809#L772-176 goto; 4827#L772-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4828#L772-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4888#L772-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch33#1 := 11 == main_~_hj_k~0#1; 4723#L772-73 assume !main_#t~switch33#1; 4585#L772-75 main_#t~switch33#1 := main_#t~switch33#1 || 10 == main_~_hj_k~0#1; 4586#L772-76 assume !main_#t~switch33#1; 4610#L772-78 main_#t~switch33#1 := main_#t~switch33#1 || 9 == main_~_hj_k~0#1; 4859#L772-79 assume !main_#t~switch33#1; 4772#L772-81 main_#t~switch33#1 := main_#t~switch33#1 || 8 == main_~_hj_k~0#1; 4773#L772-82 assume !main_#t~switch33#1; 4875#L772-84 main_#t~switch33#1 := main_#t~switch33#1 || 7 == main_~_hj_k~0#1; 4876#L772-85 assume !main_#t~switch33#1; 4918#L772-87 main_#t~switch33#1 := main_#t~switch33#1 || 6 == main_~_hj_k~0#1; 4907#L772-88 assume !main_#t~switch33#1; 4881#L772-90 main_#t~switch33#1 := main_#t~switch33#1 || 5 == main_~_hj_k~0#1; 4707#L772-91 assume !main_#t~switch33#1; 4708#L772-93 main_#t~switch33#1 := main_#t~switch33#1 || 4 == main_~_hj_k~0#1; 4769#L772-94 assume main_#t~switch33#1;call main_#t~mem41#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 4770#L772-96 main_#t~switch33#1 := main_#t~switch33#1 || 3 == main_~_hj_k~0#1; 4819#L772-97 assume main_#t~switch33#1;call main_#t~mem42#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem42#1 % 256 % 4294967296);havoc main_#t~mem42#1; 4820#L772-99 main_#t~switch33#1 := main_#t~switch33#1 || 2 == main_~_hj_k~0#1; 4743#L772-100 assume main_#t~switch33#1;call main_#t~mem43#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem43#1 % 256 % 4294967296);havoc main_#t~mem43#1; 4744#L772-102 main_#t~switch33#1 := main_#t~switch33#1 || 1 == main_~_hj_k~0#1; 4908#L772-103 assume main_#t~switch33#1;call main_#t~mem44#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem44#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem44#1 % 256 % 4294967296 else main_#t~mem44#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem44#1; 4909#L772-105 havoc main_#t~switch33#1; 4947#L772-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4948#L772-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4979#L772-113 main_~_hj_i~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4978#L772-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet46#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 4977#L772-120 main_~_hj_j~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4954#L772-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 4955#L772-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1; 4537#L772-127 main_~_ha_hashv~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4732#L772-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4564#L772-134 main_~_hj_i~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4565#L772-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet49#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4518#L772-141 main_~_hj_j~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4936#L772-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet50#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4957#L772-148 main_~_ha_hashv~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4928#L772-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet51#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4558#L772-155 main_~_hj_i~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4559#L772-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet52#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4636#L772-162 main_~_hj_j~0#1 := main_#t~nondet52#1;havoc main_#t~nondet52#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4637#L772-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet53#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4612#L772-169 main_~_ha_hashv~0#1 := main_#t~nondet53#1;havoc main_#t~nondet53#1; 4670#L772-170 goto; 4765#L772-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4745#L772-173 goto; 4746#L772-175 goto; 4926#L772-266 call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4927#L772-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem71#1.base, main_#t~mem71#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset; 4590#L772-194 call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#0(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#0(main_#t~mem74#1.base, 20 + main_#t~mem74#1.offset, 4);call write~$Pointer$#0(main_#t~mem73#1.base, main_#t~mem73#1.offset - main_#t~mem75#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#0(main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem77#1.base, 8 + main_#t~mem77#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem78#1.base, 16 + main_#t~mem78#1.offset, 4);havoc main_#t~mem78#1.base, main_#t~mem78#1.offset; 4591#L772-193 goto; 4595#L772-264 havoc main_~_ha_bkt~0#1;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1 := read~int#0(main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);main_#t~post81#1 := main_#t~mem80#1;call write~int#0(1 + main_#t~post81#1, main_#t~mem79#1.base, 12 + main_#t~mem79#1.offset, 4);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1;havoc main_#t~post81#1; 4804#L772-203 call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem83#1 := read~int#0(main_#t~mem82#1.base, 4 + main_#t~mem82#1.offset, 4); 4794#L772-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem83#1 - 1) % 4294967296;main_#t~nondet84#1 := 0; 4711#L772-201 main_~_ha_bkt~0#1 := main_#t~nondet84#1;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;havoc main_#t~mem83#1;havoc main_#t~nondet84#1; 4712#L772-202 goto; 4788#L772-261 call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#0(main_#t~mem85#1.base, main_#t~mem85#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem86#1.base, main_#t~mem86#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post88#1 := main_#t~mem87#1;call write~int#0(1 + main_#t~post88#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem87#1;havoc main_#t~post88#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem89#1.base, main_#t~mem89#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4789#L772-205 assume main_#t~mem90#1.base != 0 || main_#t~mem90#1.offset != 0;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem91#1.base, 12 + main_#t~mem91#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset; 4672#L772-207 call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem93#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem92#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short96#1 := main_#t~mem93#1 % 4294967296 >= 10 * (1 + main_#t~mem92#1) % 4294967296; 4673#L772-208 assume main_#t~short96#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem95#1 := read~int#0(main_#t~mem94#1.base, 36 + main_#t~mem94#1.offset, 4);main_#t~short96#1 := 0 == main_#t~mem95#1 % 4294967296; 4860#L772-210 assume !main_#t~short96#1;havoc main_#t~mem93#1;havoc main_#t~mem92#1;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~short96#1; 4877#L772-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4878#L772-260 goto; 4829#L772-262 havoc main_~_ha_bkt~0#1; 4830#L772-263 goto; 4941#L772-265 goto; 4889#L772-267 havoc main_~_ha_hashv~0#1; 4864#L772-268 goto; 4583#L772-270 call main_#t~mem165#1.base, main_#t~mem165#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem166#1 := read~int#0(main_#t~mem165#1.base, 12 + main_#t~mem165#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem166#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem166#1 % 4294967296 % 4294967296 else main_#t~mem166#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post3#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post3#1;test_int_#t~switch4#1 := 0 == test_int_#t~post3#1; 4584#L709 assume test_int_#t~switch4#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 4681#L702 assume !(0 == __VERIFIER_assert_~cond#1); 4750#L701 havoc __VERIFIER_assert_~cond#1;havoc __VERIFIER_assert_#in~cond#1;assume { :end_inline___VERIFIER_assert } true; 4524#L708 havoc test_int_#t~post3#1;havoc test_int_#t~switch4#1; 4525#L707 havoc test_int_#t~post3#1, test_int_#t~switch4#1, test_int_~a#1;havoc test_int_#in~a#1;assume { :end_inline_test_int } true;havoc main_#t~mem165#1.base, main_#t~mem165#1.offset;havoc main_#t~mem166#1; 4777#L765-3 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 4778#L765-4 [2023-11-26 12:00:15,282 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:15,282 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 5 times [2023-11-26 12:00:15,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:15,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378027455] [2023-11-26 12:00:15,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:15,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:15,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:15,300 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 12:00:15,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 12:00:15,318 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 12:00:15,318 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 12:00:15,319 INFO L85 PathProgramCache]: Analyzing trace with hash 231617376, now seen corresponding path program 1 times [2023-11-26 12:00:15,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 12:00:15,319 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1542366648] [2023-11-26 12:00:15,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:15,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 12:00:15,393 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-26 12:00:15,393 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [539187433] [2023-11-26 12:00:15,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 12:00:15,394 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-26 12:00:15,394 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 12:00:15,397 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-26 12:00:15,412 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_045933b3-e925-4575-99ed-67e7911f385b/bin/uautomizer-verify-VRDe98Ueme/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-26 12:00:15,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 12:00:15,820 INFO L262 TraceCheckSpWp]: Trace formula consists of 542 conjuncts, 17 conjunts are in the unsatisfiable core [2023-11-26 12:00:15,825 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-26 12:00:16,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 12:00:16,023 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-26 12:00:16,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 12:00:16,024 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1542366648] [2023-11-26 12:00:16,024 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-26 12:00:16,024 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [539187433] [2023-11-26 12:00:16,024 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [539187433] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 12:00:16,024 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 12:00:16,025 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2023-11-26 12:00:16,025 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [569159504] [2023-11-26 12:00:16,025 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 12:00:16,026 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 12:00:16,026 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 12:00:16,026 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2023-11-26 12:00:16,027 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2023-11-26 12:00:16,027 INFO L87 Difference]: Start difference. First operand 485 states and 689 transitions. cyclomatic complexity: 207 Second operand has 8 states, 8 states have (on average 10.375) internal successors, (83), 8 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 12:00:29,217 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 12:00:41,240 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.02s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 12:00:53,259 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.02s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-26 12:01:05,263 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []