./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_nondet_test1-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_nondet_test1-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash fdc85b042221b41aa26e62667e19ce1f6c246be9a2cb4f81fe8b15c8429db160 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-26 11:55:48,062 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-26 11:55:48,169 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-26 11:55:48,175 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-26 11:55:48,175 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-26 11:55:48,209 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-26 11:55:48,215 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-26 11:55:48,216 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-26 11:55:48,217 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-26 11:55:48,222 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-26 11:55:48,224 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-26 11:55:48,224 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-26 11:55:48,225 INFO L153 SettingsManager]: * Use SBE=true [2023-11-26 11:55:48,227 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-26 11:55:48,227 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-26 11:55:48,252 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-26 11:55:48,252 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-26 11:55:48,253 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-26 11:55:48,253 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-26 11:55:48,254 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-26 11:55:48,254 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-26 11:55:48,255 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-26 11:55:48,256 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-26 11:55:48,257 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-26 11:55:48,257 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-26 11:55:48,258 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-26 11:55:48,258 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-26 11:55:48,259 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-26 11:55:48,259 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-26 11:55:48,260 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-26 11:55:48,260 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-26 11:55:48,260 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-26 11:55:48,261 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-26 11:55:48,261 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-26 11:55:48,261 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-26 11:55:48,262 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-26 11:55:48,262 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-26 11:55:48,263 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-26 11:55:48,263 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fdc85b042221b41aa26e62667e19ce1f6c246be9a2cb4f81fe8b15c8429db160 [2023-11-26 11:55:48,511 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-26 11:55:48,538 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-26 11:55:48,543 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-26 11:55:48,545 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-26 11:55:48,545 INFO L274 PluginConnector]: CDTParser initialized [2023-11-26 11:55:48,547 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_nondet_test1-1.i [2023-11-26 11:55:51,601 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-26 11:55:51,921 INFO L384 CDTParser]: Found 1 translation units. [2023-11-26 11:55:51,923 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_nondet_test1-1.i [2023-11-26 11:55:51,950 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/data/fe065a8df/9456eb3770fd41ebb7a2d0b38ed45eaa/FLAG45b0868a9 [2023-11-26 11:55:51,979 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/data/fe065a8df/9456eb3770fd41ebb7a2d0b38ed45eaa [2023-11-26 11:55:51,981 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-26 11:55:51,983 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-26 11:55:51,984 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-26 11:55:51,985 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-26 11:55:51,991 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-26 11:55:51,992 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:55:51" (1/1) ... [2023-11-26 11:55:51,992 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@295b6b71 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:51, skipping insertion in model container [2023-11-26 11:55:51,993 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 11:55:51" (1/1) ... [2023-11-26 11:55:52,057 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-26 11:55:52,685 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:55:52,698 INFO L202 MainTranslator]: Completed pre-run [2023-11-26 11:55:52,811 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-26 11:55:52,872 INFO L206 MainTranslator]: Completed translation [2023-11-26 11:55:52,872 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52 WrapperNode [2023-11-26 11:55:52,873 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-26 11:55:52,874 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-26 11:55:52,875 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-26 11:55:52,875 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-26 11:55:52,883 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:52,926 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:53,010 INFO L138 Inliner]: procedures = 177, calls = 177, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 754 [2023-11-26 11:55:53,011 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-26 11:55:53,011 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-26 11:55:53,012 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-26 11:55:53,012 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-26 11:55:53,025 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:53,025 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:53,035 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:53,112 INFO L175 MemorySlicer]: Split 163 memory accesses to 3 slices as follows [2, 156, 5]. 96 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 43 writes are split as follows [0, 42, 1]. [2023-11-26 11:55:53,112 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:53,113 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:53,152 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:53,163 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:53,168 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:53,174 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:53,184 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-26 11:55:53,186 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-26 11:55:53,186 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-26 11:55:53,186 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-26 11:55:53,187 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (1/1) ... [2023-11-26 11:55:53,241 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-26 11:55:53,258 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/z3 [2023-11-26 11:55:53,300 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-26 11:55:53,338 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9b097098-da28-47ed-b1de-73d962837d6f/bin/uautomizer-verify-VRDe98Ueme/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-26 11:55:53,387 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-26 11:55:53,387 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-26 11:55:53,387 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-26 11:55:53,388 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-26 11:55:53,388 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-26 11:55:53,388 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-26 11:55:53,388 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-26 11:55:53,388 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-26 11:55:53,390 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-26 11:55:53,390 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-26 11:55:53,390 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-26 11:55:53,390 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-26 11:55:53,390 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-26 11:55:53,391 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-26 11:55:53,391 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-26 11:55:53,393 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-26 11:55:53,393 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-26 11:55:53,393 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-26 11:55:53,394 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-26 11:55:53,394 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-26 11:55:53,394 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-26 11:55:53,394 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-26 11:55:53,394 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-26 11:55:53,394 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-26 11:55:53,395 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-26 11:55:53,395 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-26 11:55:53,396 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-26 11:55:53,622 INFO L241 CfgBuilder]: Building ICFG [2023-11-26 11:55:53,624 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-26 11:55:53,629 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:55:53,721 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:55:53,747 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-26 11:55:54,935 INFO L282 CfgBuilder]: Performing block encoding [2023-11-26 11:55:54,960 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-26 11:55:54,961 INFO L309 CfgBuilder]: Removed 31 assume(true) statements. [2023-11-26 11:55:54,964 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:55:54 BoogieIcfgContainer [2023-11-26 11:55:54,964 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-26 11:55:54,966 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-26 11:55:54,966 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-26 11:55:54,970 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-26 11:55:54,971 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:55:54,971 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.11 11:55:51" (1/3) ... [2023-11-26 11:55:54,972 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7e7333f0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:55:54, skipping insertion in model container [2023-11-26 11:55:54,972 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:55:54,973 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 11:55:52" (2/3) ... [2023-11-26 11:55:54,975 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7e7333f0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.11 11:55:54, skipping insertion in model container [2023-11-26 11:55:54,975 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-26 11:55:54,975 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 11:55:54" (3/3) ... [2023-11-26 11:55:54,977 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_SFH_nondet_test1-1.i [2023-11-26 11:55:55,047 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-26 11:55:55,047 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-26 11:55:55,048 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-26 11:55:55,048 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-26 11:55:55,048 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-26 11:55:55,048 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-26 11:55:55,048 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-26 11:55:55,048 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-26 11:55:55,054 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 190 states, 185 states have (on average 1.6702702702702703) internal successors, (309), 185 states have internal predecessors, (309), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:55:55,091 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 175 [2023-11-26 11:55:55,091 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:55:55,092 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:55:55,098 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:55:55,098 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2023-11-26 11:55:55,099 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-26 11:55:55,100 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 190 states, 185 states have (on average 1.6702702702702703) internal successors, (309), 185 states have internal predecessors, (309), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:55:55,111 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 175 [2023-11-26 11:55:55,111 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:55:55,112 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:55:55,112 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:55:55,112 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2023-11-26 11:55:55,121 INFO L748 eck$LassoCheckResult]: Stem: 36#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 53#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 155#L737-3true [2023-11-26 11:55:55,121 INFO L750 eck$LassoCheckResult]: Loop: 155#L737-3true assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 2#L739true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 157#L739-2true call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 188#L745-269true assume !true; 131#L737-2true main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 155#L737-3true [2023-11-26 11:55:55,127 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:55,128 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 1 times [2023-11-26 11:55:55,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:55,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1123045662] [2023-11-26 11:55:55,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:55,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:55,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:55,241 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:55:55,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:55,279 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:55:55,282 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:55,283 INFO L85 PathProgramCache]: Analyzing trace with hash 64057162, now seen corresponding path program 1 times [2023-11-26 11:55:55,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:55,284 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [792532591] [2023-11-26 11:55:55,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:55,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:55,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:55:55,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:55:55,346 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:55:55,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [792532591] [2023-11-26 11:55:55,347 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [792532591] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:55:55,347 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:55:55,347 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-26 11:55:55,348 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1175811657] [2023-11-26 11:55:55,349 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:55:55,353 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:55:55,354 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:55:55,388 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-26 11:55:55,389 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-26 11:55:55,392 INFO L87 Difference]: Start difference. First operand has 190 states, 185 states have (on average 1.6702702702702703) internal successors, (309), 185 states have internal predecessors, (309), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:55:55,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:55:55,416 INFO L93 Difference]: Finished difference Result 189 states and 277 transitions. [2023-11-26 11:55:55,418 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 189 states and 277 transitions. [2023-11-26 11:55:55,424 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 175 [2023-11-26 11:55:55,433 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 189 states to 182 states and 270 transitions. [2023-11-26 11:55:55,434 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 182 [2023-11-26 11:55:55,435 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 182 [2023-11-26 11:55:55,436 INFO L73 IsDeterministic]: Start isDeterministic. Operand 182 states and 270 transitions. [2023-11-26 11:55:55,439 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:55:55,439 INFO L218 hiAutomatonCegarLoop]: Abstraction has 182 states and 270 transitions. [2023-11-26 11:55:55,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states and 270 transitions. [2023-11-26 11:55:55,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2023-11-26 11:55:55,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 182 states, 178 states have (on average 1.4831460674157304) internal successors, (264), 177 states have internal predecessors, (264), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:55:55,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 270 transitions. [2023-11-26 11:55:55,483 INFO L240 hiAutomatonCegarLoop]: Abstraction has 182 states and 270 transitions. [2023-11-26 11:55:55,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-26 11:55:55,488 INFO L428 stractBuchiCegarLoop]: Abstraction has 182 states and 270 transitions. [2023-11-26 11:55:55,488 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-26 11:55:55,488 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 182 states and 270 transitions. [2023-11-26 11:55:55,491 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 175 [2023-11-26 11:55:55,492 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:55:55,492 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:55:55,494 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:55:55,494 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:55:55,495 INFO L748 eck$LassoCheckResult]: Stem: 452#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 453#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 474#L737-3 [2023-11-26 11:55:55,497 INFO L750 eck$LassoCheckResult]: Loop: 474#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 387#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 388#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 566#L745-269 havoc main_~_ha_hashv~0#1; 561#L745-176 goto; 558#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 427#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 429#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 567#L745-73 assume main_#t~switch29#1;call main_#t~mem30#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem30#1 % 256 % 4294967296);havoc main_#t~mem30#1; 415#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 416#L745-76 assume main_#t~switch29#1;call main_#t~mem31#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem31#1 % 256 % 4294967296);havoc main_#t~mem31#1; 471#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 447#L745-79 assume main_#t~switch29#1;call main_#t~mem32#1 := read~int#1(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 448#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 498#L745-82 assume main_#t~switch29#1;call main_#t~mem33#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 472#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 454#L745-85 assume main_#t~switch29#1;call main_#t~mem34#1 := read~int#1(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 455#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 465#L745-88 assume main_#t~switch29#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 522#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 523#L745-91 assume main_#t~switch29#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem36#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem36#1 % 256 % 4294967296 else main_#t~mem36#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem36#1; 468#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 424#L745-94 assume !main_#t~switch29#1; 425#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 513#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 518#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 533#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 488#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 489#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 446#L745-105 havoc main_#t~switch29#1; 444#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 445#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 402#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 521#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 417#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 418#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 497#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 491#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 403#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 404#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 506#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 507#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 564#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 529#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 494#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 557#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 479#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 407#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 408#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 426#L745-170 goto; 481#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 482#L745-173 goto; 519#L745-175 goto; 463#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 464#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 437#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 438#L745-193 goto; 545#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 560#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 398#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 399#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 480#L745-202 goto; 524#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 393#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 394#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 473#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 546#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 500#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 505#L745-260 goto; 475#L745-262 havoc main_~_ha_bkt~0#1; 476#L745-263 goto; 483#L745-265 goto; 484#L745-267 havoc main_~_ha_hashv~0#1; 532#L745-268 goto; 548#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 474#L737-3 [2023-11-26 11:55:55,497 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:55,498 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 2 times [2023-11-26 11:55:55,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:55,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985607274] [2023-11-26 11:55:55,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:55,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:55,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:55,509 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:55:55,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:55,524 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:55:55,524 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:55,525 INFO L85 PathProgramCache]: Analyzing trace with hash -1832271533, now seen corresponding path program 1 times [2023-11-26 11:55:55,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:55,525 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589296789] [2023-11-26 11:55:55,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:55,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:55,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:55:56,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:55:56,147 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:55:56,147 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589296789] [2023-11-26 11:55:56,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589296789] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:55:56,148 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:55:56,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 11:55:56,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [756609008] [2023-11-26 11:55:56,149 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:55:56,149 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:55:56,150 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:55:56,150 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 11:55:56,151 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 11:55:56,151 INFO L87 Difference]: Start difference. First operand 182 states and 270 transitions. cyclomatic complexity: 91 Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:55:56,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:55:56,271 INFO L93 Difference]: Finished difference Result 186 states and 267 transitions. [2023-11-26 11:55:56,271 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 186 states and 267 transitions. [2023-11-26 11:55:56,274 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 179 [2023-11-26 11:55:56,277 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 186 states to 186 states and 267 transitions. [2023-11-26 11:55:56,277 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 186 [2023-11-26 11:55:56,278 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 186 [2023-11-26 11:55:56,278 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 267 transitions. [2023-11-26 11:55:56,280 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:55:56,280 INFO L218 hiAutomatonCegarLoop]: Abstraction has 186 states and 267 transitions. [2023-11-26 11:55:56,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 267 transitions. [2023-11-26 11:55:56,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 182. [2023-11-26 11:55:56,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 182 states, 178 states have (on average 1.4438202247191012) internal successors, (257), 177 states have internal predecessors, (257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:55:56,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 263 transitions. [2023-11-26 11:55:56,292 INFO L240 hiAutomatonCegarLoop]: Abstraction has 182 states and 263 transitions. [2023-11-26 11:55:56,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 11:55:56,293 INFO L428 stractBuchiCegarLoop]: Abstraction has 182 states and 263 transitions. [2023-11-26 11:55:56,294 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-26 11:55:56,294 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 182 states and 263 transitions. [2023-11-26 11:55:56,295 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 175 [2023-11-26 11:55:56,296 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:55:56,296 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:55:56,298 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:55:56,298 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:55:56,298 INFO L748 eck$LassoCheckResult]: Stem: 827#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 828#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 850#L737-3 [2023-11-26 11:55:56,299 INFO L750 eck$LassoCheckResult]: Loop: 850#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 764#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 765#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 943#L745-269 havoc main_~_ha_hashv~0#1; 937#L745-176 goto; 935#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 801#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 803#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 944#L745-73 assume !main_#t~switch29#1; 792#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 793#L745-76 assume !main_#t~switch29#1; 848#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 824#L745-79 assume !main_#t~switch29#1; 825#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 875#L745-82 assume !main_#t~switch29#1; 849#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 831#L745-85 assume !main_#t~switch29#1; 832#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 842#L745-88 assume !main_#t~switch29#1; 898#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 899#L745-91 assume !main_#t~switch29#1; 847#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 804#L745-94 assume !main_#t~switch29#1; 805#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 890#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 895#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 910#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 866#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 867#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 823#L745-105 havoc main_#t~switch29#1; 821#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 822#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 779#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 900#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 794#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 795#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 874#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 868#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 780#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 781#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 883#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 884#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 941#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 906#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 871#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 934#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 856#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 784#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 785#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 806#L745-170 goto; 858#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 859#L745-173 goto; 897#L745-175 goto; 840#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 841#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 817#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 818#L745-193 goto; 922#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 938#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 775#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 776#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 857#L745-202 goto; 901#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 770#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 771#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 851#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 923#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 877#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 882#L745-260 goto; 852#L745-262 havoc main_~_ha_bkt~0#1; 853#L745-263 goto; 860#L745-265 goto; 861#L745-267 havoc main_~_ha_hashv~0#1; 909#L745-268 goto; 925#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 850#L737-3 [2023-11-26 11:55:56,300 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:56,300 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 3 times [2023-11-26 11:55:56,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:56,301 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [802482615] [2023-11-26 11:55:56,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:56,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:56,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:56,309 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:55:56,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:56,323 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:55:56,324 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:56,324 INFO L85 PathProgramCache]: Analyzing trace with hash 17975393, now seen corresponding path program 1 times [2023-11-26 11:55:56,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:56,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [548998763] [2023-11-26 11:55:56,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:56,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:56,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:55:56,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:55:56,610 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:55:56,610 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [548998763] [2023-11-26 11:55:56,611 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [548998763] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:55:56,611 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:55:56,611 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 11:55:56,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [947960027] [2023-11-26 11:55:56,612 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:55:56,613 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:55:56,613 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:55:56,613 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 11:55:56,614 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 11:55:56,614 INFO L87 Difference]: Start difference. First operand 182 states and 263 transitions. cyclomatic complexity: 84 Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:55:56,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:55:56,715 INFO L93 Difference]: Finished difference Result 143 states and 192 transitions. [2023-11-26 11:55:56,716 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 143 states and 192 transitions. [2023-11-26 11:55:56,717 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 136 [2023-11-26 11:55:56,720 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 143 states to 143 states and 192 transitions. [2023-11-26 11:55:56,720 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 143 [2023-11-26 11:55:56,720 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 143 [2023-11-26 11:55:56,720 INFO L73 IsDeterministic]: Start isDeterministic. Operand 143 states and 192 transitions. [2023-11-26 11:55:56,726 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:55:56,726 INFO L218 hiAutomatonCegarLoop]: Abstraction has 143 states and 192 transitions. [2023-11-26 11:55:56,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states and 192 transitions. [2023-11-26 11:55:56,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2023-11-26 11:55:56,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 139 states have (on average 1.3381294964028776) internal successors, (186), 138 states have internal predecessors, (186), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:55:56,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 192 transitions. [2023-11-26 11:55:56,763 INFO L240 hiAutomatonCegarLoop]: Abstraction has 143 states and 192 transitions. [2023-11-26 11:55:56,764 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 11:55:56,765 INFO L428 stractBuchiCegarLoop]: Abstraction has 143 states and 192 transitions. [2023-11-26 11:55:56,765 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-26 11:55:56,765 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 143 states and 192 transitions. [2023-11-26 11:55:56,766 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 136 [2023-11-26 11:55:56,767 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:55:56,767 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:55:56,768 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:55:56,768 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:55:56,769 INFO L748 eck$LassoCheckResult]: Stem: 1146#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1147#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 1161#L737-3 [2023-11-26 11:55:56,769 INFO L750 eck$LassoCheckResult]: Loop: 1161#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 1098#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1099#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 1238#L745-269 havoc main_~_ha_hashv~0#1; 1233#L745-176 goto; 1230#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1129#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1130#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 1239#L745-73 assume !main_#t~switch29#1; 1122#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 1123#L745-76 assume !main_#t~switch29#1; 1158#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 1142#L745-79 assume !main_#t~switch29#1; 1143#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 1180#L745-82 assume !main_#t~switch29#1; 1159#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 1148#L745-85 assume !main_#t~switch29#1; 1149#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 1154#L745-88 assume !main_#t~switch29#1; 1201#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 1202#L745-91 assume !main_#t~switch29#1; 1157#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 1131#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1132#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 1194#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1199#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 1215#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1171#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 1172#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1141#L745-105 havoc main_#t~switch29#1; 1139#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1140#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1111#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1203#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1124#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1125#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1179#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1173#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1112#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1113#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1187#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1188#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1236#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1208#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1177#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1229#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1165#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1116#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1117#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 1128#L745-170 goto; 1166#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1167#L745-173 goto; 1200#L745-175 goto; 1152#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1153#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1135#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1136#L745-193 goto; 1222#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 1232#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 1107#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 1108#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 1164#L745-202 goto; 1204#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1102#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 1103#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 1160#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 1223#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 1182#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1186#L745-260 goto; 1162#L745-262 havoc main_~_ha_bkt~0#1; 1163#L745-263 goto; 1168#L745-265 goto; 1169#L745-267 havoc main_~_ha_hashv~0#1; 1210#L745-268 goto; 1224#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1161#L737-3 [2023-11-26 11:55:56,770 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:56,770 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 4 times [2023-11-26 11:55:56,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:56,771 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660199444] [2023-11-26 11:55:56,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:56,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:56,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:56,783 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:55:56,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:56,803 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:55:56,805 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:56,805 INFO L85 PathProgramCache]: Analyzing trace with hash -425925281, now seen corresponding path program 1 times [2023-11-26 11:55:56,805 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:56,806 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [513546624] [2023-11-26 11:55:56,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:56,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:57,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:55:58,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:55:58,000 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:55:58,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [513546624] [2023-11-26 11:55:58,002 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [513546624] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:55:58,003 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:55:58,003 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-26 11:55:58,003 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2078948579] [2023-11-26 11:55:58,003 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:55:58,004 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:55:58,004 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:55:58,004 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-26 11:55:58,005 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2023-11-26 11:55:58,005 INFO L87 Difference]: Start difference. First operand 143 states and 192 transitions. cyclomatic complexity: 52 Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:55:58,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:55:58,619 INFO L93 Difference]: Finished difference Result 148 states and 198 transitions. [2023-11-26 11:55:58,619 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 148 states and 198 transitions. [2023-11-26 11:55:58,621 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 141 [2023-11-26 11:55:58,622 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 148 states to 148 states and 198 transitions. [2023-11-26 11:55:58,623 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 148 [2023-11-26 11:55:58,623 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 148 [2023-11-26 11:55:58,623 INFO L73 IsDeterministic]: Start isDeterministic. Operand 148 states and 198 transitions. [2023-11-26 11:55:58,624 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:55:58,624 INFO L218 hiAutomatonCegarLoop]: Abstraction has 148 states and 198 transitions. [2023-11-26 11:55:58,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states and 198 transitions. [2023-11-26 11:55:58,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 147. [2023-11-26 11:55:58,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 143 states have (on average 1.3356643356643356) internal successors, (191), 142 states have internal predecessors, (191), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:55:58,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 197 transitions. [2023-11-26 11:55:58,645 INFO L240 hiAutomatonCegarLoop]: Abstraction has 147 states and 197 transitions. [2023-11-26 11:55:58,646 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-26 11:55:58,649 INFO L428 stractBuchiCegarLoop]: Abstraction has 147 states and 197 transitions. [2023-11-26 11:55:58,649 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-26 11:55:58,649 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 147 states and 197 transitions. [2023-11-26 11:55:58,651 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 140 [2023-11-26 11:55:58,651 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:55:58,655 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:55:58,658 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:55:58,658 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:55:58,659 INFO L748 eck$LassoCheckResult]: Stem: 1448#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1449#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 1463#L737-3 [2023-11-26 11:55:58,659 INFO L750 eck$LassoCheckResult]: Loop: 1463#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 1400#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1401#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 1542#L745-269 havoc main_~_ha_hashv~0#1; 1537#L745-176 goto; 1534#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1431#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1432#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 1543#L745-73 assume !main_#t~switch29#1; 1424#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 1425#L745-76 assume !main_#t~switch29#1; 1460#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 1444#L745-79 assume !main_#t~switch29#1; 1445#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 1483#L745-82 assume !main_#t~switch29#1; 1461#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 1450#L745-85 assume !main_#t~switch29#1; 1451#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 1456#L745-88 assume !main_#t~switch29#1; 1505#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 1506#L745-91 assume !main_#t~switch29#1; 1459#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 1433#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1434#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 1497#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1502#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 1514#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1473#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 1474#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1443#L745-105 havoc main_#t~switch29#1; 1441#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1442#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1466#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1532#L745-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 1428#L745-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet42#1 := main_~_hj_j~0#1; 1426#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1427#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1482#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1476#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1414#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1415#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1490#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1491#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1540#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1511#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1479#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1533#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1467#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1418#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1419#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 1430#L745-170 goto; 1469#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1470#L745-173 goto; 1503#L745-175 goto; 1454#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1455#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1437#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1438#L745-193 goto; 1525#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 1536#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 1409#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 1410#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 1468#L745-202 goto; 1507#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1404#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 1405#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 1462#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 1526#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 1485#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1489#L745-260 goto; 1464#L745-262 havoc main_~_ha_bkt~0#1; 1465#L745-263 goto; 1471#L745-265 goto; 1472#L745-267 havoc main_~_ha_hashv~0#1; 1513#L745-268 goto; 1527#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1463#L737-3 [2023-11-26 11:55:58,659 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:58,660 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 5 times [2023-11-26 11:55:58,660 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:58,660 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2127454531] [2023-11-26 11:55:58,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:58,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:58,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:58,671 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:55:58,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:58,679 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:55:58,680 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:58,680 INFO L85 PathProgramCache]: Analyzing trace with hash 709846247, now seen corresponding path program 1 times [2023-11-26 11:55:58,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:58,681 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859440491] [2023-11-26 11:55:58,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:58,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:58,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:55:59,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:55:59,109 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:55:59,109 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1859440491] [2023-11-26 11:55:59,110 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1859440491] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:55:59,110 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:55:59,110 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-26 11:55:59,110 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1307376775] [2023-11-26 11:55:59,110 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:55:59,111 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:55:59,111 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:55:59,111 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-26 11:55:59,112 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-26 11:55:59,112 INFO L87 Difference]: Start difference. First operand 147 states and 197 transitions. cyclomatic complexity: 53 Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:55:59,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:55:59,616 INFO L93 Difference]: Finished difference Result 152 states and 203 transitions. [2023-11-26 11:55:59,616 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 152 states and 203 transitions. [2023-11-26 11:55:59,618 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 145 [2023-11-26 11:55:59,620 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 152 states to 152 states and 203 transitions. [2023-11-26 11:55:59,620 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 152 [2023-11-26 11:55:59,620 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 152 [2023-11-26 11:55:59,621 INFO L73 IsDeterministic]: Start isDeterministic. Operand 152 states and 203 transitions. [2023-11-26 11:55:59,621 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:55:59,621 INFO L218 hiAutomatonCegarLoop]: Abstraction has 152 states and 203 transitions. [2023-11-26 11:55:59,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states and 203 transitions. [2023-11-26 11:55:59,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 151. [2023-11-26 11:55:59,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 151 states, 147 states have (on average 1.3333333333333333) internal successors, (196), 146 states have internal predecessors, (196), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:55:59,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 202 transitions. [2023-11-26 11:55:59,630 INFO L240 hiAutomatonCegarLoop]: Abstraction has 151 states and 202 transitions. [2023-11-26 11:55:59,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-26 11:55:59,631 INFO L428 stractBuchiCegarLoop]: Abstraction has 151 states and 202 transitions. [2023-11-26 11:55:59,631 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-26 11:55:59,631 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 151 states and 202 transitions. [2023-11-26 11:55:59,632 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 144 [2023-11-26 11:55:59,632 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:55:59,633 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:55:59,633 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:55:59,633 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:55:59,634 INFO L748 eck$LassoCheckResult]: Stem: 1758#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1759#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 1774#L737-3 [2023-11-26 11:55:59,634 INFO L750 eck$LassoCheckResult]: Loop: 1774#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 1711#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1712#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 1854#L745-269 havoc main_~_ha_hashv~0#1; 1848#L745-176 goto; 1846#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1742#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1743#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 1855#L745-73 assume !main_#t~switch29#1; 1735#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 1736#L745-76 assume !main_#t~switch29#1; 1772#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 1756#L745-79 assume !main_#t~switch29#1; 1757#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 1795#L745-82 assume !main_#t~switch29#1; 1773#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 1762#L745-85 assume !main_#t~switch29#1; 1763#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 1768#L745-88 assume !main_#t~switch29#1; 1816#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 1817#L745-91 assume !main_#t~switch29#1; 1771#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 1744#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1745#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 1809#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 1814#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 1826#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 1786#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 1787#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 1755#L745-105 havoc main_#t~switch29#1; 1753#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1754#L745-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 1764#L745-109 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet41#1 := main_~_hj_i~0#1; 1724#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1858#L745-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1737#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1738#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1794#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1788#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1725#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1726#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1802#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1803#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1852#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1823#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1791#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1845#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1779#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1729#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1730#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 1746#L745-170 goto; 1781#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1782#L745-173 goto; 1815#L745-175 goto; 1766#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1767#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1749#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1750#L745-193 goto; 1838#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 1849#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 1720#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 1721#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 1780#L745-202 goto; 1819#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1715#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 1716#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 1775#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 1839#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 1797#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1801#L745-260 goto; 1776#L745-262 havoc main_~_ha_bkt~0#1; 1777#L745-263 goto; 1783#L745-265 goto; 1784#L745-267 havoc main_~_ha_hashv~0#1; 1825#L745-268 goto; 1840#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1774#L737-3 [2023-11-26 11:55:59,635 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:59,635 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 6 times [2023-11-26 11:55:59,635 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:59,635 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [433359193] [2023-11-26 11:55:59,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:59,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:59,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:59,642 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:55:59,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:55:59,650 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:55:59,650 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:55:59,650 INFO L85 PathProgramCache]: Analyzing trace with hash -436207054, now seen corresponding path program 1 times [2023-11-26 11:55:59,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:55:59,651 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1777774411] [2023-11-26 11:55:59,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:55:59,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:55:59,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:56:00,321 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-26 11:56:00,321 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-26 11:56:00,322 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1777774411] [2023-11-26 11:56:00,322 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1777774411] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-26 11:56:00,322 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-26 11:56:00,322 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-26 11:56:00,322 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [230634128] [2023-11-26 11:56:00,323 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-26 11:56:00,323 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-26 11:56:00,324 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-26 11:56:00,324 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-26 11:56:00,324 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-26 11:56:00,324 INFO L87 Difference]: Start difference. First operand 151 states and 202 transitions. cyclomatic complexity: 54 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-26 11:56:00,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-26 11:56:00,471 INFO L93 Difference]: Finished difference Result 151 states and 201 transitions. [2023-11-26 11:56:00,471 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 151 states and 201 transitions. [2023-11-26 11:56:00,472 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 144 [2023-11-26 11:56:00,474 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 151 states to 151 states and 201 transitions. [2023-11-26 11:56:00,474 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 151 [2023-11-26 11:56:00,474 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 151 [2023-11-26 11:56:00,474 INFO L73 IsDeterministic]: Start isDeterministic. Operand 151 states and 201 transitions. [2023-11-26 11:56:00,475 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-26 11:56:00,475 INFO L218 hiAutomatonCegarLoop]: Abstraction has 151 states and 201 transitions. [2023-11-26 11:56:00,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states and 201 transitions. [2023-11-26 11:56:00,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2023-11-26 11:56:00,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 151 states, 147 states have (on average 1.3265306122448979) internal successors, (195), 146 states have internal predecessors, (195), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-26 11:56:00,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 201 transitions. [2023-11-26 11:56:00,493 INFO L240 hiAutomatonCegarLoop]: Abstraction has 151 states and 201 transitions. [2023-11-26 11:56:00,493 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-26 11:56:00,495 INFO L428 stractBuchiCegarLoop]: Abstraction has 151 states and 201 transitions. [2023-11-26 11:56:00,495 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-26 11:56:00,495 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 151 states and 201 transitions. [2023-11-26 11:56:00,496 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 144 [2023-11-26 11:56:00,496 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-26 11:56:00,496 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-26 11:56:00,499 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-26 11:56:00,499 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-26 11:56:00,499 INFO L748 eck$LassoCheckResult]: Stem: 2066#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 2067#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~nondet6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~nondet80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~memset~res100#1.base, main_#t~memset~res100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~nondet106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem110#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~nondet111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~nondet123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~pre126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem135#1, main_#t~mem133#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem134#1, main_#t~mem136#1, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~post113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem154#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~ite157#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post4#1, main_#t~mem162#1, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 2082#L737-3 [2023-11-26 11:56:00,500 INFO L750 eck$LassoCheckResult]: Loop: 2082#L737-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; 2020#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2021#L739-2 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call write~int#1(main_#t~nondet6#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet6#1;call main_#t~mem7#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem7#1;havoc main_#t~mem7#1; 2162#L745-269 havoc main_~_ha_hashv~0#1; 2156#L745-176 goto; 2154#L745-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2050#L745-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2051#L745-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 2163#L745-73 assume !main_#t~switch29#1; 2044#L745-75 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 2045#L745-76 assume !main_#t~switch29#1; 2080#L745-78 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 2064#L745-79 assume !main_#t~switch29#1; 2065#L745-81 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 2104#L745-82 assume !main_#t~switch29#1; 2081#L745-84 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 2070#L745-85 assume !main_#t~switch29#1; 2071#L745-87 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 2076#L745-88 assume !main_#t~switch29#1; 2125#L745-90 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 2126#L745-91 assume !main_#t~switch29#1; 2079#L745-93 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 2052#L745-94 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 2053#L745-96 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 2118#L745-97 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296);havoc main_#t~mem38#1; 2123#L745-99 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 2135#L745-100 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2094#L745-102 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 2095#L745-103 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem40#1; 2063#L745-105 havoc main_#t~switch29#1; 2061#L745-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2062#L745-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2086#L745-113 main_~_hj_i~0#1 := main_#t~nondet41#1;havoc main_#t~nondet41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2127#L745-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 2048#L745-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 2049#L745-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 2103#L745-120 main_~_hj_j~0#1 := main_#t~nondet42#1;havoc main_#t~nondet42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2165#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2102#L745-127 main_~_ha_hashv~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2096#L745-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2034#L745-134 main_~_hj_i~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2035#L745-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2111#L745-141 main_~_hj_j~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2112#L745-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2160#L745-148 main_~_ha_hashv~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2132#L745-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2099#L745-155 main_~_hj_i~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2153#L745-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2087#L745-162 main_~_hj_j~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2038#L745-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2039#L745-169 main_~_ha_hashv~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1; 2054#L745-170 goto; 2089#L745-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2090#L745-173 goto; 2124#L745-175 goto; 2074#L745-266 call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2075#L745-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 2057#L745-194 call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 2058#L745-193 goto; 2146#L745-264 havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 2157#L745-203 call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 2029#L745-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~nondet80#1 := 0; 2030#L745-201 main_~_ha_bkt~0#1 := main_#t~nondet80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~nondet80#1; 2088#L745-202 goto; 2128#L745-261 call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2024#L745-205 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 2025#L745-207 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 2083#L745-208 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 2147#L745-210 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 2106#L745-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2110#L745-260 goto; 2084#L745-262 havoc main_~_ha_bkt~0#1; 2085#L745-263 goto; 2091#L745-265 goto; 2092#L745-267 havoc main_~_ha_hashv~0#1; 2134#L745-268 goto; 2148#L737-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2082#L737-3 [2023-11-26 11:56:00,500 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:56:00,502 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 7 times [2023-11-26 11:56:00,502 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:56:00,502 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508488903] [2023-11-26 11:56:00,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:56:00,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:56:00,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:56:00,508 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-26 11:56:00,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-26 11:56:00,517 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-26 11:56:00,519 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-26 11:56:00,519 INFO L85 PathProgramCache]: Analyzing trace with hash -1867429320, now seen corresponding path program 1 times [2023-11-26 11:56:00,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-26 11:56:00,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851569957] [2023-11-26 11:56:00,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-26 11:56:00,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-26 11:56:00,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-26 11:56:54,308 WARN L293 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 18 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)