./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-29 04:55:56,548 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-29 04:55:56,609 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-64bit-Automizer_Default.epf [2023-11-29 04:55:56,614 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-29 04:55:56,614 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-29 04:55:56,639 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-29 04:55:56,640 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-29 04:55:56,640 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-29 04:55:56,641 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-29 04:55:56,641 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-29 04:55:56,642 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-29 04:55:56,643 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-29 04:55:56,643 INFO L153 SettingsManager]: * Use SBE=true [2023-11-29 04:55:56,644 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-29 04:55:56,644 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-29 04:55:56,645 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-29 04:55:56,645 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-29 04:55:56,646 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-29 04:55:56,646 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-29 04:55:56,647 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-29 04:55:56,647 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-29 04:55:56,648 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-29 04:55:56,648 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-29 04:55:56,649 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-29 04:55:56,649 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-29 04:55:56,650 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-29 04:55:56,650 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-29 04:55:56,650 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-29 04:55:56,651 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-29 04:55:56,651 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-29 04:55:56,652 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-29 04:55:56,652 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-29 04:55:56,653 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-29 04:55:56,653 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-29 04:55:56,653 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-29 04:55:56,654 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 [2023-11-29 04:55:56,868 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-29 04:55:56,888 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-29 04:55:56,891 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-29 04:55:56,892 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-29 04:55:56,893 INFO L274 PluginConnector]: CDTParser initialized [2023-11-29 04:55:56,894 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/../../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2023-11-29 04:55:59,661 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-29 04:55:59,827 INFO L384 CDTParser]: Found 1 translation units. [2023-11-29 04:55:59,827 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2023-11-29 04:55:59,834 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/data/f9f66a76d/3db28e0a6b5e4981a82d003aecfbef81/FLAGb900d8fed [2023-11-29 04:55:59,848 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/data/f9f66a76d/3db28e0a6b5e4981a82d003aecfbef81 [2023-11-29 04:55:59,850 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-29 04:55:59,852 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-29 04:55:59,853 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-29 04:55:59,853 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-29 04:55:59,858 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-29 04:55:59,858 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 04:55:59" (1/1) ... [2023-11-29 04:55:59,859 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2f4deb20 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:55:59, skipping insertion in model container [2023-11-29 04:55:59,859 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 04:55:59" (1/1) ... [2023-11-29 04:55:59,878 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-29 04:56:00,004 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 04:56:00,009 INFO L202 MainTranslator]: Completed pre-run [2023-11-29 04:56:00,022 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 04:56:00,036 INFO L206 MainTranslator]: Completed translation [2023-11-29 04:56:00,037 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00 WrapperNode [2023-11-29 04:56:00,037 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-29 04:56:00,038 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-29 04:56:00,038 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-29 04:56:00,038 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-29 04:56:00,043 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,049 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,063 INFO L138 Inliner]: procedures = 8, calls = 8, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 48 [2023-11-29 04:56:00,063 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-29 04:56:00,064 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-29 04:56:00,064 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-29 04:56:00,064 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-29 04:56:00,072 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,072 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,074 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,083 INFO L175 MemorySlicer]: Split 3 memory accesses to 1 slices as follows [3]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 1 writes are split as follows [1]. [2023-11-29 04:56:00,083 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,083 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,087 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,091 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,092 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,093 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,094 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-29 04:56:00,095 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-29 04:56:00,095 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-29 04:56:00,095 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-29 04:56:00,096 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (1/1) ... [2023-11-29 04:56:00,102 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 04:56:00,110 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 04:56:00,125 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 04:56:00,127 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-29 04:56:00,159 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-29 04:56:00,159 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-29 04:56:00,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-29 04:56:00,160 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-29 04:56:00,160 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-29 04:56:00,160 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-29 04:56:00,224 INFO L241 CfgBuilder]: Building ICFG [2023-11-29 04:56:00,226 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-29 04:56:00,325 INFO L282 CfgBuilder]: Performing block encoding [2023-11-29 04:56:00,333 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-29 04:56:00,333 INFO L309 CfgBuilder]: Removed 2 assume(true) statements. [2023-11-29 04:56:00,334 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 04:56:00 BoogieIcfgContainer [2023-11-29 04:56:00,335 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-29 04:56:00,336 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-29 04:56:00,336 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-29 04:56:00,339 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-29 04:56:00,340 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 04:56:00,340 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 29.11 04:55:59" (1/3) ... [2023-11-29 04:56:00,341 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2efca0a6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 04:56:00, skipping insertion in model container [2023-11-29 04:56:00,341 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 04:56:00,341 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 04:56:00" (2/3) ... [2023-11-29 04:56:00,341 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2efca0a6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 04:56:00, skipping insertion in model container [2023-11-29 04:56:00,341 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 04:56:00,342 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 04:56:00" (3/3) ... [2023-11-29 04:56:00,343 INFO L332 chiAutomizerObserver]: Analyzing ICFG Arrays03-ValueRestictsIndex-2.c [2023-11-29 04:56:00,386 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-29 04:56:00,386 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-29 04:56:00,387 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-29 04:56:00,387 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-29 04:56:00,387 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-29 04:56:00,387 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-29 04:56:00,387 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-29 04:56:00,387 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-29 04:56:00,391 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:00,409 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2023-11-29 04:56:00,409 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 04:56:00,410 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 04:56:00,414 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-29 04:56:00,415 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-29 04:56:00,415 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-29 04:56:00,415 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:00,417 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2023-11-29 04:56:00,417 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 04:56:00,417 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 04:56:00,417 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-29 04:56:00,417 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-29 04:56:00,425 INFO L748 eck$LassoCheckResult]: Stem: 11#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 3#L15-3true [2023-11-29 04:56:00,425 INFO L750 eck$LassoCheckResult]: Loop: 3#L15-3true assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 7#L15-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 3#L15-3true [2023-11-29 04:56:00,430 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:00,430 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-29 04:56:00,437 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:00,437 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1422361093] [2023-11-29 04:56:00,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:00,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:00,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:00,519 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 04:56:00,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:00,545 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 04:56:00,548 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:00,548 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-29 04:56:00,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:00,549 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910301671] [2023-11-29 04:56:00,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:00,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:00,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:00,561 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 04:56:00,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:00,593 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 04:56:00,594 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:00,594 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-29 04:56:00,595 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:00,595 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405570879] [2023-11-29 04:56:00,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:00,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:00,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:00,616 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 04:56:00,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:00,631 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 04:56:00,838 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 04:56:00,839 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 04:56:00,839 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 04:56:00,839 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 04:56:00,839 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 04:56:00,839 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 04:56:00,839 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 04:56:00,840 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 04:56:00,840 INFO L133 ssoRankerPreferences]: Filename of dumped script: Arrays03-ValueRestictsIndex-2.c_Iteration1_Lasso [2023-11-29 04:56:00,840 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 04:56:00,840 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 04:56:00,856 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 04:56:00,945 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 04:56:00,948 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 04:56:00,950 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 04:56:00,953 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 04:56:00,955 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 04:56:00,958 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 04:56:00,960 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 04:56:00,963 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 04:56:00,965 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 04:56:00,968 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 04:56:01,094 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 04:56:01,098 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 04:56:01,100 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 04:56:01,100 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 04:56:01,104 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 04:56:01,108 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-29 04:56:01,110 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 04:56:01,121 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 04:56:01,122 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 04:56:01,122 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 04:56:01,122 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 04:56:01,127 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 04:56:01,128 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 04:56:01,133 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 04:56:01,140 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-29 04:56:01,141 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 04:56:01,141 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 04:56:01,142 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 04:56:01,144 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-29 04:56:01,148 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 04:56:01,160 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 04:56:01,161 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 04:56:01,161 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 04:56:01,161 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 04:56:01,168 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 04:56:01,168 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 04:56:01,180 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 04:56:01,219 INFO L443 ModelExtractionUtils]: Simplification made 16 calls to the SMT solver. [2023-11-29 04:56:01,219 INFO L444 ModelExtractionUtils]: 1 out of 13 variables were initially zero. Simplification set additionally 9 variables to zero. [2023-11-29 04:56:01,221 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 04:56:01,221 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 04:56:01,248 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 04:56:01,250 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-29 04:56:01,250 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 04:56:01,266 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-29 04:56:01,266 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 04:56:01,267 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 2095*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2023-11-29 04:56:01,271 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2023-11-29 04:56:01,277 INFO L156 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2023-11-29 04:56:01,285 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#a~0!base] could not be translated [2023-11-29 04:56:01,303 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:01,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:01,318 INFO L262 TraceCheckSpWp]: Trace formula consists of 19 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-29 04:56:01,319 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 04:56:01,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:01,334 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-29 04:56:01,335 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 04:56:01,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:01,398 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-29 04:56:01,400 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:01,449 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 27 states and 41 transitions. Complement of second has 8 states. [2023-11-29 04:56:01,451 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-29 04:56:01,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:01,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 20 transitions. [2023-11-29 04:56:01,458 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 20 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-29 04:56:01,458 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 04:56:01,458 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 20 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-29 04:56:01,459 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 04:56:01,459 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 20 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-29 04:56:01,459 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 04:56:01,460 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 41 transitions. [2023-11-29 04:56:01,463 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:01,466 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 10 states and 13 transitions. [2023-11-29 04:56:01,467 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-29 04:56:01,467 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 04:56:01,468 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 13 transitions. [2023-11-29 04:56:01,468 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 04:56:01,468 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2023-11-29 04:56:01,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 13 transitions. [2023-11-29 04:56:01,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2023-11-29 04:56:01,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:01,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 13 transitions. [2023-11-29 04:56:01,494 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2023-11-29 04:56:01,494 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2023-11-29 04:56:01,494 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-29 04:56:01,494 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 13 transitions. [2023-11-29 04:56:01,495 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:01,495 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 04:56:01,495 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 04:56:01,495 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-29 04:56:01,495 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-29 04:56:01,496 INFO L748 eck$LassoCheckResult]: Stem: 91#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 92#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 86#L15-3 assume !(main_~i~0#1 < 1048); 84#L15-4 havoc main_~i~0#1; 85#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 93#L20 assume !main_#t~short5#1; 89#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 90#L22-2 [2023-11-29 04:56:01,496 INFO L750 eck$LassoCheckResult]: Loop: 90#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 90#L22-2 [2023-11-29 04:56:01,496 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:01,496 INFO L85 PathProgramCache]: Analyzing trace with hash 1807952492, now seen corresponding path program 1 times [2023-11-29 04:56:01,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:01,497 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329423889] [2023-11-29 04:56:01,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:01,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:01,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:01,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:01,559 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 04:56:01,560 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [329423889] [2023-11-29 04:56:01,560 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [329423889] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 04:56:01,560 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 04:56:01,560 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-29 04:56:01,561 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656221398] [2023-11-29 04:56:01,562 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 04:56:01,563 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 04:56:01,564 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:01,564 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 1 times [2023-11-29 04:56:01,564 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:01,564 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277739247] [2023-11-29 04:56:01,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:01,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:01,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:01,569 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 04:56:01,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:01,572 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 04:56:01,587 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 04:56:01,589 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-29 04:56:01,590 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-29 04:56:01,591 INFO L87 Difference]: Start difference. First operand 10 states and 13 transitions. cyclomatic complexity: 5 Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:01,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 04:56:01,603 INFO L93 Difference]: Finished difference Result 11 states and 13 transitions. [2023-11-29 04:56:01,603 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 13 transitions. [2023-11-29 04:56:01,604 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:01,605 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 13 transitions. [2023-11-29 04:56:01,605 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 04:56:01,605 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 04:56:01,605 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 13 transitions. [2023-11-29 04:56:01,605 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 04:56:01,606 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 13 transitions. [2023-11-29 04:56:01,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 13 transitions. [2023-11-29 04:56:01,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 10. [2023-11-29 04:56:01,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.2) internal successors, (12), 9 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:01,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 12 transitions. [2023-11-29 04:56:01,607 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 12 transitions. [2023-11-29 04:56:01,608 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-29 04:56:01,608 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2023-11-29 04:56:01,609 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-29 04:56:01,609 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 12 transitions. [2023-11-29 04:56:01,609 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:01,609 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 04:56:01,610 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 04:56:01,610 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 04:56:01,610 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-29 04:56:01,610 INFO L748 eck$LassoCheckResult]: Stem: 118#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 119#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 113#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 114#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 115#L15-3 assume !(main_~i~0#1 < 1048); 111#L15-4 havoc main_~i~0#1; 112#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 120#L20 assume !main_#t~short5#1; 116#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 117#L22-2 [2023-11-29 04:56:01,611 INFO L750 eck$LassoCheckResult]: Loop: 117#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 117#L22-2 [2023-11-29 04:56:01,611 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:01,611 INFO L85 PathProgramCache]: Analyzing trace with hash -369324246, now seen corresponding path program 1 times [2023-11-29 04:56:01,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:01,612 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [428963933] [2023-11-29 04:56:01,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:01,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:01,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:01,675 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:01,675 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 04:56:01,675 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [428963933] [2023-11-29 04:56:01,676 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [428963933] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 04:56:01,676 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1889938935] [2023-11-29 04:56:01,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:01,676 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 04:56:01,676 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 04:56:01,677 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 04:56:01,679 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-29 04:56:01,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:01,725 INFO L262 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-29 04:56:01,726 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 04:56:01,733 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 04:56:01,733 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-29 04:56:01,734 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1889938935] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 04:56:01,734 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2023-11-29 04:56:01,734 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2023-11-29 04:56:01,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [115944275] [2023-11-29 04:56:01,735 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 04:56:01,735 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 04:56:01,735 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:01,735 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 2 times [2023-11-29 04:56:01,735 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:01,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963036261] [2023-11-29 04:56:01,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:01,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:01,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:01,739 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 04:56:01,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:01,742 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 04:56:01,773 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2023-11-29 04:56:01,782 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 04:56:01,782 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-29 04:56:01,783 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2023-11-29 04:56:01,783 INFO L87 Difference]: Start difference. First operand 10 states and 12 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:01,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 04:56:01,790 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2023-11-29 04:56:01,790 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2023-11-29 04:56:01,791 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:01,791 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 10 states and 11 transitions. [2023-11-29 04:56:01,791 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 04:56:01,792 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 04:56:01,792 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2023-11-29 04:56:01,792 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 04:56:01,792 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2023-11-29 04:56:01,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2023-11-29 04:56:01,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2023-11-29 04:56:01,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:01,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2023-11-29 04:56:01,793 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2023-11-29 04:56:01,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-29 04:56:01,794 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2023-11-29 04:56:01,795 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-29 04:56:01,795 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2023-11-29 04:56:01,795 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:01,795 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 04:56:01,795 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 04:56:01,796 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 04:56:01,796 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-29 04:56:01,796 INFO L748 eck$LassoCheckResult]: Stem: 171#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 172#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 168#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 169#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 170#L15-3 assume !(main_~i~0#1 < 1048); 164#L15-4 havoc main_~i~0#1; 165#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 173#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 166#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 167#L22-2 [2023-11-29 04:56:01,796 INFO L750 eck$LassoCheckResult]: Loop: 167#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 167#L22-2 [2023-11-29 04:56:01,796 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:01,797 INFO L85 PathProgramCache]: Analyzing trace with hash -369324308, now seen corresponding path program 1 times [2023-11-29 04:56:01,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:01,797 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347077388] [2023-11-29 04:56:01,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:01,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:01,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:01,847 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:01,848 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 04:56:01,848 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347077388] [2023-11-29 04:56:01,848 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [347077388] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 04:56:01,848 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1238513515] [2023-11-29 04:56:01,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:01,848 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 04:56:01,849 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 04:56:01,850 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 04:56:01,852 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-29 04:56:01,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:01,902 INFO L262 TraceCheckSpWp]: Trace formula consists of 50 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-29 04:56:01,903 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 04:56:01,917 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:01,917 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 04:56:01,938 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:01,939 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1238513515] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 04:56:01,939 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 04:56:01,939 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-29 04:56:01,939 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1551250830] [2023-11-29 04:56:01,939 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 04:56:01,940 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 04:56:01,940 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:01,940 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 3 times [2023-11-29 04:56:01,941 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:01,941 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155909500] [2023-11-29 04:56:01,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:01,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:01,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:01,944 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 04:56:01,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:01,947 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 04:56:01,960 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 04:56:01,960 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-29 04:56:01,961 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-29 04:56:01,961 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 2.2857142857142856) internal successors, (16), 7 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:01,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 04:56:01,989 INFO L93 Difference]: Finished difference Result 16 states and 17 transitions. [2023-11-29 04:56:01,989 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 17 transitions. [2023-11-29 04:56:01,990 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:01,990 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 17 transitions. [2023-11-29 04:56:01,990 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 04:56:01,991 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 04:56:01,991 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 17 transitions. [2023-11-29 04:56:01,991 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 04:56:01,991 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2023-11-29 04:56:01,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 17 transitions. [2023-11-29 04:56:01,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2023-11-29 04:56:01,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:01,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2023-11-29 04:56:01,993 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2023-11-29 04:56:01,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-29 04:56:01,994 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2023-11-29 04:56:01,994 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-29 04:56:01,994 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2023-11-29 04:56:01,995 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:01,995 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 04:56:01,995 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 04:56:01,996 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 04:56:01,996 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-29 04:56:01,996 INFO L748 eck$LassoCheckResult]: Stem: 256#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 257#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 250#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 251#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 252#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 253#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 263#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 262#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 261#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 260#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 259#L15-3 assume !(main_~i~0#1 < 1048); 248#L15-4 havoc main_~i~0#1; 249#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 258#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 254#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 255#L22-2 [2023-11-29 04:56:01,996 INFO L750 eck$LassoCheckResult]: Loop: 255#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 255#L22-2 [2023-11-29 04:56:01,996 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:01,996 INFO L85 PathProgramCache]: Analyzing trace with hash 1716187174, now seen corresponding path program 2 times [2023-11-29 04:56:01,997 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:01,997 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1483463279] [2023-11-29 04:56:01,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:01,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:02,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:02,103 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:02,104 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 04:56:02,104 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1483463279] [2023-11-29 04:56:02,104 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1483463279] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 04:56:02,104 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1326887804] [2023-11-29 04:56:02,104 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 04:56:02,104 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 04:56:02,104 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 04:56:02,106 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 04:56:02,111 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-29 04:56:02,170 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 04:56:02,171 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 04:56:02,171 INFO L262 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-29 04:56:02,173 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 04:56:02,196 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:02,196 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 04:56:02,260 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:02,261 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1326887804] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 04:56:02,261 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 04:56:02,261 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-29 04:56:02,261 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [664480093] [2023-11-29 04:56:02,261 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 04:56:02,262 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 04:56:02,262 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:02,262 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 4 times [2023-11-29 04:56:02,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:02,262 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1934234334] [2023-11-29 04:56:02,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:02,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:02,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:02,265 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 04:56:02,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:02,268 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 04:56:02,281 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 04:56:02,282 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-29 04:56:02,282 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2023-11-29 04:56:02,282 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 13 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:02,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 04:56:02,327 INFO L93 Difference]: Finished difference Result 28 states and 29 transitions. [2023-11-29 04:56:02,328 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 29 transitions. [2023-11-29 04:56:02,329 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:02,330 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 29 transitions. [2023-11-29 04:56:02,330 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 04:56:02,330 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 04:56:02,331 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 29 transitions. [2023-11-29 04:56:02,331 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 04:56:02,331 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2023-11-29 04:56:02,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 29 transitions. [2023-11-29 04:56:02,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2023-11-29 04:56:02,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:02,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2023-11-29 04:56:02,334 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2023-11-29 04:56:02,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-29 04:56:02,335 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2023-11-29 04:56:02,335 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-29 04:56:02,335 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2023-11-29 04:56:02,336 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:02,336 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 04:56:02,336 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 04:56:02,337 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 04:56:02,337 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-29 04:56:02,338 INFO L748 eck$LassoCheckResult]: Stem: 400#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 401#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 394#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 395#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 396#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 397#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 403#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 419#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 418#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 417#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 416#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 415#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 414#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 413#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 412#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 411#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 410#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 409#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 408#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 407#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 406#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 405#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 404#L15-3 assume !(main_~i~0#1 < 1048); 392#L15-4 havoc main_~i~0#1; 393#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 402#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 398#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 399#L22-2 [2023-11-29 04:56:02,338 INFO L750 eck$LassoCheckResult]: Loop: 399#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 399#L22-2 [2023-11-29 04:56:02,338 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:02,338 INFO L85 PathProgramCache]: Analyzing trace with hash 1328175130, now seen corresponding path program 3 times [2023-11-29 04:56:02,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:02,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [540975101] [2023-11-29 04:56:02,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:02,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:02,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:02,614 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:02,615 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 04:56:02,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [540975101] [2023-11-29 04:56:02,615 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [540975101] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 04:56:02,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [107228444] [2023-11-29 04:56:02,615 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 04:56:02,616 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 04:56:02,616 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 04:56:02,618 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 04:56:02,620 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-29 04:56:02,755 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2023-11-29 04:56:02,756 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 04:56:02,757 INFO L262 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-29 04:56:02,760 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 04:56:02,817 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:02,817 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 04:56:03,056 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:03,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [107228444] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 04:56:03,057 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 04:56:03,057 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2023-11-29 04:56:03,057 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1168971736] [2023-11-29 04:56:03,057 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 04:56:03,058 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 04:56:03,058 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:03,058 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 5 times [2023-11-29 04:56:03,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:03,059 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1893400619] [2023-11-29 04:56:03,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:03,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:03,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:03,061 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 04:56:03,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:03,064 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 04:56:03,080 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 04:56:03,080 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-29 04:56:03,081 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2023-11-29 04:56:03,081 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 2.08) internal successors, (52), 25 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:03,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 04:56:03,175 INFO L93 Difference]: Finished difference Result 52 states and 53 transitions. [2023-11-29 04:56:03,175 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 53 transitions. [2023-11-29 04:56:03,177 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:03,178 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 52 states and 53 transitions. [2023-11-29 04:56:03,178 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 04:56:03,179 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 04:56:03,179 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 53 transitions. [2023-11-29 04:56:03,179 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 04:56:03,179 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2023-11-29 04:56:03,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 53 transitions. [2023-11-29 04:56:03,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2023-11-29 04:56:03,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 51 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:03,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2023-11-29 04:56:03,184 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2023-11-29 04:56:03,184 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2023-11-29 04:56:03,185 INFO L428 stractBuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2023-11-29 04:56:03,185 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-29 04:56:03,185 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 53 transitions. [2023-11-29 04:56:03,187 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:03,187 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 04:56:03,187 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 04:56:03,189 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 04:56:03,189 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-29 04:56:03,190 INFO L748 eck$LassoCheckResult]: Stem: 664#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 665#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 658#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 659#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 660#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 661#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 667#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 707#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 706#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 705#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 704#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 703#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 702#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 701#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 700#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 699#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 698#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 697#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 696#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 695#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 694#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 693#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 692#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 691#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 690#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 689#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 688#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 687#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 686#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 685#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 684#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 683#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 682#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 681#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 680#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 679#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 678#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 677#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 676#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 675#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 674#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 673#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 672#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 671#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 670#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 669#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 668#L15-3 assume !(main_~i~0#1 < 1048); 656#L15-4 havoc main_~i~0#1; 657#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 666#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 662#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 663#L22-2 [2023-11-29 04:56:03,190 INFO L750 eck$LassoCheckResult]: Loop: 663#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 663#L22-2 [2023-11-29 04:56:03,190 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:03,190 INFO L85 PathProgramCache]: Analyzing trace with hash 1458388482, now seen corresponding path program 4 times [2023-11-29 04:56:03,190 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:03,191 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2050086563] [2023-11-29 04:56:03,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:03,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:03,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:03,781 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:03,782 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 04:56:03,782 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2050086563] [2023-11-29 04:56:03,782 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2050086563] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 04:56:03,782 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1315201076] [2023-11-29 04:56:03,782 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 04:56:03,782 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 04:56:03,782 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 04:56:03,785 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 04:56:03,791 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-29 04:56:03,901 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 04:56:03,902 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 04:56:03,903 INFO L262 TraceCheckSpWp]: Trace formula consists of 281 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-29 04:56:03,907 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 04:56:04,004 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:04,004 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 04:56:04,788 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:04,788 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1315201076] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 04:56:04,788 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 04:56:04,788 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2023-11-29 04:56:04,788 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1748368040] [2023-11-29 04:56:04,789 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 04:56:04,789 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 04:56:04,789 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:04,790 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 6 times [2023-11-29 04:56:04,790 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:04,790 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1381338447] [2023-11-29 04:56:04,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:04,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:04,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:04,793 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 04:56:04,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:04,796 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 04:56:04,808 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 04:56:04,809 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2023-11-29 04:56:04,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2023-11-29 04:56:04,811 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 2.0408163265306123) internal successors, (100), 49 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:04,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 04:56:04,975 INFO L93 Difference]: Finished difference Result 100 states and 101 transitions. [2023-11-29 04:56:04,975 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 101 transitions. [2023-11-29 04:56:04,977 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:04,978 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 101 transitions. [2023-11-29 04:56:04,978 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 04:56:04,979 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 04:56:04,979 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 101 transitions. [2023-11-29 04:56:04,979 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 04:56:04,979 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2023-11-29 04:56:04,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 101 transitions. [2023-11-29 04:56:04,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2023-11-29 04:56:04,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.01) internal successors, (101), 99 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:04,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2023-11-29 04:56:04,986 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2023-11-29 04:56:04,987 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-29 04:56:04,987 INFO L428 stractBuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2023-11-29 04:56:04,987 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-29 04:56:04,987 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 101 transitions. [2023-11-29 04:56:04,989 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:04,989 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 04:56:04,989 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 04:56:04,992 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 04:56:04,992 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-29 04:56:04,993 INFO L748 eck$LassoCheckResult]: Stem: 1168#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1169#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 1162#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1163#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1164#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1165#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1171#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1259#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1258#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1257#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1256#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1255#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1254#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1253#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1252#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1251#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1250#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1249#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1248#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1247#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1246#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1245#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1244#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1243#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1242#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1241#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1240#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1239#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1238#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1237#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1236#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1235#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1234#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1233#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1232#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1231#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1230#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1229#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1228#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1227#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1226#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1225#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1224#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1223#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1222#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1221#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1220#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1219#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1218#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1217#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1216#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1215#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1214#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1213#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1212#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1211#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1210#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1209#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1208#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1207#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1206#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1205#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1204#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1203#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1202#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1201#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1200#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1199#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1198#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1197#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1196#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1195#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1194#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1193#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1192#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1191#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1190#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1189#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1188#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1187#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1186#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1185#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1184#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1183#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1182#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1181#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1180#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1179#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1178#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1177#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1176#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1175#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1174#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1173#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1172#L15-3 assume !(main_~i~0#1 < 1048); 1160#L15-4 havoc main_~i~0#1; 1161#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 1170#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 1166#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 1167#L22-2 [2023-11-29 04:56:04,993 INFO L750 eck$LassoCheckResult]: Loop: 1167#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 1167#L22-2 [2023-11-29 04:56:04,993 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:04,993 INFO L85 PathProgramCache]: Analyzing trace with hash 546267602, now seen corresponding path program 5 times [2023-11-29 04:56:04,994 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:04,994 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1470529403] [2023-11-29 04:56:04,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:04,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:05,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:07,120 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:07,120 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 04:56:07,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1470529403] [2023-11-29 04:56:07,121 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1470529403] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 04:56:07,121 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [557997739] [2023-11-29 04:56:07,121 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 04:56:07,121 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 04:56:07,121 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 04:56:07,122 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 04:56:07,128 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-29 04:56:31,853 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2023-11-29 04:56:31,853 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 04:56:31,870 INFO L262 TraceCheckSpWp]: Trace formula consists of 545 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-29 04:56:31,874 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 04:56:32,045 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:32,045 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 04:56:34,423 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:34,424 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [557997739] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 04:56:34,424 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 04:56:34,424 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2023-11-29 04:56:34,424 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [468399685] [2023-11-29 04:56:34,424 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 04:56:34,425 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 04:56:34,425 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:34,425 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 7 times [2023-11-29 04:56:34,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:34,426 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [300783218] [2023-11-29 04:56:34,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:34,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:34,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:34,428 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 04:56:34,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 04:56:34,429 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 04:56:34,439 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 04:56:34,440 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2023-11-29 04:56:34,443 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2023-11-29 04:56:34,444 INFO L87 Difference]: Start difference. First operand 100 states and 101 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 2.020618556701031) internal successors, (196), 97 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:34,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 04:56:34,792 INFO L93 Difference]: Finished difference Result 196 states and 197 transitions. [2023-11-29 04:56:34,792 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 196 states and 197 transitions. [2023-11-29 04:56:34,795 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:34,797 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 196 states to 196 states and 197 transitions. [2023-11-29 04:56:34,798 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 04:56:34,798 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 04:56:34,798 INFO L73 IsDeterministic]: Start isDeterministic. Operand 196 states and 197 transitions. [2023-11-29 04:56:34,799 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 04:56:34,799 INFO L218 hiAutomatonCegarLoop]: Abstraction has 196 states and 197 transitions. [2023-11-29 04:56:34,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states and 197 transitions. [2023-11-29 04:56:34,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2023-11-29 04:56:34,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0051020408163265) internal successors, (197), 195 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 04:56:34,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 197 transitions. [2023-11-29 04:56:34,810 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 197 transitions. [2023-11-29 04:56:34,811 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2023-11-29 04:56:34,811 INFO L428 stractBuchiCegarLoop]: Abstraction has 196 states and 197 transitions. [2023-11-29 04:56:34,811 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-29 04:56:34,812 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 197 transitions. [2023-11-29 04:56:34,813 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-11-29 04:56:34,813 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 04:56:34,813 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 04:56:34,817 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 04:56:34,817 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-11-29 04:56:34,818 INFO L748 eck$LassoCheckResult]: Stem: 2152#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2153#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 2146#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2147#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2148#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2149#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2155#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2339#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2338#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2337#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2336#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2335#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2334#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2333#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2332#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2331#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2330#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2329#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2328#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2327#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2326#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2325#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2324#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2323#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2322#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2321#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2320#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2319#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2318#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2317#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2316#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2315#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2314#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2313#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2312#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2311#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2310#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2309#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2308#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2307#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2306#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2305#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2304#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2303#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2302#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2301#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2300#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2299#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2298#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2297#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2296#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2295#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2294#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2293#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2292#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2291#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2290#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2289#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2288#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2287#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2286#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2285#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2284#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2283#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2282#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2281#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2280#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2279#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2278#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2277#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2276#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2275#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2274#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2273#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2272#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2271#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2270#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2269#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2268#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2267#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2266#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2265#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2264#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2263#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2262#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2261#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2260#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2259#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2258#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2257#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2256#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2255#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2254#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2253#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2252#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2251#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2250#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2249#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2248#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2247#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2246#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2245#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2244#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2243#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2242#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2241#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2240#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2239#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2238#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2237#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2236#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2235#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2234#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2233#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2232#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2231#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2230#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2229#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2228#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2227#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2226#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2225#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2224#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2223#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2222#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2221#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2220#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2219#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2218#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2217#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2216#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2215#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2214#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2213#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2212#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2211#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2210#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2209#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2208#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2207#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2206#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2205#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2204#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2203#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2202#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2201#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2200#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2199#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2198#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2197#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2196#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2195#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2194#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2193#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2192#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2191#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2190#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2189#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2188#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2187#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2186#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2185#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2184#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2183#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2182#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2181#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2180#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2179#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2178#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2177#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2176#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2175#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2174#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2173#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2172#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2171#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2170#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2169#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2168#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2167#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2166#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2165#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2164#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2163#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2162#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2161#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2160#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2159#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2158#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet2#1;call write~int#0(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2157#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2156#L15-3 assume !(main_~i~0#1 < 1048); 2144#L15-4 havoc main_~i~0#1; 2145#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 2154#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 2150#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 2151#L22-2 [2023-11-29 04:56:34,818 INFO L750 eck$LassoCheckResult]: Loop: 2151#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 2151#L22-2 [2023-11-29 04:56:34,818 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 04:56:34,818 INFO L85 PathProgramCache]: Analyzing trace with hash 1352993138, now seen corresponding path program 6 times [2023-11-29 04:56:34,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 04:56:34,818 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [380283349] [2023-11-29 04:56:34,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 04:56:34,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 04:56:35,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 04:56:40,260 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 04:56:40,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 04:56:40,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [380283349] [2023-11-29 04:56:40,261 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [380283349] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 04:56:40,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [678339368] [2023-11-29 04:56:40,261 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 04:56:40,261 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 04:56:40,261 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 04:56:40,262 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 04:56:40,263 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2bbb8fe7-9f8d-45a8-9107-445f89a99a7f/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process