./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ef4a52e45666a829b602608a46cff9c8137910dd58bdfaebe016ce17984d1ac8 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-29 02:00:34,678 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-29 02:00:34,738 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-29 02:00:34,744 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-29 02:00:34,744 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-29 02:00:34,767 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-29 02:00:34,768 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-29 02:00:34,768 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-29 02:00:34,769 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-29 02:00:34,770 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-29 02:00:34,770 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-29 02:00:34,771 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-29 02:00:34,771 INFO L153 SettingsManager]: * Use SBE=true [2023-11-29 02:00:34,772 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-29 02:00:34,773 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-29 02:00:34,773 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-29 02:00:34,774 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-29 02:00:34,774 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-29 02:00:34,775 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-29 02:00:34,775 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-29 02:00:34,776 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-29 02:00:34,779 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-29 02:00:34,780 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-29 02:00:34,780 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-29 02:00:34,781 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-29 02:00:34,781 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-29 02:00:34,782 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-29 02:00:34,782 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-29 02:00:34,783 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-29 02:00:34,783 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-29 02:00:34,783 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-29 02:00:34,784 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-29 02:00:34,784 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-29 02:00:34,784 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-29 02:00:34,785 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-29 02:00:34,785 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-29 02:00:34,785 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-29 02:00:34,786 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-29 02:00:34,786 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ef4a52e45666a829b602608a46cff9c8137910dd58bdfaebe016ce17984d1ac8 [2023-11-29 02:00:34,984 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-29 02:00:35,018 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-29 02:00:35,021 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-29 02:00:35,022 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-29 02:00:35,022 INFO L274 PluginConnector]: CDTParser initialized [2023-11-29 02:00:35,023 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/../../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c [2023-11-29 02:00:37,710 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-29 02:00:37,887 INFO L384 CDTParser]: Found 1 translation units. [2023-11-29 02:00:37,888 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c [2023-11-29 02:00:37,893 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/data/93abd1c0d/a85b3ad1d39841a5a1553c5ece1b5778/FLAG83fdaf9c7 [2023-11-29 02:00:37,903 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/data/93abd1c0d/a85b3ad1d39841a5a1553c5ece1b5778 [2023-11-29 02:00:37,906 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-29 02:00:37,907 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-29 02:00:37,908 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-29 02:00:37,908 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-29 02:00:37,912 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-29 02:00:37,913 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 02:00:37" (1/1) ... [2023-11-29 02:00:37,914 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@10500e3e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:37, skipping insertion in model container [2023-11-29 02:00:37,914 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 02:00:37" (1/1) ... [2023-11-29 02:00:37,931 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-29 02:00:38,056 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 02:00:38,067 INFO L202 MainTranslator]: Completed pre-run [2023-11-29 02:00:38,084 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 02:00:38,098 INFO L206 MainTranslator]: Completed translation [2023-11-29 02:00:38,099 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38 WrapperNode [2023-11-29 02:00:38,099 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-29 02:00:38,100 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-29 02:00:38,101 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-29 02:00:38,101 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-29 02:00:38,108 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,115 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,134 INFO L138 Inliner]: procedures = 8, calls = 14, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 65 [2023-11-29 02:00:38,135 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-29 02:00:38,136 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-29 02:00:38,136 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-29 02:00:38,136 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-29 02:00:38,145 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,145 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,147 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,161 INFO L175 MemorySlicer]: Split 3 memory accesses to 2 slices as follows [1, 2]. 67 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 1 writes are split as follows [0, 1]. [2023-11-29 02:00:38,161 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,161 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,166 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,169 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,170 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,171 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,174 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-29 02:00:38,175 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-29 02:00:38,175 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-29 02:00:38,175 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-29 02:00:38,176 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (1/1) ... [2023-11-29 02:00:38,182 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:38,193 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:38,210 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:00:38,217 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-29 02:00:38,249 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-29 02:00:38,250 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-29 02:00:38,250 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-29 02:00:38,250 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-29 02:00:38,251 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-29 02:00:38,251 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-29 02:00:38,251 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-29 02:00:38,251 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-29 02:00:38,319 INFO L241 CfgBuilder]: Building ICFG [2023-11-29 02:00:38,321 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-29 02:00:38,430 INFO L282 CfgBuilder]: Performing block encoding [2023-11-29 02:00:38,437 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-29 02:00:38,438 INFO L309 CfgBuilder]: Removed 3 assume(true) statements. [2023-11-29 02:00:38,439 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 02:00:38 BoogieIcfgContainer [2023-11-29 02:00:38,439 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-29 02:00:38,440 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-29 02:00:38,440 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-29 02:00:38,443 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-29 02:00:38,443 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 02:00:38,443 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 29.11 02:00:37" (1/3) ... [2023-11-29 02:00:38,444 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5d184550 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 02:00:38, skipping insertion in model container [2023-11-29 02:00:38,444 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 02:00:38,444 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:00:38" (2/3) ... [2023-11-29 02:00:38,445 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5d184550 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 02:00:38, skipping insertion in model container [2023-11-29 02:00:38,445 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 02:00:38,445 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 02:00:38" (3/3) ... [2023-11-29 02:00:38,446 INFO L332 chiAutomizerObserver]: Analyzing ICFG ArraysWithLenghtAtDeclaration.c [2023-11-29 02:00:38,493 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-29 02:00:38,494 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-29 02:00:38,494 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-29 02:00:38,494 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-29 02:00:38,494 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-29 02:00:38,494 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-29 02:00:38,494 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-29 02:00:38,495 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-29 02:00:38,498 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:38,510 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-29 02:00:38,511 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:38,511 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:38,515 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-29 02:00:38,515 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2023-11-29 02:00:38,515 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-29 02:00:38,515 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:38,517 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-29 02:00:38,517 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:38,517 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:38,517 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-29 02:00:38,517 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2023-11-29 02:00:38,523 INFO L748 eck$LassoCheckResult]: Stem: 15#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 16#L26-3true [2023-11-29 02:00:38,523 INFO L750 eck$LassoCheckResult]: Loop: 16#L26-3true assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8#L17-3true assume !(foo_~i~0#1 <= foo_~size#1); 9#L17-4true foo_#res#1 := foo_~i~0#1; 3#foo_returnLabel#1true main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14#L26-2true main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16#L26-3true [2023-11-29 02:00:38,527 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:38,528 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-29 02:00:38,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:38,537 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1072829432] [2023-11-29 02:00:38,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:38,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:38,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:38,639 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:38,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:38,665 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:38,667 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:38,668 INFO L85 PathProgramCache]: Analyzing trace with hash 38364915, now seen corresponding path program 1 times [2023-11-29 02:00:38,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:38,668 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2137830198] [2023-11-29 02:00:38,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:38,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:38,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:38,694 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:38,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:38,711 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:38,712 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:38,712 INFO L85 PathProgramCache]: Analyzing trace with hash 1809804401, now seen corresponding path program 1 times [2023-11-29 02:00:38,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:38,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62797915] [2023-11-29 02:00:38,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:38,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:38,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:38,894 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:00:38,894 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:00:38,895 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [62797915] [2023-11-29 02:00:38,896 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [62797915] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 02:00:38,896 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 02:00:38,897 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-29 02:00:38,897 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1959076739] [2023-11-29 02:00:38,898 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 02:00:39,057 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:00:39,090 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-29 02:00:39,091 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-29 02:00:39,093 INFO L87 Difference]: Start difference. First operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:39,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:00:39,159 INFO L93 Difference]: Finished difference Result 30 states and 35 transitions. [2023-11-29 02:00:39,161 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 35 transitions. [2023-11-29 02:00:39,163 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 11 [2023-11-29 02:00:39,167 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 23 states and 26 transitions. [2023-11-29 02:00:39,168 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2023-11-29 02:00:39,168 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2023-11-29 02:00:39,169 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 26 transitions. [2023-11-29 02:00:39,169 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:00:39,169 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 26 transitions. [2023-11-29 02:00:39,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 26 transitions. [2023-11-29 02:00:39,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 14. [2023-11-29 02:00:39,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 13 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:39,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 16 transitions. [2023-11-29 02:00:39,196 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 16 transitions. [2023-11-29 02:00:39,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-29 02:00:39,201 INFO L428 stractBuchiCegarLoop]: Abstraction has 14 states and 16 transitions. [2023-11-29 02:00:39,201 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-29 02:00:39,202 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 16 transitions. [2023-11-29 02:00:39,202 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-29 02:00:39,202 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:39,203 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:39,203 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-29 02:00:39,203 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-29 02:00:39,204 INFO L748 eck$LassoCheckResult]: Stem: 70#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 71#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 73#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 72#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 61#L17-2 [2023-11-29 02:00:39,204 INFO L750 eck$LassoCheckResult]: Loop: 61#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 62#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 61#L17-2 [2023-11-29 02:00:39,204 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:39,205 INFO L85 PathProgramCache]: Analyzing trace with hash 925771, now seen corresponding path program 1 times [2023-11-29 02:00:39,205 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:39,205 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077455766] [2023-11-29 02:00:39,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:39,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:39,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:39,222 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:39,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:39,238 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:39,238 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:39,239 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 1 times [2023-11-29 02:00:39,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:39,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [217141636] [2023-11-29 02:00:39,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:39,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:39,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:39,246 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:39,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:39,253 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:39,253 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:39,254 INFO L85 PathProgramCache]: Analyzing trace with hash 889666569, now seen corresponding path program 1 times [2023-11-29 02:00:39,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:39,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091658536] [2023-11-29 02:00:39,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:39,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:39,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:39,395 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:00:39,396 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:00:39,396 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1091658536] [2023-11-29 02:00:39,396 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1091658536] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:00:39,396 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [743013527] [2023-11-29 02:00:39,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:39,397 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:00:39,397 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:39,400 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:00:39,407 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-29 02:00:39,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:39,468 INFO L262 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-29 02:00:39,470 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:39,528 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:00:39,528 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-29 02:00:39,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [743013527] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 02:00:39,529 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2023-11-29 02:00:39,529 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 7 [2023-11-29 02:00:39,529 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2120341741] [2023-11-29 02:00:39,530 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 02:00:39,589 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:00:39,590 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-29 02:00:39,591 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2023-11-29 02:00:39,591 INFO L87 Difference]: Start difference. First operand 14 states and 16 transitions. cyclomatic complexity: 4 Second operand has 5 states, 4 states have (on average 1.5) internal successors, (6), 5 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:39,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:00:39,652 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2023-11-29 02:00:39,652 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22 states and 24 transitions. [2023-11-29 02:00:39,654 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-29 02:00:39,654 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22 states to 22 states and 24 transitions. [2023-11-29 02:00:39,654 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2023-11-29 02:00:39,655 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2023-11-29 02:00:39,655 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 24 transitions. [2023-11-29 02:00:39,655 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:00:39,655 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 24 transitions. [2023-11-29 02:00:39,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 24 transitions. [2023-11-29 02:00:39,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 16. [2023-11-29 02:00:39,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.125) internal successors, (18), 15 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:39,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 18 transitions. [2023-11-29 02:00:39,658 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 18 transitions. [2023-11-29 02:00:39,658 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-29 02:00:39,659 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 18 transitions. [2023-11-29 02:00:39,659 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-29 02:00:39,659 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 18 transitions. [2023-11-29 02:00:39,660 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2023-11-29 02:00:39,660 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:39,660 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:39,660 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2023-11-29 02:00:39,660 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2023-11-29 02:00:39,661 INFO L748 eck$LassoCheckResult]: Stem: 138#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 139#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 140#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 141#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 142#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 144#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 143#L17-4 [2023-11-29 02:00:39,661 INFO L750 eck$LassoCheckResult]: Loop: 143#L17-4 foo_#res#1 := foo_~i~0#1; 131#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 132#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 136#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 130#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 143#L17-4 [2023-11-29 02:00:39,661 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:39,661 INFO L85 PathProgramCache]: Analyzing trace with hash 889666567, now seen corresponding path program 1 times [2023-11-29 02:00:39,661 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:39,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1490262221] [2023-11-29 02:00:39,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:39,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:39,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:39,675 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:39,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:39,686 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:39,686 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:39,687 INFO L85 PathProgramCache]: Analyzing trace with hash 51595455, now seen corresponding path program 2 times [2023-11-29 02:00:39,687 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:39,687 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [548923153] [2023-11-29 02:00:39,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:39,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:39,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:39,696 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:39,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:39,705 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:39,706 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:39,706 INFO L85 PathProgramCache]: Analyzing trace with hash 1198432377, now seen corresponding path program 1 times [2023-11-29 02:00:39,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:39,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472040964] [2023-11-29 02:00:39,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:39,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:39,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:39,800 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:00:39,801 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:00:39,801 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472040964] [2023-11-29 02:00:39,801 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [472040964] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:00:39,801 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1067030784] [2023-11-29 02:00:39,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:39,802 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:00:39,802 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:39,829 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:00:39,831 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-29 02:00:39,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:39,894 INFO L262 TraceCheckSpWp]: Trace formula consists of 84 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-29 02:00:39,895 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:39,942 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:00:39,942 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:00:39,996 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:00:39,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1067030784] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:00:39,996 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:00:39,997 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 8 [2023-11-29 02:00:39,997 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522467030] [2023-11-29 02:00:39,997 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:00:40,140 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:00:40,141 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-29 02:00:40,141 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2023-11-29 02:00:40,142 INFO L87 Difference]: Start difference. First operand 16 states and 18 transitions. cyclomatic complexity: 4 Second operand has 9 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:40,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:00:40,252 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2023-11-29 02:00:40,252 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 27 transitions. [2023-11-29 02:00:40,253 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 02:00:40,254 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 25 states and 27 transitions. [2023-11-29 02:00:40,254 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2023-11-29 02:00:40,254 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2023-11-29 02:00:40,255 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25 states and 27 transitions. [2023-11-29 02:00:40,255 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:00:40,255 INFO L218 hiAutomatonCegarLoop]: Abstraction has 25 states and 27 transitions. [2023-11-29 02:00:40,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states and 27 transitions. [2023-11-29 02:00:40,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 19. [2023-11-29 02:00:40,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.105263157894737) internal successors, (21), 18 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:40,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2023-11-29 02:00:40,257 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 21 transitions. [2023-11-29 02:00:40,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-29 02:00:40,259 INFO L428 stractBuchiCegarLoop]: Abstraction has 19 states and 21 transitions. [2023-11-29 02:00:40,259 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-29 02:00:40,259 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 21 transitions. [2023-11-29 02:00:40,260 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 02:00:40,260 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:40,260 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:40,260 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2023-11-29 02:00:40,260 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 1, 1, 1, 1, 1] [2023-11-29 02:00:40,260 INFO L748 eck$LassoCheckResult]: Stem: 259#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 260#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 261#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 263#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 268#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 266#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 264#L17-4 [2023-11-29 02:00:40,261 INFO L750 eck$LassoCheckResult]: Loop: 264#L17-4 foo_#res#1 := foo_~i~0#1; 252#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 253#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 257#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 265#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 250#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 251#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 262#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 267#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 264#L17-4 [2023-11-29 02:00:40,261 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:40,261 INFO L85 PathProgramCache]: Analyzing trace with hash 889666567, now seen corresponding path program 2 times [2023-11-29 02:00:40,261 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:40,262 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [826464901] [2023-11-29 02:00:40,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:40,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:40,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:40,273 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:40,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:40,282 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:40,282 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:40,282 INFO L85 PathProgramCache]: Analyzing trace with hash 1121476027, now seen corresponding path program 1 times [2023-11-29 02:00:40,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:40,283 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [49847322] [2023-11-29 02:00:40,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:40,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:40,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:40,294 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:40,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:40,305 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:40,305 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:40,305 INFO L85 PathProgramCache]: Analyzing trace with hash -1242740619, now seen corresponding path program 2 times [2023-11-29 02:00:40,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:40,306 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592957497] [2023-11-29 02:00:40,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:40,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:40,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:40,327 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:40,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:40,347 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:40,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2023-11-29 02:00:40,855 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2023-11-29 02:00:40,960 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 02:00:40,961 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 02:00:40,961 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 02:00:40,961 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 02:00:40,961 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 02:00:40,961 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:40,962 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 02:00:40,962 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 02:00:40,962 INFO L133 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration4_Lasso [2023-11-29 02:00:40,962 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 02:00:40,962 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 02:00:40,981 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:40,992 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:41,285 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:41,288 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:41,291 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:41,293 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:41,297 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:41,319 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:41,321 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:41,323 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:41,326 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:41,328 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:41,628 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 02:00:41,632 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 02:00:41,634 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:41,634 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:41,637 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:00:41,638 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-29 02:00:41,639 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:00:41,652 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:00:41,653 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:00:41,653 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:00:41,653 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:00:41,662 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:00:41,662 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:00:41,668 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 02:00:41,676 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2023-11-29 02:00:41,676 INFO L444 ModelExtractionUtils]: 3 out of 7 variables were initially zero. Simplification set additionally 1 variables to zero. [2023-11-29 02:00:41,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:41,678 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:41,690 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:00:41,696 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-29 02:00:41,696 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 02:00:41,710 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-29 02:00:41,711 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 02:00:41,711 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1) = -2*ULTIMATE.start_main_~i~1#1 + 1 Supporting invariants [] [2023-11-29 02:00:41,721 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2023-11-29 02:00:41,740 INFO L156 tatePredicateManager]: 6 out of 6 supporting invariants were superfluous and have been removed [2023-11-29 02:00:41,758 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:41,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:41,774 INFO L262 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-29 02:00:41,775 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:41,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:41,801 INFO L262 TraceCheckSpWp]: Trace formula consists of 52 conjuncts, 9 conjunts are in the unsatisfiable core [2023-11-29 02:00:41,802 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:41,902 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:00:41,905 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 5 loop predicates [2023-11-29 02:00:41,907 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 19 states and 21 transitions. cyclomatic complexity: 4 Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:42,023 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 19 states and 21 transitions. cyclomatic complexity: 4. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 41 states and 47 transitions. Complement of second has 13 states. [2023-11-29 02:00:42,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 7 states 1 stem states 5 non-accepting loop states 1 accepting loop states [2023-11-29 02:00:42,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:42,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 24 transitions. [2023-11-29 02:00:42,027 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 24 transitions. Stem has 6 letters. Loop has 9 letters. [2023-11-29 02:00:42,028 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:00:42,028 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 24 transitions. Stem has 15 letters. Loop has 9 letters. [2023-11-29 02:00:42,028 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:00:42,028 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 24 transitions. Stem has 6 letters. Loop has 18 letters. [2023-11-29 02:00:42,029 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:00:42,029 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 47 transitions. [2023-11-29 02:00:42,030 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2023-11-29 02:00:42,031 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 40 states and 46 transitions. [2023-11-29 02:00:42,031 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2023-11-29 02:00:42,032 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2023-11-29 02:00:42,032 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 46 transitions. [2023-11-29 02:00:42,032 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:00:42,032 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 46 transitions. [2023-11-29 02:00:42,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 46 transitions. [2023-11-29 02:00:42,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 34. [2023-11-29 02:00:42,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 33 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:42,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 40 transitions. [2023-11-29 02:00:42,035 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34 states and 40 transitions. [2023-11-29 02:00:42,036 INFO L428 stractBuchiCegarLoop]: Abstraction has 34 states and 40 transitions. [2023-11-29 02:00:42,036 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-29 02:00:42,036 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 40 transitions. [2023-11-29 02:00:42,037 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2023-11-29 02:00:42,037 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:42,037 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:42,037 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:00:42,037 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2023-11-29 02:00:42,038 INFO L748 eck$LassoCheckResult]: Stem: 428#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 429#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 432#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 433#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 441#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 439#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 437#L17-4 foo_#res#1 := foo_~i~0#1; 418#foo_returnLabel#1 [2023-11-29 02:00:42,038 INFO L750 eck$LassoCheckResult]: Loop: 418#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 419#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 425#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 430#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 414#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 415#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 447#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 446#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 445#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 444#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 435#L17-4 foo_#res#1 := foo_~i~0#1; 418#foo_returnLabel#1 [2023-11-29 02:00:42,038 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:42,038 INFO L85 PathProgramCache]: Analyzing trace with hash 1809859825, now seen corresponding path program 1 times [2023-11-29 02:00:42,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:42,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453937182] [2023-11-29 02:00:42,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:42,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:42,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:42,049 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:42,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:42,058 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:42,058 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:42,058 INFO L85 PathProgramCache]: Analyzing trace with hash 961271861, now seen corresponding path program 2 times [2023-11-29 02:00:42,059 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:42,059 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695739279] [2023-11-29 02:00:42,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:42,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:42,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:42,072 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:42,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:42,084 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:42,084 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:42,085 INFO L85 PathProgramCache]: Analyzing trace with hash 132390213, now seen corresponding path program 3 times [2023-11-29 02:00:42,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:42,085 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1385434297] [2023-11-29 02:00:42,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:42,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:42,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:42,210 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 10 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:00:42,211 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:00:42,211 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1385434297] [2023-11-29 02:00:42,211 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1385434297] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:00:42,211 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [360271521] [2023-11-29 02:00:42,212 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 02:00:42,212 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:00:42,212 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:42,213 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:00:42,216 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-29 02:00:42,290 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2023-11-29 02:00:42,290 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:00:42,291 INFO L262 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 8 conjunts are in the unsatisfiable core [2023-11-29 02:00:42,293 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:42,371 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:00:42,371 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:00:42,425 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:00:42,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [360271521] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:00:42,426 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:00:42,426 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 12 [2023-11-29 02:00:42,426 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2141345599] [2023-11-29 02:00:42,426 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:00:42,456 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2023-11-29 02:00:42,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 32 [2023-11-29 02:00:42,805 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:00:42,806 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2023-11-29 02:00:42,806 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2023-11-29 02:00:42,807 INFO L87 Difference]: Start difference. First operand 34 states and 40 transitions. cyclomatic complexity: 9 Second operand has 12 states, 12 states have (on average 2.9166666666666665) internal successors, (35), 12 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:42,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:00:42,944 INFO L93 Difference]: Finished difference Result 62 states and 69 transitions. [2023-11-29 02:00:42,944 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 62 states and 69 transitions. [2023-11-29 02:00:42,946 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2023-11-29 02:00:42,947 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 62 states to 57 states and 64 transitions. [2023-11-29 02:00:42,947 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 34 [2023-11-29 02:00:42,948 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 34 [2023-11-29 02:00:42,948 INFO L73 IsDeterministic]: Start isDeterministic. Operand 57 states and 64 transitions. [2023-11-29 02:00:42,948 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:00:42,948 INFO L218 hiAutomatonCegarLoop]: Abstraction has 57 states and 64 transitions. [2023-11-29 02:00:42,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states and 64 transitions. [2023-11-29 02:00:42,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 45. [2023-11-29 02:00:42,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 45 states have (on average 1.1333333333333333) internal successors, (51), 44 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:42,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 51 transitions. [2023-11-29 02:00:42,953 INFO L240 hiAutomatonCegarLoop]: Abstraction has 45 states and 51 transitions. [2023-11-29 02:00:42,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2023-11-29 02:00:42,954 INFO L428 stractBuchiCegarLoop]: Abstraction has 45 states and 51 transitions. [2023-11-29 02:00:42,954 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-29 02:00:42,954 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 51 transitions. [2023-11-29 02:00:42,955 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2023-11-29 02:00:42,956 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:42,956 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:42,956 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:00:42,956 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:00:42,957 INFO L748 eck$LassoCheckResult]: Stem: 653#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 654#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 655#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 659#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 668#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 664#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 665#L17-4 foo_#res#1 := foo_~i~0#1; 643#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 644#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 650#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 652#L26-4 main_~i~1#1 := 0; 647#L29-3 [2023-11-29 02:00:42,957 INFO L750 eck$LassoCheckResult]: Loop: 647#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 648#L30 assume !(main_#t~mem5#1 != main_~i~1#1);havoc main_#t~mem5#1; 649#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 647#L29-3 [2023-11-29 02:00:42,957 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:42,957 INFO L85 PathProgramCache]: Analyzing trace with hash 1198432331, now seen corresponding path program 1 times [2023-11-29 02:00:42,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:42,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754717747] [2023-11-29 02:00:42,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:42,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:42,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:43,013 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:00:43,014 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:00:43,014 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1754717747] [2023-11-29 02:00:43,014 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1754717747] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:00:43,014 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2042012636] [2023-11-29 02:00:43,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:43,015 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:00:43,015 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:43,016 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:00:43,018 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-29 02:00:43,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:43,077 INFO L262 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 5 conjunts are in the unsatisfiable core [2023-11-29 02:00:43,078 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:43,095 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:00:43,095 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:00:43,134 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:00:43,134 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2042012636] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:00:43,135 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:00:43,135 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-29 02:00:43,135 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1663494231] [2023-11-29 02:00:43,135 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:00:43,136 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:00:43,136 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:43,136 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 1 times [2023-11-29 02:00:43,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:43,137 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173592835] [2023-11-29 02:00:43,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:43,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:43,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:43,141 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:43,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:43,144 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:43,186 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:00:43,187 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-29 02:00:43,187 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2023-11-29 02:00:43,187 INFO L87 Difference]: Start difference. First operand 45 states and 51 transitions. cyclomatic complexity: 9 Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:43,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:00:43,261 INFO L93 Difference]: Finished difference Result 85 states and 95 transitions. [2023-11-29 02:00:43,261 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 95 transitions. [2023-11-29 02:00:43,263 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2023-11-29 02:00:43,264 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 82 states and 92 transitions. [2023-11-29 02:00:43,264 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2023-11-29 02:00:43,264 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2023-11-29 02:00:43,264 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 92 transitions. [2023-11-29 02:00:43,264 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:00:43,265 INFO L218 hiAutomatonCegarLoop]: Abstraction has 82 states and 92 transitions. [2023-11-29 02:00:43,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 92 transitions. [2023-11-29 02:00:43,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 66. [2023-11-29 02:00:43,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 1.1363636363636365) internal successors, (75), 65 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:43,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 75 transitions. [2023-11-29 02:00:43,270 INFO L240 hiAutomatonCegarLoop]: Abstraction has 66 states and 75 transitions. [2023-11-29 02:00:43,270 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-29 02:00:43,271 INFO L428 stractBuchiCegarLoop]: Abstraction has 66 states and 75 transitions. [2023-11-29 02:00:43,271 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-29 02:00:43,271 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66 states and 75 transitions. [2023-11-29 02:00:43,272 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2023-11-29 02:00:43,272 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:43,272 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:43,273 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 3, 2, 2, 2, 2, 1, 1] [2023-11-29 02:00:43,273 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-29 02:00:43,274 INFO L748 eck$LassoCheckResult]: Stem: 856#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 857#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 860#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 893#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 891#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 889#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 863#L17-4 foo_#res#1 := foo_~i~0#1; 864#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 853#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 854#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 862#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 903#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 901#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 899#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 897#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 887#L17-4 foo_#res#1 := foo_~i~0#1; 845#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 846#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 852#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 861#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 841#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 842#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 858#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 906#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 905#L17-2 [2023-11-29 02:00:43,274 INFO L750 eck$LassoCheckResult]: Loop: 905#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 904#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 905#L17-2 [2023-11-29 02:00:43,274 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:43,274 INFO L85 PathProgramCache]: Analyzing trace with hash 1084446665, now seen corresponding path program 4 times [2023-11-29 02:00:43,274 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:43,275 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1806213467] [2023-11-29 02:00:43,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:43,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:43,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:43,299 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:43,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:43,322 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:43,323 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:43,323 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 2 times [2023-11-29 02:00:43,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:43,323 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [56613270] [2023-11-29 02:00:43,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:43,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:43,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:43,327 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:43,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:43,331 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:43,331 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:43,331 INFO L85 PathProgramCache]: Analyzing trace with hash -1523807225, now seen corresponding path program 5 times [2023-11-29 02:00:43,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:43,332 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1290539550] [2023-11-29 02:00:43,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:43,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:43,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:43,522 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 4 proven. 48 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2023-11-29 02:00:43,522 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:00:43,522 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1290539550] [2023-11-29 02:00:43,522 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1290539550] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:00:43,522 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [316455581] [2023-11-29 02:00:43,523 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 02:00:43,523 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:00:43,523 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:43,526 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:00:43,527 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-29 02:00:43,629 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2023-11-29 02:00:43,629 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:00:43,631 INFO L262 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 14 conjunts are in the unsatisfiable core [2023-11-29 02:00:43,632 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:43,772 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2023-11-29 02:00:43,773 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:00:43,898 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2023-11-29 02:00:43,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [316455581] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:00:43,899 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:00:43,899 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 10] total 18 [2023-11-29 02:00:43,899 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1928410057] [2023-11-29 02:00:43,899 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:00:43,948 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:00:43,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2023-11-29 02:00:43,949 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=268, Unknown=0, NotChecked=0, Total=342 [2023-11-29 02:00:43,949 INFO L87 Difference]: Start difference. First operand 66 states and 75 transitions. cyclomatic complexity: 13 Second operand has 19 states, 18 states have (on average 2.611111111111111) internal successors, (47), 19 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:44,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:00:44,211 INFO L93 Difference]: Finished difference Result 82 states and 90 transitions. [2023-11-29 02:00:44,212 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 82 states and 90 transitions. [2023-11-29 02:00:44,213 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2023-11-29 02:00:44,214 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 82 states to 82 states and 90 transitions. [2023-11-29 02:00:44,214 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2023-11-29 02:00:44,214 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2023-11-29 02:00:44,215 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 90 transitions. [2023-11-29 02:00:44,215 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:00:44,215 INFO L218 hiAutomatonCegarLoop]: Abstraction has 82 states and 90 transitions. [2023-11-29 02:00:44,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 90 transitions. [2023-11-29 02:00:44,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 68. [2023-11-29 02:00:44,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 68 states have (on average 1.1176470588235294) internal successors, (76), 67 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:44,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 76 transitions. [2023-11-29 02:00:44,220 INFO L240 hiAutomatonCegarLoop]: Abstraction has 68 states and 76 transitions. [2023-11-29 02:00:44,220 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2023-11-29 02:00:44,221 INFO L428 stractBuchiCegarLoop]: Abstraction has 68 states and 76 transitions. [2023-11-29 02:00:44,221 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-29 02:00:44,221 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 68 states and 76 transitions. [2023-11-29 02:00:44,222 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2023-11-29 02:00:44,222 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:44,222 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:44,223 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 3, 3, 1, 1] [2023-11-29 02:00:44,223 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2023-11-29 02:00:44,224 INFO L748 eck$LassoCheckResult]: Stem: 1200#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1201#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1205#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1239#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1237#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1229#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1207#L17-4 foo_#res#1 := foo_~i~0#1; 1208#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1197#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1198#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1206#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1252#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1250#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1248#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1247#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1244#L17-4 foo_#res#1 := foo_~i~0#1; 1245#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1246#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1243#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1242#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1241#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1240#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1238#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1235#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1234#L17-4 foo_#res#1 := foo_~i~0#1; 1230#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1228#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1227#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1210#L17-3 [2023-11-29 02:00:44,224 INFO L750 eck$LassoCheckResult]: Loop: 1210#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1226#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1224#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1222#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1220#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1217#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1216#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1214#L17-4 foo_#res#1 := foo_~i~0#1; 1212#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1211#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1209#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1210#L17-3 [2023-11-29 02:00:44,224 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:44,224 INFO L85 PathProgramCache]: Analyzing trace with hash 203385399, now seen corresponding path program 6 times [2023-11-29 02:00:44,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:44,224 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357614430] [2023-11-29 02:00:44,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:44,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:44,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:44,364 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 15 proven. 33 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2023-11-29 02:00:44,365 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:00:44,365 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [357614430] [2023-11-29 02:00:44,365 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [357614430] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:00:44,365 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [702875681] [2023-11-29 02:00:44,365 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 02:00:44,366 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:00:44,366 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:44,368 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:00:44,376 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-29 02:00:44,506 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2023-11-29 02:00:44,506 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:00:44,508 INFO L262 TraceCheckSpWp]: Trace formula consists of 183 conjuncts, 9 conjunts are in the unsatisfiable core [2023-11-29 02:00:44,510 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:44,588 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 23 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2023-11-29 02:00:44,588 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:00:44,672 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 23 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2023-11-29 02:00:44,673 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [702875681] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:00:44,673 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:00:44,673 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 15 [2023-11-29 02:00:44,673 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1986589073] [2023-11-29 02:00:44,673 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:00:44,674 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:00:44,674 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:44,674 INFO L85 PathProgramCache]: Analyzing trace with hash -81249831, now seen corresponding path program 3 times [2023-11-29 02:00:44,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:44,675 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1364293652] [2023-11-29 02:00:44,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:44,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:44,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:44,703 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:44,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:44,714 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:45,129 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:00:45,130 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2023-11-29 02:00:45,130 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2023-11-29 02:00:45,130 INFO L87 Difference]: Start difference. First operand 68 states and 76 transitions. cyclomatic complexity: 11 Second operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 15 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:45,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:00:45,333 INFO L93 Difference]: Finished difference Result 74 states and 78 transitions. [2023-11-29 02:00:45,334 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 74 states and 78 transitions. [2023-11-29 02:00:45,335 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2023-11-29 02:00:45,335 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 74 states to 52 states and 54 transitions. [2023-11-29 02:00:45,335 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2023-11-29 02:00:45,336 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2023-11-29 02:00:45,336 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 54 transitions. [2023-11-29 02:00:45,336 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:00:45,336 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 54 transitions. [2023-11-29 02:00:45,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 54 transitions. [2023-11-29 02:00:45,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 45. [2023-11-29 02:00:45,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 44 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:45,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2023-11-29 02:00:45,340 INFO L240 hiAutomatonCegarLoop]: Abstraction has 45 states and 47 transitions. [2023-11-29 02:00:45,340 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-29 02:00:45,341 INFO L428 stractBuchiCegarLoop]: Abstraction has 45 states and 47 transitions. [2023-11-29 02:00:45,341 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-29 02:00:45,341 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 47 transitions. [2023-11-29 02:00:45,341 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2023-11-29 02:00:45,342 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:45,342 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:45,343 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 3, 1, 1] [2023-11-29 02:00:45,343 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2023-11-29 02:00:45,343 INFO L748 eck$LassoCheckResult]: Stem: 1528#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1529#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1530#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1562#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1561#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1560#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1559#L17-4 foo_#res#1 := foo_~i~0#1; 1521#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1522#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1526#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1532#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1519#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1520#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1531#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1563#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1533#L17-4 foo_#res#1 := foo_~i~0#1; 1534#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1558#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1557#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1556#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1555#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1554#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1553#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1552#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1551#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1550#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1549#L17-4 foo_#res#1 := foo_~i~0#1; 1548#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1547#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1546#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1536#L17-3 [2023-11-29 02:00:45,343 INFO L750 eck$LassoCheckResult]: Loop: 1536#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1545#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1544#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1543#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1542#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1541#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1540#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1539#L17-4 foo_#res#1 := foo_~i~0#1; 1538#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1537#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1535#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1536#L17-3 [2023-11-29 02:00:45,344 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:45,344 INFO L85 PathProgramCache]: Analyzing trace with hash -463974539, now seen corresponding path program 7 times [2023-11-29 02:00:45,344 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:45,344 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1905774123] [2023-11-29 02:00:45,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:45,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:45,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:45,368 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:45,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:45,391 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:45,392 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:45,392 INFO L85 PathProgramCache]: Analyzing trace with hash -81249831, now seen corresponding path program 4 times [2023-11-29 02:00:45,392 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:45,393 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020641251] [2023-11-29 02:00:45,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:45,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:45,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:45,403 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:45,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:45,412 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:45,412 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:45,413 INFO L85 PathProgramCache]: Analyzing trace with hash -1101563419, now seen corresponding path program 8 times [2023-11-29 02:00:45,413 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:45,413 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [520398830] [2023-11-29 02:00:45,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:45,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:45,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:45,657 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 49 proven. 79 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2023-11-29 02:00:45,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:00:45,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [520398830] [2023-11-29 02:00:45,658 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [520398830] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:00:45,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [720107389] [2023-11-29 02:00:45,658 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 02:00:45,658 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:00:45,658 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:45,663 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:00:45,664 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-29 02:00:45,779 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 02:00:45,779 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:00:45,781 INFO L262 TraceCheckSpWp]: Trace formula consists of 255 conjuncts, 11 conjunts are in the unsatisfiable core [2023-11-29 02:00:45,783 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:45,895 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 65 proven. 63 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2023-11-29 02:00:45,895 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:00:46,017 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 65 proven. 63 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2023-11-29 02:00:46,017 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [720107389] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:00:46,017 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:00:46,018 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 19 [2023-11-29 02:00:46,018 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810575246] [2023-11-29 02:00:46,018 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:00:46,343 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:00:46,343 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2023-11-29 02:00:46,344 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=254, Unknown=0, NotChecked=0, Total=342 [2023-11-29 02:00:46,344 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. cyclomatic complexity: 4 Second operand has 19 states, 19 states have (on average 3.1052631578947367) internal successors, (59), 19 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:46,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:00:46,621 INFO L93 Difference]: Finished difference Result 57 states and 59 transitions. [2023-11-29 02:00:46,621 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 59 transitions. [2023-11-29 02:00:46,621 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 17 [2023-11-29 02:00:46,622 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 57 states and 59 transitions. [2023-11-29 02:00:46,622 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 57 [2023-11-29 02:00:46,622 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 57 [2023-11-29 02:00:46,623 INFO L73 IsDeterministic]: Start isDeterministic. Operand 57 states and 59 transitions. [2023-11-29 02:00:46,623 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:00:46,623 INFO L218 hiAutomatonCegarLoop]: Abstraction has 57 states and 59 transitions. [2023-11-29 02:00:46,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states and 59 transitions. [2023-11-29 02:00:46,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 47. [2023-11-29 02:00:46,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 1.0425531914893618) internal successors, (49), 46 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:46,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 49 transitions. [2023-11-29 02:00:46,627 INFO L240 hiAutomatonCegarLoop]: Abstraction has 47 states and 49 transitions. [2023-11-29 02:00:46,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2023-11-29 02:00:46,630 INFO L428 stractBuchiCegarLoop]: Abstraction has 47 states and 49 transitions. [2023-11-29 02:00:46,630 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-29 02:00:46,630 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 49 transitions. [2023-11-29 02:00:46,631 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2023-11-29 02:00:46,631 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:46,631 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:46,632 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 3, 1, 1] [2023-11-29 02:00:46,632 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 1, 1, 1, 1, 1] [2023-11-29 02:00:46,632 INFO L748 eck$LassoCheckResult]: Stem: 1915#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1916#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1917#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1918#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1919#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1949#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1947#L17-4 foo_#res#1 := foo_~i~0#1; 1946#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1912#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1913#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1951#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1905#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1906#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1950#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1948#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1920#L17-4 foo_#res#1 := foo_~i~0#1; 1907#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1908#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1945#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1944#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1943#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1942#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1941#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1940#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1939#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1938#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1937#L17-4 foo_#res#1 := foo_~i~0#1; 1936#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1935#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1934#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1922#L17-3 [2023-11-29 02:00:46,632 INFO L750 eck$LassoCheckResult]: Loop: 1922#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1933#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1932#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1931#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1930#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1929#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1928#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1927#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1926#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1925#L17-4 foo_#res#1 := foo_~i~0#1; 1924#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1923#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1921#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1922#L17-3 [2023-11-29 02:00:46,633 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:46,633 INFO L85 PathProgramCache]: Analyzing trace with hash -463974539, now seen corresponding path program 9 times [2023-11-29 02:00:46,633 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:46,633 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730948649] [2023-11-29 02:00:46,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:46,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:46,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:46,656 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:46,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:46,679 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:46,680 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:46,680 INFO L85 PathProgramCache]: Analyzing trace with hash 879476375, now seen corresponding path program 5 times [2023-11-29 02:00:46,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:46,680 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650499343] [2023-11-29 02:00:46,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:46,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:46,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:46,693 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:46,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:46,703 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:46,704 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:46,704 INFO L85 PathProgramCache]: Analyzing trace with hash -389338205, now seen corresponding path program 10 times [2023-11-29 02:00:46,704 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:46,704 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [51756773] [2023-11-29 02:00:46,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:46,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:46,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:46,736 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:46,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:46,769 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:48,526 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 02:00:48,527 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 02:00:48,527 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 02:00:48,527 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 02:00:48,527 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 02:00:48,527 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:48,527 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 02:00:48,527 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 02:00:48,527 INFO L133 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration10_Lasso [2023-11-29 02:00:48,527 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 02:00:48,527 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 02:00:48,530 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:48,532 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:48,533 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:48,535 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:48,537 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:48,829 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:48,831 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:48,833 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:48,835 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:48,837 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:00:49,296 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 02:00:49,296 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 02:00:49,297 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:49,297 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:49,298 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:00:49,303 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-29 02:00:49,305 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:00:49,314 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:00:49,314 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:00:49,315 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:00:49,315 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:00:49,315 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:00:49,315 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:00:49,316 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:00:49,317 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:00:49,324 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2023-11-29 02:00:49,324 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:49,324 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:49,325 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:00:49,326 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2023-11-29 02:00:49,328 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:00:49,340 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:00:49,340 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:00:49,340 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:00:49,340 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:00:49,340 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:00:49,341 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:00:49,341 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:00:49,342 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:00:49,345 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2023-11-29 02:00:49,346 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:49,346 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:49,347 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:00:49,351 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2023-11-29 02:00:49,352 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:00:49,364 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:00:49,364 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:00:49,364 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:00:49,364 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:00:49,364 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:00:49,365 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:00:49,365 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:00:49,379 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:00:49,382 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2023-11-29 02:00:49,383 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:49,383 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:49,384 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:00:49,386 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2023-11-29 02:00:49,387 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:00:49,396 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:00:49,397 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:00:49,397 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:00:49,397 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:00:49,399 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:00:49,399 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:00:49,404 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:00:49,407 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2023-11-29 02:00:49,407 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:49,407 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:49,408 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:00:49,409 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2023-11-29 02:00:49,411 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:00:49,421 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:00:49,421 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:00:49,421 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:00:49,421 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:00:49,421 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:00:49,421 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:00:49,422 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:00:49,423 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:00:49,427 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2023-11-29 02:00:49,431 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:49,431 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:49,432 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:00:49,435 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2023-11-29 02:00:49,436 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:00:49,449 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:00:49,449 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:00:49,449 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:00:49,449 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:00:49,451 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:00:49,451 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:00:49,455 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:00:49,458 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2023-11-29 02:00:49,458 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:49,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:49,459 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:00:49,461 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2023-11-29 02:00:49,463 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:00:49,473 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:00:49,474 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:00:49,474 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:00:49,474 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:00:49,494 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:00:49,494 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:00:49,530 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 02:00:49,609 INFO L443 ModelExtractionUtils]: Simplification made 14 calls to the SMT solver. [2023-11-29 02:00:49,609 INFO L444 ModelExtractionUtils]: 4 out of 37 variables were initially zero. Simplification set additionally 26 variables to zero. [2023-11-29 02:00:49,609 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:00:49,609 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:49,610 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:00:49,612 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2023-11-29 02:00:49,613 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 02:00:49,623 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2023-11-29 02:00:49,623 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 02:00:49,624 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#mask~0#1.base)_2, ULTIMATE.start_foo_~size#1, ULTIMATE.start_foo_~i~0#1) = 7*v_rep(select #length ULTIMATE.start_main_~#mask~0#1.base)_2 - 8*ULTIMATE.start_foo_~size#1 + 8*ULTIMATE.start_foo_~i~0#1 Supporting invariants [1*ULTIMATE.start_foo_~i~0#1 - 1*ULTIMATE.start_foo_~size#1 + 1*ULTIMATE.start_main_~i~1#1 >= 0] [2023-11-29 02:00:49,627 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2023-11-29 02:00:49,654 INFO L156 tatePredicateManager]: 5 out of 7 supporting invariants were superfluous and have been removed [2023-11-29 02:00:49,659 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#mask~0!base] could not be translated [2023-11-29 02:00:49,694 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Ended with exit code 0 [2023-11-29 02:00:49,705 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:49,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:49,750 INFO L262 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 9 conjunts are in the unsatisfiable core [2023-11-29 02:00:49,752 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:49,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:49,805 INFO L262 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 23 conjunts are in the unsatisfiable core [2023-11-29 02:00:49,806 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:50,106 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:00:50,107 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 9 loop predicates [2023-11-29 02:00:50,107 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4 Second operand has 10 states, 10 states have (on average 2.3) internal successors, (23), 10 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:50,756 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4. Second operand has 10 states, 10 states have (on average 2.3) internal successors, (23), 10 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 100 states and 104 transitions. Complement of second has 31 states. [2023-11-29 02:00:50,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 16 states 1 stem states 14 non-accepting loop states 1 accepting loop states [2023-11-29 02:00:50,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.3) internal successors, (23), 10 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:50,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 27 transitions. [2023-11-29 02:00:50,757 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 16 states and 27 transitions. Stem has 30 letters. Loop has 13 letters. [2023-11-29 02:00:50,758 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:00:50,758 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 16 states and 27 transitions. Stem has 43 letters. Loop has 13 letters. [2023-11-29 02:00:50,758 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:00:50,758 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 16 states and 27 transitions. Stem has 30 letters. Loop has 26 letters. [2023-11-29 02:00:50,759 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:00:50,759 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 104 transitions. [2023-11-29 02:00:50,760 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2023-11-29 02:00:50,760 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 74 states and 78 transitions. [2023-11-29 02:00:50,760 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 34 [2023-11-29 02:00:50,760 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 35 [2023-11-29 02:00:50,760 INFO L73 IsDeterministic]: Start isDeterministic. Operand 74 states and 78 transitions. [2023-11-29 02:00:50,761 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:00:50,761 INFO L218 hiAutomatonCegarLoop]: Abstraction has 74 states and 78 transitions. [2023-11-29 02:00:50,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states and 78 transitions. [2023-11-29 02:00:50,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 61. [2023-11-29 02:00:50,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 61 states have (on average 1.0655737704918034) internal successors, (65), 60 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:50,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 65 transitions. [2023-11-29 02:00:50,765 INFO L240 hiAutomatonCegarLoop]: Abstraction has 61 states and 65 transitions. [2023-11-29 02:00:50,765 INFO L428 stractBuchiCegarLoop]: Abstraction has 61 states and 65 transitions. [2023-11-29 02:00:50,765 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-29 02:00:50,765 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 61 states and 65 transitions. [2023-11-29 02:00:50,765 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2023-11-29 02:00:50,765 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:50,765 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:50,767 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 4, 3, 3, 3, 3, 1, 1] [2023-11-29 02:00:50,767 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-29 02:00:50,767 INFO L748 eck$LassoCheckResult]: Stem: 2306#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2307#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 2311#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2308#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2309#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2342#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2315#L17-4 foo_#res#1 := foo_~i~0#1; 2316#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 2335#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2336#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2347#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2346#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2344#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2345#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2339#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2340#L17-4 foo_#res#1 := foo_~i~0#1; 2349#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 2348#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2312#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2294#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2310#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2351#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2350#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2343#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2341#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2338#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2337#L17-4 foo_#res#1 := foo_~i~0#1; 2297#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 2298#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2304#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2334#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2291#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2292#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2327#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2328#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2323#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2324#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2332#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2317#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2319#L17-2 [2023-11-29 02:00:50,767 INFO L750 eck$LassoCheckResult]: Loop: 2319#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2321#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2319#L17-2 [2023-11-29 02:00:50,767 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:50,767 INFO L85 PathProgramCache]: Analyzing trace with hash 870362933, now seen corresponding path program 11 times [2023-11-29 02:00:50,767 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:50,767 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218606542] [2023-11-29 02:00:50,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:50,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:50,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:51,010 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 9 proven. 128 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2023-11-29 02:00:51,011 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:00:51,011 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218606542] [2023-11-29 02:00:51,011 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [218606542] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:00:51,011 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [714559754] [2023-11-29 02:00:51,011 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 02:00:51,011 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:00:51,011 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:51,012 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:00:51,019 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2023-11-29 02:00:51,190 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2023-11-29 02:00:51,191 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:00:51,192 INFO L262 TraceCheckSpWp]: Trace formula consists of 247 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-29 02:00:51,193 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:51,309 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 16 proven. 121 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2023-11-29 02:00:51,309 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:00:51,398 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 16 proven. 121 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2023-11-29 02:00:51,398 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [714559754] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:00:51,398 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:00:51,398 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 17 [2023-11-29 02:00:51,398 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1738754844] [2023-11-29 02:00:51,399 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:00:51,399 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:00:51,399 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:51,399 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 3 times [2023-11-29 02:00:51,400 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:51,400 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232604181] [2023-11-29 02:00:51,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:51,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:51,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:51,403 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:51,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:51,406 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:51,453 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:00:51,453 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2023-11-29 02:00:51,453 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=226, Unknown=0, NotChecked=0, Total=306 [2023-11-29 02:00:51,454 INFO L87 Difference]: Start difference. First operand 61 states and 65 transitions. cyclomatic complexity: 7 Second operand has 18 states, 17 states have (on average 3.176470588235294) internal successors, (54), 18 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:51,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:00:51,734 INFO L93 Difference]: Finished difference Result 107 states and 112 transitions. [2023-11-29 02:00:51,735 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 107 states and 112 transitions. [2023-11-29 02:00:51,736 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2023-11-29 02:00:51,737 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 107 states to 107 states and 112 transitions. [2023-11-29 02:00:51,737 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2023-11-29 02:00:51,737 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2023-11-29 02:00:51,737 INFO L73 IsDeterministic]: Start isDeterministic. Operand 107 states and 112 transitions. [2023-11-29 02:00:51,738 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:00:51,738 INFO L218 hiAutomatonCegarLoop]: Abstraction has 107 states and 112 transitions. [2023-11-29 02:00:51,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states and 112 transitions. [2023-11-29 02:00:51,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 81. [2023-11-29 02:00:51,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 81 states, 81 states have (on average 1.0617283950617284) internal successors, (86), 80 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:51,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 86 transitions. [2023-11-29 02:00:51,743 INFO L240 hiAutomatonCegarLoop]: Abstraction has 81 states and 86 transitions. [2023-11-29 02:00:51,745 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2023-11-29 02:00:51,745 INFO L428 stractBuchiCegarLoop]: Abstraction has 81 states and 86 transitions. [2023-11-29 02:00:51,745 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2023-11-29 02:00:51,746 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 81 states and 86 transitions. [2023-11-29 02:00:51,746 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2023-11-29 02:00:51,746 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:51,747 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:51,747 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1] [2023-11-29 02:00:51,747 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:00:51,748 INFO L748 eck$LassoCheckResult]: Stem: 2751#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2752#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 2753#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2756#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2799#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2798#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2797#L17-4 foo_#res#1 := foo_~i~0#1; 2796#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 2795#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2794#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2793#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2792#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2791#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2790#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2789#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2788#L17-4 foo_#res#1 := foo_~i~0#1; 2787#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 2786#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2785#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2784#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2783#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2782#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2781#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2780#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2779#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2778#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2777#L17-4 foo_#res#1 := foo_~i~0#1; 2776#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 2775#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2774#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2773#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2772#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2771#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2770#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2769#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2768#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2767#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2766#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2761#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2758#L17-4 foo_#res#1 := foo_~i~0#1; 2740#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 2741#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2760#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 2750#L26-4 main_~i~1#1 := 0; 2744#L29-3 [2023-11-29 02:00:51,748 INFO L750 eck$LassoCheckResult]: Loop: 2744#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 2745#L30 assume !(main_#t~mem5#1 != main_~i~1#1);havoc main_#t~mem5#1; 2746#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2744#L29-3 [2023-11-29 02:00:51,748 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:51,749 INFO L85 PathProgramCache]: Analyzing trace with hash 815417503, now seen corresponding path program 2 times [2023-11-29 02:00:51,749 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:51,749 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [126418015] [2023-11-29 02:00:51,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:51,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:51,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:51,913 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2023-11-29 02:00:51,913 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:00:51,913 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [126418015] [2023-11-29 02:00:51,913 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [126418015] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:00:51,913 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [972451848] [2023-11-29 02:00:51,913 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 02:00:51,913 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:00:51,914 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:51,915 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:00:51,920 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2023-11-29 02:00:52,160 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 02:00:52,160 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:00:52,161 INFO L262 TraceCheckSpWp]: Trace formula consists of 254 conjuncts, 11 conjunts are in the unsatisfiable core [2023-11-29 02:00:52,163 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:52,209 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2023-11-29 02:00:52,209 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:00:52,375 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2023-11-29 02:00:52,375 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [972451848] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:00:52,375 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:00:52,375 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-29 02:00:52,376 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409420750] [2023-11-29 02:00:52,376 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:00:52,376 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:00:52,376 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:52,376 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 2 times [2023-11-29 02:00:52,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:52,377 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514145282] [2023-11-29 02:00:52,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:52,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:52,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:52,380 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:52,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:52,383 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:52,425 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:00:52,426 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-29 02:00:52,426 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=98, Unknown=0, NotChecked=0, Total=156 [2023-11-29 02:00:52,426 INFO L87 Difference]: Start difference. First operand 81 states and 86 transitions. cyclomatic complexity: 8 Second operand has 13 states, 13 states have (on average 4.923076923076923) internal successors, (64), 13 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:52,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:00:52,859 INFO L93 Difference]: Finished difference Result 308 states and 322 transitions. [2023-11-29 02:00:52,859 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 308 states and 322 transitions. [2023-11-29 02:00:52,862 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 26 [2023-11-29 02:00:52,865 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 308 states to 276 states and 290 transitions. [2023-11-29 02:00:52,865 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 159 [2023-11-29 02:00:52,865 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 159 [2023-11-29 02:00:52,865 INFO L73 IsDeterministic]: Start isDeterministic. Operand 276 states and 290 transitions. [2023-11-29 02:00:52,865 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:00:52,866 INFO L218 hiAutomatonCegarLoop]: Abstraction has 276 states and 290 transitions. [2023-11-29 02:00:52,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states and 290 transitions. [2023-11-29 02:00:52,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 208. [2023-11-29 02:00:52,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 208 states, 208 states have (on average 1.0673076923076923) internal successors, (222), 207 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:52,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 222 transitions. [2023-11-29 02:00:52,875 INFO L240 hiAutomatonCegarLoop]: Abstraction has 208 states and 222 transitions. [2023-11-29 02:00:52,876 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-29 02:00:52,876 INFO L428 stractBuchiCegarLoop]: Abstraction has 208 states and 222 transitions. [2023-11-29 02:00:52,876 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2023-11-29 02:00:52,876 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 208 states and 222 transitions. [2023-11-29 02:00:52,878 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 26 [2023-11-29 02:00:52,878 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:52,878 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:52,879 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [15, 14, 5, 4, 4, 4, 4, 1, 1] [2023-11-29 02:00:52,879 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-29 02:00:52,880 INFO L748 eck$LassoCheckResult]: Stem: 3422#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3423#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 3424#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3580#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3579#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3578#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3431#L17-4 foo_#res#1 := foo_~i~0#1; 3413#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 3414#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3420#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3428#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3575#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3574#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3573#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3572#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3571#L17-4 foo_#res#1 := foo_~i~0#1; 3570#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 3569#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3568#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3567#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3566#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3565#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3564#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3563#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3562#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3561#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3560#L17-4 foo_#res#1 := foo_~i~0#1; 3559#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 3558#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3557#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3556#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3555#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3554#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3553#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3552#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3551#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3550#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3549#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3548#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3547#L17-4 foo_#res#1 := foo_~i~0#1; 3546#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 3545#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3544#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3542#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3543#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3611#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3610#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3609#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3608#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3607#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3606#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3601#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3596#L17-2 [2023-11-29 02:00:52,880 INFO L750 eck$LassoCheckResult]: Loop: 3596#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3594#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3596#L17-2 [2023-11-29 02:00:52,880 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:52,880 INFO L85 PathProgramCache]: Analyzing trace with hash 303539911, now seen corresponding path program 12 times [2023-11-29 02:00:52,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:52,881 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409955253] [2023-11-29 02:00:52,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:52,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:52,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:52,919 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:52,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:52,956 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:52,957 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:52,957 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 4 times [2023-11-29 02:00:52,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:52,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767720491] [2023-11-29 02:00:52,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:52,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:52,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:52,961 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:52,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:52,963 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:52,964 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:52,964 INFO L85 PathProgramCache]: Analyzing trace with hash -355921019, now seen corresponding path program 13 times [2023-11-29 02:00:52,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:52,964 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [228386489] [2023-11-29 02:00:52,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:52,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:52,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:53,286 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 16 proven. 277 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2023-11-29 02:00:53,286 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:00:53,286 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [228386489] [2023-11-29 02:00:53,286 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [228386489] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:00:53,286 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [582586532] [2023-11-29 02:00:53,286 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 02:00:53,287 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:00:53,287 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:00:53,290 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:00:53,290 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2023-11-29 02:00:53,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:00:53,409 INFO L262 TraceCheckSpWp]: Trace formula consists of 330 conjuncts, 14 conjunts are in the unsatisfiable core [2023-11-29 02:00:53,411 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:00:53,598 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 25 proven. 268 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2023-11-29 02:00:53,598 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:00:53,709 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 25 proven. 268 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2023-11-29 02:00:53,709 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [582586532] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:00:53,709 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:00:53,709 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 20 [2023-11-29 02:00:53,709 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1534821693] [2023-11-29 02:00:53,709 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:00:53,744 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:00:53,744 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2023-11-29 02:00:53,745 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=313, Unknown=0, NotChecked=0, Total=420 [2023-11-29 02:00:53,745 INFO L87 Difference]: Start difference. First operand 208 states and 222 transitions. cyclomatic complexity: 22 Second operand has 21 states, 20 states have (on average 3.25) internal successors, (65), 21 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:54,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:00:54,084 INFO L93 Difference]: Finished difference Result 223 states and 236 transitions. [2023-11-29 02:00:54,084 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 223 states and 236 transitions. [2023-11-29 02:00:54,086 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 24 [2023-11-29 02:00:54,088 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 223 states to 223 states and 236 transitions. [2023-11-29 02:00:54,088 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 118 [2023-11-29 02:00:54,088 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 118 [2023-11-29 02:00:54,089 INFO L73 IsDeterministic]: Start isDeterministic. Operand 223 states and 236 transitions. [2023-11-29 02:00:54,089 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:00:54,089 INFO L218 hiAutomatonCegarLoop]: Abstraction has 223 states and 236 transitions. [2023-11-29 02:00:54,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states and 236 transitions. [2023-11-29 02:00:54,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 208. [2023-11-29 02:00:54,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 208 states, 208 states have (on average 1.0625) internal successors, (221), 207 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:00:54,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 221 transitions. [2023-11-29 02:00:54,096 INFO L240 hiAutomatonCegarLoop]: Abstraction has 208 states and 221 transitions. [2023-11-29 02:00:54,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2023-11-29 02:00:54,098 INFO L428 stractBuchiCegarLoop]: Abstraction has 208 states and 221 transitions. [2023-11-29 02:00:54,098 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2023-11-29 02:00:54,098 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 208 states and 221 transitions. [2023-11-29 02:00:54,100 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 24 [2023-11-29 02:00:54,100 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:00:54,100 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:00:54,101 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [19, 18, 6, 5, 5, 5, 5, 1, 1] [2023-11-29 02:00:54,101 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-29 02:00:54,102 INFO L748 eck$LassoCheckResult]: Stem: 4239#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4240#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 4244#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4241#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4242#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4430#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4428#L17-4 foo_#res#1 := foo_~i~0#1; 4417#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 4418#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4245#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4243#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4226#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4227#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4431#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4429#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4419#L17-4 foo_#res#1 := foo_~i~0#1; 4420#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 4415#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4416#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4427#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4426#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4425#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4424#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4423#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4422#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4421#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4248#L17-4 foo_#res#1 := foo_~i~0#1; 4230#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 4231#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4403#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4414#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4413#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4412#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4411#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4410#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4409#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4408#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4407#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4406#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4405#L17-4 foo_#res#1 := foo_~i~0#1; 4404#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 4236#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4237#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4402#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4224#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4225#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4388#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4384#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4381#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4378#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4375#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4372#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4369#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4367#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4363#L17-4 foo_#res#1 := foo_~i~0#1; 4228#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 4229#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4235#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4390#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4387#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4383#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4380#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4377#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4374#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4371#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4366#L17-2 [2023-11-29 02:00:54,102 INFO L750 eck$LassoCheckResult]: Loop: 4366#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4365#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4366#L17-2 [2023-11-29 02:00:54,102 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:54,102 INFO L85 PathProgramCache]: Analyzing trace with hash -1286935495, now seen corresponding path program 14 times [2023-11-29 02:00:54,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:54,103 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [560637755] [2023-11-29 02:00:54,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:54,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:54,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:54,142 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:54,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:54,181 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:54,182 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:54,182 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 5 times [2023-11-29 02:00:54,182 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:54,182 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718009418] [2023-11-29 02:00:54,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:54,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:54,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:54,185 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:54,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:54,187 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:00:54,188 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:00:54,188 INFO L85 PathProgramCache]: Analyzing trace with hash 205571191, now seen corresponding path program 15 times [2023-11-29 02:00:54,188 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:00:54,188 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872235218] [2023-11-29 02:00:54,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:00:54,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:00:54,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:54,226 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:00:54,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:00:54,265 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:01:02,008 WARN L293 SmtUtils]: Spent 7.69s on a formula simplification. DAG size of input: 513 DAG size of output: 343 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 02:01:02,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 37 [2023-11-29 02:01:02,353 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 02:01:02,353 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 02:01:02,353 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 02:01:02,353 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 02:01:02,353 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 02:01:02,353 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:02,353 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 02:01:02,353 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 02:01:02,353 INFO L133 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration14_Lasso [2023-11-29 02:01:02,353 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 02:01:02,353 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 02:01:02,355 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,360 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,361 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,365 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,367 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,369 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,371 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,373 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,375 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,377 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,379 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,382 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,667 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,669 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:01:02,976 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 02:01:02,976 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 02:01:02,976 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:02,976 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:02,977 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:02,979 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2023-11-29 02:01:02,980 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:02,990 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:02,990 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:01:02,990 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:02,990 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:02,990 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:02,991 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:01:02,991 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:01:02,992 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:02,994 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2023-11-29 02:01:02,995 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:02,995 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:02,996 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:02,996 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2023-11-29 02:01:02,998 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,007 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,007 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:01:03,008 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,008 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,008 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,008 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:01:03,008 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:01:03,009 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,011 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Ended with exit code 0 [2023-11-29 02:01:03,012 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,012 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,012 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,013 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2023-11-29 02:01:03,015 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,025 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,025 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,025 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,025 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,026 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:01:03,026 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:01:03,030 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,033 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Ended with exit code 0 [2023-11-29 02:01:03,033 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,033 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,034 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,034 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2023-11-29 02:01:03,036 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,046 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,046 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:01:03,046 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,046 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,046 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,047 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:01:03,047 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:01:03,048 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,050 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Ended with exit code 0 [2023-11-29 02:01:03,050 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,051 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,051 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,052 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2023-11-29 02:01:03,054 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,064 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,064 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,064 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,064 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,065 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:01:03,065 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:01:03,069 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,071 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2023-11-29 02:01:03,071 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,072 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,072 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,073 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2023-11-29 02:01:03,074 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,084 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,085 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:01:03,085 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,085 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,085 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,085 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:01:03,085 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:01:03,086 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,089 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2023-11-29 02:01:03,090 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,090 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,091 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,091 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2023-11-29 02:01:03,093 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,104 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,104 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:01:03,104 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,104 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,104 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,104 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:01:03,104 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:01:03,105 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,108 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Ended with exit code 0 [2023-11-29 02:01:03,108 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,108 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,109 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,109 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2023-11-29 02:01:03,111 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,121 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,121 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:01:03,121 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,121 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,121 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,121 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:01:03,121 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:01:03,123 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,125 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2023-11-29 02:01:03,125 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,125 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,126 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,127 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2023-11-29 02:01:03,128 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,138 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,138 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:01:03,138 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,138 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,138 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,138 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:01:03,138 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:01:03,140 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,142 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2023-11-29 02:01:03,142 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,142 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,143 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,144 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2023-11-29 02:01:03,145 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,155 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,155 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:01:03,155 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,155 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,155 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,155 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:01:03,155 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:01:03,157 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,159 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Forceful destruction successful, exit code 0 [2023-11-29 02:01:03,159 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,159 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,161 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,161 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2023-11-29 02:01:03,162 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,172 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,172 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,172 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,172 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,173 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:01:03,173 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:01:03,176 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,178 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2023-11-29 02:01:03,179 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,179 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,179 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,180 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2023-11-29 02:01:03,181 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,191 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,191 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,191 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,191 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,193 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:01:03,193 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:01:03,196 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,198 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Ended with exit code 0 [2023-11-29 02:01:03,198 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,198 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,199 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,200 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2023-11-29 02:01:03,201 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,211 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,211 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,211 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,211 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,212 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:01:03,212 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:01:03,216 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:01:03,219 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Ended with exit code 0 [2023-11-29 02:01:03,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,220 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,220 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,221 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2023-11-29 02:01:03,222 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:01:03,232 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:01:03,233 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:01:03,233 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:01:03,233 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:01:03,238 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:01:03,238 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:01:03,255 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 02:01:03,267 INFO L443 ModelExtractionUtils]: Simplification made 6 calls to the SMT solver. [2023-11-29 02:01:03,267 INFO L444 ModelExtractionUtils]: 11 out of 19 variables were initially zero. Simplification set additionally 5 variables to zero. [2023-11-29 02:01:03,267 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:01:03,267 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:03,268 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:01:03,269 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2023-11-29 02:01:03,270 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 02:01:03,281 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-29 02:01:03,281 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 02:01:03,281 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_foo_~size#1, ULTIMATE.start_foo_~i~0#1) = 1*ULTIMATE.start_foo_~size#1 - 1*ULTIMATE.start_foo_~i~0#1 Supporting invariants [] [2023-11-29 02:01:03,284 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2023-11-29 02:01:03,300 INFO L156 tatePredicateManager]: 7 out of 7 supporting invariants were superfluous and have been removed [2023-11-29 02:01:03,309 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:03,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:01:03,376 INFO L262 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-29 02:01:03,377 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:01:03,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:01:03,435 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-29 02:01:03,436 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:01:03,442 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:01:03,443 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-29 02:01:03,443 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 208 states and 221 transitions. cyclomatic complexity: 20 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:03,459 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 208 states and 221 transitions. cyclomatic complexity: 20. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 211 states and 224 transitions. Complement of second has 5 states. [2023-11-29 02:01:03,460 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2023-11-29 02:01:03,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:03,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7 transitions. [2023-11-29 02:01:03,461 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 7 transitions. Stem has 65 letters. Loop has 2 letters. [2023-11-29 02:01:03,461 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:01:03,461 INFO L681 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2023-11-29 02:01:03,470 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:03,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:01:03,533 INFO L262 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-29 02:01:03,534 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:01:03,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:01:03,600 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-29 02:01:03,600 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:01:03,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:01:03,627 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Ended with exit code 0 [2023-11-29 02:01:03,628 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-29 02:01:03,628 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 208 states and 221 transitions. cyclomatic complexity: 20 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:03,643 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 208 states and 221 transitions. cyclomatic complexity: 20. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 211 states and 224 transitions. Complement of second has 5 states. [2023-11-29 02:01:03,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2023-11-29 02:01:03,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:03,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7 transitions. [2023-11-29 02:01:03,645 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 7 transitions. Stem has 65 letters. Loop has 2 letters. [2023-11-29 02:01:03,645 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:01:03,645 INFO L681 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2023-11-29 02:01:03,656 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:03,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:01:03,727 INFO L262 TraceCheckSpWp]: Trace formula consists of 391 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-29 02:01:03,728 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:01:03,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:01:03,789 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-29 02:01:03,790 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:01:03,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:01:03,797 INFO L141 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-29 02:01:03,797 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 208 states and 221 transitions. cyclomatic complexity: 20 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:03,817 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 208 states and 221 transitions. cyclomatic complexity: 20. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 311 states and 328 transitions. Complement of second has 4 states. [2023-11-29 02:01:03,819 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2023-11-29 02:01:03,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:03,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 19 transitions. [2023-11-29 02:01:03,820 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 19 transitions. Stem has 65 letters. Loop has 2 letters. [2023-11-29 02:01:03,821 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:01:03,821 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 19 transitions. Stem has 67 letters. Loop has 2 letters. [2023-11-29 02:01:03,822 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:01:03,822 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 19 transitions. Stem has 65 letters. Loop has 4 letters. [2023-11-29 02:01:03,823 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:01:03,823 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 311 states and 328 transitions. [2023-11-29 02:01:03,826 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 17 [2023-11-29 02:01:03,828 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 311 states to 222 states and 235 transitions. [2023-11-29 02:01:03,828 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2023-11-29 02:01:03,828 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 67 [2023-11-29 02:01:03,828 INFO L73 IsDeterministic]: Start isDeterministic. Operand 222 states and 235 transitions. [2023-11-29 02:01:03,828 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:01:03,828 INFO L218 hiAutomatonCegarLoop]: Abstraction has 222 states and 235 transitions. [2023-11-29 02:01:03,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states and 235 transitions. [2023-11-29 02:01:03,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 216. [2023-11-29 02:01:03,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 216 states, 216 states have (on average 1.0601851851851851) internal successors, (229), 215 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:03,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 229 transitions. [2023-11-29 02:01:03,834 INFO L240 hiAutomatonCegarLoop]: Abstraction has 216 states and 229 transitions. [2023-11-29 02:01:03,834 INFO L428 stractBuchiCegarLoop]: Abstraction has 216 states and 229 transitions. [2023-11-29 02:01:03,834 INFO L335 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2023-11-29 02:01:03,834 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 216 states and 229 transitions. [2023-11-29 02:01:03,835 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2023-11-29 02:01:03,835 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:01:03,835 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:01:03,837 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [31, 31, 10, 9, 9, 9, 9, 1, 1] [2023-11-29 02:01:03,837 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 1, 1, 1, 1, 1] [2023-11-29 02:01:03,838 INFO L748 eck$LassoCheckResult]: Stem: 5840#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5841#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 5844#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5990#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5988#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5986#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5849#L17-4 foo_#res#1 := foo_~i~0#1; 5831#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 5832#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5838#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5846#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5983#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5982#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5981#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5980#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5979#L17-4 foo_#res#1 := foo_~i~0#1; 5978#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 5977#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5976#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5975#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5974#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5973#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5972#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5971#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5970#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5969#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5968#L17-4 foo_#res#1 := foo_~i~0#1; 5967#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 5966#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5965#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5964#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5963#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5962#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5961#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5960#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5959#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5958#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5957#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5956#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5955#L17-4 foo_#res#1 := foo_~i~0#1; 5954#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 5953#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5952#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5950#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5949#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5948#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5947#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5946#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5945#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5944#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5943#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5942#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5941#L17-4 foo_#res#1 := foo_~i~0#1; 5940#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 5939#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5938#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5937#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5936#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5935#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5934#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5933#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5932#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5931#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5930#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5929#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5928#L17-4 foo_#res#1 := foo_~i~0#1; 5927#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 5926#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5925#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5923#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5922#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5921#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5920#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5919#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5918#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5917#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5916#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5915#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5914#L17-4 foo_#res#1 := foo_~i~0#1; 5913#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 5912#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5911#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5909#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5908#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5907#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5906#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5905#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5904#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5903#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5902#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5899#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5897#L17-4 foo_#res#1 := foo_~i~0#1; 5895#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 5893#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5891#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5889#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5890#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5994#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5992#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5989#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5987#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5985#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5984#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5901#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5900#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5898#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5896#L17-4 foo_#res#1 := foo_~i~0#1; 5894#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 5892#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5876#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5874#L17-3 [2023-11-29 02:01:03,838 INFO L750 eck$LassoCheckResult]: Loop: 5874#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5869#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5870#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5865#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5866#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5862#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5859#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 5861#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 5856#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5857#L17-4 foo_#res#1 := foo_~i~0#1; 5852#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 5853#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5877#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5874#L17-3 [2023-11-29 02:01:03,839 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:03,839 INFO L85 PathProgramCache]: Analyzing trace with hash 493432179, now seen corresponding path program 16 times [2023-11-29 02:01:03,839 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:03,839 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670151441] [2023-11-29 02:01:03,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:03,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:03,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:01:04,473 INFO L134 CoverageAnalysis]: Checked inductivity of 1398 backedges. 809 proven. 65 refuted. 0 times theorem prover too weak. 524 trivial. 0 not checked. [2023-11-29 02:01:04,473 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:01:04,473 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670151441] [2023-11-29 02:01:04,473 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [670151441] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:01:04,474 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1858511835] [2023-11-29 02:01:04,474 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 02:01:04,474 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:01:04,474 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:04,475 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:01:04,479 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2023-11-29 02:01:04,679 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 02:01:04,679 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:01:04,681 INFO L262 TraceCheckSpWp]: Trace formula consists of 637 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-29 02:01:04,685 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:01:04,903 INFO L134 CoverageAnalysis]: Checked inductivity of 1398 backedges. 1025 proven. 208 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2023-11-29 02:01:04,904 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:01:05,187 INFO L134 CoverageAnalysis]: Checked inductivity of 1398 backedges. 1025 proven. 208 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2023-11-29 02:01:05,187 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1858511835] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:01:05,188 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:01:05,188 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 31 [2023-11-29 02:01:05,188 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1723716902] [2023-11-29 02:01:05,188 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:01:05,188 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:01:05,189 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:05,189 INFO L85 PathProgramCache]: Analyzing trace with hash 879476375, now seen corresponding path program 6 times [2023-11-29 02:01:05,189 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:05,189 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [512001799] [2023-11-29 02:01:05,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:05,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:05,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:05,198 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:01:05,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:05,207 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:01:05,696 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:01:05,696 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2023-11-29 02:01:05,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=180, Invalid=750, Unknown=0, NotChecked=0, Total=930 [2023-11-29 02:01:05,697 INFO L87 Difference]: Start difference. First operand 216 states and 229 transitions. cyclomatic complexity: 20 Second operand has 31 states, 31 states have (on average 3.6774193548387095) internal successors, (114), 31 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:06,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:01:06,676 INFO L93 Difference]: Finished difference Result 200 states and 206 transitions. [2023-11-29 02:01:06,676 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 200 states and 206 transitions. [2023-11-29 02:01:06,678 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 23 [2023-11-29 02:01:06,679 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 200 states to 178 states and 184 transitions. [2023-11-29 02:01:06,679 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 75 [2023-11-29 02:01:06,680 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 115 [2023-11-29 02:01:06,680 INFO L73 IsDeterministic]: Start isDeterministic. Operand 178 states and 184 transitions. [2023-11-29 02:01:06,680 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:01:06,680 INFO L218 hiAutomatonCegarLoop]: Abstraction has 178 states and 184 transitions. [2023-11-29 02:01:06,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states and 184 transitions. [2023-11-29 02:01:06,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 155. [2023-11-29 02:01:06,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 155 states have (on average 1.038709677419355) internal successors, (161), 154 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:06,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 161 transitions. [2023-11-29 02:01:06,683 INFO L240 hiAutomatonCegarLoop]: Abstraction has 155 states and 161 transitions. [2023-11-29 02:01:06,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2023-11-29 02:01:06,684 INFO L428 stractBuchiCegarLoop]: Abstraction has 155 states and 161 transitions. [2023-11-29 02:01:06,684 INFO L335 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2023-11-29 02:01:06,684 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 155 states and 161 transitions. [2023-11-29 02:01:06,684 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 22 [2023-11-29 02:01:06,684 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:01:06,684 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:01:06,686 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [42, 42, 10, 9, 9, 9, 9, 1, 1] [2023-11-29 02:01:06,686 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [7, 7, 1, 1, 1, 1, 1] [2023-11-29 02:01:06,687 INFO L748 eck$LassoCheckResult]: Stem: 7008#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7009#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 7012#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7151#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7150#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7148#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7014#L17-4 foo_#res#1 := foo_~i~0#1; 7015#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7106#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7013#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7010#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6997#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6998#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7149#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7147#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7146#L17-4 foo_#res#1 := foo_~i~0#1; 7107#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7108#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7145#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7144#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7143#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7142#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7141#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7140#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7139#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7138#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7137#L17-4 foo_#res#1 := foo_~i~0#1; 7136#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7135#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7134#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7133#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7132#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7131#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7130#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7129#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7128#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7127#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7126#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7125#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7124#L17-4 foo_#res#1 := foo_~i~0#1; 7123#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7122#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7121#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7120#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7119#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7118#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7117#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7116#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7115#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7114#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7113#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7112#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7111#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7110#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7109#L17-4 foo_#res#1 := foo_~i~0#1; 7001#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7002#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7006#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7105#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7104#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7011#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6999#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7000#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7103#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7102#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7101#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7100#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7099#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7098#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7097#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7096#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7095#L17-4 foo_#res#1 := foo_~i~0#1; 7094#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7093#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7092#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7091#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7090#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7089#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7088#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7087#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7086#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7085#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7084#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7083#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7082#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7081#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7080#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7079#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7078#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7077#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7076#L17-4 foo_#res#1 := foo_~i~0#1; 7075#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7074#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7073#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7072#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7071#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7070#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7069#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7068#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7067#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7066#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7065#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7064#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7063#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7062#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7061#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7060#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7059#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7058#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7057#L17-4 foo_#res#1 := foo_~i~0#1; 7056#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7055#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7054#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7053#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7052#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7051#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7050#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7049#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7048#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7047#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7046#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7045#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7044#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7043#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7042#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7041#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7040#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7039#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7038#L17-4 foo_#res#1 := foo_~i~0#1; 7037#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7036#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7035#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7017#L17-3 [2023-11-29 02:01:06,687 INFO L750 eck$LassoCheckResult]: Loop: 7017#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7034#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7033#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7032#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7031#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7030#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7029#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7028#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7027#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7026#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7025#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7024#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7023#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7022#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7021#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7020#L17-4 foo_#res#1 := foo_~i~0#1; 7019#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7018#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7016#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7017#L17-3 [2023-11-29 02:01:06,688 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:06,688 INFO L85 PathProgramCache]: Analyzing trace with hash 59298289, now seen corresponding path program 17 times [2023-11-29 02:01:06,688 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:06,688 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2140911759] [2023-11-29 02:01:06,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:06,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:06,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:01:07,466 INFO L134 CoverageAnalysis]: Checked inductivity of 2289 backedges. 1043 proven. 182 refuted. 0 times theorem prover too weak. 1064 trivial. 0 not checked. [2023-11-29 02:01:07,466 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:01:07,466 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2140911759] [2023-11-29 02:01:07,466 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2140911759] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:01:07,466 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1621162998] [2023-11-29 02:01:07,466 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 02:01:07,466 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:01:07,466 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:07,467 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:01:07,468 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2023-11-29 02:01:08,306 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2023-11-29 02:01:08,306 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:01:08,311 INFO L262 TraceCheckSpWp]: Trace formula consists of 627 conjuncts, 22 conjunts are in the unsatisfiable core [2023-11-29 02:01:08,313 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:01:08,649 INFO L134 CoverageAnalysis]: Checked inductivity of 2289 backedges. 1500 proven. 591 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2023-11-29 02:01:08,649 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:01:09,034 INFO L134 CoverageAnalysis]: Checked inductivity of 2289 backedges. 1627 proven. 464 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2023-11-29 02:01:09,034 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1621162998] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:01:09,035 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:01:09,035 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19] total 46 [2023-11-29 02:01:09,035 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [939535662] [2023-11-29 02:01:09,035 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:01:09,036 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:01:09,036 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:09,036 INFO L85 PathProgramCache]: Analyzing trace with hash 1302888401, now seen corresponding path program 7 times [2023-11-29 02:01:09,036 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:09,036 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204624272] [2023-11-29 02:01:09,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:09,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:09,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:09,053 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:01:09,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:09,067 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:01:10,288 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:01:10,289 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2023-11-29 02:01:10,290 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=369, Invalid=1701, Unknown=0, NotChecked=0, Total=2070 [2023-11-29 02:01:10,290 INFO L87 Difference]: Start difference. First operand 155 states and 161 transitions. cyclomatic complexity: 12 Second operand has 46 states, 46 states have (on average 2.717391304347826) internal successors, (125), 46 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:11,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:01:11,386 INFO L93 Difference]: Finished difference Result 202 states and 214 transitions. [2023-11-29 02:01:11,386 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 202 states and 214 transitions. [2023-11-29 02:01:11,387 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 26 [2023-11-29 02:01:11,388 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 202 states to 198 states and 210 transitions. [2023-11-29 02:01:11,388 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 108 [2023-11-29 02:01:11,389 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 108 [2023-11-29 02:01:11,389 INFO L73 IsDeterministic]: Start isDeterministic. Operand 198 states and 210 transitions. [2023-11-29 02:01:11,389 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:01:11,389 INFO L218 hiAutomatonCegarLoop]: Abstraction has 198 states and 210 transitions. [2023-11-29 02:01:11,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states and 210 transitions. [2023-11-29 02:01:11,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 172. [2023-11-29 02:01:11,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 172 states, 172 states have (on average 1.0406976744186047) internal successors, (179), 171 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:11,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 179 transitions. [2023-11-29 02:01:11,393 INFO L240 hiAutomatonCegarLoop]: Abstraction has 172 states and 179 transitions. [2023-11-29 02:01:11,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2023-11-29 02:01:11,394 INFO L428 stractBuchiCegarLoop]: Abstraction has 172 states and 179 transitions. [2023-11-29 02:01:11,394 INFO L335 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2023-11-29 02:01:11,394 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 172 states and 179 transitions. [2023-11-29 02:01:11,395 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 24 [2023-11-29 02:01:11,395 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:01:11,395 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:01:11,396 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [44, 44, 10, 9, 9, 9, 9, 1, 1] [2023-11-29 02:01:11,396 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [8, 8, 1, 1, 1, 1, 1] [2023-11-29 02:01:11,396 INFO L748 eck$LassoCheckResult]: Stem: 8281#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 8282#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 8285#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8440#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8438#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8436#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8435#L17-4 foo_#res#1 := foo_~i~0#1; 8434#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 8278#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8279#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8283#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8269#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8270#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8439#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8437#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8286#L17-4 foo_#res#1 := foo_~i~0#1; 8273#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 8274#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8433#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8432#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8431#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8430#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8429#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8428#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8427#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8426#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8425#L17-4 foo_#res#1 := foo_~i~0#1; 8424#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 8423#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8422#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8421#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8420#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8419#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8418#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8417#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8416#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8415#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8414#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8413#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8412#L17-4 foo_#res#1 := foo_~i~0#1; 8411#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 8410#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8409#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8408#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8407#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8406#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8405#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8404#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8403#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8402#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8401#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8400#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8399#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8398#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8397#L17-4 foo_#res#1 := foo_~i~0#1; 8396#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 8395#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8394#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8393#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8392#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8391#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8271#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8272#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8284#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8390#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8389#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8388#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8387#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8385#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8382#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8380#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8378#L17-4 foo_#res#1 := foo_~i~0#1; 8376#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 8374#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8372#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8370#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8368#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8366#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8365#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8364#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8363#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8362#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8361#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8360#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8359#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8358#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8357#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8356#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8355#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8354#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8353#L17-4 foo_#res#1 := foo_~i~0#1; 8352#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 8351#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8350#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8349#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8348#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8347#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8346#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8345#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8344#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8343#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8342#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8341#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8340#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8339#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8338#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8337#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8336#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8335#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8334#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8333#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8332#L17-4 foo_#res#1 := foo_~i~0#1; 8331#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 8330#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8329#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8328#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8327#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8326#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8325#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8324#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8323#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8322#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8321#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8320#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8319#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8318#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8317#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8316#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8315#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8314#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8313#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8312#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8311#L17-4 foo_#res#1 := foo_~i~0#1; 8310#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 8309#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8308#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8288#L17-3 [2023-11-29 02:01:11,396 INFO L750 eck$LassoCheckResult]: Loop: 8288#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8307#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8306#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8305#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8304#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8303#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8302#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8301#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8300#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8299#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8298#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8297#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8296#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8295#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8294#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 8293#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 8292#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8291#L17-4 foo_#res#1 := foo_~i~0#1; 8290#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 8289#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8287#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8288#L17-3 [2023-11-29 02:01:11,397 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:11,397 INFO L85 PathProgramCache]: Analyzing trace with hash -1602826063, now seen corresponding path program 18 times [2023-11-29 02:01:11,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:11,397 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242977033] [2023-11-29 02:01:11,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:11,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:11,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:01:11,983 INFO L134 CoverageAnalysis]: Checked inductivity of 2477 backedges. 1454 proven. 819 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2023-11-29 02:01:11,983 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:01:11,983 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242977033] [2023-11-29 02:01:11,983 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1242977033] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:01:11,983 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1442695948] [2023-11-29 02:01:11,983 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 02:01:11,983 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:01:11,984 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:11,985 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:01:11,985 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2023-11-29 02:01:12,731 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2023-11-29 02:01:12,731 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:01:12,736 INFO L262 TraceCheckSpWp]: Trace formula consists of 780 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-29 02:01:12,738 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:01:13,060 INFO L134 CoverageAnalysis]: Checked inductivity of 2477 backedges. 1419 proven. 849 refuted. 0 times theorem prover too weak. 209 trivial. 0 not checked. [2023-11-29 02:01:13,060 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:01:13,446 INFO L134 CoverageAnalysis]: Checked inductivity of 2477 backedges. 1589 proven. 679 refuted. 0 times theorem prover too weak. 209 trivial. 0 not checked. [2023-11-29 02:01:13,446 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1442695948] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:01:13,446 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:01:13,446 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21, 21] total 44 [2023-11-29 02:01:13,446 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1331042433] [2023-11-29 02:01:13,446 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:01:13,447 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:01:13,447 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:13,447 INFO L85 PathProgramCache]: Analyzing trace with hash -403544433, now seen corresponding path program 8 times [2023-11-29 02:01:13,447 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:13,447 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1454991706] [2023-11-29 02:01:13,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:13,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:13,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:13,461 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:01:13,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:13,473 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:01:14,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:01:14,916 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2023-11-29 02:01:14,917 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=365, Invalid=1527, Unknown=0, NotChecked=0, Total=1892 [2023-11-29 02:01:14,917 INFO L87 Difference]: Start difference. First operand 172 states and 179 transitions. cyclomatic complexity: 13 Second operand has 44 states, 44 states have (on average 3.090909090909091) internal successors, (136), 44 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:16,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:01:16,612 INFO L93 Difference]: Finished difference Result 220 states and 231 transitions. [2023-11-29 02:01:16,613 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 220 states and 231 transitions. [2023-11-29 02:01:16,615 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 28 [2023-11-29 02:01:16,616 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 220 states to 218 states and 229 transitions. [2023-11-29 02:01:16,616 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 128 [2023-11-29 02:01:16,617 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 128 [2023-11-29 02:01:16,617 INFO L73 IsDeterministic]: Start isDeterministic. Operand 218 states and 229 transitions. [2023-11-29 02:01:16,617 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:01:16,617 INFO L218 hiAutomatonCegarLoop]: Abstraction has 218 states and 229 transitions. [2023-11-29 02:01:16,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states and 229 transitions. [2023-11-29 02:01:16,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 176. [2023-11-29 02:01:16,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 176 states have (on average 1.0397727272727273) internal successors, (183), 175 states have internal predecessors, (183), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:16,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 183 transitions. [2023-11-29 02:01:16,621 INFO L240 hiAutomatonCegarLoop]: Abstraction has 176 states and 183 transitions. [2023-11-29 02:01:16,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2023-11-29 02:01:16,622 INFO L428 stractBuchiCegarLoop]: Abstraction has 176 states and 183 transitions. [2023-11-29 02:01:16,622 INFO L335 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2023-11-29 02:01:16,622 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 176 states and 183 transitions. [2023-11-29 02:01:16,623 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 26 [2023-11-29 02:01:16,623 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:01:16,623 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:01:16,625 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [45, 45, 10, 9, 9, 9, 9, 1, 1] [2023-11-29 02:01:16,625 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 1, 1, 1, 1, 1] [2023-11-29 02:01:16,625 INFO L748 eck$LassoCheckResult]: Stem: 9644#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9645#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 9646#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9807#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9806#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9804#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9649#L17-4 foo_#res#1 := foo_~i~0#1; 9650#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 9641#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9642#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9647#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9632#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9633#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9805#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9803#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9802#L17-4 foo_#res#1 := foo_~i~0#1; 9636#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 9637#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9801#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9800#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9799#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9798#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9797#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9796#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9795#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9794#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9793#L17-4 foo_#res#1 := foo_~i~0#1; 9792#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 9791#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9790#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9789#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9788#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9787#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9786#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9785#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9784#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9783#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9782#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9781#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9780#L17-4 foo_#res#1 := foo_~i~0#1; 9779#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 9778#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9777#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9776#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9775#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9774#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9773#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9772#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9771#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9770#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9769#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9768#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9767#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9766#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9765#L17-4 foo_#res#1 := foo_~i~0#1; 9764#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 9763#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9762#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9761#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9760#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9648#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9634#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9635#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9759#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9758#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9757#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9756#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9755#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9753#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9750#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9748#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9746#L17-4 foo_#res#1 := foo_~i~0#1; 9744#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 9742#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9740#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9738#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9736#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9734#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9733#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9732#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9731#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9730#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9729#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9728#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9727#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9726#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9725#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9724#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9723#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9722#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9721#L17-4 foo_#res#1 := foo_~i~0#1; 9720#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 9719#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9718#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9717#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9716#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9715#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9714#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9713#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9712#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9711#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9710#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9709#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9708#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9707#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9706#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9705#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9704#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9703#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9702#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9701#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9700#L17-4 foo_#res#1 := foo_~i~0#1; 9699#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 9698#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9697#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9696#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9695#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9694#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9693#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9692#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9691#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9690#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9689#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9688#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9687#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9686#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9685#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9684#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9683#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9682#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9681#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9680#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9679#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9678#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9677#L17-4 foo_#res#1 := foo_~i~0#1; 9676#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 9675#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9674#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9652#L17-3 [2023-11-29 02:01:16,625 INFO L750 eck$LassoCheckResult]: Loop: 9652#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9673#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9672#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9671#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9670#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9669#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9668#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9667#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9666#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9665#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9664#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9663#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9662#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9661#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9660#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9659#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9658#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 9657#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 9656#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9655#L17-4 foo_#res#1 := foo_~i~0#1; 9654#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 9653#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9651#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9652#L17-3 [2023-11-29 02:01:16,626 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:16,626 INFO L85 PathProgramCache]: Analyzing trace with hash -1066401937, now seen corresponding path program 19 times [2023-11-29 02:01:16,626 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:16,626 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740224842] [2023-11-29 02:01:16,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:16,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:16,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:16,716 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:01:16,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:16,778 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:01:16,778 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:16,779 INFO L85 PathProgramCache]: Analyzing trace with hash 392009165, now seen corresponding path program 9 times [2023-11-29 02:01:16,779 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:16,779 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1172575371] [2023-11-29 02:01:16,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:16,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:16,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:16,792 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:01:16,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:16,806 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:01:16,806 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:16,806 INFO L85 PathProgramCache]: Analyzing trace with hash 537533087, now seen corresponding path program 20 times [2023-11-29 02:01:16,806 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:16,806 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034831442] [2023-11-29 02:01:16,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:16,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:16,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:01:17,516 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 2241 proven. 1111 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2023-11-29 02:01:17,516 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:01:17,516 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1034831442] [2023-11-29 02:01:17,516 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1034831442] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:01:17,516 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [716816916] [2023-11-29 02:01:17,516 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 02:01:17,517 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:01:17,517 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:01:17,518 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:01:17,518 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2023-11-29 02:01:17,752 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 02:01:17,753 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:01:17,757 INFO L262 TraceCheckSpWp]: Trace formula consists of 918 conjuncts, 23 conjunts are in the unsatisfiable core [2023-11-29 02:01:17,760 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:01:18,182 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 2326 proven. 1026 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2023-11-29 02:01:18,182 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:01:18,576 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 2326 proven. 1026 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2023-11-29 02:01:18,576 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [716816916] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:01:18,576 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:01:18,577 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22] total 43 [2023-11-29 02:01:18,577 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1756769601] [2023-11-29 02:01:18,577 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:01:20,732 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:01:20,732 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2023-11-29 02:01:20,733 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=394, Invalid=1412, Unknown=0, NotChecked=0, Total=1806 [2023-11-29 02:01:20,733 INFO L87 Difference]: Start difference. First operand 176 states and 183 transitions. cyclomatic complexity: 13 Second operand has 43 states, 43 states have (on average 3.186046511627907) internal successors, (137), 43 states have internal predecessors, (137), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:22,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:01:22,363 INFO L93 Difference]: Finished difference Result 224 states and 235 transitions. [2023-11-29 02:01:22,363 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 224 states and 235 transitions. [2023-11-29 02:01:22,365 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 30 [2023-11-29 02:01:22,367 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 224 states to 223 states and 234 transitions. [2023-11-29 02:01:22,367 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 131 [2023-11-29 02:01:22,368 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 131 [2023-11-29 02:01:22,368 INFO L73 IsDeterministic]: Start isDeterministic. Operand 223 states and 234 transitions. [2023-11-29 02:01:22,368 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:01:22,368 INFO L218 hiAutomatonCegarLoop]: Abstraction has 223 states and 234 transitions. [2023-11-29 02:01:22,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states and 234 transitions. [2023-11-29 02:01:22,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 178. [2023-11-29 02:01:22,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 178 states, 178 states have (on average 1.0393258426966292) internal successors, (185), 177 states have internal predecessors, (185), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:01:22,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 185 transitions. [2023-11-29 02:01:22,371 INFO L240 hiAutomatonCegarLoop]: Abstraction has 178 states and 185 transitions. [2023-11-29 02:01:22,372 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2023-11-29 02:01:22,372 INFO L428 stractBuchiCegarLoop]: Abstraction has 178 states and 185 transitions. [2023-11-29 02:01:22,372 INFO L335 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2023-11-29 02:01:22,372 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 178 states and 185 transitions. [2023-11-29 02:01:22,373 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 28 [2023-11-29 02:01:22,374 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:01:22,374 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:01:22,375 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [45, 45, 10, 9, 9, 9, 9, 1, 1] [2023-11-29 02:01:22,375 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 1, 1, 1, 1, 1] [2023-11-29 02:01:22,375 INFO L748 eck$LassoCheckResult]: Stem: 11170#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 11171#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 11172#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11335#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11334#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11332#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11175#L17-4 foo_#res#1 := foo_~i~0#1; 11176#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 11167#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11168#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11173#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11158#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11159#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11333#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11331#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11330#L17-4 foo_#res#1 := foo_~i~0#1; 11162#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 11163#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11329#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11328#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11327#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11326#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11325#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11324#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11323#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11322#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11321#L17-4 foo_#res#1 := foo_~i~0#1; 11320#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 11319#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11318#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11317#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11316#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11315#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11314#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11313#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11312#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11311#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11310#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11309#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11308#L17-4 foo_#res#1 := foo_~i~0#1; 11307#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 11306#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11305#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11304#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11303#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11302#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11301#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11300#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11299#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11298#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11297#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11296#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11295#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11294#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11293#L17-4 foo_#res#1 := foo_~i~0#1; 11292#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 11291#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11290#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11289#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11288#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11174#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11160#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11161#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11287#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11286#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11285#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11284#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11282#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11280#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11277#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11275#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11273#L17-4 foo_#res#1 := foo_~i~0#1; 11271#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 11269#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11267#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11265#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11263#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11262#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11261#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11260#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11259#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11258#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11257#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11256#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11255#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11254#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11253#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11252#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11251#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11250#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11249#L17-4 foo_#res#1 := foo_~i~0#1; 11248#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 11247#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11246#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11245#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11244#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11243#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11242#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11241#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11240#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11239#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11238#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11237#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11236#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11235#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11234#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11233#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11232#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11231#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11230#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11229#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11228#L17-4 foo_#res#1 := foo_~i~0#1; 11227#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 11226#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11225#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11224#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11223#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11222#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11221#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11220#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11219#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11218#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11217#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11216#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11215#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11214#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11213#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11212#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11211#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11210#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11209#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11208#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11207#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11206#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11205#L17-4 foo_#res#1 := foo_~i~0#1; 11204#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 11203#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11202#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11178#L17-3 [2023-11-29 02:01:22,376 INFO L750 eck$LassoCheckResult]: Loop: 11178#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11201#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11200#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11199#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11198#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11197#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11196#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11195#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11194#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11193#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11192#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11191#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11190#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11189#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11188#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11187#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11186#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11185#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11184#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 11183#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 11182#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11181#L17-4 foo_#res#1 := foo_~i~0#1; 11180#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 11179#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11177#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11178#L17-3 [2023-11-29 02:01:22,376 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:22,376 INFO L85 PathProgramCache]: Analyzing trace with hash -1066401937, now seen corresponding path program 21 times [2023-11-29 02:01:22,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:22,376 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [977787809] [2023-11-29 02:01:22,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:22,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:22,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:22,449 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:01:22,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:22,541 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:01:22,542 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:22,542 INFO L85 PathProgramCache]: Analyzing trace with hash 414838155, now seen corresponding path program 10 times [2023-11-29 02:01:22,542 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:22,542 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508777090] [2023-11-29 02:01:22,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:22,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:22,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:22,562 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:01:22,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:22,579 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:01:22,579 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:01:22,580 INFO L85 PathProgramCache]: Analyzing trace with hash -1470593571, now seen corresponding path program 22 times [2023-11-29 02:01:22,580 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:01:22,580 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1715408261] [2023-11-29 02:01:22,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:01:22,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:01:22,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:22,688 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:01:22,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:01:22,798 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:03:37,557 WARN L293 SmtUtils]: Spent 2.20m on a formula simplification. DAG size of input: 1023 DAG size of output: 665 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 02:03:39,442 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 02:03:39,443 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 02:03:39,443 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 02:03:39,443 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 02:03:39,443 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 02:03:39,443 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:39,443 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 02:03:39,443 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 02:03:39,443 INFO L133 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration19_Lasso [2023-11-29 02:03:39,443 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 02:03:39,443 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 02:03:39,446 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:03:39,448 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:03:39,450 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:03:39,451 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:03:39,453 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:03:39,455 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:03:39,456 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:03:39,458 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:03:39,460 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:03:40,380 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:03:40,893 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 02:03:40,893 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 02:03:40,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:40,893 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:40,894 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:40,895 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2023-11-29 02:03:40,896 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:03:40,906 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:03:40,906 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:03:40,906 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:03:40,906 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:03:40,906 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:03:40,907 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:03:40,907 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:03:40,908 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:03:40,910 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Forceful destruction successful, exit code 0 [2023-11-29 02:03:40,910 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:40,910 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:40,911 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:40,912 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2023-11-29 02:03:40,913 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:03:40,923 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:03:40,923 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:03:40,923 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:03:40,923 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:03:40,923 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:03:40,923 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:03:40,923 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:03:40,925 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:03:40,927 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Ended with exit code 0 [2023-11-29 02:03:40,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:40,927 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:40,928 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:40,929 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2023-11-29 02:03:40,930 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:03:40,940 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:03:40,940 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:03:40,940 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:03:40,940 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:03:40,940 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:03:40,941 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:03:40,941 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:03:40,942 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:03:40,944 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Forceful destruction successful, exit code 0 [2023-11-29 02:03:40,944 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:40,944 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:40,945 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:40,946 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2023-11-29 02:03:40,947 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:03:40,957 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:03:40,957 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:03:40,957 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:03:40,957 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:03:40,957 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:03:40,958 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:03:40,958 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:03:40,959 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:03:40,961 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Forceful destruction successful, exit code 0 [2023-11-29 02:03:40,961 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:40,961 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:40,962 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:40,963 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2023-11-29 02:03:40,964 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:03:40,974 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:03:40,974 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:03:40,974 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:03:40,974 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:03:40,974 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:03:40,975 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:03:40,975 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:03:40,976 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:03:40,978 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Forceful destruction successful, exit code 0 [2023-11-29 02:03:40,978 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:40,979 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:40,979 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:40,980 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Waiting until timeout for monitored process [2023-11-29 02:03:40,982 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:03:40,991 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:03:40,992 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:03:40,992 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:03:40,992 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:03:40,992 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:03:40,992 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:03:40,992 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:03:40,994 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:03:40,996 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Ended with exit code 0 [2023-11-29 02:03:40,997 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:40,997 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:40,998 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:40,998 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Waiting until timeout for monitored process [2023-11-29 02:03:41,000 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:03:41,009 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:03:41,010 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:03:41,010 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:03:41,010 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:03:41,010 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:03:41,010 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:03:41,010 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:03:41,011 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:03:41,014 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Ended with exit code 0 [2023-11-29 02:03:41,014 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:41,014 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:41,015 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:41,016 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Waiting until timeout for monitored process [2023-11-29 02:03:41,017 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:03:41,027 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:03:41,027 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:03:41,027 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:03:41,027 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:03:41,028 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:03:41,028 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:03:41,032 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:03:41,034 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Ended with exit code 0 [2023-11-29 02:03:41,034 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:41,034 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:41,035 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:41,036 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Waiting until timeout for monitored process [2023-11-29 02:03:41,037 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:03:41,047 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:03:41,047 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:03:41,047 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:03:41,047 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:03:41,048 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:03:41,049 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:03:41,052 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:03:41,054 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Ended with exit code 0 [2023-11-29 02:03:41,054 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:41,055 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:41,055 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:41,056 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Waiting until timeout for monitored process [2023-11-29 02:03:41,058 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:03:41,067 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:03:41,068 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:03:41,068 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:03:41,068 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:03:41,069 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:03:41,069 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:03:41,072 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:03:41,074 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Forceful destruction successful, exit code 0 [2023-11-29 02:03:41,074 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:41,074 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:41,075 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:41,076 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Waiting until timeout for monitored process [2023-11-29 02:03:41,077 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:03:41,088 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:03:41,088 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:03:41,088 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:03:41,088 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:03:41,100 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:03:41,100 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:03:41,128 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 02:03:41,188 INFO L443 ModelExtractionUtils]: Simplification made 18 calls to the SMT solver. [2023-11-29 02:03:41,188 INFO L444 ModelExtractionUtils]: 11 out of 46 variables were initially zero. Simplification set additionally 31 variables to zero. [2023-11-29 02:03:41,189 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:03:41,189 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:41,190 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:03:41,191 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (52)] Waiting until timeout for monitored process [2023-11-29 02:03:41,192 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 02:03:41,202 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2023-11-29 02:03:41,203 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 02:03:41,203 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1, v_rep(select #length ULTIMATE.start_main_~#b~0#1.base)_4) = -4*ULTIMATE.start_main_~i~1#1 + 1*v_rep(select #length ULTIMATE.start_main_~#b~0#1.base)_4 Supporting invariants [1*ULTIMATE.start_main_~#b~0#1.offset >= 0] [2023-11-29 02:03:41,206 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Ended with exit code 0 [2023-11-29 02:03:41,248 INFO L156 tatePredicateManager]: 11 out of 12 supporting invariants were superfluous and have been removed [2023-11-29 02:03:41,250 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#b~0!base] could not be translated [2023-11-29 02:03:41,267 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:03:41,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:03:41,397 INFO L262 TraceCheckSpWp]: Trace formula consists of 791 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-29 02:03:41,399 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:03:41,452 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (52)] Ended with exit code 0 [2023-11-29 02:03:42,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:03:42,258 INFO L262 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 5 conjunts are in the unsatisfiable core [2023-11-29 02:03:42,259 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:03:42,473 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2023-11-29 02:03:42,474 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.2 stem predicates 3 loop predicates [2023-11-29 02:03:42,474 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 178 states and 185 transitions. cyclomatic complexity: 13 Second operand has 6 states, 6 states have (on average 3.0) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:03:42,515 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 178 states and 185 transitions. cyclomatic complexity: 13. Second operand has 6 states, 6 states have (on average 3.0) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 338 states and 352 transitions. Complement of second has 8 states. [2023-11-29 02:03:42,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 2 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-29 02:03:42,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.0) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:03:42,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 12 transitions. [2023-11-29 02:03:42,516 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 12 transitions. Stem has 138 letters. Loop has 25 letters. [2023-11-29 02:03:42,517 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:03:42,517 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 12 transitions. Stem has 163 letters. Loop has 25 letters. [2023-11-29 02:03:42,518 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:03:42,518 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 12 transitions. Stem has 138 letters. Loop has 50 letters. [2023-11-29 02:03:42,518 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:03:42,518 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 338 states and 352 transitions. [2023-11-29 02:03:42,522 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:03:42,524 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 338 states to 178 states and 185 transitions. [2023-11-29 02:03:42,524 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-29 02:03:42,524 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:03:42,524 INFO L73 IsDeterministic]: Start isDeterministic. Operand 178 states and 185 transitions. [2023-11-29 02:03:42,524 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:03:42,524 INFO L218 hiAutomatonCegarLoop]: Abstraction has 178 states and 185 transitions. [2023-11-29 02:03:42,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states and 185 transitions. [2023-11-29 02:03:42,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 176. [2023-11-29 02:03:42,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 176 states have (on average 1.0397727272727273) internal successors, (183), 175 states have internal predecessors, (183), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:03:42,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 183 transitions. [2023-11-29 02:03:42,528 INFO L240 hiAutomatonCegarLoop]: Abstraction has 176 states and 183 transitions. [2023-11-29 02:03:42,528 INFO L428 stractBuchiCegarLoop]: Abstraction has 176 states and 183 transitions. [2023-11-29 02:03:42,529 INFO L335 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2023-11-29 02:03:42,529 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 176 states and 183 transitions. [2023-11-29 02:03:42,530 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:03:42,530 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:03:42,530 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:03:42,531 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [55, 55, 10, 10, 10, 10, 10, 1, 1, 1, 1] [2023-11-29 02:03:42,532 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:03:42,532 INFO L748 eck$LassoCheckResult]: Stem: 12251#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 12252#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 12256#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12253#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12254#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12416#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12258#L17-4 foo_#res#1 := foo_~i~0#1; 12259#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 12413#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12257#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12255#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12242#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12243#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12417#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12415#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12414#L17-4 foo_#res#1 := foo_~i~0#1; 12244#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 12245#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12249#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12412#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12411#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12410#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12409#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12408#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12407#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12406#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12405#L17-4 foo_#res#1 := foo_~i~0#1; 12404#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 12403#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12402#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12401#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12400#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12399#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12398#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12397#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12396#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12395#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12394#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12393#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12392#L17-4 foo_#res#1 := foo_~i~0#1; 12391#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 12390#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12389#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12388#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12387#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12386#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12385#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12384#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12383#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12382#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12381#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12380#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12379#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12378#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12377#L17-4 foo_#res#1 := foo_~i~0#1; 12376#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 12375#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12374#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12373#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12372#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12371#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12370#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12369#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12368#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12367#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12366#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12365#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12364#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12362#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12359#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12357#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12355#L17-4 foo_#res#1 := foo_~i~0#1; 12353#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 12351#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12349#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12347#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12346#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12345#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12344#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12343#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12342#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12341#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12340#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12339#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12338#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12337#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12336#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12335#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12334#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12333#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12332#L17-4 foo_#res#1 := foo_~i~0#1; 12331#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 12330#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12329#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12328#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12327#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12326#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12325#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12324#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12323#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12322#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12321#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12320#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12319#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12318#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12317#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12316#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12315#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12314#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12313#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12312#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12311#L17-4 foo_#res#1 := foo_~i~0#1; 12310#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 12309#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12308#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12307#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12306#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12305#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12304#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12303#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12302#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12301#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12300#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12299#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12298#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12297#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12296#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12295#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12294#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12293#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12292#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12291#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12290#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12289#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12288#L17-4 foo_#res#1 := foo_~i~0#1; 12287#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 12286#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12285#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12261#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12284#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12283#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12282#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12281#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12280#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12279#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12278#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12277#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12276#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12275#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12274#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12273#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12272#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12271#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12270#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12269#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12268#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12267#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 12266#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 12265#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12264#L17-4 foo_#res#1 := foo_~i~0#1; 12263#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 12262#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12260#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 12250#L26-4 main_~i~1#1 := 0; 12246#L29-3 [2023-11-29 02:03:42,532 INFO L750 eck$LassoCheckResult]: Loop: 12246#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 12247#L30 assume !(main_#t~mem5#1 != main_~i~1#1);havoc main_#t~mem5#1; 12248#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12246#L29-3 [2023-11-29 02:03:42,533 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:03:42,533 INFO L85 PathProgramCache]: Analyzing trace with hash 1656239525, now seen corresponding path program 3 times [2023-11-29 02:03:42,533 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:03:42,533 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1719275339] [2023-11-29 02:03:42,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:03:42,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:03:42,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:03:43,087 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 0 proven. 3370 refuted. 0 times theorem prover too weak. 385 trivial. 0 not checked. [2023-11-29 02:03:43,087 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:03:43,087 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1719275339] [2023-11-29 02:03:43,087 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1719275339] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:03:43,087 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [32175851] [2023-11-29 02:03:43,088 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 02:03:43,088 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:03:43,088 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:43,089 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:03:43,095 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2023-11-29 02:03:43,508 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2023-11-29 02:03:43,508 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:03:43,512 INFO L262 TraceCheckSpWp]: Trace formula consists of 563 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-29 02:03:43,515 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:03:44,064 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 208 proven. 1785 refuted. 0 times theorem prover too weak. 1762 trivial. 0 not checked. [2023-11-29 02:03:44,064 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:03:44,914 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 0 proven. 1993 refuted. 0 times theorem prover too weak. 1762 trivial. 0 not checked. [2023-11-29 02:03:44,914 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [32175851] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:03:44,914 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:03:44,914 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 19, 19] total 47 [2023-11-29 02:03:44,915 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [136558734] [2023-11-29 02:03:44,915 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:03:44,915 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:03:44,915 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:03:44,915 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 3 times [2023-11-29 02:03:44,915 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:03:44,915 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486840100] [2023-11-29 02:03:44,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:03:44,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:03:44,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:03:44,919 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:03:44,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:03:44,922 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:03:44,963 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:03:44,964 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2023-11-29 02:03:44,965 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=682, Invalid=1480, Unknown=0, NotChecked=0, Total=2162 [2023-11-29 02:03:44,965 INFO L87 Difference]: Start difference. First operand 176 states and 183 transitions. cyclomatic complexity: 13 Second operand has 47 states, 47 states have (on average 3.404255319148936) internal successors, (160), 47 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:03:49,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:03:49,538 INFO L93 Difference]: Finished difference Result 433 states and 478 transitions. [2023-11-29 02:03:49,538 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 433 states and 478 transitions. [2023-11-29 02:03:49,540 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:03:49,543 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 433 states to 433 states and 478 transitions. [2023-11-29 02:03:49,543 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 45 [2023-11-29 02:03:49,544 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 45 [2023-11-29 02:03:49,544 INFO L73 IsDeterministic]: Start isDeterministic. Operand 433 states and 478 transitions. [2023-11-29 02:03:49,544 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:03:49,544 INFO L218 hiAutomatonCegarLoop]: Abstraction has 433 states and 478 transitions. [2023-11-29 02:03:49,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 433 states and 478 transitions. [2023-11-29 02:03:49,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 433 to 279. [2023-11-29 02:03:49,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 279 states, 279 states have (on average 1.086021505376344) internal successors, (303), 278 states have internal predecessors, (303), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:03:49,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 279 states to 279 states and 303 transitions. [2023-11-29 02:03:49,549 INFO L240 hiAutomatonCegarLoop]: Abstraction has 279 states and 303 transitions. [2023-11-29 02:03:49,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 134 states. [2023-11-29 02:03:49,550 INFO L428 stractBuchiCegarLoop]: Abstraction has 279 states and 303 transitions. [2023-11-29 02:03:49,550 INFO L335 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2023-11-29 02:03:49,550 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 279 states and 303 transitions. [2023-11-29 02:03:49,551 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:03:49,551 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:03:49,551 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:03:49,552 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [99, 99, 13, 13, 13, 13, 13, 1, 1, 1, 1] [2023-11-29 02:03:49,552 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:03:49,553 INFO L748 eck$LassoCheckResult]: Stem: 14153#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 14154#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 14155#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14156#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14157#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14417#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14415#L17-4 foo_#res#1 := foo_~i~0#1; 14414#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14413#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14158#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14159#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14421#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14420#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14419#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14418#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14416#L17-4 foo_#res#1 := foo_~i~0#1; 14146#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14147#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14151#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14412#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14411#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14410#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14409#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14408#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14407#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14406#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14405#L17-4 foo_#res#1 := foo_~i~0#1; 14404#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14403#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14402#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14401#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14400#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14399#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14398#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14397#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14396#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14395#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14394#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14393#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14392#L17-4 foo_#res#1 := foo_~i~0#1; 14391#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14390#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14389#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14388#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14387#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14386#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14385#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14384#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14383#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14382#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14381#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14380#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14379#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14378#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14377#L17-4 foo_#res#1 := foo_~i~0#1; 14376#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14375#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14374#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14373#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14372#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14371#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14370#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14369#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14368#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14367#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14366#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14365#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14364#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14363#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14362#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14361#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14360#L17-4 foo_#res#1 := foo_~i~0#1; 14358#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14356#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14354#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14352#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14351#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14350#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14349#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14348#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14347#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14346#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14345#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14344#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14343#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14342#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14341#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14340#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14339#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14338#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14337#L17-4 foo_#res#1 := foo_~i~0#1; 14336#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14335#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14334#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14333#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14332#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14331#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14330#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14329#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14328#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14327#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14326#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14325#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14324#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14323#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14322#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14321#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14320#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14319#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14318#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14317#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14316#L17-4 foo_#res#1 := foo_~i~0#1; 14315#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14314#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14313#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14312#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14311#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14310#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14309#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14308#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14307#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14306#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14305#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14304#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14303#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14302#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14301#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14300#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14299#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14298#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14297#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14296#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14295#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14294#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14293#L17-4 foo_#res#1 := foo_~i~0#1; 14292#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14291#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14290#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14289#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14288#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14287#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14286#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14285#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14284#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14283#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14282#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14281#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14280#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14279#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14278#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14277#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14276#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14275#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14274#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14273#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14272#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14271#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14270#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14194#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14269#L17-4 foo_#res#1 := foo_~i~0#1; 14268#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14267#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14266#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14265#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14264#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14263#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14262#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14261#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14260#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14259#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14258#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14257#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14256#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14255#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14254#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14253#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14252#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14251#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14250#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14249#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14248#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14247#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14246#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14245#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14244#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14243#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14242#L17-4 foo_#res#1 := foo_~i~0#1; 14241#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14240#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14239#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14238#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14237#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14236#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14235#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14234#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14233#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14232#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14231#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14230#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14229#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14228#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14227#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14226#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14225#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14224#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14223#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14222#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14221#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14220#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14219#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14218#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14217#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14171#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14216#L17-4 foo_#res#1 := foo_~i~0#1; 14215#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14214#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14213#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14163#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14212#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14211#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14210#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14209#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14208#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14207#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14206#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14205#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14204#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14203#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14202#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14201#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14200#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14199#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14198#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14197#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14196#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14195#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14193#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14192#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14191#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14190#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14189#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14188#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14187#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14186#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14185#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14184#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14183#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14182#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14181#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14180#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14179#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14178#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14177#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14176#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14175#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14174#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14173#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14172#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14170#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14169#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 14168#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 14167#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14166#L17-4 foo_#res#1 := foo_~i~0#1; 14165#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 14164#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14162#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 14152#L26-4 main_~i~1#1 := 0; 14148#L29-3 [2023-11-29 02:03:49,553 INFO L750 eck$LassoCheckResult]: Loop: 14148#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 14149#L30 assume !(main_#t~mem5#1 != main_~i~1#1);havoc main_#t~mem5#1; 14150#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 14148#L29-3 [2023-11-29 02:03:49,553 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:03:49,553 INFO L85 PathProgramCache]: Analyzing trace with hash 2055719339, now seen corresponding path program 4 times [2023-11-29 02:03:49,553 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:03:49,553 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [337103142] [2023-11-29 02:03:49,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:03:49,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:03:49,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:03:50,690 INFO L134 CoverageAnalysis]: Checked inductivity of 11392 backedges. 8511 proven. 1887 refuted. 0 times theorem prover too weak. 994 trivial. 0 not checked. [2023-11-29 02:03:50,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:03:50,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [337103142] [2023-11-29 02:03:50,691 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [337103142] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:03:50,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1466429006] [2023-11-29 02:03:50,691 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 02:03:50,691 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:03:50,691 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:50,692 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:03:50,693 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2023-11-29 02:03:51,099 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 02:03:51,099 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:03:51,105 INFO L262 TraceCheckSpWp]: Trace formula consists of 1485 conjuncts, 27 conjunts are in the unsatisfiable core [2023-11-29 02:03:51,109 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:03:51,542 INFO L134 CoverageAnalysis]: Checked inductivity of 11392 backedges. 8627 proven. 1771 refuted. 0 times theorem prover too weak. 994 trivial. 0 not checked. [2023-11-29 02:03:51,542 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:03:52,092 INFO L134 CoverageAnalysis]: Checked inductivity of 11392 backedges. 8627 proven. 1771 refuted. 0 times theorem prover too weak. 994 trivial. 0 not checked. [2023-11-29 02:03:52,092 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1466429006] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:03:52,093 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:03:52,093 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26] total 51 [2023-11-29 02:03:52,093 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [697156410] [2023-11-29 02:03:52,093 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:03:52,093 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:03:52,093 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:03:52,094 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 4 times [2023-11-29 02:03:52,094 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:03:52,094 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [631914191] [2023-11-29 02:03:52,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:03:52,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:03:52,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:03:52,097 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:03:52,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:03:52,100 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:03:52,129 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:03:52,130 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2023-11-29 02:03:52,130 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=544, Invalid=2006, Unknown=0, NotChecked=0, Total=2550 [2023-11-29 02:03:52,131 INFO L87 Difference]: Start difference. First operand 279 states and 303 transitions. cyclomatic complexity: 31 Second operand has 51 states, 51 states have (on average 3.2941176470588234) internal successors, (168), 51 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:03:54,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:03:54,368 INFO L93 Difference]: Finished difference Result 341 states and 369 transitions. [2023-11-29 02:03:54,368 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 341 states and 369 transitions. [2023-11-29 02:03:54,370 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:03:54,373 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 341 states to 338 states and 364 transitions. [2023-11-29 02:03:54,373 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2023-11-29 02:03:54,373 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2023-11-29 02:03:54,373 INFO L73 IsDeterministic]: Start isDeterministic. Operand 338 states and 364 transitions. [2023-11-29 02:03:54,373 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:03:54,373 INFO L218 hiAutomatonCegarLoop]: Abstraction has 338 states and 364 transitions. [2023-11-29 02:03:54,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 338 states and 364 transitions. [2023-11-29 02:03:54,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 338 to 281. [2023-11-29 02:03:54,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 281 states, 281 states have (on average 1.0711743772241993) internal successors, (301), 280 states have internal predecessors, (301), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:03:54,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281 states to 281 states and 301 transitions. [2023-11-29 02:03:54,379 INFO L240 hiAutomatonCegarLoop]: Abstraction has 281 states and 301 transitions. [2023-11-29 02:03:54,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2023-11-29 02:03:54,379 INFO L428 stractBuchiCegarLoop]: Abstraction has 281 states and 301 transitions. [2023-11-29 02:03:54,380 INFO L335 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2023-11-29 02:03:54,380 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 281 states and 301 transitions. [2023-11-29 02:03:54,381 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:03:54,381 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:03:54,381 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:03:54,382 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [100, 100, 13, 13, 13, 13, 13, 1, 1, 1, 1] [2023-11-29 02:03:54,382 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:03:54,382 INFO L748 eck$LassoCheckResult]: Stem: 16591#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 16592#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 16596#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16593#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16594#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16860#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16858#L17-4 foo_#res#1 := foo_~i~0#1; 16857#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16588#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16589#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16595#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16581#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16582#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16861#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16859#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16597#L17-4 foo_#res#1 := foo_~i~0#1; 16583#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16584#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16856#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16855#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16854#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16853#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16852#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16851#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16850#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16849#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16848#L17-4 foo_#res#1 := foo_~i~0#1; 16847#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16846#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16845#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16844#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16843#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16842#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16841#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16840#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16839#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16838#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16837#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16836#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16835#L17-4 foo_#res#1 := foo_~i~0#1; 16834#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16833#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16832#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16831#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16830#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16829#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16828#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16827#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16826#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16825#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16824#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16823#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16822#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16821#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16820#L17-4 foo_#res#1 := foo_~i~0#1; 16819#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16818#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16817#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16816#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16815#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16814#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16813#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16812#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16811#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16810#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16809#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16808#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16807#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16805#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16802#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16800#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16798#L17-4 foo_#res#1 := foo_~i~0#1; 16796#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16794#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16792#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16790#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16789#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16788#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16787#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16786#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16785#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16784#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16783#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16782#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16781#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16780#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16779#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16778#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16777#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16776#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16775#L17-4 foo_#res#1 := foo_~i~0#1; 16774#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16773#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16772#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16771#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16770#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16769#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16768#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16767#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16766#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16765#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16764#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16763#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16762#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16761#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16760#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16759#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16758#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16757#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16756#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16755#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16754#L17-4 foo_#res#1 := foo_~i~0#1; 16753#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16752#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16751#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16750#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16749#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16748#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16747#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16746#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16745#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16744#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16743#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16742#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16741#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16740#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16739#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16738#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16737#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16736#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16735#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16734#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16733#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16732#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16731#L17-4 foo_#res#1 := foo_~i~0#1; 16730#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16729#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16728#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16727#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16726#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16725#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16724#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16723#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16722#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16721#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16720#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16719#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16718#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16717#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16716#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16715#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16714#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16713#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16712#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16711#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16710#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16709#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16708#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16707#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16706#L17-4 foo_#res#1 := foo_~i~0#1; 16705#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16704#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16703#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16702#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16701#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16700#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16699#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16698#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16697#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16696#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16695#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16694#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16693#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16692#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16691#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16690#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16689#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16688#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16687#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16686#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16685#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16684#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16683#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16682#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16681#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16680#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16679#L17-4 foo_#res#1 := foo_~i~0#1; 16678#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16677#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16676#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16675#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16674#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16673#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16672#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16671#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16670#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16669#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16668#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16667#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16666#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16665#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16664#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16663#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16662#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16661#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16660#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16659#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16658#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16657#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16656#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16655#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16654#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16653#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16652#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16607#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16651#L17-4 foo_#res#1 := foo_~i~0#1; 16650#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16649#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16648#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16599#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16647#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16646#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16645#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16644#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16643#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16642#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16641#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16640#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16639#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16638#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16637#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16636#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16635#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16634#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16633#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16632#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16631#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16630#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16629#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16628#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16627#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16626#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16625#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16624#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16623#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16622#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16621#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16620#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16619#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16618#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16617#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16616#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16615#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16614#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16613#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16612#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16611#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16610#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16609#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16608#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16606#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16605#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 16604#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 16603#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16602#L17-4 foo_#res#1 := foo_~i~0#1; 16601#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 16600#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16598#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 16590#L26-4 main_~i~1#1 := 0; 16585#L29-3 [2023-11-29 02:03:54,383 INFO L750 eck$LassoCheckResult]: Loop: 16585#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 16586#L30 assume !(main_#t~mem5#1 != main_~i~1#1);havoc main_#t~mem5#1; 16587#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16585#L29-3 [2023-11-29 02:03:54,383 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:03:54,383 INFO L85 PathProgramCache]: Analyzing trace with hash 502018537, now seen corresponding path program 5 times [2023-11-29 02:03:54,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:03:54,383 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707214865] [2023-11-29 02:03:54,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:03:54,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:03:54,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:03:55,962 INFO L134 CoverageAnalysis]: Checked inductivity of 11603 backedges. 660 proven. 10293 refuted. 0 times theorem prover too weak. 650 trivial. 0 not checked. [2023-11-29 02:03:55,962 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:03:55,962 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707214865] [2023-11-29 02:03:55,962 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [707214865] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:03:55,962 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1516825100] [2023-11-29 02:03:55,962 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 02:03:55,962 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:03:55,962 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:03:55,963 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:03:55,964 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2023-11-29 02:04:24,707 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2023-11-29 02:04:24,707 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:04:24,730 INFO L262 TraceCheckSpWp]: Trace formula consists of 1416 conjuncts, 41 conjunts are in the unsatisfiable core [2023-11-29 02:04:24,734 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:04:25,758 INFO L134 CoverageAnalysis]: Checked inductivity of 11603 backedges. 2454 proven. 8461 refuted. 0 times theorem prover too weak. 688 trivial. 0 not checked. [2023-11-29 02:04:25,758 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:04:26,921 INFO L134 CoverageAnalysis]: Checked inductivity of 11603 backedges. 2454 proven. 8461 refuted. 0 times theorem prover too weak. 688 trivial. 0 not checked. [2023-11-29 02:04:26,921 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1516825100] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:04:26,921 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:04:26,921 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 38, 38] total 96 [2023-11-29 02:04:26,922 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799008164] [2023-11-29 02:04:26,922 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:04:26,923 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:04:26,923 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:04:26,923 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 5 times [2023-11-29 02:04:26,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:04:26,923 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [71493104] [2023-11-29 02:04:26,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:04:26,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:04:26,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:04:26,927 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:04:26,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:04:26,929 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:04:26,965 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:04:26,966 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2023-11-29 02:04:26,970 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1849, Invalid=7271, Unknown=0, NotChecked=0, Total=9120 [2023-11-29 02:04:26,970 INFO L87 Difference]: Start difference. First operand 281 states and 301 transitions. cyclomatic complexity: 29 Second operand has 96 states, 96 states have (on average 3.1145833333333335) internal successors, (299), 96 states have internal predecessors, (299), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:04:37,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:04:37,491 INFO L93 Difference]: Finished difference Result 693 states and 741 transitions. [2023-11-29 02:04:37,491 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 693 states and 741 transitions. [2023-11-29 02:04:37,494 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:04:37,497 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 693 states to 678 states and 726 transitions. [2023-11-29 02:04:37,497 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 68 [2023-11-29 02:04:37,497 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 68 [2023-11-29 02:04:37,497 INFO L73 IsDeterministic]: Start isDeterministic. Operand 678 states and 726 transitions. [2023-11-29 02:04:37,497 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:04:37,497 INFO L218 hiAutomatonCegarLoop]: Abstraction has 678 states and 726 transitions. [2023-11-29 02:04:37,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 678 states and 726 transitions. [2023-11-29 02:04:37,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 678 to 576. [2023-11-29 02:04:37,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 576 states, 576 states have (on average 1.0833333333333333) internal successors, (624), 575 states have internal predecessors, (624), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:04:37,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 576 states to 576 states and 624 transitions. [2023-11-29 02:04:37,504 INFO L240 hiAutomatonCegarLoop]: Abstraction has 576 states and 624 transitions. [2023-11-29 02:04:37,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 318 states. [2023-11-29 02:04:37,505 INFO L428 stractBuchiCegarLoop]: Abstraction has 576 states and 624 transitions. [2023-11-29 02:04:37,505 INFO L335 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2023-11-29 02:04:37,505 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 576 states and 624 transitions. [2023-11-29 02:04:37,507 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:04:37,507 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:04:37,507 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:04:37,510 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [196, 196, 21, 21, 21, 21, 21, 1, 1, 1, 1] [2023-11-29 02:04:37,510 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:04:37,510 INFO L748 eck$LassoCheckResult]: Stem: 19840#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 19841#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 19845#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19842#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19843#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20404#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19848#L17-4 foo_#res#1 := foo_~i~0#1; 19832#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 19833#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19846#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19847#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19830#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19831#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19844#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20405#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20403#L17-4 foo_#res#1 := foo_~i~0#1; 20402#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 19837#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19838#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20401#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20400#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20399#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20398#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20397#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20396#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20395#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20394#L17-4 foo_#res#1 := foo_~i~0#1; 20393#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20392#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20391#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20390#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20389#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20388#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20387#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20386#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20385#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20384#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20383#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20382#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20381#L17-4 foo_#res#1 := foo_~i~0#1; 20380#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20379#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20378#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20377#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20376#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20375#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20374#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20373#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20372#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20371#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20370#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20369#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20368#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20367#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20366#L17-4 foo_#res#1 := foo_~i~0#1; 20365#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20364#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20363#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20362#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20361#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20360#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20359#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20358#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20357#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20356#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20355#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20354#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20353#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20352#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20351#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20350#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20349#L17-4 foo_#res#1 := foo_~i~0#1; 20348#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20347#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20346#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20345#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20344#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20343#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20342#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20341#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20340#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20339#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20338#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20337#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20336#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20335#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20334#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20333#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20332#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20331#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20330#L17-4 foo_#res#1 := foo_~i~0#1; 20329#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20328#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20327#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20326#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20325#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20324#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20323#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20322#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20321#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20320#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20319#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20318#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20317#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20316#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20315#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20314#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20313#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20312#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20311#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20310#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20309#L17-4 foo_#res#1 := foo_~i~0#1; 20308#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20307#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20306#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20305#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20304#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20303#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20302#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20301#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20300#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20299#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20298#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20297#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20296#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20295#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20294#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20293#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20292#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20291#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20290#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20289#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20288#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20287#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20286#L17-4 foo_#res#1 := foo_~i~0#1; 20285#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20284#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20283#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20282#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20281#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20280#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20279#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20278#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20277#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20276#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20275#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20274#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20273#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20272#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20271#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20270#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20269#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20268#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20267#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20266#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20265#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20264#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20263#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20262#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20261#L17-4 foo_#res#1 := foo_~i~0#1; 20260#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20259#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20258#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20257#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20256#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20255#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20254#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20253#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20252#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20251#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20250#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20249#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20248#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20247#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20246#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20245#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20244#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20243#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20242#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20241#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20240#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20239#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20238#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20237#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20236#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20235#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20234#L17-4 foo_#res#1 := foo_~i~0#1; 20233#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20232#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20231#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20230#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20229#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20228#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20227#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20226#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20225#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20224#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20223#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20222#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20221#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20220#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20219#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20218#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20217#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20216#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20215#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20214#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20213#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20212#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20211#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20210#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20209#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20208#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20207#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20206#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20205#L17-4 foo_#res#1 := foo_~i~0#1; 20204#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20203#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20202#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20201#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20200#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20199#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20198#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20197#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20196#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20195#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20194#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20193#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20192#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20191#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20190#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20189#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20188#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20187#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20186#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20185#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20184#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20183#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20182#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20181#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20180#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20177#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20178#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20175#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20174#L17-4 foo_#res#1 := foo_~i~0#1; 20173#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20172#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20171#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20170#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20169#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20168#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20167#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20166#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20165#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20164#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20163#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20162#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20161#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20160#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20159#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20158#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20157#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20156#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20155#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20154#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20153#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20152#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20151#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20150#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20147#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20148#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20146#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20142#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20141#L17-4 foo_#res#1 := foo_~i~0#1; 20140#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20139#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20138#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20137#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20136#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20135#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20134#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20133#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20132#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20131#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20130#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20129#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20128#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20127#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20126#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20125#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20124#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20123#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20122#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20121#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20120#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20119#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20117#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20115#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20112#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20113#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20111#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20107#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20106#L17-4 foo_#res#1 := foo_~i~0#1; 20105#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20104#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20103#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20102#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20101#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20100#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20099#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20098#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20097#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20096#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20095#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20094#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20093#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20092#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20091#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20090#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20089#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20088#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20087#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20085#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20083#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20081#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20079#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20077#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20074#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20075#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20076#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20070#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20069#L17-4 foo_#res#1 := foo_~i~0#1; 20068#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20067#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20066#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20065#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20064#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20063#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20062#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20061#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20060#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20059#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20058#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20057#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20056#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20055#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20054#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20053#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20052#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20051#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20049#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20047#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20045#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20043#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20041#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20039#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20036#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20037#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20035#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20031#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 20030#L17-4 foo_#res#1 := foo_~i~0#1; 20029#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 20028#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20027#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 20026#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20025#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20024#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20023#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20022#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20021#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20020#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20019#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20018#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20017#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20016#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20015#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20014#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20012#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20010#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20008#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20006#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20004#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 20002#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 20000#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19998#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19995#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19996#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19994#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19990#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19989#L17-4 foo_#res#1 := foo_~i~0#1; 19988#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 19987#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19986#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19985#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19984#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19983#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19982#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19981#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19980#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19979#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19978#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19977#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19976#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19975#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19973#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19971#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19969#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19967#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19965#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19963#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19961#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19959#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19957#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19955#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19952#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19953#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19951#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19947#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19946#L17-4 foo_#res#1 := foo_~i~0#1; 19945#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 19944#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19943#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19942#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19941#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19940#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19939#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19938#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19937#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19936#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19935#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19934#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19932#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19930#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19928#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19926#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19924#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19922#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19920#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19918#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19916#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19914#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19912#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19910#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19907#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19908#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19906#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19858#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19902#L17-4 foo_#res#1 := foo_~i~0#1; 19901#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 19900#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19899#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19850#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19898#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19897#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19896#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19895#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19894#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19893#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19892#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19891#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19890#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19889#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19888#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19887#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19886#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19885#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19884#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19883#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19882#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19881#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19880#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19879#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19878#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19877#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19876#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19875#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19874#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19873#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19872#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19871#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19870#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19869#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19868#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19867#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19866#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19865#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19864#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19863#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19862#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19861#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19860#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19859#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19857#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19856#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 19855#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 19854#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19853#L17-4 foo_#res#1 := foo_~i~0#1; 19852#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 19851#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19849#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 19839#L26-4 main_~i~1#1 := 0; 19834#L29-3 [2023-11-29 02:04:37,511 INFO L750 eck$LassoCheckResult]: Loop: 19834#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 19835#L30 assume !(main_#t~mem5#1 != main_~i~1#1);havoc main_#t~mem5#1; 19836#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19834#L29-3 [2023-11-29 02:04:37,511 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:04:37,511 INFO L85 PathProgramCache]: Analyzing trace with hash -110061847, now seen corresponding path program 6 times [2023-11-29 02:04:37,511 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:04:37,511 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1354297952] [2023-11-29 02:04:37,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:04:37,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:04:37,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:04:40,049 INFO L134 CoverageAnalysis]: Checked inductivity of 43407 backedges. 16589 proven. 497 refuted. 0 times theorem prover too weak. 26321 trivial. 0 not checked. [2023-11-29 02:04:40,050 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:04:40,050 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1354297952] [2023-11-29 02:04:40,050 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1354297952] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:04:40,050 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1823009096] [2023-11-29 02:04:40,050 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 02:04:40,050 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:04:40,050 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:04:40,051 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:04:40,053 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2023-11-29 02:04:53,609 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 35 check-sat command(s) [2023-11-29 02:04:53,609 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:04:53,629 INFO L262 TraceCheckSpWp]: Trace formula consists of 1899 conjuncts, 55 conjunts are in the unsatisfiable core [2023-11-29 02:04:53,636 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:04:54,990 INFO L134 CoverageAnalysis]: Checked inductivity of 43407 backedges. 11274 proven. 8035 refuted. 0 times theorem prover too weak. 24098 trivial. 0 not checked. [2023-11-29 02:04:54,990 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:04:58,128 INFO L134 CoverageAnalysis]: Checked inductivity of 43407 backedges. 1149 proven. 27389 refuted. 0 times theorem prover too weak. 14869 trivial. 0 not checked. [2023-11-29 02:04:58,128 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1823009096] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:04:58,128 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:04:58,128 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 32] total 88 [2023-11-29 02:04:58,129 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2050550062] [2023-11-29 02:04:58,129 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:04:58,130 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:04:58,130 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:04:58,130 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 6 times [2023-11-29 02:04:58,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:04:58,130 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098117313] [2023-11-29 02:04:58,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:04:58,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:04:58,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:04:58,135 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:04:58,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:04:58,139 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:04:58,174 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:04:58,175 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 88 interpolants. [2023-11-29 02:04:58,177 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1495, Invalid=6161, Unknown=0, NotChecked=0, Total=7656 [2023-11-29 02:04:58,177 INFO L87 Difference]: Start difference. First operand 576 states and 624 transitions. cyclomatic complexity: 50 Second operand has 88 states, 88 states have (on average 2.647727272727273) internal successors, (233), 88 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:05:10,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:05:10,102 INFO L93 Difference]: Finished difference Result 715 states and 773 transitions. [2023-11-29 02:05:10,102 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 715 states and 773 transitions. [2023-11-29 02:05:10,105 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:05:10,108 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 715 states to 706 states and 763 transitions. [2023-11-29 02:05:10,108 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2023-11-29 02:05:10,109 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2023-11-29 02:05:10,109 INFO L73 IsDeterministic]: Start isDeterministic. Operand 706 states and 763 transitions. [2023-11-29 02:05:10,109 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:05:10,109 INFO L218 hiAutomatonCegarLoop]: Abstraction has 706 states and 763 transitions. [2023-11-29 02:05:10,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 706 states and 763 transitions. [2023-11-29 02:05:10,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 706 to 641. [2023-11-29 02:05:10,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 641 states, 641 states have (on average 1.0889235569422777) internal successors, (698), 640 states have internal predecessors, (698), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:05:10,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 641 states to 641 states and 698 transitions. [2023-11-29 02:05:10,120 INFO L240 hiAutomatonCegarLoop]: Abstraction has 641 states and 698 transitions. [2023-11-29 02:05:10,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 207 states. [2023-11-29 02:05:10,121 INFO L428 stractBuchiCegarLoop]: Abstraction has 641 states and 698 transitions. [2023-11-29 02:05:10,121 INFO L335 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2023-11-29 02:05:10,121 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 641 states and 698 transitions. [2023-11-29 02:05:10,124 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:05:10,124 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:05:10,124 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:05:10,130 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [234, 234, 22, 22, 22, 22, 22, 1, 1, 1, 1] [2023-11-29 02:05:10,130 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:05:10,131 INFO L748 eck$LassoCheckResult]: Stem: 24626#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 24627#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 24631#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 24628#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24629#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25257#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25256#L17-4 foo_#res#1 := foo_~i~0#1; 25255#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25254#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24632#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 24633#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25253#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24630#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24617#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24618#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 24634#L17-4 foo_#res#1 := foo_~i~0#1; 24619#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 24620#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24624#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25252#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25251#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25250#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25249#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25248#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25247#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25246#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25245#L17-4 foo_#res#1 := foo_~i~0#1; 25244#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25243#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 25242#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25241#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25240#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25239#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25238#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25237#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25236#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25235#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25234#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25233#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25232#L17-4 foo_#res#1 := foo_~i~0#1; 25231#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25230#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 25229#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25228#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25227#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25226#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25225#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25224#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25223#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25222#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25221#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25220#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25219#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25218#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25217#L17-4 foo_#res#1 := foo_~i~0#1; 25216#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25215#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 25214#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25213#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25212#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25211#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25210#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25209#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25208#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25207#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25206#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25205#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25204#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25203#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25202#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25201#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25200#L17-4 foo_#res#1 := foo_~i~0#1; 25199#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25198#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 25197#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25196#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25195#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25194#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25193#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25192#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25191#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25190#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25189#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25188#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25187#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25186#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25185#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25184#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25183#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25182#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25181#L17-4 foo_#res#1 := foo_~i~0#1; 25180#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25179#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 25178#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25177#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25176#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25175#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25174#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25173#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25172#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25171#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25170#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25169#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25168#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25167#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25166#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25165#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25164#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25163#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25162#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25161#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25160#L17-4 foo_#res#1 := foo_~i~0#1; 25159#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25158#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 25157#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25156#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25155#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25154#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25153#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25152#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25151#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25150#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25149#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25148#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25147#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25146#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25145#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25144#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25143#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25142#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25141#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25140#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25139#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25138#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25137#L17-4 foo_#res#1 := foo_~i~0#1; 25136#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25135#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 25134#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25133#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25132#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25131#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25130#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25129#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25128#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25127#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25126#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25125#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25124#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25123#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25122#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25121#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25120#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25119#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25118#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25117#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25116#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25115#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25114#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25113#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25112#L17-4 foo_#res#1 := foo_~i~0#1; 25111#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25110#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 25109#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25108#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25107#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25106#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25105#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25104#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25103#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25102#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25101#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25100#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25099#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25098#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25097#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25096#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25095#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25094#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25093#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25092#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25091#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25090#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25089#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25088#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25087#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25086#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25085#L17-4 foo_#res#1 := foo_~i~0#1; 25084#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25083#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 25082#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25081#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25080#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25079#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25078#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25077#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25076#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25075#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25074#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25073#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25072#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25071#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25070#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25069#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25068#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25067#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25066#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25065#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25064#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25063#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25062#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25061#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25060#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25059#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25058#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25057#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25056#L17-4 foo_#res#1 := foo_~i~0#1; 25055#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25054#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 25053#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25052#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25051#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25050#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25049#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25048#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25047#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25046#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25045#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25044#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25043#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25042#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25041#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25040#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25039#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25038#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25037#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25036#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25035#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25034#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25033#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25032#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25031#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25030#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25029#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25028#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25027#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25026#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25025#L17-4 foo_#res#1 := foo_~i~0#1; 25024#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 25023#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 25022#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25021#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25020#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25019#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25018#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25017#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25016#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25015#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25014#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25013#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25012#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25011#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25010#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25009#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25008#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25007#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25006#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25005#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25004#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25003#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25002#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 25001#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 25000#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24999#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24997#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24995#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24996#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24993#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 24992#L17-4 foo_#res#1 := foo_~i~0#1; 24991#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 24990#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24989#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 24988#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24987#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24986#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24985#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24984#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24983#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24982#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24981#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24980#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24979#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24978#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24977#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24976#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24975#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24974#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24973#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24972#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24971#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24970#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24969#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24968#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24967#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24966#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24963#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24964#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24962#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24958#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 24957#L17-4 foo_#res#1 := foo_~i~0#1; 24956#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 24955#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24954#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 24953#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24952#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24951#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24950#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24949#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24948#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24947#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24946#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24945#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24944#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24943#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24942#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24941#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24940#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24939#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24938#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24937#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24936#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24935#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24934#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24933#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24931#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24929#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24926#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24927#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24925#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24921#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 24920#L17-4 foo_#res#1 := foo_~i~0#1; 24919#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 24918#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24917#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 24916#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24915#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24914#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24913#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24912#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24911#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24910#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24909#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24908#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24907#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24906#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24905#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24904#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24903#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24902#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24901#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24900#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24899#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24897#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24895#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24893#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24891#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24889#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24886#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24887#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24888#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24882#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 24881#L17-4 foo_#res#1 := foo_~i~0#1; 24880#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 24879#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24878#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 24877#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24876#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24875#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24874#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24873#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24872#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24871#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24870#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24869#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24868#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24867#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24866#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24865#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24864#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24863#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24862#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24861#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24859#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24857#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24855#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24853#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24851#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24849#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24846#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24847#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24845#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24841#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 24840#L17-4 foo_#res#1 := foo_~i~0#1; 24839#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 24838#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24837#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 24836#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24835#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24834#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24833#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24832#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24831#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24830#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24829#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24828#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24827#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24826#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24825#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24824#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24823#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24822#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24820#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24818#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24816#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24814#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24812#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24810#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24808#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24806#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24803#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24804#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24802#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24798#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 24797#L17-4 foo_#res#1 := foo_~i~0#1; 24796#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 24795#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24794#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 24793#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24792#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24791#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24790#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24789#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24788#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24787#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24786#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24785#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24784#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24783#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24782#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24781#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24779#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24777#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24775#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24773#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24771#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24769#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24767#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24765#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24763#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24761#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24758#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24759#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24757#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24644#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 24753#L17-4 foo_#res#1 := foo_~i~0#1; 24752#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 24751#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24750#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 24749#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24748#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24747#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24746#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24745#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24744#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24743#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24742#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24741#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24740#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24739#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24738#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24737#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24736#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24735#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24734#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24733#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24732#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24731#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24730#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24729#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24728#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24727#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24726#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24725#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24724#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24723#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24722#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24721#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24720#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24719#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24718#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24717#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24716#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24715#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24714#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24713#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24712#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24711#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24710#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24709#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24708#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24707#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24706#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24705#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24704#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24703#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24702#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24701#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24700#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24699#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24698#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24697#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 24696#L17-4 foo_#res#1 := foo_~i~0#1; 24695#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 24694#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24693#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 24636#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24692#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24691#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24690#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24689#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24688#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24687#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24686#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24685#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24684#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24683#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24682#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24681#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24680#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24679#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24678#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24677#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24676#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24675#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24674#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24673#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24672#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24671#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24670#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24669#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24668#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24667#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24666#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24665#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24664#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24663#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24662#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24661#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24660#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24659#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24658#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24657#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24656#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24655#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24654#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24653#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24652#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24651#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24650#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24649#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24648#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24647#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24646#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24645#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24643#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24642#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 24641#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 24640#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 24639#L17-4 foo_#res#1 := foo_~i~0#1; 24638#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 24637#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24635#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 24625#L26-4 main_~i~1#1 := 0; 24621#L29-3 [2023-11-29 02:05:10,131 INFO L750 eck$LassoCheckResult]: Loop: 24621#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 24622#L30 assume !(main_#t~mem5#1 != main_~i~1#1);havoc main_#t~mem5#1; 24623#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24621#L29-3 [2023-11-29 02:05:10,131 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:05:10,131 INFO L85 PathProgramCache]: Analyzing trace with hash 256010983, now seen corresponding path program 7 times [2023-11-29 02:05:10,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:05:10,132 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449344186] [2023-11-29 02:05:10,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:05:10,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:05:10,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:05:13,124 INFO L134 CoverageAnalysis]: Checked inductivity of 60847 backedges. 29729 proven. 578 refuted. 0 times theorem prover too weak. 30540 trivial. 0 not checked. [2023-11-29 02:05:13,125 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:05:13,125 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449344186] [2023-11-29 02:05:13,125 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1449344186] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:05:13,125 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [54300015] [2023-11-29 02:05:13,125 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 02:05:13,125 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:05:13,125 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:05:13,126 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:05:13,127 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2023-11-29 02:05:13,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:05:13,736 INFO L262 TraceCheckSpWp]: Trace formula consists of 3222 conjuncts, 31 conjunts are in the unsatisfiable core [2023-11-29 02:05:13,743 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:05:14,556 INFO L134 CoverageAnalysis]: Checked inductivity of 60847 backedges. 39238 proven. 2808 refuted. 0 times theorem prover too weak. 18801 trivial. 0 not checked. [2023-11-29 02:05:14,557 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:05:15,483 INFO L134 CoverageAnalysis]: Checked inductivity of 60847 backedges. 39238 proven. 2808 refuted. 0 times theorem prover too weak. 18801 trivial. 0 not checked. [2023-11-29 02:05:15,484 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [54300015] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:05:15,484 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:05:15,484 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 30, 30] total 72 [2023-11-29 02:05:15,484 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2008471712] [2023-11-29 02:05:15,484 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:05:15,486 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:05:15,486 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:05:15,486 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 7 times [2023-11-29 02:05:15,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:05:15,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [626898842] [2023-11-29 02:05:15,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:05:15,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:05:15,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:05:15,491 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:05:15,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:05:15,495 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:05:15,530 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:05:15,530 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2023-11-29 02:05:15,532 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=824, Invalid=4288, Unknown=0, NotChecked=0, Total=5112 [2023-11-29 02:05:15,533 INFO L87 Difference]: Start difference. First operand 641 states and 698 transitions. cyclomatic complexity: 59 Second operand has 72 states, 72 states have (on average 3.0833333333333335) internal successors, (222), 72 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:05:20,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:05:20,758 INFO L93 Difference]: Finished difference Result 687 states and 737 transitions. [2023-11-29 02:05:20,758 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 687 states and 737 transitions. [2023-11-29 02:05:20,762 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:05:20,766 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 687 states to 680 states and 728 transitions. [2023-11-29 02:05:20,766 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 47 [2023-11-29 02:05:20,766 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 47 [2023-11-29 02:05:20,766 INFO L73 IsDeterministic]: Start isDeterministic. Operand 680 states and 728 transitions. [2023-11-29 02:05:20,767 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:05:20,767 INFO L218 hiAutomatonCegarLoop]: Abstraction has 680 states and 728 transitions. [2023-11-29 02:05:20,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 680 states and 728 transitions. [2023-11-29 02:05:20,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 680 to 641. [2023-11-29 02:05:20,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 641 states, 641 states have (on average 1.0748829953198127) internal successors, (689), 640 states have internal predecessors, (689), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:05:20,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 641 states to 641 states and 689 transitions. [2023-11-29 02:05:20,778 INFO L240 hiAutomatonCegarLoop]: Abstraction has 641 states and 689 transitions. [2023-11-29 02:05:20,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 136 states. [2023-11-29 02:05:20,779 INFO L428 stractBuchiCegarLoop]: Abstraction has 641 states and 689 transitions. [2023-11-29 02:05:20,779 INFO L335 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2023-11-29 02:05:20,779 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 641 states and 689 transitions. [2023-11-29 02:05:20,781 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:05:20,781 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:05:20,781 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:05:20,787 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [241, 241, 22, 22, 22, 22, 22, 1, 1, 1, 1] [2023-11-29 02:05:20,787 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:05:20,788 INFO L748 eck$LassoCheckResult]: Stem: 29754#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 29755#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 29759#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 29756#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29757#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30383#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30381#L17-4 foo_#res#1 := foo_~i~0#1; 30380#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 29751#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 29752#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 29758#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29746#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29747#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30384#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30382#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 29760#L17-4 foo_#res#1 := foo_~i~0#1; 29744#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 29745#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30379#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30378#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30377#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30376#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30375#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30374#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30373#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30372#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30371#L17-4 foo_#res#1 := foo_~i~0#1; 30370#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30369#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30368#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30367#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30366#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30365#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30364#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30363#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30362#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30361#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30360#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30359#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30358#L17-4 foo_#res#1 := foo_~i~0#1; 30357#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30356#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30355#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30354#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30353#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30352#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30351#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30350#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30349#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30348#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30347#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30346#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30345#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30344#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30343#L17-4 foo_#res#1 := foo_~i~0#1; 30342#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30341#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30340#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30339#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30338#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30337#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30336#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30335#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30334#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30333#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30332#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30331#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30330#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30329#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30328#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30327#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30326#L17-4 foo_#res#1 := foo_~i~0#1; 30325#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30324#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30323#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30322#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30321#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30320#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30319#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30318#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30317#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30316#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30315#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30314#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30313#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30312#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30311#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30310#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30309#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30308#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30307#L17-4 foo_#res#1 := foo_~i~0#1; 30306#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30305#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30304#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30303#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30302#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30301#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30300#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30299#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30298#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30297#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30296#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30295#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30294#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30293#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30292#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30291#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30290#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30289#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30288#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30287#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30286#L17-4 foo_#res#1 := foo_~i~0#1; 30285#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30284#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30283#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30282#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30281#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30280#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30279#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30278#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30277#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30276#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30275#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30274#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30273#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30272#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30271#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30270#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30269#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30268#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30267#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30266#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30265#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30264#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30263#L17-4 foo_#res#1 := foo_~i~0#1; 30262#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30261#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30260#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30259#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30258#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30257#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30256#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30255#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30254#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30253#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30252#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30251#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30250#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30249#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30248#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30247#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30246#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30245#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30244#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30243#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30242#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30241#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30240#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30239#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30238#L17-4 foo_#res#1 := foo_~i~0#1; 30237#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30236#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30235#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30234#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30233#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30232#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30231#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30230#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30229#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30228#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30227#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30226#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30225#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30224#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30223#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30222#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30221#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30220#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30219#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30218#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30217#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30216#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30215#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30214#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30213#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30212#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30211#L17-4 foo_#res#1 := foo_~i~0#1; 30210#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30209#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30208#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30207#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30206#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30205#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30204#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30203#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30202#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30201#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30200#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30199#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30198#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30197#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30196#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30195#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30194#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30193#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30192#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30191#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30190#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30189#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30188#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30187#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30186#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30185#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30184#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30183#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30182#L17-4 foo_#res#1 := foo_~i~0#1; 30181#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30180#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30179#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30178#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30177#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30176#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30175#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30174#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30173#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30172#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30171#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30170#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30169#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30168#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30167#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30166#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30165#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30164#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30163#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30162#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30161#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30160#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30159#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30158#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30157#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30156#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30155#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30154#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30153#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30152#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30151#L17-4 foo_#res#1 := foo_~i~0#1; 30150#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30149#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30148#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30147#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30146#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30145#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30144#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30143#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30142#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30141#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30140#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30139#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30138#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30137#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30136#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30135#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30134#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30133#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30132#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30131#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30130#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30129#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30128#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30127#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30126#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30125#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30124#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30123#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30122#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30121#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30120#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30119#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30118#L17-4 foo_#res#1 := foo_~i~0#1; 30117#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30116#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30115#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30114#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30113#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30112#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30111#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30110#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30109#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30108#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30107#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30106#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30105#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30104#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30103#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30102#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30101#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30100#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30099#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30098#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30097#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30096#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30095#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30094#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30093#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30092#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30091#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30090#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30088#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30086#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30087#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30084#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30083#L17-4 foo_#res#1 := foo_~i~0#1; 30082#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30081#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30080#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30079#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30078#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30077#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30076#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30075#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30074#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30073#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30072#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30071#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30070#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30069#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30068#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30067#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30066#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30065#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30064#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30063#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30062#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30061#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30060#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30059#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30058#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30057#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30056#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30055#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30052#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30053#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30051#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30047#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30046#L17-4 foo_#res#1 := foo_~i~0#1; 30045#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30044#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30043#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30042#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30041#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30040#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30039#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30038#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30037#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30036#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30035#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30034#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30033#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30032#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30031#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30030#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30029#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30028#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30027#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30026#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30025#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30024#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30023#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30022#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30021#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30019#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30017#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30015#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30012#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30013#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30014#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30008#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 30007#L17-4 foo_#res#1 := foo_~i~0#1; 30006#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 30005#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30004#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 30003#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30002#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 30001#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 30000#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29999#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29998#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29997#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29996#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29995#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29994#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29993#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29992#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29991#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29990#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29989#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29988#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29987#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29986#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29985#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29984#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29983#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29981#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29979#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29977#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29975#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29972#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29973#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29971#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29967#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 29966#L17-4 foo_#res#1 := foo_~i~0#1; 29965#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 29964#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 29963#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 29962#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29961#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29960#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29959#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29958#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29957#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29956#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29955#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29954#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29953#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29952#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29951#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29950#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29949#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29948#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29947#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29946#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29945#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29944#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29942#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29940#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29938#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29936#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29934#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29932#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29929#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29930#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29928#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29924#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 29923#L17-4 foo_#res#1 := foo_~i~0#1; 29922#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 29921#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 29920#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 29919#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29918#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29917#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29916#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29915#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29914#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29913#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29912#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29911#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29910#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29909#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29908#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29907#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29906#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29905#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29904#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29903#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29901#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29899#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29897#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29895#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29893#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29891#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29889#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29887#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29884#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29885#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29883#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29770#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 29879#L17-4 foo_#res#1 := foo_~i~0#1; 29878#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 29877#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 29876#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 29875#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29874#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29873#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29872#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29871#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29870#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29869#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29868#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29867#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29866#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29865#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29864#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29863#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29862#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29861#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29860#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29859#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29858#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29857#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29856#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29855#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29854#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29853#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29852#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29851#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29850#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29849#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29848#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29847#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29846#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29845#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29844#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29843#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29842#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29841#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29840#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29839#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29838#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29837#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29836#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29835#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29834#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29833#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29832#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29831#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29830#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29829#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29828#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29827#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29826#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29825#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29824#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29823#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 29822#L17-4 foo_#res#1 := foo_~i~0#1; 29821#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 29820#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 29819#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 29762#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29818#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29817#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29816#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29815#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29814#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29813#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29812#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29811#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29810#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29809#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29808#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29807#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29806#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29805#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29804#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29803#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29802#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29801#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29800#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29799#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29798#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29797#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29796#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29795#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29794#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29793#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29792#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29791#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29790#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29789#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29788#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29787#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29786#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29785#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29784#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29783#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29782#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29781#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29780#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29779#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29778#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29777#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29776#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29775#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29774#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29773#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29772#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29771#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29769#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29768#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 29767#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 29766#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 29765#L17-4 foo_#res#1 := foo_~i~0#1; 29764#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 29763#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 29761#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 29753#L26-4 main_~i~1#1 := 0; 29748#L29-3 [2023-11-29 02:05:20,788 INFO L750 eck$LassoCheckResult]: Loop: 29748#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 29749#L30 assume !(main_#t~mem5#1 != main_~i~1#1);havoc main_#t~mem5#1; 29750#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 29748#L29-3 [2023-11-29 02:05:20,788 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:05:20,789 INFO L85 PathProgramCache]: Analyzing trace with hash -1734937303, now seen corresponding path program 8 times [2023-11-29 02:05:20,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:05:20,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1949018494] [2023-11-29 02:05:20,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:05:20,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:05:21,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:05:24,076 INFO L134 CoverageAnalysis]: Checked inductivity of 64319 backedges. 31444 proven. 665 refuted. 0 times theorem prover too weak. 32210 trivial. 0 not checked. [2023-11-29 02:05:24,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:05:24,077 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1949018494] [2023-11-29 02:05:24,077 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1949018494] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:05:24,077 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1697850597] [2023-11-29 02:05:24,077 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 02:05:24,077 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:05:24,077 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:05:24,078 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:05:24,079 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2023-11-29 02:05:24,684 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 02:05:24,684 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:05:24,697 INFO L262 TraceCheckSpWp]: Trace formula consists of 3299 conjuncts, 33 conjunts are in the unsatisfiable core [2023-11-29 02:05:24,705 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:05:25,658 INFO L134 CoverageAnalysis]: Checked inductivity of 64319 backedges. 44104 proven. 3451 refuted. 0 times theorem prover too weak. 16764 trivial. 0 not checked. [2023-11-29 02:05:25,659 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:05:26,629 INFO L134 CoverageAnalysis]: Checked inductivity of 64319 backedges. 44104 proven. 3451 refuted. 0 times theorem prover too weak. 16764 trivial. 0 not checked. [2023-11-29 02:05:26,629 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1697850597] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:05:26,630 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:05:26,630 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 32, 32] total 77 [2023-11-29 02:05:26,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890001813] [2023-11-29 02:05:26,630 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:05:26,632 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:05:26,632 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:05:26,632 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 8 times [2023-11-29 02:05:26,632 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:05:26,632 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023374933] [2023-11-29 02:05:26,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:05:26,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:05:26,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:05:26,636 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:05:26,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:05:26,639 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:05:26,678 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:05:26,679 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2023-11-29 02:05:26,681 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=935, Invalid=4917, Unknown=0, NotChecked=0, Total=5852 [2023-11-29 02:05:26,681 INFO L87 Difference]: Start difference. First operand 641 states and 689 transitions. cyclomatic complexity: 50 Second operand has 77 states, 77 states have (on average 3.0779220779220777) internal successors, (237), 77 states have internal predecessors, (237), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:05:32,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:05:32,625 INFO L93 Difference]: Finished difference Result 689 states and 731 transitions. [2023-11-29 02:05:32,625 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 689 states and 731 transitions. [2023-11-29 02:05:32,628 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:05:32,632 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 689 states to 683 states and 723 transitions. [2023-11-29 02:05:32,632 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 50 [2023-11-29 02:05:32,632 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 50 [2023-11-29 02:05:32,632 INFO L73 IsDeterministic]: Start isDeterministic. Operand 683 states and 723 transitions. [2023-11-29 02:05:32,633 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:05:32,633 INFO L218 hiAutomatonCegarLoop]: Abstraction has 683 states and 723 transitions. [2023-11-29 02:05:32,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 683 states and 723 transitions. [2023-11-29 02:05:32,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 683 to 641. [2023-11-29 02:05:32,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 641 states, 641 states have (on average 1.062402496099844) internal successors, (681), 640 states have internal predecessors, (681), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:05:32,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 641 states to 641 states and 681 transitions. [2023-11-29 02:05:32,644 INFO L240 hiAutomatonCegarLoop]: Abstraction has 641 states and 681 transitions. [2023-11-29 02:05:32,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 153 states. [2023-11-29 02:05:32,644 INFO L428 stractBuchiCegarLoop]: Abstraction has 641 states and 681 transitions. [2023-11-29 02:05:32,645 INFO L335 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2023-11-29 02:05:32,645 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 641 states and 681 transitions. [2023-11-29 02:05:32,646 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:05:32,646 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:05:32,646 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:05:32,651 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [247, 247, 22, 22, 22, 22, 22, 1, 1, 1, 1] [2023-11-29 02:05:32,652 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:05:32,652 INFO L748 eck$LassoCheckResult]: Stem: 35004#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 35005#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 35009#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35006#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35007#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35633#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35631#L17-4 foo_#res#1 := foo_~i~0#1; 35630#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35001#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35002#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35008#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 34994#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 34995#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35634#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35632#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35010#L17-4 foo_#res#1 := foo_~i~0#1; 34996#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 34997#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35629#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35628#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35627#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35626#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35625#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35624#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35623#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35622#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35621#L17-4 foo_#res#1 := foo_~i~0#1; 35620#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35619#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35618#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35617#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35616#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35615#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35614#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35613#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35612#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35611#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35610#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35609#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35608#L17-4 foo_#res#1 := foo_~i~0#1; 35607#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35606#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35605#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35604#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35603#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35602#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35601#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35600#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35599#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35598#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35597#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35596#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35595#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35594#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35593#L17-4 foo_#res#1 := foo_~i~0#1; 35592#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35591#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35590#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35589#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35588#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35587#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35586#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35585#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35584#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35583#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35582#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35581#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35580#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35579#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35578#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35577#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35576#L17-4 foo_#res#1 := foo_~i~0#1; 35575#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35574#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35573#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35572#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35571#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35570#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35569#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35568#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35567#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35566#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35565#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35564#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35563#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35562#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35561#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35560#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35559#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35558#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35557#L17-4 foo_#res#1 := foo_~i~0#1; 35556#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35555#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35554#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35553#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35552#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35551#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35550#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35549#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35548#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35547#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35546#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35545#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35544#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35543#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35542#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35541#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35540#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35539#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35538#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35537#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35536#L17-4 foo_#res#1 := foo_~i~0#1; 35535#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35534#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35533#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35532#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35531#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35530#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35529#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35528#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35527#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35526#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35525#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35524#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35523#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35522#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35521#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35520#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35519#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35518#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35517#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35516#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35515#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35514#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35513#L17-4 foo_#res#1 := foo_~i~0#1; 35512#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35511#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35510#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35509#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35508#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35507#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35506#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35505#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35504#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35503#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35502#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35501#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35500#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35499#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35498#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35497#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35496#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35495#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35494#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35493#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35492#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35491#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35490#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35489#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35488#L17-4 foo_#res#1 := foo_~i~0#1; 35487#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35486#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35485#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35484#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35483#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35482#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35481#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35480#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35479#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35478#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35477#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35476#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35475#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35474#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35473#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35472#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35471#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35470#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35469#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35468#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35467#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35466#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35465#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35464#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35463#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35462#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35461#L17-4 foo_#res#1 := foo_~i~0#1; 35460#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35459#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35458#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35457#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35456#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35455#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35454#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35453#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35452#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35451#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35450#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35449#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35448#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35447#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35446#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35445#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35444#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35443#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35442#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35441#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35440#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35439#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35438#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35437#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35436#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35435#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35434#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35433#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35432#L17-4 foo_#res#1 := foo_~i~0#1; 35431#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35430#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35429#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35428#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35427#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35426#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35425#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35424#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35423#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35422#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35421#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35420#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35419#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35418#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35417#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35416#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35415#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35414#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35413#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35412#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35411#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35410#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35409#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35408#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35407#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35406#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35405#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35404#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35403#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35402#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35401#L17-4 foo_#res#1 := foo_~i~0#1; 35400#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35399#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35398#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35397#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35396#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35395#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35394#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35393#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35392#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35391#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35390#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35389#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35388#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35387#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35386#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35385#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35384#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35383#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35382#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35381#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35380#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35379#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35378#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35377#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35376#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35375#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35374#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35373#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35372#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35371#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35370#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35369#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35368#L17-4 foo_#res#1 := foo_~i~0#1; 35367#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35366#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35365#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35364#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35363#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35362#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35361#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35360#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35359#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35358#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35357#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35356#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35355#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35354#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35353#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35352#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35351#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35350#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35349#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35348#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35347#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35346#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35345#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35344#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35343#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35342#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35341#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35340#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35339#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35338#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35337#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35336#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35335#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35334#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35333#L17-4 foo_#res#1 := foo_~i~0#1; 35332#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35331#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35330#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35329#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35328#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35327#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35326#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35325#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35324#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35323#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35322#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35321#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35320#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35319#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35318#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35317#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35316#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35315#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35314#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35313#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35312#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35311#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35310#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35309#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35308#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35307#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35306#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35305#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35304#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35303#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35301#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35299#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35300#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35297#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35296#L17-4 foo_#res#1 := foo_~i~0#1; 35295#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35294#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35293#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35292#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35291#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35290#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35289#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35288#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35287#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35286#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35285#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35284#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35283#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35282#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35281#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35280#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35279#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35278#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35277#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35276#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35275#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35274#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35273#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35272#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35271#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35270#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35269#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35268#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35267#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35265#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35262#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35263#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35264#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35258#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35257#L17-4 foo_#res#1 := foo_~i~0#1; 35256#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35255#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35254#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35253#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35252#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35251#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35250#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35249#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35248#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35247#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35246#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35245#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35244#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35243#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35242#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35241#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35240#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35239#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35238#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35237#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35236#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35235#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35234#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35233#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35232#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35231#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35230#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35229#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35227#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35225#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35222#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35223#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35221#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35217#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35216#L17-4 foo_#res#1 := foo_~i~0#1; 35215#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35214#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35213#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35212#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35211#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35210#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35209#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35208#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35207#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35206#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35205#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35204#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35203#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35202#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35201#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35200#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35199#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35198#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35197#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35196#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35195#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35194#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35193#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35192#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35191#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35190#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35188#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35186#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35184#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35182#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35179#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35180#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35178#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35174#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35173#L17-4 foo_#res#1 := foo_~i~0#1; 35172#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35171#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35170#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35169#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35168#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35167#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35166#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35165#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35164#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35163#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35162#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35161#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35160#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35159#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35158#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35157#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35156#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35155#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35154#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35153#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35152#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35151#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35150#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35149#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35147#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35145#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35143#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35141#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35139#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35137#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35134#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35135#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35133#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35020#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35129#L17-4 foo_#res#1 := foo_~i~0#1; 35128#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35127#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35126#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35125#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35124#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35123#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35122#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35121#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35120#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35119#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35118#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35117#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35116#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35115#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35114#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35113#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35112#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35111#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35110#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35109#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35108#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35107#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35106#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35105#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35104#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35103#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35102#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35101#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35100#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35099#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35098#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35097#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35096#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35095#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35094#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35093#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35092#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35091#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35090#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35089#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35088#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35087#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35086#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35085#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35084#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35083#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35082#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35081#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35080#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35079#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35078#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35077#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35076#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35075#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35074#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35073#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35072#L17-4 foo_#res#1 := foo_~i~0#1; 35071#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35070#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35069#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 35012#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35068#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35067#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35066#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35065#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35064#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35063#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35062#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35061#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35060#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35059#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35058#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35057#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35056#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35055#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35054#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35053#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35052#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35051#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35050#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35049#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35048#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35047#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35046#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35045#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35044#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35043#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35042#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35041#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35040#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35039#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35038#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35037#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35036#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35035#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35034#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35033#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35032#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35031#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35030#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35029#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35028#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35027#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35026#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35025#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35024#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35023#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35022#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35021#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35019#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35018#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 35017#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 35016#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 35015#L17-4 foo_#res#1 := foo_~i~0#1; 35014#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 35013#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35011#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 35003#L26-4 main_~i~1#1 := 0; 34998#L29-3 [2023-11-29 02:05:32,653 INFO L750 eck$LassoCheckResult]: Loop: 34998#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 34999#L30 assume !(main_#t~mem5#1 != main_~i~1#1);havoc main_#t~mem5#1; 35000#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 34998#L29-3 [2023-11-29 02:05:32,653 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:05:32,653 INFO L85 PathProgramCache]: Analyzing trace with hash -350981655, now seen corresponding path program 9 times [2023-11-29 02:05:32,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:05:32,654 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716462600] [2023-11-29 02:05:32,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:05:32,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:05:32,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:05:35,997 INFO L134 CoverageAnalysis]: Checked inductivity of 67373 backedges. 33033 proven. 758 refuted. 0 times theorem prover too weak. 33582 trivial. 0 not checked. [2023-11-29 02:05:35,997 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:05:35,997 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716462600] [2023-11-29 02:05:35,998 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1716462600] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:05:35,998 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1129983371] [2023-11-29 02:05:35,998 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 02:05:35,998 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:05:35,998 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:05:35,999 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:05:36,004 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Waiting until timeout for monitored process [2023-11-29 02:05:38,040 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2023-11-29 02:05:38,040 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:05:38,050 INFO L262 TraceCheckSpWp]: Trace formula consists of 1440 conjuncts, 45 conjunts are in the unsatisfiable core [2023-11-29 02:05:38,062 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:05:39,720 INFO L134 CoverageAnalysis]: Checked inductivity of 67373 backedges. 57 proven. 29538 refuted. 0 times theorem prover too weak. 37778 trivial. 0 not checked. [2023-11-29 02:05:39,721 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:05:41,745 INFO L134 CoverageAnalysis]: Checked inductivity of 67373 backedges. 0 proven. 29595 refuted. 0 times theorem prover too weak. 37778 trivial. 0 not checked. [2023-11-29 02:05:41,746 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1129983371] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:05:41,746 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:05:41,746 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 30, 27] total 89 [2023-11-29 02:05:41,747 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [131622576] [2023-11-29 02:05:41,747 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:05:41,748 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:05:41,748 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:05:41,748 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 9 times [2023-11-29 02:05:41,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:05:41,748 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1462156974] [2023-11-29 02:05:41,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:05:41,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:05:41,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:05:41,752 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:05:41,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:05:41,755 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:05:41,790 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:05:41,791 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 89 interpolants. [2023-11-29 02:05:41,793 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1451, Invalid=6381, Unknown=0, NotChecked=0, Total=7832 [2023-11-29 02:05:41,794 INFO L87 Difference]: Start difference. First operand 641 states and 681 transitions. cyclomatic complexity: 42 Second operand has 89 states, 89 states have (on average 2.348314606741573) internal successors, (209), 89 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:06:11,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:06:11,551 INFO L93 Difference]: Finished difference Result 861 states and 934 transitions. [2023-11-29 02:06:11,551 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 861 states and 934 transitions. [2023-11-29 02:06:11,553 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:06:11,556 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 861 states to 854 states and 925 transitions. [2023-11-29 02:06:11,557 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2023-11-29 02:06:11,557 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2023-11-29 02:06:11,557 INFO L73 IsDeterministic]: Start isDeterministic. Operand 854 states and 925 transitions. [2023-11-29 02:06:11,557 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:06:11,557 INFO L218 hiAutomatonCegarLoop]: Abstraction has 854 states and 925 transitions. [2023-11-29 02:06:11,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 854 states and 925 transitions. [2023-11-29 02:06:11,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 854 to 722. [2023-11-29 02:06:11,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 722 states, 722 states have (on average 1.077562326869806) internal successors, (778), 721 states have internal predecessors, (778), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:06:11,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 722 states to 722 states and 778 transitions. [2023-11-29 02:06:11,566 INFO L240 hiAutomatonCegarLoop]: Abstraction has 722 states and 778 transitions. [2023-11-29 02:06:11,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 301 states. [2023-11-29 02:06:11,567 INFO L428 stractBuchiCegarLoop]: Abstraction has 722 states and 778 transitions. [2023-11-29 02:06:11,567 INFO L335 stractBuchiCegarLoop]: ======== Iteration 27 ============ [2023-11-29 02:06:11,567 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 722 states and 778 transitions. [2023-11-29 02:06:11,570 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:06:11,570 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:06:11,570 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:06:11,575 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [290, 290, 23, 23, 23, 23, 23, 1, 1, 1, 1] [2023-11-29 02:06:11,576 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:06:11,576 INFO L748 eck$LassoCheckResult]: Stem: 40840#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 40841#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 40842#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 40843#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40844#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41513#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41511#L17-4 foo_#res#1 := foo_~i~0#1; 41510#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41508#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41506#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41504#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41055#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41051#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41050#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41049#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 40849#L17-4 foo_#res#1 := foo_~i~0#1; 40833#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 40834#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 40838#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41509#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41507#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41505#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41503#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41502#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41501#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41500#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41499#L17-4 foo_#res#1 := foo_~i~0#1; 41498#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41497#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41496#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41495#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41494#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41493#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41492#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41491#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41490#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41489#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41488#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41487#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41486#L17-4 foo_#res#1 := foo_~i~0#1; 41485#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41484#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41483#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41482#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41481#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41480#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41479#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41478#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41477#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41476#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41475#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41474#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41473#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41472#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41471#L17-4 foo_#res#1 := foo_~i~0#1; 41470#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41469#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41468#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41467#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41466#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41465#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41464#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41463#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41462#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41461#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41460#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41459#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41458#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41457#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41456#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41455#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41454#L17-4 foo_#res#1 := foo_~i~0#1; 41453#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41452#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41451#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41450#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41449#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41448#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41447#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41446#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41445#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41444#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41443#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41442#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41441#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41440#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41439#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41438#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41437#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41436#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41435#L17-4 foo_#res#1 := foo_~i~0#1; 41434#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41433#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41432#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41431#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41430#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41429#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41428#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41427#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41426#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41425#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41424#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41423#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41422#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41421#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41420#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41419#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41418#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41417#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41416#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41415#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41414#L17-4 foo_#res#1 := foo_~i~0#1; 41413#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41412#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41411#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41410#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41409#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41408#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41407#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41406#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41405#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41404#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41403#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41402#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41401#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41400#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41399#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41398#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41397#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41396#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41395#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41394#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41393#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41392#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41391#L17-4 foo_#res#1 := foo_~i~0#1; 41390#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41389#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41388#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41387#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41386#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41385#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41384#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41383#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41382#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41381#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41380#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41379#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41378#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41377#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41376#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41375#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41374#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41373#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41372#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41371#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41370#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41369#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41368#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41367#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41366#L17-4 foo_#res#1 := foo_~i~0#1; 41365#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41364#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41363#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41362#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41361#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41360#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41359#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41358#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41357#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41356#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41355#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41354#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41353#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41352#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41351#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41350#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41349#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41348#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41347#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41346#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41345#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41344#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41343#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41342#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41341#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41340#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41339#L17-4 foo_#res#1 := foo_~i~0#1; 41338#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41337#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41336#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41335#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41334#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41333#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41332#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41331#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41330#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41329#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41328#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41327#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41326#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41325#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41324#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41323#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41322#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41321#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41320#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41319#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41318#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41317#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41316#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41315#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41314#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41313#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41312#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41311#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41310#L17-4 foo_#res#1 := foo_~i~0#1; 41309#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41308#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41307#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41306#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41305#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41304#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41303#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41302#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41301#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41300#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41299#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41298#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41297#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41296#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41295#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41294#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41293#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41292#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41291#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41290#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41289#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41288#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41287#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41286#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41285#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41284#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41283#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41282#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41281#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41280#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41279#L17-4 foo_#res#1 := foo_~i~0#1; 41278#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41277#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41276#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41275#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41274#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41273#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41272#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41271#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41270#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41269#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41268#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41267#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41266#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41265#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41264#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41263#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41262#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41261#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41260#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41259#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41258#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41257#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41256#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41255#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41254#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41253#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41252#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41251#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41250#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41249#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41248#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41247#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41246#L17-4 foo_#res#1 := foo_~i~0#1; 41245#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41244#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41243#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41242#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41241#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41240#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41239#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41238#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41237#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41236#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41235#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41234#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41233#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41232#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41231#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41230#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41229#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41228#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41227#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41226#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41225#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41224#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41223#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41222#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41221#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41220#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41219#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41218#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41217#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41216#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41215#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41214#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41213#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41212#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41209#L17-4 foo_#res#1 := foo_~i~0#1; 41207#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41205#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41203#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41201#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41199#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41197#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41195#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41193#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41191#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41189#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41187#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41185#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41183#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41181#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41179#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41177#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41175#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41173#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41171#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41169#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41167#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41165#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41163#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41161#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41159#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41157#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41155#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41153#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41151#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41149#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41147#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41146#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41145#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41141#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41139#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41137#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41134#L17-4 foo_#res#1 := foo_~i~0#1; 41132#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41130#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41128#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41126#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41124#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41122#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41120#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41118#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41116#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41114#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41112#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41110#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41108#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41106#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41104#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41102#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41100#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41098#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41096#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41094#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41092#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41090#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41088#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41086#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41084#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41082#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41080#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41078#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41076#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41073#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41072#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41070#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41058#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41059#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41142#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41140#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41138#L17-4 foo_#res#1 := foo_~i~0#1; 41135#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41133#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41131#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41129#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41127#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41125#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41123#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41121#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41119#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41117#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41115#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41113#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41111#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41109#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41107#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41105#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41103#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41101#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41099#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41097#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41095#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41093#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41091#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41089#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41087#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41085#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41083#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41081#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41079#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41077#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41075#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41074#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41067#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41056#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41057#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41208#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41206#L17-4 foo_#res#1 := foo_~i~0#1; 41204#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41202#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41200#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41198#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41196#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41194#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41192#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41190#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41188#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41186#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41184#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41182#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41180#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41178#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41176#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41174#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41172#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41170#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41168#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41166#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41164#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41162#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41160#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41158#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41156#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41154#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41152#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41150#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41148#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41136#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41066#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41062#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41063#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41071#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41068#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41053#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41515#L17-4 foo_#res#1 := foo_~i~0#1; 41514#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41512#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 40847#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 40848#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41517#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40845#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40846#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41552#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41551#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41550#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41549#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41548#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41547#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41546#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41545#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41544#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41543#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41542#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41541#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41540#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41539#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41538#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41537#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41536#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41535#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41534#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41533#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41532#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41531#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41530#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41529#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41528#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41527#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41526#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41525#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40832#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 41048#L17-4 foo_#res#1 := foo_~i~0#1; 41047#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 41046#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41045#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 41044#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41043#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41042#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41041#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41040#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41039#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41038#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41037#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41036#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41035#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41034#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41033#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41032#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41031#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41030#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41029#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41028#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41027#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41026#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41025#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41024#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41023#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41022#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41021#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41020#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41019#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41018#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41017#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41016#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41015#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41014#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41013#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41012#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41011#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41010#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41009#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41008#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41007#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41006#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41005#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41004#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41003#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41002#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 41001#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 41000#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40999#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40998#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40997#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40996#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40995#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40994#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40993#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40992#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40991#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40990#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40989#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40988#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40987#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40986#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40985#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40984#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 40983#L17-4 foo_#res#1 := foo_~i~0#1; 40982#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 40981#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 40980#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 40979#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40978#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40977#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40976#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40975#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40974#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40973#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40972#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40971#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40970#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40969#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40968#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40967#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40966#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40965#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40964#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40963#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40962#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40961#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40960#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40959#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40958#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40957#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40956#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40955#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40954#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40953#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40952#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40951#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40950#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40949#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40948#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40947#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40946#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40945#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40944#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40943#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40942#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40941#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40940#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40939#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40938#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40937#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40936#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40935#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40934#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40933#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40932#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40931#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40930#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40929#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40928#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40927#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40926#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40925#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40924#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40923#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40922#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40921#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40920#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40919#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 40918#L17-4 foo_#res#1 := foo_~i~0#1; 40917#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 40916#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 40915#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 40851#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40914#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40913#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40912#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40911#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40910#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40909#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40908#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40907#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40906#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40905#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40904#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40903#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40902#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40901#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40900#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40899#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40898#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40897#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40896#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40895#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40894#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40893#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40892#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40891#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40890#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40889#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40888#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40887#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40886#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40885#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40884#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40883#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40882#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40881#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40880#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40879#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40878#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40877#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40876#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40875#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40874#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40873#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40872#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40871#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40870#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40869#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40868#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40867#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40866#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40865#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40864#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40863#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40862#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40861#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40860#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40859#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40858#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40857#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 40856#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 40855#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 40854#L17-4 foo_#res#1 := foo_~i~0#1; 40853#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 40852#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 40850#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 40839#L26-4 main_~i~1#1 := 0; 40835#L29-3 [2023-11-29 02:06:11,577 INFO L750 eck$LassoCheckResult]: Loop: 40835#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 40836#L30 assume !(main_#t~mem5#1 != main_~i~1#1);havoc main_#t~mem5#1; 40837#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 40835#L29-3 [2023-11-29 02:06:11,577 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:06:11,577 INFO L85 PathProgramCache]: Analyzing trace with hash 1004969781, now seen corresponding path program 10 times [2023-11-29 02:06:11,577 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:06:11,577 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263477490] [2023-11-29 02:06:11,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:06:11,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:06:11,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:06:15,487 INFO L134 CoverageAnalysis]: Checked inductivity of 91768 backedges. 50741 proven. 857 refuted. 0 times theorem prover too weak. 40170 trivial. 0 not checked. [2023-11-29 02:06:15,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:06:15,488 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1263477490] [2023-11-29 02:06:15,488 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1263477490] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:06:15,488 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [42748257] [2023-11-29 02:06:15,488 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 02:06:15,488 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:06:15,488 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:06:15,489 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:06:15,490 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Waiting until timeout for monitored process [2023-11-29 02:06:16,673 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 02:06:16,673 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:06:16,691 INFO L262 TraceCheckSpWp]: Trace formula consists of 3866 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-29 02:06:16,700 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:06:18,590 INFO L134 CoverageAnalysis]: Checked inductivity of 91768 backedges. 20916 proven. 65984 refuted. 0 times theorem prover too weak. 4868 trivial. 0 not checked. [2023-11-29 02:06:18,590 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:06:20,516 INFO L134 CoverageAnalysis]: Checked inductivity of 91768 backedges. 20916 proven. 65984 refuted. 0 times theorem prover too weak. 4868 trivial. 0 not checked. [2023-11-29 02:06:20,516 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [42748257] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:06:20,516 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:06:20,517 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 47, 47] total 106 [2023-11-29 02:06:20,517 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1093143616] [2023-11-29 02:06:20,517 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:06:20,518 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:06:20,519 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:06:20,519 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 10 times [2023-11-29 02:06:20,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:06:20,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [318800151] [2023-11-29 02:06:20,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:06:20,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:06:20,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:06:20,523 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:06:20,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:06:20,525 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:06:20,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:06:20,561 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 106 interpolants. [2023-11-29 02:06:20,565 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1469, Invalid=9661, Unknown=0, NotChecked=0, Total=11130 [2023-11-29 02:06:20,565 INFO L87 Difference]: Start difference. First operand 722 states and 778 transitions. cyclomatic complexity: 58 Second operand has 106 states, 106 states have (on average 3.1037735849056602) internal successors, (329), 106 states have internal predecessors, (329), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:06:37,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:06:37,548 INFO L93 Difference]: Finished difference Result 942 states and 1002 transitions. [2023-11-29 02:06:37,548 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 942 states and 1002 transitions. [2023-11-29 02:06:37,551 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:06:37,554 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 942 states to 933 states and 991 transitions. [2023-11-29 02:06:37,555 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 74 [2023-11-29 02:06:37,555 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 74 [2023-11-29 02:06:37,555 INFO L73 IsDeterministic]: Start isDeterministic. Operand 933 states and 991 transitions. [2023-11-29 02:06:37,555 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:06:37,555 INFO L218 hiAutomatonCegarLoop]: Abstraction has 933 states and 991 transitions. [2023-11-29 02:06:37,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 933 states and 991 transitions. [2023-11-29 02:06:37,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 933 to 818. [2023-11-29 02:06:37,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 818 states, 818 states have (on average 1.0709046454767726) internal successors, (876), 817 states have internal predecessors, (876), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:06:37,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 818 states to 818 states and 876 transitions. [2023-11-29 02:06:37,566 INFO L240 hiAutomatonCegarLoop]: Abstraction has 818 states and 876 transitions. [2023-11-29 02:06:37,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 492 states. [2023-11-29 02:06:37,567 INFO L428 stractBuchiCegarLoop]: Abstraction has 818 states and 876 transitions. [2023-11-29 02:06:37,567 INFO L335 stractBuchiCegarLoop]: ======== Iteration 28 ============ [2023-11-29 02:06:37,567 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 818 states and 876 transitions. [2023-11-29 02:06:37,570 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:06:37,570 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:06:37,570 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:06:37,575 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [328, 328, 25, 25, 25, 25, 25, 1, 1, 1, 1] [2023-11-29 02:06:37,575 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:06:37,576 INFO L748 eck$LassoCheckResult]: Stem: 47734#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 47735#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 47739#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 47736#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47737#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48540#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 47742#L17-4 foo_#res#1 := foo_~i~0#1; 47726#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 47727#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 47740#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 47741#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47724#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47725#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47738#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48541#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48539#L17-4 foo_#res#1 := foo_~i~0#1; 48538#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 47731#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 47732#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48537#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48536#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48535#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48534#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48533#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48532#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48531#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48530#L17-4 foo_#res#1 := foo_~i~0#1; 48529#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48528#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48527#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48526#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48525#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48524#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48523#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48522#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48521#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48520#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48519#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48518#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48517#L17-4 foo_#res#1 := foo_~i~0#1; 48516#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48515#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48514#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48513#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48512#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48511#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48510#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48509#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48508#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48507#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48506#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48505#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48504#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48503#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48502#L17-4 foo_#res#1 := foo_~i~0#1; 48501#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48500#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48499#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48498#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48497#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48496#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48495#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48494#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48493#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48492#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48491#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48490#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48489#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48488#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48487#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48486#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48485#L17-4 foo_#res#1 := foo_~i~0#1; 48484#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48483#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48482#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48481#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48480#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48479#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48478#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48477#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48476#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48475#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48474#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48473#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48472#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48471#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48470#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48469#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48468#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48467#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48466#L17-4 foo_#res#1 := foo_~i~0#1; 48465#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48464#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48463#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48462#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48461#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48460#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48459#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48458#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48457#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48456#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48455#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48454#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48453#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48452#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48451#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48450#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48449#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48448#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48447#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48446#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48445#L17-4 foo_#res#1 := foo_~i~0#1; 48444#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48443#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48442#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48441#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48440#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48439#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48438#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48437#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48436#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48435#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48434#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48433#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48432#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48431#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48430#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48429#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48428#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48427#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48426#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48425#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48424#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48423#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48422#L17-4 foo_#res#1 := foo_~i~0#1; 48421#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48420#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48419#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48418#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48417#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48416#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48415#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48414#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48413#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48412#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48411#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48410#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48409#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48408#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48407#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48406#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48405#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48404#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48403#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48402#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48401#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48400#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48399#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48398#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48397#L17-4 foo_#res#1 := foo_~i~0#1; 48396#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48395#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48394#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48393#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48392#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48391#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48390#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48389#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48388#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48387#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48386#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48385#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48384#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48383#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48382#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48381#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48380#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48379#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48378#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48377#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48376#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48375#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48374#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48373#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48372#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48371#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48370#L17-4 foo_#res#1 := foo_~i~0#1; 48369#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48368#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48367#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48366#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48365#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48364#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48363#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48362#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48361#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48360#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48359#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48358#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48357#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48356#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48355#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48354#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48353#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48352#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48351#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48350#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48349#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48348#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48347#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48346#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48345#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48344#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48343#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48342#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48341#L17-4 foo_#res#1 := foo_~i~0#1; 48340#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48339#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48338#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48337#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48336#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48335#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48334#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48333#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48332#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48331#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48330#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48329#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48328#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48327#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48326#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48325#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48324#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48323#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48322#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48321#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48320#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48319#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48318#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48317#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48316#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48315#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48314#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48313#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48312#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48311#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48310#L17-4 foo_#res#1 := foo_~i~0#1; 48309#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48308#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48307#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48306#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48305#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48304#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48303#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48302#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48301#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48300#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48299#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48298#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48297#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48296#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48295#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48294#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48293#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48292#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48291#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48290#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48289#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48288#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48287#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48286#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48285#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48284#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48283#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48282#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48281#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48280#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48279#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48278#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48277#L17-4 foo_#res#1 := foo_~i~0#1; 48276#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48275#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48274#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48273#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48272#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48271#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48270#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48269#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48268#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48267#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48266#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48265#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48264#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48263#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48262#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48261#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48260#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48259#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48258#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48257#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48256#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48255#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48254#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48253#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48252#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48251#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48250#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48249#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48248#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48247#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48246#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48245#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48244#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48243#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48242#L17-4 foo_#res#1 := foo_~i~0#1; 48241#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48240#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48239#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48238#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48237#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48236#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48235#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48234#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48233#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48232#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48231#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48230#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48229#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48228#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48227#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48226#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48225#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48224#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48223#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48222#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48221#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48220#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48219#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48218#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48217#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48216#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48215#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48214#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48213#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48212#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48211#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48210#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48209#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48208#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48207#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48206#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48205#L17-4 foo_#res#1 := foo_~i~0#1; 48204#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48203#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48202#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48201#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48200#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48199#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48198#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48197#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48196#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48195#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48194#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48193#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48192#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48191#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48190#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48189#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48188#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48187#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48186#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48185#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48184#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48183#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48182#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48181#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48180#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48179#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48178#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48177#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48176#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48175#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48174#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48173#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48172#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48171#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48170#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48169#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48168#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48167#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48166#L17-4 foo_#res#1 := foo_~i~0#1; 48165#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48164#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48163#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48162#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48161#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48160#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48159#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48158#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48157#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48156#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48155#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48154#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48153#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48152#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48151#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48150#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48149#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48148#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48147#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48146#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48145#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48144#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48143#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48142#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48141#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48140#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48139#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48138#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48137#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48136#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48135#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48134#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48133#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48132#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48131#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48128#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48129#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48126#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48125#L17-4 foo_#res#1 := foo_~i~0#1; 48124#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48123#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48122#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48121#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48120#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48119#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48118#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48117#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48116#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48115#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48114#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48113#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48112#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48111#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48110#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48109#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48108#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48107#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48106#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48105#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48104#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48103#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48102#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48101#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48100#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48099#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48098#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48097#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48096#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48095#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48094#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48093#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48092#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48091#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48088#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48089#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48087#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48083#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48082#L17-4 foo_#res#1 := foo_~i~0#1; 48081#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48080#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48079#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48078#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48077#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48076#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48075#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48074#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48073#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48072#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48071#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48070#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48069#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48068#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48067#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48066#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48065#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48064#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48063#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48062#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48061#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48060#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48059#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48058#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48057#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48056#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48055#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48054#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48053#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48052#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48051#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48050#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48048#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48046#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48043#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48044#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48042#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48038#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 48037#L17-4 foo_#res#1 := foo_~i~0#1; 48036#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 48035#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48034#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 48033#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48032#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48031#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48030#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48029#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48028#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48027#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48026#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48025#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48024#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48023#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48022#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48021#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48020#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48019#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48018#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48017#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48016#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48015#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48014#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48013#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48012#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48011#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48010#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48009#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48008#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48007#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48005#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 48003#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 48001#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47999#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47996#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47997#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47995#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47991#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 47990#L17-4 foo_#res#1 := foo_~i~0#1; 47989#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 47988#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 47987#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 47986#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47985#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47984#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47983#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47982#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47981#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47980#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47979#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47978#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47977#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47976#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47975#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47974#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47973#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47972#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47971#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47970#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47969#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47968#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47967#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47966#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47965#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47964#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47963#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47962#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47960#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47958#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47956#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47954#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47952#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47950#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47947#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47948#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47946#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47752#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 47942#L17-4 foo_#res#1 := foo_~i~0#1; 47941#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 47940#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 47939#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 47938#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47937#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47936#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47935#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47934#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47933#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47932#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47931#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47930#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47929#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47928#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47927#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47926#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47925#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47924#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47923#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47922#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47921#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47920#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47919#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47918#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47917#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47916#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47915#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47914#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47913#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47912#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47911#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47910#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47909#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47908#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47907#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47906#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47905#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47904#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47903#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47902#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47901#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47900#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47899#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47898#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47897#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47896#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47895#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47894#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47893#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47892#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47891#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47890#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47889#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47888#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47887#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47886#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47885#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47884#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47883#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47882#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47881#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47880#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47879#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47878#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 47877#L17-4 foo_#res#1 := foo_~i~0#1; 47876#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 47875#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 47874#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 47873#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47872#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47871#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47870#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47869#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47868#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47867#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47866#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47865#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47864#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47863#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47862#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47861#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47860#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47859#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47858#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47857#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47856#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47855#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47854#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47853#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47852#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47851#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47850#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47849#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47848#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47847#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47846#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47845#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47844#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47843#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47842#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47841#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47840#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47839#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47838#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47837#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47836#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47835#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47834#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47833#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47832#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47831#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47830#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47829#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47828#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47827#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47826#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47825#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47824#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47823#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47822#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47821#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47820#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47819#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47818#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47817#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47816#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47815#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47814#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47813#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 47812#L17-4 foo_#res#1 := foo_~i~0#1; 47811#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 47810#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 47809#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 47744#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47808#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47807#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47806#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47805#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47804#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47803#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47802#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47801#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47800#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47799#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47798#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47797#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47796#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47795#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47794#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47793#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47792#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47791#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47790#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47789#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47788#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47787#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47786#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47785#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47784#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47783#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47782#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47781#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47780#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47779#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47778#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47777#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47776#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47775#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47774#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47773#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47772#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47771#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47770#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47769#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47768#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47767#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47766#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47765#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47764#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47763#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47762#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47761#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47760#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47759#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47758#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47757#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47756#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47755#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47754#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47753#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47751#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47750#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 47749#L17-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 47748#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 47747#L17-4 foo_#res#1 := foo_~i~0#1; 47746#foo_returnLabel#1 main_#t~ret3#1 := foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 47745#L26-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 47743#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 47733#L26-4 main_~i~1#1 := 0; 47728#L29-3 [2023-11-29 02:06:37,577 INFO L750 eck$LassoCheckResult]: Loop: 47728#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 47729#L30 assume !(main_#t~mem5#1 != main_~i~1#1);havoc main_#t~mem5#1; 47730#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47728#L29-3 [2023-11-29 02:06:37,577 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:06:37,577 INFO L85 PathProgramCache]: Analyzing trace with hash -882464075, now seen corresponding path program 11 times [2023-11-29 02:06:37,577 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:06:37,577 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [966662741] [2023-11-29 02:06:37,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:06:37,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:06:37,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:06:42,600 INFO L134 CoverageAnalysis]: Checked inductivity of 116981 backedges. 61250 proven. 962 refuted. 0 times theorem prover too weak. 54769 trivial. 0 not checked. [2023-11-29 02:06:42,600 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:06:42,600 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [966662741] [2023-11-29 02:06:42,600 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [966662741] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:06:42,600 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1129442437] [2023-11-29 02:06:42,600 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 02:06:42,600 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:06:42,601 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:06:42,602 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:06:42,604 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5295f714-9c7f-451a-9abf-16c4015bacea/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Waiting until timeout for monitored process